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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs \3; RUN: -target-abi ilp32f < %s \4; RUN: | FileCheck -check-prefix=RV32IZFH %s5; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs \6; RUN: -target-abi lp64f < %s \7; RUN: | FileCheck -check-prefix=RV64IZFH %s8; RUN: llc -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs \9; RUN: -target-abi ilp32 < %s \10; RUN: | FileCheck -check-prefix=RV32IZHINX %s11; RUN: llc -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs \12; RUN: -target-abi lp64 < %s \13; RUN: | FileCheck -check-prefix=RV64IZHINX %s14; RUN: llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs \15; RUN: -target-abi ilp32f < %s \16; RUN: | FileCheck -check-prefix=RV32IZFHMIN %s17; RUN: llc -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs \18; RUN: -target-abi lp64f < %s \19; RUN: | FileCheck -check-prefix=RV64IZFHMIN %s20; RUN: llc -mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs \21; RUN: -target-abi ilp32 < %s \22; RUN: | FileCheck -check-prefix=RV32IZHINXMIN %s23; RUN: llc -mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs \24; RUN: -target-abi lp64 < %s \25; RUN: | FileCheck -check-prefix=RV64IZHINXMIN %s26 27define half @frem_f16(half %a, half %b) nounwind {28; RV32IZFH-LABEL: frem_f16:29; RV32IZFH: # %bb.0:30; RV32IZFH-NEXT: addi sp, sp, -1631; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill32; RV32IZFH-NEXT: fcvt.s.h fa0, fa033; RV32IZFH-NEXT: fcvt.s.h fa1, fa134; RV32IZFH-NEXT: call fmodf35; RV32IZFH-NEXT: fcvt.h.s fa0, fa036; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload37; RV32IZFH-NEXT: addi sp, sp, 1638; RV32IZFH-NEXT: ret39;40; RV64IZFH-LABEL: frem_f16:41; RV64IZFH: # %bb.0:42; RV64IZFH-NEXT: addi sp, sp, -1643; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill44; RV64IZFH-NEXT: fcvt.s.h fa0, fa045; RV64IZFH-NEXT: fcvt.s.h fa1, fa146; RV64IZFH-NEXT: call fmodf47; RV64IZFH-NEXT: fcvt.h.s fa0, fa048; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload49; RV64IZFH-NEXT: addi sp, sp, 1650; RV64IZFH-NEXT: ret51;52; RV32IZHINX-LABEL: frem_f16:53; RV32IZHINX: # %bb.0:54; RV32IZHINX-NEXT: addi sp, sp, -1655; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill56; RV32IZHINX-NEXT: fcvt.s.h a0, a057; RV32IZHINX-NEXT: fcvt.s.h a1, a158; RV32IZHINX-NEXT: call fmodf59; RV32IZHINX-NEXT: fcvt.h.s a0, a060; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload61; RV32IZHINX-NEXT: addi sp, sp, 1662; RV32IZHINX-NEXT: ret63;64; RV64IZHINX-LABEL: frem_f16:65; RV64IZHINX: # %bb.0:66; RV64IZHINX-NEXT: addi sp, sp, -1667; RV64IZHINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill68; RV64IZHINX-NEXT: fcvt.s.h a0, a069; RV64IZHINX-NEXT: fcvt.s.h a1, a170; RV64IZHINX-NEXT: call fmodf71; RV64IZHINX-NEXT: fcvt.h.s a0, a072; RV64IZHINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload73; RV64IZHINX-NEXT: addi sp, sp, 1674; RV64IZHINX-NEXT: ret75;76; RV32IZFHMIN-LABEL: frem_f16:77; RV32IZFHMIN: # %bb.0:78; RV32IZFHMIN-NEXT: addi sp, sp, -1679; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill80; RV32IZFHMIN-NEXT: fcvt.s.h fa0, fa081; RV32IZFHMIN-NEXT: fcvt.s.h fa1, fa182; RV32IZFHMIN-NEXT: call fmodf83; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa084; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload85; RV32IZFHMIN-NEXT: addi sp, sp, 1686; RV32IZFHMIN-NEXT: ret87;88; RV64IZFHMIN-LABEL: frem_f16:89; RV64IZFHMIN: # %bb.0:90; RV64IZFHMIN-NEXT: addi sp, sp, -1691; RV64IZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill92; RV64IZFHMIN-NEXT: fcvt.s.h fa0, fa093; RV64IZFHMIN-NEXT: fcvt.s.h fa1, fa194; RV64IZFHMIN-NEXT: call fmodf95; RV64IZFHMIN-NEXT: fcvt.h.s fa0, fa096; RV64IZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload97; RV64IZFHMIN-NEXT: addi sp, sp, 1698; RV64IZFHMIN-NEXT: ret99;100; RV32IZHINXMIN-LABEL: frem_f16:101; RV32IZHINXMIN: # %bb.0:102; RV32IZHINXMIN-NEXT: addi sp, sp, -16103; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill104; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0105; RV32IZHINXMIN-NEXT: fcvt.s.h a1, a1106; RV32IZHINXMIN-NEXT: call fmodf107; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0108; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload109; RV32IZHINXMIN-NEXT: addi sp, sp, 16110; RV32IZHINXMIN-NEXT: ret111;112; RV64IZHINXMIN-LABEL: frem_f16:113; RV64IZHINXMIN: # %bb.0:114; RV64IZHINXMIN-NEXT: addi sp, sp, -16115; RV64IZHINXMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill116; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0117; RV64IZHINXMIN-NEXT: fcvt.s.h a1, a1118; RV64IZHINXMIN-NEXT: call fmodf119; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0120; RV64IZHINXMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload121; RV64IZHINXMIN-NEXT: addi sp, sp, 16122; RV64IZHINXMIN-NEXT: ret123 %1 = frem half %a, %b124 ret half %1125}126