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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs < %s \3; RUN: -target-abi=ilp32f | FileCheck -check-prefixes=CHECKIZFH,RV32IZFH %s4; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs < %s \5; RUN: -target-abi=lp64f | FileCheck -check-prefixes=CHECKIZFH,RV64IZFH %s6; RUN: llc -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs < %s \7; RUN: -target-abi=ilp32 | FileCheck -check-prefixes=CHECKIZHINX,RV32IZHINX %s8; RUN: llc -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs < %s \9; RUN: -target-abi=lp64 | FileCheck -check-prefixes=CHECKIZHINX,RV64IZHINX %s10; RUN: llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs < %s \11; RUN: -target-abi=ilp32f | FileCheck -check-prefixes=CHECKIZFHMIN,RV32IZFHMIN %s12; RUN: llc -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs < %s \13; RUN: -target-abi=lp64f | FileCheck -check-prefixes=CHECKIZFHMIN,RV64IZFHMIN %s14; RUN: llc -mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs < %s \15; RUN: -target-abi=ilp32 | FileCheck -check-prefixes=CHECKIZHINXMIN,RV32IZHINXMIN %s16; RUN: llc -mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs < %s \17; RUN: -target-abi=lp64 | FileCheck -check-prefixes=CHECKIZHINXMIN,RV64IZHINXMIN %s18 19define signext i8 @test_floor_si8(half %x) {20; RV32IZFH-LABEL: test_floor_si8:21; RV32IZFH: # %bb.0:22; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rdn23; RV32IZFH-NEXT: ret24;25; RV64IZFH-LABEL: test_floor_si8:26; RV64IZFH: # %bb.0:27; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rdn28; RV64IZFH-NEXT: ret29;30; RV32IZHINX-LABEL: test_floor_si8:31; RV32IZHINX: # %bb.0:32; RV32IZHINX-NEXT: li a1, 2533; RV32IZHINX-NEXT: slli a1, a1, 1034; RV32IZHINX-NEXT: fabs.h a2, a035; RV32IZHINX-NEXT: flt.h a1, a2, a136; RV32IZHINX-NEXT: beqz a1, .LBB0_237; RV32IZHINX-NEXT: # %bb.1:38; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rdn39; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rdn40; RV32IZHINX-NEXT: fsgnj.h a0, a1, a041; RV32IZHINX-NEXT: .LBB0_2:42; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz43; RV32IZHINX-NEXT: ret44;45; RV64IZHINX-LABEL: test_floor_si8:46; RV64IZHINX: # %bb.0:47; RV64IZHINX-NEXT: li a1, 2548; RV64IZHINX-NEXT: slli a1, a1, 1049; RV64IZHINX-NEXT: fabs.h a2, a050; RV64IZHINX-NEXT: flt.h a1, a2, a151; RV64IZHINX-NEXT: beqz a1, .LBB0_252; RV64IZHINX-NEXT: # %bb.1:53; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rdn54; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rdn55; RV64IZHINX-NEXT: fsgnj.h a0, a1, a056; RV64IZHINX-NEXT: .LBB0_2:57; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz58; RV64IZHINX-NEXT: ret59;60; RV32IZFHMIN-LABEL: test_floor_si8:61; RV32IZFHMIN: # %bb.0:62; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa063; RV32IZFHMIN-NEXT: lui a0, 30720064; RV32IZFHMIN-NEXT: fmv.w.x fa4, a065; RV32IZFHMIN-NEXT: fabs.s fa3, fa566; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa467; RV32IZFHMIN-NEXT: beqz a0, .LBB0_268; RV32IZFHMIN-NEXT: # %bb.1:69; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn70; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn71; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa572; RV32IZFHMIN-NEXT: .LBB0_2:73; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa574; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa575; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz76; RV32IZFHMIN-NEXT: ret77;78; RV64IZFHMIN-LABEL: test_floor_si8:79; RV64IZFHMIN: # %bb.0:80; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa081; RV64IZFHMIN-NEXT: lui a0, 30720082; RV64IZFHMIN-NEXT: fmv.w.x fa4, a083; RV64IZFHMIN-NEXT: fabs.s fa3, fa584; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa485; RV64IZFHMIN-NEXT: beqz a0, .LBB0_286; RV64IZFHMIN-NEXT: # %bb.1:87; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn88; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn89; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa590; RV64IZFHMIN-NEXT: .LBB0_2:91; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa592; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa593; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz94; RV64IZFHMIN-NEXT: ret95;96; RV32IZHINXMIN-LABEL: test_floor_si8:97; RV32IZHINXMIN: # %bb.0:98; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a099; RV32IZHINXMIN-NEXT: lui a1, 307200100; RV32IZHINXMIN-NEXT: fabs.s a2, a0101; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1102; RV32IZHINXMIN-NEXT: beqz a1, .LBB0_2103; RV32IZHINXMIN-NEXT: # %bb.1:104; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn105; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn106; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0107; RV32IZHINXMIN-NEXT: .LBB0_2:108; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0109; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0110; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz111; RV32IZHINXMIN-NEXT: ret112;113; RV64IZHINXMIN-LABEL: test_floor_si8:114; RV64IZHINXMIN: # %bb.0:115; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0116; RV64IZHINXMIN-NEXT: lui a1, 307200117; RV64IZHINXMIN-NEXT: fabs.s a2, a0118; RV64IZHINXMIN-NEXT: flt.s a1, a2, a1119; RV64IZHINXMIN-NEXT: beqz a1, .LBB0_2120; RV64IZHINXMIN-NEXT: # %bb.1:121; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn122; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn123; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a0124; RV64IZHINXMIN-NEXT: .LBB0_2:125; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0126; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0127; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz128; RV64IZHINXMIN-NEXT: ret129 %a = call half @llvm.floor.f16(half %x)130 %b = fptosi half %a to i8131 ret i8 %b132}133 134define signext i16 @test_floor_si16(half %x) {135; RV32IZFH-LABEL: test_floor_si16:136; RV32IZFH: # %bb.0:137; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rdn138; RV32IZFH-NEXT: ret139;140; RV64IZFH-LABEL: test_floor_si16:141; RV64IZFH: # %bb.0:142; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rdn143; RV64IZFH-NEXT: ret144;145; RV32IZHINX-LABEL: test_floor_si16:146; RV32IZHINX: # %bb.0:147; RV32IZHINX-NEXT: li a1, 25148; RV32IZHINX-NEXT: slli a1, a1, 10149; RV32IZHINX-NEXT: fabs.h a2, a0150; RV32IZHINX-NEXT: flt.h a1, a2, a1151; RV32IZHINX-NEXT: beqz a1, .LBB1_2152; RV32IZHINX-NEXT: # %bb.1:153; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rdn154; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rdn155; RV32IZHINX-NEXT: fsgnj.h a0, a1, a0156; RV32IZHINX-NEXT: .LBB1_2:157; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz158; RV32IZHINX-NEXT: ret159;160; RV64IZHINX-LABEL: test_floor_si16:161; RV64IZHINX: # %bb.0:162; RV64IZHINX-NEXT: li a1, 25163; RV64IZHINX-NEXT: slli a1, a1, 10164; RV64IZHINX-NEXT: fabs.h a2, a0165; RV64IZHINX-NEXT: flt.h a1, a2, a1166; RV64IZHINX-NEXT: beqz a1, .LBB1_2167; RV64IZHINX-NEXT: # %bb.1:168; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rdn169; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rdn170; RV64IZHINX-NEXT: fsgnj.h a0, a1, a0171; RV64IZHINX-NEXT: .LBB1_2:172; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz173; RV64IZHINX-NEXT: ret174;175; RV32IZFHMIN-LABEL: test_floor_si16:176; RV32IZFHMIN: # %bb.0:177; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa0178; RV32IZFHMIN-NEXT: lui a0, 307200179; RV32IZFHMIN-NEXT: fmv.w.x fa4, a0180; RV32IZFHMIN-NEXT: fabs.s fa3, fa5181; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa4182; RV32IZFHMIN-NEXT: beqz a0, .LBB1_2183; RV32IZFHMIN-NEXT: # %bb.1:184; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn185; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn186; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5187; RV32IZFHMIN-NEXT: .LBB1_2:188; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa5189; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa5190; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz191; RV32IZFHMIN-NEXT: ret192;193; RV64IZFHMIN-LABEL: test_floor_si16:194; RV64IZFHMIN: # %bb.0:195; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa0196; RV64IZFHMIN-NEXT: lui a0, 307200197; RV64IZFHMIN-NEXT: fmv.w.x fa4, a0198; RV64IZFHMIN-NEXT: fabs.s fa3, fa5199; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa4200; RV64IZFHMIN-NEXT: beqz a0, .LBB1_2201; RV64IZFHMIN-NEXT: # %bb.1:202; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn203; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn204; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5205; RV64IZFHMIN-NEXT: .LBB1_2:206; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa5207; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa5208; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz209; RV64IZFHMIN-NEXT: ret210;211; RV32IZHINXMIN-LABEL: test_floor_si16:212; RV32IZHINXMIN: # %bb.0:213; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0214; RV32IZHINXMIN-NEXT: lui a1, 307200215; RV32IZHINXMIN-NEXT: fabs.s a2, a0216; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1217; RV32IZHINXMIN-NEXT: beqz a1, .LBB1_2218; RV32IZHINXMIN-NEXT: # %bb.1:219; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn220; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn221; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0222; RV32IZHINXMIN-NEXT: .LBB1_2:223; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0224; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0225; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz226; RV32IZHINXMIN-NEXT: ret227;228; RV64IZHINXMIN-LABEL: test_floor_si16:229; RV64IZHINXMIN: # %bb.0:230; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0231; RV64IZHINXMIN-NEXT: lui a1, 307200232; RV64IZHINXMIN-NEXT: fabs.s a2, a0233; RV64IZHINXMIN-NEXT: flt.s a1, a2, a1234; RV64IZHINXMIN-NEXT: beqz a1, .LBB1_2235; RV64IZHINXMIN-NEXT: # %bb.1:236; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn237; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn238; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a0239; RV64IZHINXMIN-NEXT: .LBB1_2:240; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0241; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0242; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz243; RV64IZHINXMIN-NEXT: ret244 %a = call half @llvm.floor.f16(half %x)245 %b = fptosi half %a to i16246 ret i16 %b247}248 249define signext i32 @test_floor_si32(half %x) {250; CHECKIZFH-LABEL: test_floor_si32:251; CHECKIZFH: # %bb.0:252; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rdn253; CHECKIZFH-NEXT: ret254;255; CHECKIZHINX-LABEL: test_floor_si32:256; CHECKIZHINX: # %bb.0:257; CHECKIZHINX-NEXT: li a1, 25258; CHECKIZHINX-NEXT: slli a1, a1, 10259; CHECKIZHINX-NEXT: fabs.h a2, a0260; CHECKIZHINX-NEXT: flt.h a1, a2, a1261; CHECKIZHINX-NEXT: beqz a1, .LBB2_2262; CHECKIZHINX-NEXT: # %bb.1:263; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rdn264; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rdn265; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0266; CHECKIZHINX-NEXT: .LBB2_2:267; CHECKIZHINX-NEXT: fcvt.w.h a0, a0, rtz268; CHECKIZHINX-NEXT: ret269;270; CHECKIZFHMIN-LABEL: test_floor_si32:271; CHECKIZFHMIN: # %bb.0:272; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0273; CHECKIZFHMIN-NEXT: lui a0, 307200274; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0275; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5276; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4277; CHECKIZFHMIN-NEXT: beqz a0, .LBB2_2278; CHECKIZFHMIN-NEXT: # %bb.1:279; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn280; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn281; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5282; CHECKIZFHMIN-NEXT: .LBB2_2:283; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa5284; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa5285; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz286; CHECKIZFHMIN-NEXT: ret287;288; CHECKIZHINXMIN-LABEL: test_floor_si32:289; CHECKIZHINXMIN: # %bb.0:290; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0291; CHECKIZHINXMIN-NEXT: lui a1, 307200292; CHECKIZHINXMIN-NEXT: fabs.s a2, a0293; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1294; CHECKIZHINXMIN-NEXT: beqz a1, .LBB2_2295; CHECKIZHINXMIN-NEXT: # %bb.1:296; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn297; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn298; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0299; CHECKIZHINXMIN-NEXT: .LBB2_2:300; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0301; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0302; CHECKIZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz303; CHECKIZHINXMIN-NEXT: ret304 %a = call half @llvm.floor.f16(half %x)305 %b = fptosi half %a to i32306 ret i32 %b307}308 309define i64 @test_floor_si64(half %x) {310; RV32IZFH-LABEL: test_floor_si64:311; RV32IZFH: # %bb.0:312; RV32IZFH-NEXT: li a0, 25313; RV32IZFH-NEXT: slli a0, a0, 10314; RV32IZFH-NEXT: fmv.h.x fa5, a0315; RV32IZFH-NEXT: fabs.h fa4, fa0316; RV32IZFH-NEXT: flt.h a0, fa4, fa5317; RV32IZFH-NEXT: beqz a0, .LBB3_2318; RV32IZFH-NEXT: # %bb.1:319; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rdn320; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rdn321; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa0322; RV32IZFH-NEXT: .LBB3_2:323; RV32IZFH-NEXT: addi sp, sp, -16324; RV32IZFH-NEXT: .cfi_def_cfa_offset 16325; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill326; RV32IZFH-NEXT: .cfi_offset ra, -4327; RV32IZFH-NEXT: call __fixhfdi328; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload329; RV32IZFH-NEXT: .cfi_restore ra330; RV32IZFH-NEXT: addi sp, sp, 16331; RV32IZFH-NEXT: .cfi_def_cfa_offset 0332; RV32IZFH-NEXT: ret333;334; RV64IZFH-LABEL: test_floor_si64:335; RV64IZFH: # %bb.0:336; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rdn337; RV64IZFH-NEXT: ret338;339; RV32IZHINX-LABEL: test_floor_si64:340; RV32IZHINX: # %bb.0:341; RV32IZHINX-NEXT: li a1, 25342; RV32IZHINX-NEXT: slli a1, a1, 10343; RV32IZHINX-NEXT: fabs.h a2, a0344; RV32IZHINX-NEXT: flt.h a1, a2, a1345; RV32IZHINX-NEXT: beqz a1, .LBB3_2346; RV32IZHINX-NEXT: # %bb.1:347; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rdn348; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rdn349; RV32IZHINX-NEXT: fsgnj.h a0, a1, a0350; RV32IZHINX-NEXT: .LBB3_2:351; RV32IZHINX-NEXT: addi sp, sp, -16352; RV32IZHINX-NEXT: .cfi_def_cfa_offset 16353; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill354; RV32IZHINX-NEXT: .cfi_offset ra, -4355; RV32IZHINX-NEXT: call __fixhfdi356; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload357; RV32IZHINX-NEXT: .cfi_restore ra358; RV32IZHINX-NEXT: addi sp, sp, 16359; RV32IZHINX-NEXT: .cfi_def_cfa_offset 0360; RV32IZHINX-NEXT: ret361;362; RV64IZHINX-LABEL: test_floor_si64:363; RV64IZHINX: # %bb.0:364; RV64IZHINX-NEXT: li a1, 25365; RV64IZHINX-NEXT: slli a1, a1, 10366; RV64IZHINX-NEXT: fabs.h a2, a0367; RV64IZHINX-NEXT: flt.h a1, a2, a1368; RV64IZHINX-NEXT: beqz a1, .LBB3_2369; RV64IZHINX-NEXT: # %bb.1:370; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rdn371; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rdn372; RV64IZHINX-NEXT: fsgnj.h a0, a1, a0373; RV64IZHINX-NEXT: .LBB3_2:374; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz375; RV64IZHINX-NEXT: ret376;377; RV32IZFHMIN-LABEL: test_floor_si64:378; RV32IZFHMIN: # %bb.0:379; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa0380; RV32IZFHMIN-NEXT: lui a0, 307200381; RV32IZFHMIN-NEXT: fmv.w.x fa4, a0382; RV32IZFHMIN-NEXT: fabs.s fa3, fa5383; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa4384; RV32IZFHMIN-NEXT: beqz a0, .LBB3_2385; RV32IZFHMIN-NEXT: # %bb.1:386; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn387; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn388; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5389; RV32IZFHMIN-NEXT: .LBB3_2:390; RV32IZFHMIN-NEXT: addi sp, sp, -16391; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 16392; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill393; RV32IZFHMIN-NEXT: .cfi_offset ra, -4394; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa5395; RV32IZFHMIN-NEXT: call __fixhfdi396; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload397; RV32IZFHMIN-NEXT: .cfi_restore ra398; RV32IZFHMIN-NEXT: addi sp, sp, 16399; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 0400; RV32IZFHMIN-NEXT: ret401;402; RV64IZFHMIN-LABEL: test_floor_si64:403; RV64IZFHMIN: # %bb.0:404; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa0405; RV64IZFHMIN-NEXT: lui a0, 307200406; RV64IZFHMIN-NEXT: fmv.w.x fa4, a0407; RV64IZFHMIN-NEXT: fabs.s fa3, fa5408; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa4409; RV64IZFHMIN-NEXT: beqz a0, .LBB3_2410; RV64IZFHMIN-NEXT: # %bb.1:411; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn412; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn413; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5414; RV64IZFHMIN-NEXT: .LBB3_2:415; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa5416; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa5417; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz418; RV64IZFHMIN-NEXT: ret419;420; RV32IZHINXMIN-LABEL: test_floor_si64:421; RV32IZHINXMIN: # %bb.0:422; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0423; RV32IZHINXMIN-NEXT: lui a1, 307200424; RV32IZHINXMIN-NEXT: fabs.s a2, a0425; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1426; RV32IZHINXMIN-NEXT: beqz a1, .LBB3_2427; RV32IZHINXMIN-NEXT: # %bb.1:428; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn429; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn430; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0431; RV32IZHINXMIN-NEXT: .LBB3_2:432; RV32IZHINXMIN-NEXT: addi sp, sp, -16433; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 16434; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill435; RV32IZHINXMIN-NEXT: .cfi_offset ra, -4436; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0437; RV32IZHINXMIN-NEXT: call __fixhfdi438; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload439; RV32IZHINXMIN-NEXT: .cfi_restore ra440; RV32IZHINXMIN-NEXT: addi sp, sp, 16441; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 0442; RV32IZHINXMIN-NEXT: ret443;444; RV64IZHINXMIN-LABEL: test_floor_si64:445; RV64IZHINXMIN: # %bb.0:446; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0447; RV64IZHINXMIN-NEXT: lui a1, 307200448; RV64IZHINXMIN-NEXT: fabs.s a2, a0449; RV64IZHINXMIN-NEXT: flt.s a1, a2, a1450; RV64IZHINXMIN-NEXT: beqz a1, .LBB3_2451; RV64IZHINXMIN-NEXT: # %bb.1:452; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn453; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn454; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a0455; RV64IZHINXMIN-NEXT: .LBB3_2:456; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0457; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0458; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz459; RV64IZHINXMIN-NEXT: ret460 %a = call half @llvm.floor.f16(half %x)461 %b = fptosi half %a to i64462 ret i64 %b463}464 465define zeroext i8 @test_floor_ui8(half %x) {466; RV32IZFH-LABEL: test_floor_ui8:467; RV32IZFH: # %bb.0:468; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rdn469; RV32IZFH-NEXT: ret470;471; RV64IZFH-LABEL: test_floor_ui8:472; RV64IZFH: # %bb.0:473; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rdn474; RV64IZFH-NEXT: ret475;476; RV32IZHINX-LABEL: test_floor_ui8:477; RV32IZHINX: # %bb.0:478; RV32IZHINX-NEXT: li a1, 25479; RV32IZHINX-NEXT: slli a1, a1, 10480; RV32IZHINX-NEXT: fabs.h a2, a0481; RV32IZHINX-NEXT: flt.h a1, a2, a1482; RV32IZHINX-NEXT: beqz a1, .LBB4_2483; RV32IZHINX-NEXT: # %bb.1:484; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rdn485; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rdn486; RV32IZHINX-NEXT: fsgnj.h a0, a1, a0487; RV32IZHINX-NEXT: .LBB4_2:488; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz489; RV32IZHINX-NEXT: ret490;491; RV64IZHINX-LABEL: test_floor_ui8:492; RV64IZHINX: # %bb.0:493; RV64IZHINX-NEXT: li a1, 25494; RV64IZHINX-NEXT: slli a1, a1, 10495; RV64IZHINX-NEXT: fabs.h a2, a0496; RV64IZHINX-NEXT: flt.h a1, a2, a1497; RV64IZHINX-NEXT: beqz a1, .LBB4_2498; RV64IZHINX-NEXT: # %bb.1:499; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rdn500; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rdn501; RV64IZHINX-NEXT: fsgnj.h a0, a1, a0502; RV64IZHINX-NEXT: .LBB4_2:503; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz504; RV64IZHINX-NEXT: ret505;506; RV32IZFHMIN-LABEL: test_floor_ui8:507; RV32IZFHMIN: # %bb.0:508; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa0509; RV32IZFHMIN-NEXT: lui a0, 307200510; RV32IZFHMIN-NEXT: fmv.w.x fa4, a0511; RV32IZFHMIN-NEXT: fabs.s fa3, fa5512; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa4513; RV32IZFHMIN-NEXT: beqz a0, .LBB4_2514; RV32IZFHMIN-NEXT: # %bb.1:515; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn516; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn517; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5518; RV32IZFHMIN-NEXT: .LBB4_2:519; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa5520; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa5521; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz522; RV32IZFHMIN-NEXT: ret523;524; RV64IZFHMIN-LABEL: test_floor_ui8:525; RV64IZFHMIN: # %bb.0:526; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa0527; RV64IZFHMIN-NEXT: lui a0, 307200528; RV64IZFHMIN-NEXT: fmv.w.x fa4, a0529; RV64IZFHMIN-NEXT: fabs.s fa3, fa5530; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa4531; RV64IZFHMIN-NEXT: beqz a0, .LBB4_2532; RV64IZFHMIN-NEXT: # %bb.1:533; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn534; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn535; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5536; RV64IZFHMIN-NEXT: .LBB4_2:537; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa5538; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa5539; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz540; RV64IZFHMIN-NEXT: ret541;542; RV32IZHINXMIN-LABEL: test_floor_ui8:543; RV32IZHINXMIN: # %bb.0:544; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0545; RV32IZHINXMIN-NEXT: lui a1, 307200546; RV32IZHINXMIN-NEXT: fabs.s a2, a0547; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1548; RV32IZHINXMIN-NEXT: beqz a1, .LBB4_2549; RV32IZHINXMIN-NEXT: # %bb.1:550; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn551; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn552; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0553; RV32IZHINXMIN-NEXT: .LBB4_2:554; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0555; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0556; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz557; RV32IZHINXMIN-NEXT: ret558;559; RV64IZHINXMIN-LABEL: test_floor_ui8:560; RV64IZHINXMIN: # %bb.0:561; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0562; RV64IZHINXMIN-NEXT: lui a1, 307200563; RV64IZHINXMIN-NEXT: fabs.s a2, a0564; RV64IZHINXMIN-NEXT: flt.s a1, a2, a1565; RV64IZHINXMIN-NEXT: beqz a1, .LBB4_2566; RV64IZHINXMIN-NEXT: # %bb.1:567; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn568; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn569; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a0570; RV64IZHINXMIN-NEXT: .LBB4_2:571; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0572; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0573; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz574; RV64IZHINXMIN-NEXT: ret575 %a = call half @llvm.floor.f16(half %x)576 %b = fptoui half %a to i8577 ret i8 %b578}579 580define zeroext i16 @test_floor_ui16(half %x) {581; RV32IZFH-LABEL: test_floor_ui16:582; RV32IZFH: # %bb.0:583; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rdn584; RV32IZFH-NEXT: ret585;586; RV64IZFH-LABEL: test_floor_ui16:587; RV64IZFH: # %bb.0:588; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rdn589; RV64IZFH-NEXT: ret590;591; RV32IZHINX-LABEL: test_floor_ui16:592; RV32IZHINX: # %bb.0:593; RV32IZHINX-NEXT: li a1, 25594; RV32IZHINX-NEXT: slli a1, a1, 10595; RV32IZHINX-NEXT: fabs.h a2, a0596; RV32IZHINX-NEXT: flt.h a1, a2, a1597; RV32IZHINX-NEXT: beqz a1, .LBB5_2598; RV32IZHINX-NEXT: # %bb.1:599; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rdn600; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rdn601; RV32IZHINX-NEXT: fsgnj.h a0, a1, a0602; RV32IZHINX-NEXT: .LBB5_2:603; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz604; RV32IZHINX-NEXT: ret605;606; RV64IZHINX-LABEL: test_floor_ui16:607; RV64IZHINX: # %bb.0:608; RV64IZHINX-NEXT: li a1, 25609; RV64IZHINX-NEXT: slli a1, a1, 10610; RV64IZHINX-NEXT: fabs.h a2, a0611; RV64IZHINX-NEXT: flt.h a1, a2, a1612; RV64IZHINX-NEXT: beqz a1, .LBB5_2613; RV64IZHINX-NEXT: # %bb.1:614; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rdn615; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rdn616; RV64IZHINX-NEXT: fsgnj.h a0, a1, a0617; RV64IZHINX-NEXT: .LBB5_2:618; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz619; RV64IZHINX-NEXT: ret620;621; RV32IZFHMIN-LABEL: test_floor_ui16:622; RV32IZFHMIN: # %bb.0:623; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa0624; RV32IZFHMIN-NEXT: lui a0, 307200625; RV32IZFHMIN-NEXT: fmv.w.x fa4, a0626; RV32IZFHMIN-NEXT: fabs.s fa3, fa5627; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa4628; RV32IZFHMIN-NEXT: beqz a0, .LBB5_2629; RV32IZFHMIN-NEXT: # %bb.1:630; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn631; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn632; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5633; RV32IZFHMIN-NEXT: .LBB5_2:634; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa5635; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa5636; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz637; RV32IZFHMIN-NEXT: ret638;639; RV64IZFHMIN-LABEL: test_floor_ui16:640; RV64IZFHMIN: # %bb.0:641; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa0642; RV64IZFHMIN-NEXT: lui a0, 307200643; RV64IZFHMIN-NEXT: fmv.w.x fa4, a0644; RV64IZFHMIN-NEXT: fabs.s fa3, fa5645; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa4646; RV64IZFHMIN-NEXT: beqz a0, .LBB5_2647; RV64IZFHMIN-NEXT: # %bb.1:648; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn649; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn650; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5651; RV64IZFHMIN-NEXT: .LBB5_2:652; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa5653; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa5654; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz655; RV64IZFHMIN-NEXT: ret656;657; RV32IZHINXMIN-LABEL: test_floor_ui16:658; RV32IZHINXMIN: # %bb.0:659; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0660; RV32IZHINXMIN-NEXT: lui a1, 307200661; RV32IZHINXMIN-NEXT: fabs.s a2, a0662; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1663; RV32IZHINXMIN-NEXT: beqz a1, .LBB5_2664; RV32IZHINXMIN-NEXT: # %bb.1:665; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn666; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn667; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0668; RV32IZHINXMIN-NEXT: .LBB5_2:669; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0670; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0671; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz672; RV32IZHINXMIN-NEXT: ret673;674; RV64IZHINXMIN-LABEL: test_floor_ui16:675; RV64IZHINXMIN: # %bb.0:676; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0677; RV64IZHINXMIN-NEXT: lui a1, 307200678; RV64IZHINXMIN-NEXT: fabs.s a2, a0679; RV64IZHINXMIN-NEXT: flt.s a1, a2, a1680; RV64IZHINXMIN-NEXT: beqz a1, .LBB5_2681; RV64IZHINXMIN-NEXT: # %bb.1:682; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn683; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn684; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a0685; RV64IZHINXMIN-NEXT: .LBB5_2:686; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0687; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0688; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz689; RV64IZHINXMIN-NEXT: ret690 %a = call half @llvm.floor.f16(half %x)691 %b = fptoui half %a to i16692 ret i16 %b693}694 695define signext i32 @test_floor_ui32(half %x) {696; CHECKIZFH-LABEL: test_floor_ui32:697; CHECKIZFH: # %bb.0:698; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rdn699; CHECKIZFH-NEXT: ret700;701; CHECKIZHINX-LABEL: test_floor_ui32:702; CHECKIZHINX: # %bb.0:703; CHECKIZHINX-NEXT: li a1, 25704; CHECKIZHINX-NEXT: slli a1, a1, 10705; CHECKIZHINX-NEXT: fabs.h a2, a0706; CHECKIZHINX-NEXT: flt.h a1, a2, a1707; CHECKIZHINX-NEXT: beqz a1, .LBB6_2708; CHECKIZHINX-NEXT: # %bb.1:709; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rdn710; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rdn711; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a0712; CHECKIZHINX-NEXT: .LBB6_2:713; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz714; CHECKIZHINX-NEXT: ret715;716; CHECKIZFHMIN-LABEL: test_floor_ui32:717; CHECKIZFHMIN: # %bb.0:718; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0719; CHECKIZFHMIN-NEXT: lui a0, 307200720; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a0721; CHECKIZFHMIN-NEXT: fabs.s fa3, fa5722; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa4723; CHECKIZFHMIN-NEXT: beqz a0, .LBB6_2724; CHECKIZFHMIN-NEXT: # %bb.1:725; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn726; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn727; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5728; CHECKIZFHMIN-NEXT: .LBB6_2:729; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa5730; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa5731; CHECKIZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz732; CHECKIZFHMIN-NEXT: ret733;734; CHECKIZHINXMIN-LABEL: test_floor_ui32:735; CHECKIZHINXMIN: # %bb.0:736; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0737; CHECKIZHINXMIN-NEXT: lui a1, 307200738; CHECKIZHINXMIN-NEXT: fabs.s a2, a0739; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a1740; CHECKIZHINXMIN-NEXT: beqz a1, .LBB6_2741; CHECKIZHINXMIN-NEXT: # %bb.1:742; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn743; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn744; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a0745; CHECKIZHINXMIN-NEXT: .LBB6_2:746; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0747; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0748; CHECKIZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz749; CHECKIZHINXMIN-NEXT: ret750 %a = call half @llvm.floor.f16(half %x)751 %b = fptoui half %a to i32752 ret i32 %b753}754 755define i64 @test_floor_ui64(half %x) {756; RV32IZFH-LABEL: test_floor_ui64:757; RV32IZFH: # %bb.0:758; RV32IZFH-NEXT: li a0, 25759; RV32IZFH-NEXT: slli a0, a0, 10760; RV32IZFH-NEXT: fmv.h.x fa5, a0761; RV32IZFH-NEXT: fabs.h fa4, fa0762; RV32IZFH-NEXT: flt.h a0, fa4, fa5763; RV32IZFH-NEXT: beqz a0, .LBB7_2764; RV32IZFH-NEXT: # %bb.1:765; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rdn766; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rdn767; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa0768; RV32IZFH-NEXT: .LBB7_2:769; RV32IZFH-NEXT: addi sp, sp, -16770; RV32IZFH-NEXT: .cfi_def_cfa_offset 16771; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill772; RV32IZFH-NEXT: .cfi_offset ra, -4773; RV32IZFH-NEXT: call __fixunshfdi774; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload775; RV32IZFH-NEXT: .cfi_restore ra776; RV32IZFH-NEXT: addi sp, sp, 16777; RV32IZFH-NEXT: .cfi_def_cfa_offset 0778; RV32IZFH-NEXT: ret779;780; RV64IZFH-LABEL: test_floor_ui64:781; RV64IZFH: # %bb.0:782; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rdn783; RV64IZFH-NEXT: ret784;785; RV32IZHINX-LABEL: test_floor_ui64:786; RV32IZHINX: # %bb.0:787; RV32IZHINX-NEXT: li a1, 25788; RV32IZHINX-NEXT: slli a1, a1, 10789; RV32IZHINX-NEXT: fabs.h a2, a0790; RV32IZHINX-NEXT: flt.h a1, a2, a1791; RV32IZHINX-NEXT: beqz a1, .LBB7_2792; RV32IZHINX-NEXT: # %bb.1:793; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rdn794; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rdn795; RV32IZHINX-NEXT: fsgnj.h a0, a1, a0796; RV32IZHINX-NEXT: .LBB7_2:797; RV32IZHINX-NEXT: addi sp, sp, -16798; RV32IZHINX-NEXT: .cfi_def_cfa_offset 16799; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill800; RV32IZHINX-NEXT: .cfi_offset ra, -4801; RV32IZHINX-NEXT: call __fixunshfdi802; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload803; RV32IZHINX-NEXT: .cfi_restore ra804; RV32IZHINX-NEXT: addi sp, sp, 16805; RV32IZHINX-NEXT: .cfi_def_cfa_offset 0806; RV32IZHINX-NEXT: ret807;808; RV64IZHINX-LABEL: test_floor_ui64:809; RV64IZHINX: # %bb.0:810; RV64IZHINX-NEXT: li a1, 25811; RV64IZHINX-NEXT: slli a1, a1, 10812; RV64IZHINX-NEXT: fabs.h a2, a0813; RV64IZHINX-NEXT: flt.h a1, a2, a1814; RV64IZHINX-NEXT: beqz a1, .LBB7_2815; RV64IZHINX-NEXT: # %bb.1:816; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rdn817; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rdn818; RV64IZHINX-NEXT: fsgnj.h a0, a1, a0819; RV64IZHINX-NEXT: .LBB7_2:820; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz821; RV64IZHINX-NEXT: ret822;823; RV32IZFHMIN-LABEL: test_floor_ui64:824; RV32IZFHMIN: # %bb.0:825; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa0826; RV32IZFHMIN-NEXT: lui a0, 307200827; RV32IZFHMIN-NEXT: fmv.w.x fa4, a0828; RV32IZFHMIN-NEXT: fabs.s fa3, fa5829; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa4830; RV32IZFHMIN-NEXT: beqz a0, .LBB7_2831; RV32IZFHMIN-NEXT: # %bb.1:832; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn833; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn834; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5835; RV32IZFHMIN-NEXT: .LBB7_2:836; RV32IZFHMIN-NEXT: addi sp, sp, -16837; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 16838; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill839; RV32IZFHMIN-NEXT: .cfi_offset ra, -4840; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa5841; RV32IZFHMIN-NEXT: call __fixunshfdi842; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload843; RV32IZFHMIN-NEXT: .cfi_restore ra844; RV32IZFHMIN-NEXT: addi sp, sp, 16845; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 0846; RV32IZFHMIN-NEXT: ret847;848; RV64IZFHMIN-LABEL: test_floor_ui64:849; RV64IZFHMIN: # %bb.0:850; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa0851; RV64IZFHMIN-NEXT: lui a0, 307200852; RV64IZFHMIN-NEXT: fmv.w.x fa4, a0853; RV64IZFHMIN-NEXT: fabs.s fa3, fa5854; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa4855; RV64IZFHMIN-NEXT: beqz a0, .LBB7_2856; RV64IZFHMIN-NEXT: # %bb.1:857; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn858; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn859; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5860; RV64IZFHMIN-NEXT: .LBB7_2:861; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa5862; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa5863; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz864; RV64IZFHMIN-NEXT: ret865;866; RV32IZHINXMIN-LABEL: test_floor_ui64:867; RV32IZHINXMIN: # %bb.0:868; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0869; RV32IZHINXMIN-NEXT: lui a1, 307200870; RV32IZHINXMIN-NEXT: fabs.s a2, a0871; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1872; RV32IZHINXMIN-NEXT: beqz a1, .LBB7_2873; RV32IZHINXMIN-NEXT: # %bb.1:874; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn875; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn876; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0877; RV32IZHINXMIN-NEXT: .LBB7_2:878; RV32IZHINXMIN-NEXT: addi sp, sp, -16879; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 16880; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill881; RV32IZHINXMIN-NEXT: .cfi_offset ra, -4882; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a0883; RV32IZHINXMIN-NEXT: call __fixunshfdi884; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload885; RV32IZHINXMIN-NEXT: .cfi_restore ra886; RV32IZHINXMIN-NEXT: addi sp, sp, 16887; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 0888; RV32IZHINXMIN-NEXT: ret889;890; RV64IZHINXMIN-LABEL: test_floor_ui64:891; RV64IZHINXMIN: # %bb.0:892; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0893; RV64IZHINXMIN-NEXT: lui a1, 307200894; RV64IZHINXMIN-NEXT: fabs.s a2, a0895; RV64IZHINXMIN-NEXT: flt.s a1, a2, a1896; RV64IZHINXMIN-NEXT: beqz a1, .LBB7_2897; RV64IZHINXMIN-NEXT: # %bb.1:898; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn899; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn900; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a0901; RV64IZHINXMIN-NEXT: .LBB7_2:902; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a0903; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a0904; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz905; RV64IZHINXMIN-NEXT: ret906 %a = call half @llvm.floor.f16(half %x)907 %b = fptoui half %a to i64908 ret i64 %b909}910 911define signext i8 @test_ceil_si8(half %x) {912; RV32IZFH-LABEL: test_ceil_si8:913; RV32IZFH: # %bb.0:914; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rup915; RV32IZFH-NEXT: ret916;917; RV64IZFH-LABEL: test_ceil_si8:918; RV64IZFH: # %bb.0:919; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rup920; RV64IZFH-NEXT: ret921;922; RV32IZHINX-LABEL: test_ceil_si8:923; RV32IZHINX: # %bb.0:924; RV32IZHINX-NEXT: li a1, 25925; RV32IZHINX-NEXT: slli a1, a1, 10926; RV32IZHINX-NEXT: fabs.h a2, a0927; RV32IZHINX-NEXT: flt.h a1, a2, a1928; RV32IZHINX-NEXT: beqz a1, .LBB8_2929; RV32IZHINX-NEXT: # %bb.1:930; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rup931; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rup932; RV32IZHINX-NEXT: fsgnj.h a0, a1, a0933; RV32IZHINX-NEXT: .LBB8_2:934; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz935; RV32IZHINX-NEXT: ret936;937; RV64IZHINX-LABEL: test_ceil_si8:938; RV64IZHINX: # %bb.0:939; RV64IZHINX-NEXT: li a1, 25940; RV64IZHINX-NEXT: slli a1, a1, 10941; RV64IZHINX-NEXT: fabs.h a2, a0942; RV64IZHINX-NEXT: flt.h a1, a2, a1943; RV64IZHINX-NEXT: beqz a1, .LBB8_2944; RV64IZHINX-NEXT: # %bb.1:945; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rup946; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rup947; RV64IZHINX-NEXT: fsgnj.h a0, a1, a0948; RV64IZHINX-NEXT: .LBB8_2:949; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz950; RV64IZHINX-NEXT: ret951;952; RV32IZFHMIN-LABEL: test_ceil_si8:953; RV32IZFHMIN: # %bb.0:954; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa0955; RV32IZFHMIN-NEXT: lui a0, 307200956; RV32IZFHMIN-NEXT: fmv.w.x fa4, a0957; RV32IZFHMIN-NEXT: fabs.s fa3, fa5958; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa4959; RV32IZFHMIN-NEXT: beqz a0, .LBB8_2960; RV32IZFHMIN-NEXT: # %bb.1:961; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup962; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup963; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5964; RV32IZFHMIN-NEXT: .LBB8_2:965; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa5966; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa5967; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz968; RV32IZFHMIN-NEXT: ret969;970; RV64IZFHMIN-LABEL: test_ceil_si8:971; RV64IZFHMIN: # %bb.0:972; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa0973; RV64IZFHMIN-NEXT: lui a0, 307200974; RV64IZFHMIN-NEXT: fmv.w.x fa4, a0975; RV64IZFHMIN-NEXT: fabs.s fa3, fa5976; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa4977; RV64IZFHMIN-NEXT: beqz a0, .LBB8_2978; RV64IZFHMIN-NEXT: # %bb.1:979; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup980; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup981; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa5982; RV64IZFHMIN-NEXT: .LBB8_2:983; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa5984; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa5985; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz986; RV64IZFHMIN-NEXT: ret987;988; RV32IZHINXMIN-LABEL: test_ceil_si8:989; RV32IZHINXMIN: # %bb.0:990; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a0991; RV32IZHINXMIN-NEXT: lui a1, 307200992; RV32IZHINXMIN-NEXT: fabs.s a2, a0993; RV32IZHINXMIN-NEXT: flt.s a1, a2, a1994; RV32IZHINXMIN-NEXT: beqz a1, .LBB8_2995; RV32IZHINXMIN-NEXT: # %bb.1:996; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup997; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup998; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a0999; RV32IZHINXMIN-NEXT: .LBB8_2:1000; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01001; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01002; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz1003; RV32IZHINXMIN-NEXT: ret1004;1005; RV64IZHINXMIN-LABEL: test_ceil_si8:1006; RV64IZHINXMIN: # %bb.0:1007; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01008; RV64IZHINXMIN-NEXT: lui a1, 3072001009; RV64IZHINXMIN-NEXT: fabs.s a2, a01010; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11011; RV64IZHINXMIN-NEXT: beqz a1, .LBB8_21012; RV64IZHINXMIN-NEXT: # %bb.1:1013; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1014; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1015; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01016; RV64IZHINXMIN-NEXT: .LBB8_2:1017; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01018; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01019; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz1020; RV64IZHINXMIN-NEXT: ret1021 %a = call half @llvm.ceil.f16(half %x)1022 %b = fptosi half %a to i81023 ret i8 %b1024}1025 1026define signext i16 @test_ceil_si16(half %x) {1027; RV32IZFH-LABEL: test_ceil_si16:1028; RV32IZFH: # %bb.0:1029; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rup1030; RV32IZFH-NEXT: ret1031;1032; RV64IZFH-LABEL: test_ceil_si16:1033; RV64IZFH: # %bb.0:1034; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rup1035; RV64IZFH-NEXT: ret1036;1037; RV32IZHINX-LABEL: test_ceil_si16:1038; RV32IZHINX: # %bb.0:1039; RV32IZHINX-NEXT: li a1, 251040; RV32IZHINX-NEXT: slli a1, a1, 101041; RV32IZHINX-NEXT: fabs.h a2, a01042; RV32IZHINX-NEXT: flt.h a1, a2, a11043; RV32IZHINX-NEXT: beqz a1, .LBB9_21044; RV32IZHINX-NEXT: # %bb.1:1045; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rup1046; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rup1047; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01048; RV32IZHINX-NEXT: .LBB9_2:1049; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz1050; RV32IZHINX-NEXT: ret1051;1052; RV64IZHINX-LABEL: test_ceil_si16:1053; RV64IZHINX: # %bb.0:1054; RV64IZHINX-NEXT: li a1, 251055; RV64IZHINX-NEXT: slli a1, a1, 101056; RV64IZHINX-NEXT: fabs.h a2, a01057; RV64IZHINX-NEXT: flt.h a1, a2, a11058; RV64IZHINX-NEXT: beqz a1, .LBB9_21059; RV64IZHINX-NEXT: # %bb.1:1060; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rup1061; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rup1062; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01063; RV64IZHINX-NEXT: .LBB9_2:1064; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz1065; RV64IZHINX-NEXT: ret1066;1067; RV32IZFHMIN-LABEL: test_ceil_si16:1068; RV32IZFHMIN: # %bb.0:1069; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01070; RV32IZFHMIN-NEXT: lui a0, 3072001071; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01072; RV32IZFHMIN-NEXT: fabs.s fa3, fa51073; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41074; RV32IZFHMIN-NEXT: beqz a0, .LBB9_21075; RV32IZFHMIN-NEXT: # %bb.1:1076; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1077; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1078; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51079; RV32IZFHMIN-NEXT: .LBB9_2:1080; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa51081; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa51082; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1083; RV32IZFHMIN-NEXT: ret1084;1085; RV64IZFHMIN-LABEL: test_ceil_si16:1086; RV64IZFHMIN: # %bb.0:1087; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01088; RV64IZFHMIN-NEXT: lui a0, 3072001089; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01090; RV64IZFHMIN-NEXT: fabs.s fa3, fa51091; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41092; RV64IZFHMIN-NEXT: beqz a0, .LBB9_21093; RV64IZFHMIN-NEXT: # %bb.1:1094; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1095; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1096; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51097; RV64IZFHMIN-NEXT: .LBB9_2:1098; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51099; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51100; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz1101; RV64IZFHMIN-NEXT: ret1102;1103; RV32IZHINXMIN-LABEL: test_ceil_si16:1104; RV32IZHINXMIN: # %bb.0:1105; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01106; RV32IZHINXMIN-NEXT: lui a1, 3072001107; RV32IZHINXMIN-NEXT: fabs.s a2, a01108; RV32IZHINXMIN-NEXT: flt.s a1, a2, a11109; RV32IZHINXMIN-NEXT: beqz a1, .LBB9_21110; RV32IZHINXMIN-NEXT: # %bb.1:1111; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1112; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1113; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a01114; RV32IZHINXMIN-NEXT: .LBB9_2:1115; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01116; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01117; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz1118; RV32IZHINXMIN-NEXT: ret1119;1120; RV64IZHINXMIN-LABEL: test_ceil_si16:1121; RV64IZHINXMIN: # %bb.0:1122; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01123; RV64IZHINXMIN-NEXT: lui a1, 3072001124; RV64IZHINXMIN-NEXT: fabs.s a2, a01125; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11126; RV64IZHINXMIN-NEXT: beqz a1, .LBB9_21127; RV64IZHINXMIN-NEXT: # %bb.1:1128; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1129; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1130; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01131; RV64IZHINXMIN-NEXT: .LBB9_2:1132; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01133; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01134; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz1135; RV64IZHINXMIN-NEXT: ret1136 %a = call half @llvm.ceil.f16(half %x)1137 %b = fptosi half %a to i161138 ret i16 %b1139}1140 1141define signext i32 @test_ceil_si32(half %x) {1142; CHECKIZFH-LABEL: test_ceil_si32:1143; CHECKIZFH: # %bb.0:1144; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rup1145; CHECKIZFH-NEXT: ret1146;1147; CHECKIZHINX-LABEL: test_ceil_si32:1148; CHECKIZHINX: # %bb.0:1149; CHECKIZHINX-NEXT: li a1, 251150; CHECKIZHINX-NEXT: slli a1, a1, 101151; CHECKIZHINX-NEXT: fabs.h a2, a01152; CHECKIZHINX-NEXT: flt.h a1, a2, a11153; CHECKIZHINX-NEXT: beqz a1, .LBB10_21154; CHECKIZHINX-NEXT: # %bb.1:1155; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rup1156; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rup1157; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a01158; CHECKIZHINX-NEXT: .LBB10_2:1159; CHECKIZHINX-NEXT: fcvt.w.h a0, a0, rtz1160; CHECKIZHINX-NEXT: ret1161;1162; CHECKIZFHMIN-LABEL: test_ceil_si32:1163; CHECKIZFHMIN: # %bb.0:1164; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa01165; CHECKIZFHMIN-NEXT: lui a0, 3072001166; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a01167; CHECKIZFHMIN-NEXT: fabs.s fa3, fa51168; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa41169; CHECKIZFHMIN-NEXT: beqz a0, .LBB10_21170; CHECKIZFHMIN-NEXT: # %bb.1:1171; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1172; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1173; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51174; CHECKIZFHMIN-NEXT: .LBB10_2:1175; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa51176; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa51177; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1178; CHECKIZFHMIN-NEXT: ret1179;1180; CHECKIZHINXMIN-LABEL: test_ceil_si32:1181; CHECKIZHINXMIN: # %bb.0:1182; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a01183; CHECKIZHINXMIN-NEXT: lui a1, 3072001184; CHECKIZHINXMIN-NEXT: fabs.s a2, a01185; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a11186; CHECKIZHINXMIN-NEXT: beqz a1, .LBB10_21187; CHECKIZHINXMIN-NEXT: # %bb.1:1188; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1189; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1190; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a01191; CHECKIZHINXMIN-NEXT: .LBB10_2:1192; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a01193; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a01194; CHECKIZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz1195; CHECKIZHINXMIN-NEXT: ret1196 %a = call half @llvm.ceil.f16(half %x)1197 %b = fptosi half %a to i321198 ret i32 %b1199}1200 1201define i64 @test_ceil_si64(half %x) {1202; RV32IZFH-LABEL: test_ceil_si64:1203; RV32IZFH: # %bb.0:1204; RV32IZFH-NEXT: li a0, 251205; RV32IZFH-NEXT: slli a0, a0, 101206; RV32IZFH-NEXT: fmv.h.x fa5, a01207; RV32IZFH-NEXT: fabs.h fa4, fa01208; RV32IZFH-NEXT: flt.h a0, fa4, fa51209; RV32IZFH-NEXT: beqz a0, .LBB11_21210; RV32IZFH-NEXT: # %bb.1:1211; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rup1212; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rup1213; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa01214; RV32IZFH-NEXT: .LBB11_2:1215; RV32IZFH-NEXT: addi sp, sp, -161216; RV32IZFH-NEXT: .cfi_def_cfa_offset 161217; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1218; RV32IZFH-NEXT: .cfi_offset ra, -41219; RV32IZFH-NEXT: call __fixhfdi1220; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1221; RV32IZFH-NEXT: .cfi_restore ra1222; RV32IZFH-NEXT: addi sp, sp, 161223; RV32IZFH-NEXT: .cfi_def_cfa_offset 01224; RV32IZFH-NEXT: ret1225;1226; RV64IZFH-LABEL: test_ceil_si64:1227; RV64IZFH: # %bb.0:1228; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rup1229; RV64IZFH-NEXT: ret1230;1231; RV32IZHINX-LABEL: test_ceil_si64:1232; RV32IZHINX: # %bb.0:1233; RV32IZHINX-NEXT: li a1, 251234; RV32IZHINX-NEXT: slli a1, a1, 101235; RV32IZHINX-NEXT: fabs.h a2, a01236; RV32IZHINX-NEXT: flt.h a1, a2, a11237; RV32IZHINX-NEXT: beqz a1, .LBB11_21238; RV32IZHINX-NEXT: # %bb.1:1239; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rup1240; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rup1241; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01242; RV32IZHINX-NEXT: .LBB11_2:1243; RV32IZHINX-NEXT: addi sp, sp, -161244; RV32IZHINX-NEXT: .cfi_def_cfa_offset 161245; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1246; RV32IZHINX-NEXT: .cfi_offset ra, -41247; RV32IZHINX-NEXT: call __fixhfdi1248; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1249; RV32IZHINX-NEXT: .cfi_restore ra1250; RV32IZHINX-NEXT: addi sp, sp, 161251; RV32IZHINX-NEXT: .cfi_def_cfa_offset 01252; RV32IZHINX-NEXT: ret1253;1254; RV64IZHINX-LABEL: test_ceil_si64:1255; RV64IZHINX: # %bb.0:1256; RV64IZHINX-NEXT: li a1, 251257; RV64IZHINX-NEXT: slli a1, a1, 101258; RV64IZHINX-NEXT: fabs.h a2, a01259; RV64IZHINX-NEXT: flt.h a1, a2, a11260; RV64IZHINX-NEXT: beqz a1, .LBB11_21261; RV64IZHINX-NEXT: # %bb.1:1262; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rup1263; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rup1264; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01265; RV64IZHINX-NEXT: .LBB11_2:1266; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz1267; RV64IZHINX-NEXT: ret1268;1269; RV32IZFHMIN-LABEL: test_ceil_si64:1270; RV32IZFHMIN: # %bb.0:1271; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01272; RV32IZFHMIN-NEXT: lui a0, 3072001273; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01274; RV32IZFHMIN-NEXT: fabs.s fa3, fa51275; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41276; RV32IZFHMIN-NEXT: beqz a0, .LBB11_21277; RV32IZFHMIN-NEXT: # %bb.1:1278; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1279; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1280; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51281; RV32IZFHMIN-NEXT: .LBB11_2:1282; RV32IZFHMIN-NEXT: addi sp, sp, -161283; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 161284; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1285; RV32IZFHMIN-NEXT: .cfi_offset ra, -41286; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa51287; RV32IZFHMIN-NEXT: call __fixhfdi1288; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1289; RV32IZFHMIN-NEXT: .cfi_restore ra1290; RV32IZFHMIN-NEXT: addi sp, sp, 161291; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 01292; RV32IZFHMIN-NEXT: ret1293;1294; RV64IZFHMIN-LABEL: test_ceil_si64:1295; RV64IZFHMIN: # %bb.0:1296; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01297; RV64IZFHMIN-NEXT: lui a0, 3072001298; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01299; RV64IZFHMIN-NEXT: fabs.s fa3, fa51300; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41301; RV64IZFHMIN-NEXT: beqz a0, .LBB11_21302; RV64IZFHMIN-NEXT: # %bb.1:1303; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1304; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1305; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51306; RV64IZFHMIN-NEXT: .LBB11_2:1307; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51308; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51309; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz1310; RV64IZFHMIN-NEXT: ret1311;1312; RV32IZHINXMIN-LABEL: test_ceil_si64:1313; RV32IZHINXMIN: # %bb.0:1314; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01315; RV32IZHINXMIN-NEXT: lui a1, 3072001316; RV32IZHINXMIN-NEXT: fabs.s a2, a01317; RV32IZHINXMIN-NEXT: flt.s a1, a2, a11318; RV32IZHINXMIN-NEXT: beqz a1, .LBB11_21319; RV32IZHINXMIN-NEXT: # %bb.1:1320; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1321; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1322; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a01323; RV32IZHINXMIN-NEXT: .LBB11_2:1324; RV32IZHINXMIN-NEXT: addi sp, sp, -161325; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 161326; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1327; RV32IZHINXMIN-NEXT: .cfi_offset ra, -41328; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01329; RV32IZHINXMIN-NEXT: call __fixhfdi1330; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1331; RV32IZHINXMIN-NEXT: .cfi_restore ra1332; RV32IZHINXMIN-NEXT: addi sp, sp, 161333; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 01334; RV32IZHINXMIN-NEXT: ret1335;1336; RV64IZHINXMIN-LABEL: test_ceil_si64:1337; RV64IZHINXMIN: # %bb.0:1338; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01339; RV64IZHINXMIN-NEXT: lui a1, 3072001340; RV64IZHINXMIN-NEXT: fabs.s a2, a01341; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11342; RV64IZHINXMIN-NEXT: beqz a1, .LBB11_21343; RV64IZHINXMIN-NEXT: # %bb.1:1344; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1345; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1346; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01347; RV64IZHINXMIN-NEXT: .LBB11_2:1348; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01349; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01350; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz1351; RV64IZHINXMIN-NEXT: ret1352 %a = call half @llvm.ceil.f16(half %x)1353 %b = fptosi half %a to i641354 ret i64 %b1355}1356 1357define zeroext i8 @test_ceil_ui8(half %x) {1358; RV32IZFH-LABEL: test_ceil_ui8:1359; RV32IZFH: # %bb.0:1360; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rup1361; RV32IZFH-NEXT: ret1362;1363; RV64IZFH-LABEL: test_ceil_ui8:1364; RV64IZFH: # %bb.0:1365; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rup1366; RV64IZFH-NEXT: ret1367;1368; RV32IZHINX-LABEL: test_ceil_ui8:1369; RV32IZHINX: # %bb.0:1370; RV32IZHINX-NEXT: li a1, 251371; RV32IZHINX-NEXT: slli a1, a1, 101372; RV32IZHINX-NEXT: fabs.h a2, a01373; RV32IZHINX-NEXT: flt.h a1, a2, a11374; RV32IZHINX-NEXT: beqz a1, .LBB12_21375; RV32IZHINX-NEXT: # %bb.1:1376; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rup1377; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rup1378; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01379; RV32IZHINX-NEXT: .LBB12_2:1380; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz1381; RV32IZHINX-NEXT: ret1382;1383; RV64IZHINX-LABEL: test_ceil_ui8:1384; RV64IZHINX: # %bb.0:1385; RV64IZHINX-NEXT: li a1, 251386; RV64IZHINX-NEXT: slli a1, a1, 101387; RV64IZHINX-NEXT: fabs.h a2, a01388; RV64IZHINX-NEXT: flt.h a1, a2, a11389; RV64IZHINX-NEXT: beqz a1, .LBB12_21390; RV64IZHINX-NEXT: # %bb.1:1391; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rup1392; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rup1393; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01394; RV64IZHINX-NEXT: .LBB12_2:1395; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz1396; RV64IZHINX-NEXT: ret1397;1398; RV32IZFHMIN-LABEL: test_ceil_ui8:1399; RV32IZFHMIN: # %bb.0:1400; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01401; RV32IZFHMIN-NEXT: lui a0, 3072001402; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01403; RV32IZFHMIN-NEXT: fabs.s fa3, fa51404; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41405; RV32IZFHMIN-NEXT: beqz a0, .LBB12_21406; RV32IZFHMIN-NEXT: # %bb.1:1407; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1408; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1409; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51410; RV32IZFHMIN-NEXT: .LBB12_2:1411; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa51412; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa51413; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1414; RV32IZFHMIN-NEXT: ret1415;1416; RV64IZFHMIN-LABEL: test_ceil_ui8:1417; RV64IZFHMIN: # %bb.0:1418; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01419; RV64IZFHMIN-NEXT: lui a0, 3072001420; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01421; RV64IZFHMIN-NEXT: fabs.s fa3, fa51422; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41423; RV64IZFHMIN-NEXT: beqz a0, .LBB12_21424; RV64IZFHMIN-NEXT: # %bb.1:1425; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1426; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1427; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51428; RV64IZFHMIN-NEXT: .LBB12_2:1429; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51430; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51431; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz1432; RV64IZFHMIN-NEXT: ret1433;1434; RV32IZHINXMIN-LABEL: test_ceil_ui8:1435; RV32IZHINXMIN: # %bb.0:1436; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01437; RV32IZHINXMIN-NEXT: lui a1, 3072001438; RV32IZHINXMIN-NEXT: fabs.s a2, a01439; RV32IZHINXMIN-NEXT: flt.s a1, a2, a11440; RV32IZHINXMIN-NEXT: beqz a1, .LBB12_21441; RV32IZHINXMIN-NEXT: # %bb.1:1442; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1443; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1444; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a01445; RV32IZHINXMIN-NEXT: .LBB12_2:1446; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01447; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01448; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz1449; RV32IZHINXMIN-NEXT: ret1450;1451; RV64IZHINXMIN-LABEL: test_ceil_ui8:1452; RV64IZHINXMIN: # %bb.0:1453; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01454; RV64IZHINXMIN-NEXT: lui a1, 3072001455; RV64IZHINXMIN-NEXT: fabs.s a2, a01456; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11457; RV64IZHINXMIN-NEXT: beqz a1, .LBB12_21458; RV64IZHINXMIN-NEXT: # %bb.1:1459; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1460; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1461; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01462; RV64IZHINXMIN-NEXT: .LBB12_2:1463; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01464; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01465; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz1466; RV64IZHINXMIN-NEXT: ret1467 %a = call half @llvm.ceil.f16(half %x)1468 %b = fptoui half %a to i81469 ret i8 %b1470}1471 1472define zeroext i16 @test_ceil_ui16(half %x) {1473; RV32IZFH-LABEL: test_ceil_ui16:1474; RV32IZFH: # %bb.0:1475; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rup1476; RV32IZFH-NEXT: ret1477;1478; RV64IZFH-LABEL: test_ceil_ui16:1479; RV64IZFH: # %bb.0:1480; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rup1481; RV64IZFH-NEXT: ret1482;1483; RV32IZHINX-LABEL: test_ceil_ui16:1484; RV32IZHINX: # %bb.0:1485; RV32IZHINX-NEXT: li a1, 251486; RV32IZHINX-NEXT: slli a1, a1, 101487; RV32IZHINX-NEXT: fabs.h a2, a01488; RV32IZHINX-NEXT: flt.h a1, a2, a11489; RV32IZHINX-NEXT: beqz a1, .LBB13_21490; RV32IZHINX-NEXT: # %bb.1:1491; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rup1492; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rup1493; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01494; RV32IZHINX-NEXT: .LBB13_2:1495; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz1496; RV32IZHINX-NEXT: ret1497;1498; RV64IZHINX-LABEL: test_ceil_ui16:1499; RV64IZHINX: # %bb.0:1500; RV64IZHINX-NEXT: li a1, 251501; RV64IZHINX-NEXT: slli a1, a1, 101502; RV64IZHINX-NEXT: fabs.h a2, a01503; RV64IZHINX-NEXT: flt.h a1, a2, a11504; RV64IZHINX-NEXT: beqz a1, .LBB13_21505; RV64IZHINX-NEXT: # %bb.1:1506; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rup1507; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rup1508; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01509; RV64IZHINX-NEXT: .LBB13_2:1510; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz1511; RV64IZHINX-NEXT: ret1512;1513; RV32IZFHMIN-LABEL: test_ceil_ui16:1514; RV32IZFHMIN: # %bb.0:1515; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01516; RV32IZFHMIN-NEXT: lui a0, 3072001517; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01518; RV32IZFHMIN-NEXT: fabs.s fa3, fa51519; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41520; RV32IZFHMIN-NEXT: beqz a0, .LBB13_21521; RV32IZFHMIN-NEXT: # %bb.1:1522; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1523; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1524; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51525; RV32IZFHMIN-NEXT: .LBB13_2:1526; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa51527; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa51528; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1529; RV32IZFHMIN-NEXT: ret1530;1531; RV64IZFHMIN-LABEL: test_ceil_ui16:1532; RV64IZFHMIN: # %bb.0:1533; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01534; RV64IZFHMIN-NEXT: lui a0, 3072001535; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01536; RV64IZFHMIN-NEXT: fabs.s fa3, fa51537; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41538; RV64IZFHMIN-NEXT: beqz a0, .LBB13_21539; RV64IZFHMIN-NEXT: # %bb.1:1540; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1541; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1542; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51543; RV64IZFHMIN-NEXT: .LBB13_2:1544; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51545; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51546; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz1547; RV64IZFHMIN-NEXT: ret1548;1549; RV32IZHINXMIN-LABEL: test_ceil_ui16:1550; RV32IZHINXMIN: # %bb.0:1551; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01552; RV32IZHINXMIN-NEXT: lui a1, 3072001553; RV32IZHINXMIN-NEXT: fabs.s a2, a01554; RV32IZHINXMIN-NEXT: flt.s a1, a2, a11555; RV32IZHINXMIN-NEXT: beqz a1, .LBB13_21556; RV32IZHINXMIN-NEXT: # %bb.1:1557; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1558; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1559; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a01560; RV32IZHINXMIN-NEXT: .LBB13_2:1561; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01562; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01563; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz1564; RV32IZHINXMIN-NEXT: ret1565;1566; RV64IZHINXMIN-LABEL: test_ceil_ui16:1567; RV64IZHINXMIN: # %bb.0:1568; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01569; RV64IZHINXMIN-NEXT: lui a1, 3072001570; RV64IZHINXMIN-NEXT: fabs.s a2, a01571; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11572; RV64IZHINXMIN-NEXT: beqz a1, .LBB13_21573; RV64IZHINXMIN-NEXT: # %bb.1:1574; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1575; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1576; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01577; RV64IZHINXMIN-NEXT: .LBB13_2:1578; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01579; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01580; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz1581; RV64IZHINXMIN-NEXT: ret1582 %a = call half @llvm.ceil.f16(half %x)1583 %b = fptoui half %a to i161584 ret i16 %b1585}1586 1587define signext i32 @test_ceil_ui32(half %x) {1588; CHECKIZFH-LABEL: test_ceil_ui32:1589; CHECKIZFH: # %bb.0:1590; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rup1591; CHECKIZFH-NEXT: ret1592;1593; CHECKIZHINX-LABEL: test_ceil_ui32:1594; CHECKIZHINX: # %bb.0:1595; CHECKIZHINX-NEXT: li a1, 251596; CHECKIZHINX-NEXT: slli a1, a1, 101597; CHECKIZHINX-NEXT: fabs.h a2, a01598; CHECKIZHINX-NEXT: flt.h a1, a2, a11599; CHECKIZHINX-NEXT: beqz a1, .LBB14_21600; CHECKIZHINX-NEXT: # %bb.1:1601; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rup1602; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rup1603; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a01604; CHECKIZHINX-NEXT: .LBB14_2:1605; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz1606; CHECKIZHINX-NEXT: ret1607;1608; CHECKIZFHMIN-LABEL: test_ceil_ui32:1609; CHECKIZFHMIN: # %bb.0:1610; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa01611; CHECKIZFHMIN-NEXT: lui a0, 3072001612; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a01613; CHECKIZFHMIN-NEXT: fabs.s fa3, fa51614; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa41615; CHECKIZFHMIN-NEXT: beqz a0, .LBB14_21616; CHECKIZFHMIN-NEXT: # %bb.1:1617; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1618; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1619; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51620; CHECKIZFHMIN-NEXT: .LBB14_2:1621; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa51622; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa51623; CHECKIZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz1624; CHECKIZFHMIN-NEXT: ret1625;1626; CHECKIZHINXMIN-LABEL: test_ceil_ui32:1627; CHECKIZHINXMIN: # %bb.0:1628; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a01629; CHECKIZHINXMIN-NEXT: lui a1, 3072001630; CHECKIZHINXMIN-NEXT: fabs.s a2, a01631; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a11632; CHECKIZHINXMIN-NEXT: beqz a1, .LBB14_21633; CHECKIZHINXMIN-NEXT: # %bb.1:1634; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1635; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1636; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a01637; CHECKIZHINXMIN-NEXT: .LBB14_2:1638; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a01639; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a01640; CHECKIZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz1641; CHECKIZHINXMIN-NEXT: ret1642 %a = call half @llvm.ceil.f16(half %x)1643 %b = fptoui half %a to i321644 ret i32 %b1645}1646 1647define i64 @test_ceil_ui64(half %x) {1648; RV32IZFH-LABEL: test_ceil_ui64:1649; RV32IZFH: # %bb.0:1650; RV32IZFH-NEXT: li a0, 251651; RV32IZFH-NEXT: slli a0, a0, 101652; RV32IZFH-NEXT: fmv.h.x fa5, a01653; RV32IZFH-NEXT: fabs.h fa4, fa01654; RV32IZFH-NEXT: flt.h a0, fa4, fa51655; RV32IZFH-NEXT: beqz a0, .LBB15_21656; RV32IZFH-NEXT: # %bb.1:1657; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rup1658; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rup1659; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa01660; RV32IZFH-NEXT: .LBB15_2:1661; RV32IZFH-NEXT: addi sp, sp, -161662; RV32IZFH-NEXT: .cfi_def_cfa_offset 161663; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1664; RV32IZFH-NEXT: .cfi_offset ra, -41665; RV32IZFH-NEXT: call __fixunshfdi1666; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1667; RV32IZFH-NEXT: .cfi_restore ra1668; RV32IZFH-NEXT: addi sp, sp, 161669; RV32IZFH-NEXT: .cfi_def_cfa_offset 01670; RV32IZFH-NEXT: ret1671;1672; RV64IZFH-LABEL: test_ceil_ui64:1673; RV64IZFH: # %bb.0:1674; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rup1675; RV64IZFH-NEXT: ret1676;1677; RV32IZHINX-LABEL: test_ceil_ui64:1678; RV32IZHINX: # %bb.0:1679; RV32IZHINX-NEXT: li a1, 251680; RV32IZHINX-NEXT: slli a1, a1, 101681; RV32IZHINX-NEXT: fabs.h a2, a01682; RV32IZHINX-NEXT: flt.h a1, a2, a11683; RV32IZHINX-NEXT: beqz a1, .LBB15_21684; RV32IZHINX-NEXT: # %bb.1:1685; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rup1686; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rup1687; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01688; RV32IZHINX-NEXT: .LBB15_2:1689; RV32IZHINX-NEXT: addi sp, sp, -161690; RV32IZHINX-NEXT: .cfi_def_cfa_offset 161691; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1692; RV32IZHINX-NEXT: .cfi_offset ra, -41693; RV32IZHINX-NEXT: call __fixunshfdi1694; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1695; RV32IZHINX-NEXT: .cfi_restore ra1696; RV32IZHINX-NEXT: addi sp, sp, 161697; RV32IZHINX-NEXT: .cfi_def_cfa_offset 01698; RV32IZHINX-NEXT: ret1699;1700; RV64IZHINX-LABEL: test_ceil_ui64:1701; RV64IZHINX: # %bb.0:1702; RV64IZHINX-NEXT: li a1, 251703; RV64IZHINX-NEXT: slli a1, a1, 101704; RV64IZHINX-NEXT: fabs.h a2, a01705; RV64IZHINX-NEXT: flt.h a1, a2, a11706; RV64IZHINX-NEXT: beqz a1, .LBB15_21707; RV64IZHINX-NEXT: # %bb.1:1708; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rup1709; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rup1710; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01711; RV64IZHINX-NEXT: .LBB15_2:1712; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz1713; RV64IZHINX-NEXT: ret1714;1715; RV32IZFHMIN-LABEL: test_ceil_ui64:1716; RV32IZFHMIN: # %bb.0:1717; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01718; RV32IZFHMIN-NEXT: lui a0, 3072001719; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01720; RV32IZFHMIN-NEXT: fabs.s fa3, fa51721; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41722; RV32IZFHMIN-NEXT: beqz a0, .LBB15_21723; RV32IZFHMIN-NEXT: # %bb.1:1724; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1725; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1726; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51727; RV32IZFHMIN-NEXT: .LBB15_2:1728; RV32IZFHMIN-NEXT: addi sp, sp, -161729; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 161730; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1731; RV32IZFHMIN-NEXT: .cfi_offset ra, -41732; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa51733; RV32IZFHMIN-NEXT: call __fixunshfdi1734; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1735; RV32IZFHMIN-NEXT: .cfi_restore ra1736; RV32IZFHMIN-NEXT: addi sp, sp, 161737; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 01738; RV32IZFHMIN-NEXT: ret1739;1740; RV64IZFHMIN-LABEL: test_ceil_ui64:1741; RV64IZFHMIN: # %bb.0:1742; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01743; RV64IZFHMIN-NEXT: lui a0, 3072001744; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01745; RV64IZFHMIN-NEXT: fabs.s fa3, fa51746; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41747; RV64IZFHMIN-NEXT: beqz a0, .LBB15_21748; RV64IZFHMIN-NEXT: # %bb.1:1749; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rup1750; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rup1751; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51752; RV64IZFHMIN-NEXT: .LBB15_2:1753; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51754; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51755; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz1756; RV64IZFHMIN-NEXT: ret1757;1758; RV32IZHINXMIN-LABEL: test_ceil_ui64:1759; RV32IZHINXMIN: # %bb.0:1760; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01761; RV32IZHINXMIN-NEXT: lui a1, 3072001762; RV32IZHINXMIN-NEXT: fabs.s a2, a01763; RV32IZHINXMIN-NEXT: flt.s a1, a2, a11764; RV32IZHINXMIN-NEXT: beqz a1, .LBB15_21765; RV32IZHINXMIN-NEXT: # %bb.1:1766; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1767; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1768; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a01769; RV32IZHINXMIN-NEXT: .LBB15_2:1770; RV32IZHINXMIN-NEXT: addi sp, sp, -161771; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 161772; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1773; RV32IZHINXMIN-NEXT: .cfi_offset ra, -41774; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01775; RV32IZHINXMIN-NEXT: call __fixunshfdi1776; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1777; RV32IZHINXMIN-NEXT: .cfi_restore ra1778; RV32IZHINXMIN-NEXT: addi sp, sp, 161779; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 01780; RV32IZHINXMIN-NEXT: ret1781;1782; RV64IZHINXMIN-LABEL: test_ceil_ui64:1783; RV64IZHINXMIN: # %bb.0:1784; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01785; RV64IZHINXMIN-NEXT: lui a1, 3072001786; RV64IZHINXMIN-NEXT: fabs.s a2, a01787; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11788; RV64IZHINXMIN-NEXT: beqz a1, .LBB15_21789; RV64IZHINXMIN-NEXT: # %bb.1:1790; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rup1791; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rup1792; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01793; RV64IZHINXMIN-NEXT: .LBB15_2:1794; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01795; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01796; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz1797; RV64IZHINXMIN-NEXT: ret1798 %a = call half @llvm.ceil.f16(half %x)1799 %b = fptoui half %a to i641800 ret i64 %b1801}1802 1803define signext i8 @test_trunc_si8(half %x) {1804; RV32IZFH-LABEL: test_trunc_si8:1805; RV32IZFH: # %bb.0:1806; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz1807; RV32IZFH-NEXT: ret1808;1809; RV64IZFH-LABEL: test_trunc_si8:1810; RV64IZFH: # %bb.0:1811; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz1812; RV64IZFH-NEXT: ret1813;1814; RV32IZHINX-LABEL: test_trunc_si8:1815; RV32IZHINX: # %bb.0:1816; RV32IZHINX-NEXT: li a1, 251817; RV32IZHINX-NEXT: slli a1, a1, 101818; RV32IZHINX-NEXT: fabs.h a2, a01819; RV32IZHINX-NEXT: flt.h a1, a2, a11820; RV32IZHINX-NEXT: beqz a1, .LBB16_21821; RV32IZHINX-NEXT: # %bb.1:1822; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rtz1823; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rtz1824; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01825; RV32IZHINX-NEXT: .LBB16_2:1826; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz1827; RV32IZHINX-NEXT: ret1828;1829; RV64IZHINX-LABEL: test_trunc_si8:1830; RV64IZHINX: # %bb.0:1831; RV64IZHINX-NEXT: li a1, 251832; RV64IZHINX-NEXT: slli a1, a1, 101833; RV64IZHINX-NEXT: fabs.h a2, a01834; RV64IZHINX-NEXT: flt.h a1, a2, a11835; RV64IZHINX-NEXT: beqz a1, .LBB16_21836; RV64IZHINX-NEXT: # %bb.1:1837; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rtz1838; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rtz1839; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01840; RV64IZHINX-NEXT: .LBB16_2:1841; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz1842; RV64IZHINX-NEXT: ret1843;1844; RV32IZFHMIN-LABEL: test_trunc_si8:1845; RV32IZFHMIN: # %bb.0:1846; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01847; RV32IZFHMIN-NEXT: lui a0, 3072001848; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01849; RV32IZFHMIN-NEXT: fabs.s fa3, fa51850; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41851; RV32IZFHMIN-NEXT: beqz a0, .LBB16_21852; RV32IZFHMIN-NEXT: # %bb.1:1853; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1854; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz1855; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51856; RV32IZFHMIN-NEXT: .LBB16_2:1857; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa51858; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa51859; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1860; RV32IZFHMIN-NEXT: ret1861;1862; RV64IZFHMIN-LABEL: test_trunc_si8:1863; RV64IZFHMIN: # %bb.0:1864; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01865; RV64IZFHMIN-NEXT: lui a0, 3072001866; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01867; RV64IZFHMIN-NEXT: fabs.s fa3, fa51868; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41869; RV64IZFHMIN-NEXT: beqz a0, .LBB16_21870; RV64IZFHMIN-NEXT: # %bb.1:1871; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1872; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz1873; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51874; RV64IZFHMIN-NEXT: .LBB16_2:1875; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51876; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51877; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz1878; RV64IZFHMIN-NEXT: ret1879;1880; RV32IZHINXMIN-LABEL: test_trunc_si8:1881; RV32IZHINXMIN: # %bb.0:1882; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01883; RV32IZHINXMIN-NEXT: lui a1, 3072001884; RV32IZHINXMIN-NEXT: fabs.s a2, a01885; RV32IZHINXMIN-NEXT: flt.s a1, a2, a11886; RV32IZHINXMIN-NEXT: beqz a1, .LBB16_21887; RV32IZHINXMIN-NEXT: # %bb.1:1888; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz1889; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz1890; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a01891; RV32IZHINXMIN-NEXT: .LBB16_2:1892; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a01893; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01894; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz1895; RV32IZHINXMIN-NEXT: ret1896;1897; RV64IZHINXMIN-LABEL: test_trunc_si8:1898; RV64IZHINXMIN: # %bb.0:1899; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01900; RV64IZHINXMIN-NEXT: lui a1, 3072001901; RV64IZHINXMIN-NEXT: fabs.s a2, a01902; RV64IZHINXMIN-NEXT: flt.s a1, a2, a11903; RV64IZHINXMIN-NEXT: beqz a1, .LBB16_21904; RV64IZHINXMIN-NEXT: # %bb.1:1905; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz1906; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz1907; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a01908; RV64IZHINXMIN-NEXT: .LBB16_2:1909; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a01910; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a01911; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz1912; RV64IZHINXMIN-NEXT: ret1913 %a = call half @llvm.trunc.f16(half %x)1914 %b = fptosi half %a to i81915 ret i8 %b1916}1917 1918define signext i16 @test_trunc_si16(half %x) {1919; RV32IZFH-LABEL: test_trunc_si16:1920; RV32IZFH: # %bb.0:1921; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz1922; RV32IZFH-NEXT: ret1923;1924; RV64IZFH-LABEL: test_trunc_si16:1925; RV64IZFH: # %bb.0:1926; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz1927; RV64IZFH-NEXT: ret1928;1929; RV32IZHINX-LABEL: test_trunc_si16:1930; RV32IZHINX: # %bb.0:1931; RV32IZHINX-NEXT: li a1, 251932; RV32IZHINX-NEXT: slli a1, a1, 101933; RV32IZHINX-NEXT: fabs.h a2, a01934; RV32IZHINX-NEXT: flt.h a1, a2, a11935; RV32IZHINX-NEXT: beqz a1, .LBB17_21936; RV32IZHINX-NEXT: # %bb.1:1937; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rtz1938; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rtz1939; RV32IZHINX-NEXT: fsgnj.h a0, a1, a01940; RV32IZHINX-NEXT: .LBB17_2:1941; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz1942; RV32IZHINX-NEXT: ret1943;1944; RV64IZHINX-LABEL: test_trunc_si16:1945; RV64IZHINX: # %bb.0:1946; RV64IZHINX-NEXT: li a1, 251947; RV64IZHINX-NEXT: slli a1, a1, 101948; RV64IZHINX-NEXT: fabs.h a2, a01949; RV64IZHINX-NEXT: flt.h a1, a2, a11950; RV64IZHINX-NEXT: beqz a1, .LBB17_21951; RV64IZHINX-NEXT: # %bb.1:1952; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rtz1953; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rtz1954; RV64IZHINX-NEXT: fsgnj.h a0, a1, a01955; RV64IZHINX-NEXT: .LBB17_2:1956; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz1957; RV64IZHINX-NEXT: ret1958;1959; RV32IZFHMIN-LABEL: test_trunc_si16:1960; RV32IZFHMIN: # %bb.0:1961; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa01962; RV32IZFHMIN-NEXT: lui a0, 3072001963; RV32IZFHMIN-NEXT: fmv.w.x fa4, a01964; RV32IZFHMIN-NEXT: fabs.s fa3, fa51965; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa41966; RV32IZFHMIN-NEXT: beqz a0, .LBB17_21967; RV32IZFHMIN-NEXT: # %bb.1:1968; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1969; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz1970; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51971; RV32IZFHMIN-NEXT: .LBB17_2:1972; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa51973; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa51974; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1975; RV32IZFHMIN-NEXT: ret1976;1977; RV64IZFHMIN-LABEL: test_trunc_si16:1978; RV64IZFHMIN: # %bb.0:1979; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa01980; RV64IZFHMIN-NEXT: lui a0, 3072001981; RV64IZFHMIN-NEXT: fmv.w.x fa4, a01982; RV64IZFHMIN-NEXT: fabs.s fa3, fa51983; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa41984; RV64IZFHMIN-NEXT: beqz a0, .LBB17_21985; RV64IZFHMIN-NEXT: # %bb.1:1986; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz1987; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz1988; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa51989; RV64IZFHMIN-NEXT: .LBB17_2:1990; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa51991; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa51992; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz1993; RV64IZFHMIN-NEXT: ret1994;1995; RV32IZHINXMIN-LABEL: test_trunc_si16:1996; RV32IZHINXMIN: # %bb.0:1997; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a01998; RV32IZHINXMIN-NEXT: lui a1, 3072001999; RV32IZHINXMIN-NEXT: fabs.s a2, a02000; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12001; RV32IZHINXMIN-NEXT: beqz a1, .LBB17_22002; RV32IZHINXMIN-NEXT: # %bb.1:2003; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2004; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2005; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02006; RV32IZHINXMIN-NEXT: .LBB17_2:2007; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02008; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02009; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2010; RV32IZHINXMIN-NEXT: ret2011;2012; RV64IZHINXMIN-LABEL: test_trunc_si16:2013; RV64IZHINXMIN: # %bb.0:2014; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02015; RV64IZHINXMIN-NEXT: lui a1, 3072002016; RV64IZHINXMIN-NEXT: fabs.s a2, a02017; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12018; RV64IZHINXMIN-NEXT: beqz a1, .LBB17_22019; RV64IZHINXMIN-NEXT: # %bb.1:2020; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2021; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2022; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02023; RV64IZHINXMIN-NEXT: .LBB17_2:2024; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02025; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02026; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz2027; RV64IZHINXMIN-NEXT: ret2028 %a = call half @llvm.trunc.f16(half %x)2029 %b = fptosi half %a to i162030 ret i16 %b2031}2032 2033define signext i32 @test_trunc_si32(half %x) {2034; CHECKIZFH-LABEL: test_trunc_si32:2035; CHECKIZFH: # %bb.0:2036; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rtz2037; CHECKIZFH-NEXT: ret2038;2039; CHECKIZHINX-LABEL: test_trunc_si32:2040; CHECKIZHINX: # %bb.0:2041; CHECKIZHINX-NEXT: li a1, 252042; CHECKIZHINX-NEXT: slli a1, a1, 102043; CHECKIZHINX-NEXT: fabs.h a2, a02044; CHECKIZHINX-NEXT: flt.h a1, a2, a12045; CHECKIZHINX-NEXT: beqz a1, .LBB18_22046; CHECKIZHINX-NEXT: # %bb.1:2047; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rtz2048; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rtz2049; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a02050; CHECKIZHINX-NEXT: .LBB18_2:2051; CHECKIZHINX-NEXT: fcvt.w.h a0, a0, rtz2052; CHECKIZHINX-NEXT: ret2053;2054; CHECKIZFHMIN-LABEL: test_trunc_si32:2055; CHECKIZFHMIN: # %bb.0:2056; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa02057; CHECKIZFHMIN-NEXT: lui a0, 3072002058; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a02059; CHECKIZFHMIN-NEXT: fabs.s fa3, fa52060; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa42061; CHECKIZFHMIN-NEXT: beqz a0, .LBB18_22062; CHECKIZFHMIN-NEXT: # %bb.1:2063; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2064; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2065; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52066; CHECKIZFHMIN-NEXT: .LBB18_2:2067; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa52068; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa52069; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2070; CHECKIZFHMIN-NEXT: ret2071;2072; CHECKIZHINXMIN-LABEL: test_trunc_si32:2073; CHECKIZHINXMIN: # %bb.0:2074; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a02075; CHECKIZHINXMIN-NEXT: lui a1, 3072002076; CHECKIZHINXMIN-NEXT: fabs.s a2, a02077; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a12078; CHECKIZHINXMIN-NEXT: beqz a1, .LBB18_22079; CHECKIZHINXMIN-NEXT: # %bb.1:2080; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2081; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2082; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a02083; CHECKIZHINXMIN-NEXT: .LBB18_2:2084; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a02085; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a02086; CHECKIZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2087; CHECKIZHINXMIN-NEXT: ret2088 %a = call half @llvm.trunc.f16(half %x)2089 %b = fptosi half %a to i322090 ret i32 %b2091}2092 2093define i64 @test_trunc_si64(half %x) {2094; RV32IZFH-LABEL: test_trunc_si64:2095; RV32IZFH: # %bb.0:2096; RV32IZFH-NEXT: li a0, 252097; RV32IZFH-NEXT: slli a0, a0, 102098; RV32IZFH-NEXT: fmv.h.x fa5, a02099; RV32IZFH-NEXT: fabs.h fa4, fa02100; RV32IZFH-NEXT: flt.h a0, fa4, fa52101; RV32IZFH-NEXT: beqz a0, .LBB19_22102; RV32IZFH-NEXT: # %bb.1:2103; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz2104; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rtz2105; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa02106; RV32IZFH-NEXT: .LBB19_2:2107; RV32IZFH-NEXT: addi sp, sp, -162108; RV32IZFH-NEXT: .cfi_def_cfa_offset 162109; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2110; RV32IZFH-NEXT: .cfi_offset ra, -42111; RV32IZFH-NEXT: call __fixhfdi2112; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2113; RV32IZFH-NEXT: .cfi_restore ra2114; RV32IZFH-NEXT: addi sp, sp, 162115; RV32IZFH-NEXT: .cfi_def_cfa_offset 02116; RV32IZFH-NEXT: ret2117;2118; RV64IZFH-LABEL: test_trunc_si64:2119; RV64IZFH: # %bb.0:2120; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz2121; RV64IZFH-NEXT: ret2122;2123; RV32IZHINX-LABEL: test_trunc_si64:2124; RV32IZHINX: # %bb.0:2125; RV32IZHINX-NEXT: li a1, 252126; RV32IZHINX-NEXT: slli a1, a1, 102127; RV32IZHINX-NEXT: fabs.h a2, a02128; RV32IZHINX-NEXT: flt.h a1, a2, a12129; RV32IZHINX-NEXT: beqz a1, .LBB19_22130; RV32IZHINX-NEXT: # %bb.1:2131; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rtz2132; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rtz2133; RV32IZHINX-NEXT: fsgnj.h a0, a1, a02134; RV32IZHINX-NEXT: .LBB19_2:2135; RV32IZHINX-NEXT: addi sp, sp, -162136; RV32IZHINX-NEXT: .cfi_def_cfa_offset 162137; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2138; RV32IZHINX-NEXT: .cfi_offset ra, -42139; RV32IZHINX-NEXT: call __fixhfdi2140; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2141; RV32IZHINX-NEXT: .cfi_restore ra2142; RV32IZHINX-NEXT: addi sp, sp, 162143; RV32IZHINX-NEXT: .cfi_def_cfa_offset 02144; RV32IZHINX-NEXT: ret2145;2146; RV64IZHINX-LABEL: test_trunc_si64:2147; RV64IZHINX: # %bb.0:2148; RV64IZHINX-NEXT: li a1, 252149; RV64IZHINX-NEXT: slli a1, a1, 102150; RV64IZHINX-NEXT: fabs.h a2, a02151; RV64IZHINX-NEXT: flt.h a1, a2, a12152; RV64IZHINX-NEXT: beqz a1, .LBB19_22153; RV64IZHINX-NEXT: # %bb.1:2154; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rtz2155; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rtz2156; RV64IZHINX-NEXT: fsgnj.h a0, a1, a02157; RV64IZHINX-NEXT: .LBB19_2:2158; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz2159; RV64IZHINX-NEXT: ret2160;2161; RV32IZFHMIN-LABEL: test_trunc_si64:2162; RV32IZFHMIN: # %bb.0:2163; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa02164; RV32IZFHMIN-NEXT: lui a0, 3072002165; RV32IZFHMIN-NEXT: fmv.w.x fa4, a02166; RV32IZFHMIN-NEXT: fabs.s fa3, fa52167; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa42168; RV32IZFHMIN-NEXT: beqz a0, .LBB19_22169; RV32IZFHMIN-NEXT: # %bb.1:2170; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2171; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2172; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52173; RV32IZFHMIN-NEXT: .LBB19_2:2174; RV32IZFHMIN-NEXT: addi sp, sp, -162175; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 162176; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2177; RV32IZFHMIN-NEXT: .cfi_offset ra, -42178; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa52179; RV32IZFHMIN-NEXT: call __fixhfdi2180; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2181; RV32IZFHMIN-NEXT: .cfi_restore ra2182; RV32IZFHMIN-NEXT: addi sp, sp, 162183; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 02184; RV32IZFHMIN-NEXT: ret2185;2186; RV64IZFHMIN-LABEL: test_trunc_si64:2187; RV64IZFHMIN: # %bb.0:2188; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa02189; RV64IZFHMIN-NEXT: lui a0, 3072002190; RV64IZFHMIN-NEXT: fmv.w.x fa4, a02191; RV64IZFHMIN-NEXT: fabs.s fa3, fa52192; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa42193; RV64IZFHMIN-NEXT: beqz a0, .LBB19_22194; RV64IZFHMIN-NEXT: # %bb.1:2195; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2196; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2197; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52198; RV64IZFHMIN-NEXT: .LBB19_2:2199; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa52200; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa52201; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz2202; RV64IZFHMIN-NEXT: ret2203;2204; RV32IZHINXMIN-LABEL: test_trunc_si64:2205; RV32IZHINXMIN: # %bb.0:2206; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02207; RV32IZHINXMIN-NEXT: lui a1, 3072002208; RV32IZHINXMIN-NEXT: fabs.s a2, a02209; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12210; RV32IZHINXMIN-NEXT: beqz a1, .LBB19_22211; RV32IZHINXMIN-NEXT: # %bb.1:2212; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2213; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2214; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02215; RV32IZHINXMIN-NEXT: .LBB19_2:2216; RV32IZHINXMIN-NEXT: addi sp, sp, -162217; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 162218; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2219; RV32IZHINXMIN-NEXT: .cfi_offset ra, -42220; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02221; RV32IZHINXMIN-NEXT: call __fixhfdi2222; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2223; RV32IZHINXMIN-NEXT: .cfi_restore ra2224; RV32IZHINXMIN-NEXT: addi sp, sp, 162225; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 02226; RV32IZHINXMIN-NEXT: ret2227;2228; RV64IZHINXMIN-LABEL: test_trunc_si64:2229; RV64IZHINXMIN: # %bb.0:2230; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02231; RV64IZHINXMIN-NEXT: lui a1, 3072002232; RV64IZHINXMIN-NEXT: fabs.s a2, a02233; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12234; RV64IZHINXMIN-NEXT: beqz a1, .LBB19_22235; RV64IZHINXMIN-NEXT: # %bb.1:2236; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2237; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2238; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02239; RV64IZHINXMIN-NEXT: .LBB19_2:2240; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02241; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02242; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz2243; RV64IZHINXMIN-NEXT: ret2244 %a = call half @llvm.trunc.f16(half %x)2245 %b = fptosi half %a to i642246 ret i64 %b2247}2248 2249define zeroext i8 @test_trunc_ui8(half %x) {2250; RV32IZFH-LABEL: test_trunc_ui8:2251; RV32IZFH: # %bb.0:2252; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz2253; RV32IZFH-NEXT: ret2254;2255; RV64IZFH-LABEL: test_trunc_ui8:2256; RV64IZFH: # %bb.0:2257; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz2258; RV64IZFH-NEXT: ret2259;2260; RV32IZHINX-LABEL: test_trunc_ui8:2261; RV32IZHINX: # %bb.0:2262; RV32IZHINX-NEXT: li a1, 252263; RV32IZHINX-NEXT: slli a1, a1, 102264; RV32IZHINX-NEXT: fabs.h a2, a02265; RV32IZHINX-NEXT: flt.h a1, a2, a12266; RV32IZHINX-NEXT: beqz a1, .LBB20_22267; RV32IZHINX-NEXT: # %bb.1:2268; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rtz2269; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rtz2270; RV32IZHINX-NEXT: fsgnj.h a0, a1, a02271; RV32IZHINX-NEXT: .LBB20_2:2272; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz2273; RV32IZHINX-NEXT: ret2274;2275; RV64IZHINX-LABEL: test_trunc_ui8:2276; RV64IZHINX: # %bb.0:2277; RV64IZHINX-NEXT: li a1, 252278; RV64IZHINX-NEXT: slli a1, a1, 102279; RV64IZHINX-NEXT: fabs.h a2, a02280; RV64IZHINX-NEXT: flt.h a1, a2, a12281; RV64IZHINX-NEXT: beqz a1, .LBB20_22282; RV64IZHINX-NEXT: # %bb.1:2283; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rtz2284; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rtz2285; RV64IZHINX-NEXT: fsgnj.h a0, a1, a02286; RV64IZHINX-NEXT: .LBB20_2:2287; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz2288; RV64IZHINX-NEXT: ret2289;2290; RV32IZFHMIN-LABEL: test_trunc_ui8:2291; RV32IZFHMIN: # %bb.0:2292; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa02293; RV32IZFHMIN-NEXT: lui a0, 3072002294; RV32IZFHMIN-NEXT: fmv.w.x fa4, a02295; RV32IZFHMIN-NEXT: fabs.s fa3, fa52296; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa42297; RV32IZFHMIN-NEXT: beqz a0, .LBB20_22298; RV32IZFHMIN-NEXT: # %bb.1:2299; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2300; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2301; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52302; RV32IZFHMIN-NEXT: .LBB20_2:2303; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa52304; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa52305; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2306; RV32IZFHMIN-NEXT: ret2307;2308; RV64IZFHMIN-LABEL: test_trunc_ui8:2309; RV64IZFHMIN: # %bb.0:2310; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa02311; RV64IZFHMIN-NEXT: lui a0, 3072002312; RV64IZFHMIN-NEXT: fmv.w.x fa4, a02313; RV64IZFHMIN-NEXT: fabs.s fa3, fa52314; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa42315; RV64IZFHMIN-NEXT: beqz a0, .LBB20_22316; RV64IZFHMIN-NEXT: # %bb.1:2317; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2318; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2319; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52320; RV64IZFHMIN-NEXT: .LBB20_2:2321; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa52322; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa52323; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz2324; RV64IZFHMIN-NEXT: ret2325;2326; RV32IZHINXMIN-LABEL: test_trunc_ui8:2327; RV32IZHINXMIN: # %bb.0:2328; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02329; RV32IZHINXMIN-NEXT: lui a1, 3072002330; RV32IZHINXMIN-NEXT: fabs.s a2, a02331; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12332; RV32IZHINXMIN-NEXT: beqz a1, .LBB20_22333; RV32IZHINXMIN-NEXT: # %bb.1:2334; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2335; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2336; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02337; RV32IZHINXMIN-NEXT: .LBB20_2:2338; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02339; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02340; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2341; RV32IZHINXMIN-NEXT: ret2342;2343; RV64IZHINXMIN-LABEL: test_trunc_ui8:2344; RV64IZHINXMIN: # %bb.0:2345; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02346; RV64IZHINXMIN-NEXT: lui a1, 3072002347; RV64IZHINXMIN-NEXT: fabs.s a2, a02348; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12349; RV64IZHINXMIN-NEXT: beqz a1, .LBB20_22350; RV64IZHINXMIN-NEXT: # %bb.1:2351; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2352; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2353; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02354; RV64IZHINXMIN-NEXT: .LBB20_2:2355; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02356; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02357; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz2358; RV64IZHINXMIN-NEXT: ret2359 %a = call half @llvm.trunc.f16(half %x)2360 %b = fptoui half %a to i82361 ret i8 %b2362}2363 2364define zeroext i16 @test_trunc_ui16(half %x) {2365; RV32IZFH-LABEL: test_trunc_ui16:2366; RV32IZFH: # %bb.0:2367; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz2368; RV32IZFH-NEXT: ret2369;2370; RV64IZFH-LABEL: test_trunc_ui16:2371; RV64IZFH: # %bb.0:2372; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz2373; RV64IZFH-NEXT: ret2374;2375; RV32IZHINX-LABEL: test_trunc_ui16:2376; RV32IZHINX: # %bb.0:2377; RV32IZHINX-NEXT: li a1, 252378; RV32IZHINX-NEXT: slli a1, a1, 102379; RV32IZHINX-NEXT: fabs.h a2, a02380; RV32IZHINX-NEXT: flt.h a1, a2, a12381; RV32IZHINX-NEXT: beqz a1, .LBB21_22382; RV32IZHINX-NEXT: # %bb.1:2383; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rtz2384; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rtz2385; RV32IZHINX-NEXT: fsgnj.h a0, a1, a02386; RV32IZHINX-NEXT: .LBB21_2:2387; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz2388; RV32IZHINX-NEXT: ret2389;2390; RV64IZHINX-LABEL: test_trunc_ui16:2391; RV64IZHINX: # %bb.0:2392; RV64IZHINX-NEXT: li a1, 252393; RV64IZHINX-NEXT: slli a1, a1, 102394; RV64IZHINX-NEXT: fabs.h a2, a02395; RV64IZHINX-NEXT: flt.h a1, a2, a12396; RV64IZHINX-NEXT: beqz a1, .LBB21_22397; RV64IZHINX-NEXT: # %bb.1:2398; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rtz2399; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rtz2400; RV64IZHINX-NEXT: fsgnj.h a0, a1, a02401; RV64IZHINX-NEXT: .LBB21_2:2402; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz2403; RV64IZHINX-NEXT: ret2404;2405; RV32IZFHMIN-LABEL: test_trunc_ui16:2406; RV32IZFHMIN: # %bb.0:2407; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa02408; RV32IZFHMIN-NEXT: lui a0, 3072002409; RV32IZFHMIN-NEXT: fmv.w.x fa4, a02410; RV32IZFHMIN-NEXT: fabs.s fa3, fa52411; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa42412; RV32IZFHMIN-NEXT: beqz a0, .LBB21_22413; RV32IZFHMIN-NEXT: # %bb.1:2414; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2415; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2416; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52417; RV32IZFHMIN-NEXT: .LBB21_2:2418; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa52419; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa52420; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2421; RV32IZFHMIN-NEXT: ret2422;2423; RV64IZFHMIN-LABEL: test_trunc_ui16:2424; RV64IZFHMIN: # %bb.0:2425; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa02426; RV64IZFHMIN-NEXT: lui a0, 3072002427; RV64IZFHMIN-NEXT: fmv.w.x fa4, a02428; RV64IZFHMIN-NEXT: fabs.s fa3, fa52429; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa42430; RV64IZFHMIN-NEXT: beqz a0, .LBB21_22431; RV64IZFHMIN-NEXT: # %bb.1:2432; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2433; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2434; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52435; RV64IZFHMIN-NEXT: .LBB21_2:2436; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa52437; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa52438; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz2439; RV64IZFHMIN-NEXT: ret2440;2441; RV32IZHINXMIN-LABEL: test_trunc_ui16:2442; RV32IZHINXMIN: # %bb.0:2443; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02444; RV32IZHINXMIN-NEXT: lui a1, 3072002445; RV32IZHINXMIN-NEXT: fabs.s a2, a02446; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12447; RV32IZHINXMIN-NEXT: beqz a1, .LBB21_22448; RV32IZHINXMIN-NEXT: # %bb.1:2449; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2450; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2451; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02452; RV32IZHINXMIN-NEXT: .LBB21_2:2453; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02454; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02455; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2456; RV32IZHINXMIN-NEXT: ret2457;2458; RV64IZHINXMIN-LABEL: test_trunc_ui16:2459; RV64IZHINXMIN: # %bb.0:2460; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02461; RV64IZHINXMIN-NEXT: lui a1, 3072002462; RV64IZHINXMIN-NEXT: fabs.s a2, a02463; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12464; RV64IZHINXMIN-NEXT: beqz a1, .LBB21_22465; RV64IZHINXMIN-NEXT: # %bb.1:2466; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2467; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2468; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02469; RV64IZHINXMIN-NEXT: .LBB21_2:2470; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02471; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02472; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz2473; RV64IZHINXMIN-NEXT: ret2474 %a = call half @llvm.trunc.f16(half %x)2475 %b = fptoui half %a to i162476 ret i16 %b2477}2478 2479define signext i32 @test_trunc_ui32(half %x) {2480; CHECKIZFH-LABEL: test_trunc_ui32:2481; CHECKIZFH: # %bb.0:2482; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz2483; CHECKIZFH-NEXT: ret2484;2485; CHECKIZHINX-LABEL: test_trunc_ui32:2486; CHECKIZHINX: # %bb.0:2487; CHECKIZHINX-NEXT: li a1, 252488; CHECKIZHINX-NEXT: slli a1, a1, 102489; CHECKIZHINX-NEXT: fabs.h a2, a02490; CHECKIZHINX-NEXT: flt.h a1, a2, a12491; CHECKIZHINX-NEXT: beqz a1, .LBB22_22492; CHECKIZHINX-NEXT: # %bb.1:2493; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rtz2494; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rtz2495; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a02496; CHECKIZHINX-NEXT: .LBB22_2:2497; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz2498; CHECKIZHINX-NEXT: ret2499;2500; CHECKIZFHMIN-LABEL: test_trunc_ui32:2501; CHECKIZFHMIN: # %bb.0:2502; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa02503; CHECKIZFHMIN-NEXT: lui a0, 3072002504; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a02505; CHECKIZFHMIN-NEXT: fabs.s fa3, fa52506; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa42507; CHECKIZFHMIN-NEXT: beqz a0, .LBB22_22508; CHECKIZFHMIN-NEXT: # %bb.1:2509; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2510; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2511; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52512; CHECKIZFHMIN-NEXT: .LBB22_2:2513; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa52514; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa52515; CHECKIZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz2516; CHECKIZFHMIN-NEXT: ret2517;2518; CHECKIZHINXMIN-LABEL: test_trunc_ui32:2519; CHECKIZHINXMIN: # %bb.0:2520; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a02521; CHECKIZHINXMIN-NEXT: lui a1, 3072002522; CHECKIZHINXMIN-NEXT: fabs.s a2, a02523; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a12524; CHECKIZHINXMIN-NEXT: beqz a1, .LBB22_22525; CHECKIZHINXMIN-NEXT: # %bb.1:2526; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2527; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2528; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a02529; CHECKIZHINXMIN-NEXT: .LBB22_2:2530; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a02531; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a02532; CHECKIZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz2533; CHECKIZHINXMIN-NEXT: ret2534 %a = call half @llvm.trunc.f16(half %x)2535 %b = fptoui half %a to i322536 ret i32 %b2537}2538 2539define i64 @test_trunc_ui64(half %x) {2540; RV32IZFH-LABEL: test_trunc_ui64:2541; RV32IZFH: # %bb.0:2542; RV32IZFH-NEXT: li a0, 252543; RV32IZFH-NEXT: slli a0, a0, 102544; RV32IZFH-NEXT: fmv.h.x fa5, a02545; RV32IZFH-NEXT: fabs.h fa4, fa02546; RV32IZFH-NEXT: flt.h a0, fa4, fa52547; RV32IZFH-NEXT: beqz a0, .LBB23_22548; RV32IZFH-NEXT: # %bb.1:2549; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz2550; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rtz2551; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa02552; RV32IZFH-NEXT: .LBB23_2:2553; RV32IZFH-NEXT: addi sp, sp, -162554; RV32IZFH-NEXT: .cfi_def_cfa_offset 162555; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2556; RV32IZFH-NEXT: .cfi_offset ra, -42557; RV32IZFH-NEXT: call __fixunshfdi2558; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2559; RV32IZFH-NEXT: .cfi_restore ra2560; RV32IZFH-NEXT: addi sp, sp, 162561; RV32IZFH-NEXT: .cfi_def_cfa_offset 02562; RV32IZFH-NEXT: ret2563;2564; RV64IZFH-LABEL: test_trunc_ui64:2565; RV64IZFH: # %bb.0:2566; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz2567; RV64IZFH-NEXT: ret2568;2569; RV32IZHINX-LABEL: test_trunc_ui64:2570; RV32IZHINX: # %bb.0:2571; RV32IZHINX-NEXT: li a1, 252572; RV32IZHINX-NEXT: slli a1, a1, 102573; RV32IZHINX-NEXT: fabs.h a2, a02574; RV32IZHINX-NEXT: flt.h a1, a2, a12575; RV32IZHINX-NEXT: beqz a1, .LBB23_22576; RV32IZHINX-NEXT: # %bb.1:2577; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rtz2578; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rtz2579; RV32IZHINX-NEXT: fsgnj.h a0, a1, a02580; RV32IZHINX-NEXT: .LBB23_2:2581; RV32IZHINX-NEXT: addi sp, sp, -162582; RV32IZHINX-NEXT: .cfi_def_cfa_offset 162583; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2584; RV32IZHINX-NEXT: .cfi_offset ra, -42585; RV32IZHINX-NEXT: call __fixunshfdi2586; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2587; RV32IZHINX-NEXT: .cfi_restore ra2588; RV32IZHINX-NEXT: addi sp, sp, 162589; RV32IZHINX-NEXT: .cfi_def_cfa_offset 02590; RV32IZHINX-NEXT: ret2591;2592; RV64IZHINX-LABEL: test_trunc_ui64:2593; RV64IZHINX: # %bb.0:2594; RV64IZHINX-NEXT: li a1, 252595; RV64IZHINX-NEXT: slli a1, a1, 102596; RV64IZHINX-NEXT: fabs.h a2, a02597; RV64IZHINX-NEXT: flt.h a1, a2, a12598; RV64IZHINX-NEXT: beqz a1, .LBB23_22599; RV64IZHINX-NEXT: # %bb.1:2600; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rtz2601; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rtz2602; RV64IZHINX-NEXT: fsgnj.h a0, a1, a02603; RV64IZHINX-NEXT: .LBB23_2:2604; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz2605; RV64IZHINX-NEXT: ret2606;2607; RV32IZFHMIN-LABEL: test_trunc_ui64:2608; RV32IZFHMIN: # %bb.0:2609; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa02610; RV32IZFHMIN-NEXT: lui a0, 3072002611; RV32IZFHMIN-NEXT: fmv.w.x fa4, a02612; RV32IZFHMIN-NEXT: fabs.s fa3, fa52613; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa42614; RV32IZFHMIN-NEXT: beqz a0, .LBB23_22615; RV32IZFHMIN-NEXT: # %bb.1:2616; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2617; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2618; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52619; RV32IZFHMIN-NEXT: .LBB23_2:2620; RV32IZFHMIN-NEXT: addi sp, sp, -162621; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 162622; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2623; RV32IZFHMIN-NEXT: .cfi_offset ra, -42624; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa52625; RV32IZFHMIN-NEXT: call __fixunshfdi2626; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2627; RV32IZFHMIN-NEXT: .cfi_restore ra2628; RV32IZFHMIN-NEXT: addi sp, sp, 162629; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 02630; RV32IZFHMIN-NEXT: ret2631;2632; RV64IZFHMIN-LABEL: test_trunc_ui64:2633; RV64IZFHMIN: # %bb.0:2634; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa02635; RV64IZFHMIN-NEXT: lui a0, 3072002636; RV64IZFHMIN-NEXT: fmv.w.x fa4, a02637; RV64IZFHMIN-NEXT: fabs.s fa3, fa52638; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa42639; RV64IZFHMIN-NEXT: beqz a0, .LBB23_22640; RV64IZFHMIN-NEXT: # %bb.1:2641; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2642; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz2643; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52644; RV64IZFHMIN-NEXT: .LBB23_2:2645; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa52646; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa52647; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz2648; RV64IZFHMIN-NEXT: ret2649;2650; RV32IZHINXMIN-LABEL: test_trunc_ui64:2651; RV32IZHINXMIN: # %bb.0:2652; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02653; RV32IZHINXMIN-NEXT: lui a1, 3072002654; RV32IZHINXMIN-NEXT: fabs.s a2, a02655; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12656; RV32IZHINXMIN-NEXT: beqz a1, .LBB23_22657; RV32IZHINXMIN-NEXT: # %bb.1:2658; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2659; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2660; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02661; RV32IZHINXMIN-NEXT: .LBB23_2:2662; RV32IZHINXMIN-NEXT: addi sp, sp, -162663; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 162664; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2665; RV32IZHINXMIN-NEXT: .cfi_offset ra, -42666; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02667; RV32IZHINXMIN-NEXT: call __fixunshfdi2668; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2669; RV32IZHINXMIN-NEXT: .cfi_restore ra2670; RV32IZHINXMIN-NEXT: addi sp, sp, 162671; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 02672; RV32IZHINXMIN-NEXT: ret2673;2674; RV64IZHINXMIN-LABEL: test_trunc_ui64:2675; RV64IZHINXMIN: # %bb.0:2676; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02677; RV64IZHINXMIN-NEXT: lui a1, 3072002678; RV64IZHINXMIN-NEXT: fabs.s a2, a02679; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12680; RV64IZHINXMIN-NEXT: beqz a1, .LBB23_22681; RV64IZHINXMIN-NEXT: # %bb.1:2682; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz2683; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz2684; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02685; RV64IZHINXMIN-NEXT: .LBB23_2:2686; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02687; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02688; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz2689; RV64IZHINXMIN-NEXT: ret2690 %a = call half @llvm.trunc.f16(half %x)2691 %b = fptoui half %a to i642692 ret i64 %b2693}2694 2695define signext i8 @test_round_si8(half %x) {2696; RV32IZFH-LABEL: test_round_si8:2697; RV32IZFH: # %bb.0:2698; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rmm2699; RV32IZFH-NEXT: ret2700;2701; RV64IZFH-LABEL: test_round_si8:2702; RV64IZFH: # %bb.0:2703; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rmm2704; RV64IZFH-NEXT: ret2705;2706; RV32IZHINX-LABEL: test_round_si8:2707; RV32IZHINX: # %bb.0:2708; RV32IZHINX-NEXT: li a1, 252709; RV32IZHINX-NEXT: slli a1, a1, 102710; RV32IZHINX-NEXT: fabs.h a2, a02711; RV32IZHINX-NEXT: flt.h a1, a2, a12712; RV32IZHINX-NEXT: beqz a1, .LBB24_22713; RV32IZHINX-NEXT: # %bb.1:2714; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rmm2715; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rmm2716; RV32IZHINX-NEXT: fsgnj.h a0, a1, a02717; RV32IZHINX-NEXT: .LBB24_2:2718; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz2719; RV32IZHINX-NEXT: ret2720;2721; RV64IZHINX-LABEL: test_round_si8:2722; RV64IZHINX: # %bb.0:2723; RV64IZHINX-NEXT: li a1, 252724; RV64IZHINX-NEXT: slli a1, a1, 102725; RV64IZHINX-NEXT: fabs.h a2, a02726; RV64IZHINX-NEXT: flt.h a1, a2, a12727; RV64IZHINX-NEXT: beqz a1, .LBB24_22728; RV64IZHINX-NEXT: # %bb.1:2729; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rmm2730; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rmm2731; RV64IZHINX-NEXT: fsgnj.h a0, a1, a02732; RV64IZHINX-NEXT: .LBB24_2:2733; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz2734; RV64IZHINX-NEXT: ret2735;2736; RV32IZFHMIN-LABEL: test_round_si8:2737; RV32IZFHMIN: # %bb.0:2738; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa02739; RV32IZFHMIN-NEXT: lui a0, 3072002740; RV32IZFHMIN-NEXT: fmv.w.x fa4, a02741; RV32IZFHMIN-NEXT: fabs.s fa3, fa52742; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa42743; RV32IZFHMIN-NEXT: beqz a0, .LBB24_22744; RV32IZFHMIN-NEXT: # %bb.1:2745; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm2746; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm2747; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52748; RV32IZFHMIN-NEXT: .LBB24_2:2749; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa52750; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa52751; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2752; RV32IZFHMIN-NEXT: ret2753;2754; RV64IZFHMIN-LABEL: test_round_si8:2755; RV64IZFHMIN: # %bb.0:2756; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa02757; RV64IZFHMIN-NEXT: lui a0, 3072002758; RV64IZFHMIN-NEXT: fmv.w.x fa4, a02759; RV64IZFHMIN-NEXT: fabs.s fa3, fa52760; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa42761; RV64IZFHMIN-NEXT: beqz a0, .LBB24_22762; RV64IZFHMIN-NEXT: # %bb.1:2763; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm2764; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm2765; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52766; RV64IZFHMIN-NEXT: .LBB24_2:2767; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa52768; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa52769; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz2770; RV64IZFHMIN-NEXT: ret2771;2772; RV32IZHINXMIN-LABEL: test_round_si8:2773; RV32IZHINXMIN: # %bb.0:2774; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02775; RV32IZHINXMIN-NEXT: lui a1, 3072002776; RV32IZHINXMIN-NEXT: fabs.s a2, a02777; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12778; RV32IZHINXMIN-NEXT: beqz a1, .LBB24_22779; RV32IZHINXMIN-NEXT: # %bb.1:2780; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm2781; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm2782; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02783; RV32IZHINXMIN-NEXT: .LBB24_2:2784; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02785; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02786; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2787; RV32IZHINXMIN-NEXT: ret2788;2789; RV64IZHINXMIN-LABEL: test_round_si8:2790; RV64IZHINXMIN: # %bb.0:2791; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02792; RV64IZHINXMIN-NEXT: lui a1, 3072002793; RV64IZHINXMIN-NEXT: fabs.s a2, a02794; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12795; RV64IZHINXMIN-NEXT: beqz a1, .LBB24_22796; RV64IZHINXMIN-NEXT: # %bb.1:2797; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm2798; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm2799; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02800; RV64IZHINXMIN-NEXT: .LBB24_2:2801; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02802; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02803; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz2804; RV64IZHINXMIN-NEXT: ret2805 %a = call half @llvm.round.f16(half %x)2806 %b = fptosi half %a to i82807 ret i8 %b2808}2809 2810define signext i16 @test_round_si16(half %x) {2811; RV32IZFH-LABEL: test_round_si16:2812; RV32IZFH: # %bb.0:2813; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rmm2814; RV32IZFH-NEXT: ret2815;2816; RV64IZFH-LABEL: test_round_si16:2817; RV64IZFH: # %bb.0:2818; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rmm2819; RV64IZFH-NEXT: ret2820;2821; RV32IZHINX-LABEL: test_round_si16:2822; RV32IZHINX: # %bb.0:2823; RV32IZHINX-NEXT: li a1, 252824; RV32IZHINX-NEXT: slli a1, a1, 102825; RV32IZHINX-NEXT: fabs.h a2, a02826; RV32IZHINX-NEXT: flt.h a1, a2, a12827; RV32IZHINX-NEXT: beqz a1, .LBB25_22828; RV32IZHINX-NEXT: # %bb.1:2829; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rmm2830; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rmm2831; RV32IZHINX-NEXT: fsgnj.h a0, a1, a02832; RV32IZHINX-NEXT: .LBB25_2:2833; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz2834; RV32IZHINX-NEXT: ret2835;2836; RV64IZHINX-LABEL: test_round_si16:2837; RV64IZHINX: # %bb.0:2838; RV64IZHINX-NEXT: li a1, 252839; RV64IZHINX-NEXT: slli a1, a1, 102840; RV64IZHINX-NEXT: fabs.h a2, a02841; RV64IZHINX-NEXT: flt.h a1, a2, a12842; RV64IZHINX-NEXT: beqz a1, .LBB25_22843; RV64IZHINX-NEXT: # %bb.1:2844; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rmm2845; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rmm2846; RV64IZHINX-NEXT: fsgnj.h a0, a1, a02847; RV64IZHINX-NEXT: .LBB25_2:2848; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz2849; RV64IZHINX-NEXT: ret2850;2851; RV32IZFHMIN-LABEL: test_round_si16:2852; RV32IZFHMIN: # %bb.0:2853; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa02854; RV32IZFHMIN-NEXT: lui a0, 3072002855; RV32IZFHMIN-NEXT: fmv.w.x fa4, a02856; RV32IZFHMIN-NEXT: fabs.s fa3, fa52857; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa42858; RV32IZFHMIN-NEXT: beqz a0, .LBB25_22859; RV32IZFHMIN-NEXT: # %bb.1:2860; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm2861; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm2862; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52863; RV32IZFHMIN-NEXT: .LBB25_2:2864; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa52865; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa52866; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2867; RV32IZFHMIN-NEXT: ret2868;2869; RV64IZFHMIN-LABEL: test_round_si16:2870; RV64IZFHMIN: # %bb.0:2871; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa02872; RV64IZFHMIN-NEXT: lui a0, 3072002873; RV64IZFHMIN-NEXT: fmv.w.x fa4, a02874; RV64IZFHMIN-NEXT: fabs.s fa3, fa52875; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa42876; RV64IZFHMIN-NEXT: beqz a0, .LBB25_22877; RV64IZFHMIN-NEXT: # %bb.1:2878; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm2879; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm2880; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52881; RV64IZFHMIN-NEXT: .LBB25_2:2882; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa52883; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa52884; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz2885; RV64IZFHMIN-NEXT: ret2886;2887; RV32IZHINXMIN-LABEL: test_round_si16:2888; RV32IZHINXMIN: # %bb.0:2889; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02890; RV32IZHINXMIN-NEXT: lui a1, 3072002891; RV32IZHINXMIN-NEXT: fabs.s a2, a02892; RV32IZHINXMIN-NEXT: flt.s a1, a2, a12893; RV32IZHINXMIN-NEXT: beqz a1, .LBB25_22894; RV32IZHINXMIN-NEXT: # %bb.1:2895; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm2896; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm2897; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a02898; RV32IZHINXMIN-NEXT: .LBB25_2:2899; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a02900; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a02901; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2902; RV32IZHINXMIN-NEXT: ret2903;2904; RV64IZHINXMIN-LABEL: test_round_si16:2905; RV64IZHINXMIN: # %bb.0:2906; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02907; RV64IZHINXMIN-NEXT: lui a1, 3072002908; RV64IZHINXMIN-NEXT: fabs.s a2, a02909; RV64IZHINXMIN-NEXT: flt.s a1, a2, a12910; RV64IZHINXMIN-NEXT: beqz a1, .LBB25_22911; RV64IZHINXMIN-NEXT: # %bb.1:2912; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm2913; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm2914; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a02915; RV64IZHINXMIN-NEXT: .LBB25_2:2916; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a02917; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a02918; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz2919; RV64IZHINXMIN-NEXT: ret2920 %a = call half @llvm.round.f16(half %x)2921 %b = fptosi half %a to i162922 ret i16 %b2923}2924 2925define signext i32 @test_round_si32(half %x) {2926; CHECKIZFH-LABEL: test_round_si32:2927; CHECKIZFH: # %bb.0:2928; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rmm2929; CHECKIZFH-NEXT: ret2930;2931; CHECKIZHINX-LABEL: test_round_si32:2932; CHECKIZHINX: # %bb.0:2933; CHECKIZHINX-NEXT: li a1, 252934; CHECKIZHINX-NEXT: slli a1, a1, 102935; CHECKIZHINX-NEXT: fabs.h a2, a02936; CHECKIZHINX-NEXT: flt.h a1, a2, a12937; CHECKIZHINX-NEXT: beqz a1, .LBB26_22938; CHECKIZHINX-NEXT: # %bb.1:2939; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rmm2940; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rmm2941; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a02942; CHECKIZHINX-NEXT: .LBB26_2:2943; CHECKIZHINX-NEXT: fcvt.w.h a0, a0, rtz2944; CHECKIZHINX-NEXT: ret2945;2946; CHECKIZFHMIN-LABEL: test_round_si32:2947; CHECKIZFHMIN: # %bb.0:2948; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa02949; CHECKIZFHMIN-NEXT: lui a0, 3072002950; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a02951; CHECKIZFHMIN-NEXT: fabs.s fa3, fa52952; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa42953; CHECKIZFHMIN-NEXT: beqz a0, .LBB26_22954; CHECKIZFHMIN-NEXT: # %bb.1:2955; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm2956; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm2957; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa52958; CHECKIZFHMIN-NEXT: .LBB26_2:2959; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa52960; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa52961; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz2962; CHECKIZFHMIN-NEXT: ret2963;2964; CHECKIZHINXMIN-LABEL: test_round_si32:2965; CHECKIZHINXMIN: # %bb.0:2966; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a02967; CHECKIZHINXMIN-NEXT: lui a1, 3072002968; CHECKIZHINXMIN-NEXT: fabs.s a2, a02969; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a12970; CHECKIZHINXMIN-NEXT: beqz a1, .LBB26_22971; CHECKIZHINXMIN-NEXT: # %bb.1:2972; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm2973; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm2974; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a02975; CHECKIZHINXMIN-NEXT: .LBB26_2:2976; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a02977; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a02978; CHECKIZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz2979; CHECKIZHINXMIN-NEXT: ret2980 %a = call half @llvm.round.f16(half %x)2981 %b = fptosi half %a to i322982 ret i32 %b2983}2984 2985define i64 @test_round_si64(half %x) {2986; RV32IZFH-LABEL: test_round_si64:2987; RV32IZFH: # %bb.0:2988; RV32IZFH-NEXT: li a0, 252989; RV32IZFH-NEXT: slli a0, a0, 102990; RV32IZFH-NEXT: fmv.h.x fa5, a02991; RV32IZFH-NEXT: fabs.h fa4, fa02992; RV32IZFH-NEXT: flt.h a0, fa4, fa52993; RV32IZFH-NEXT: beqz a0, .LBB27_22994; RV32IZFH-NEXT: # %bb.1:2995; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rmm2996; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rmm2997; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa02998; RV32IZFH-NEXT: .LBB27_2:2999; RV32IZFH-NEXT: addi sp, sp, -163000; RV32IZFH-NEXT: .cfi_def_cfa_offset 163001; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3002; RV32IZFH-NEXT: .cfi_offset ra, -43003; RV32IZFH-NEXT: call __fixhfdi3004; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3005; RV32IZFH-NEXT: .cfi_restore ra3006; RV32IZFH-NEXT: addi sp, sp, 163007; RV32IZFH-NEXT: .cfi_def_cfa_offset 03008; RV32IZFH-NEXT: ret3009;3010; RV64IZFH-LABEL: test_round_si64:3011; RV64IZFH: # %bb.0:3012; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rmm3013; RV64IZFH-NEXT: ret3014;3015; RV32IZHINX-LABEL: test_round_si64:3016; RV32IZHINX: # %bb.0:3017; RV32IZHINX-NEXT: li a1, 253018; RV32IZHINX-NEXT: slli a1, a1, 103019; RV32IZHINX-NEXT: fabs.h a2, a03020; RV32IZHINX-NEXT: flt.h a1, a2, a13021; RV32IZHINX-NEXT: beqz a1, .LBB27_23022; RV32IZHINX-NEXT: # %bb.1:3023; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rmm3024; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rmm3025; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03026; RV32IZHINX-NEXT: .LBB27_2:3027; RV32IZHINX-NEXT: addi sp, sp, -163028; RV32IZHINX-NEXT: .cfi_def_cfa_offset 163029; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3030; RV32IZHINX-NEXT: .cfi_offset ra, -43031; RV32IZHINX-NEXT: call __fixhfdi3032; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3033; RV32IZHINX-NEXT: .cfi_restore ra3034; RV32IZHINX-NEXT: addi sp, sp, 163035; RV32IZHINX-NEXT: .cfi_def_cfa_offset 03036; RV32IZHINX-NEXT: ret3037;3038; RV64IZHINX-LABEL: test_round_si64:3039; RV64IZHINX: # %bb.0:3040; RV64IZHINX-NEXT: li a1, 253041; RV64IZHINX-NEXT: slli a1, a1, 103042; RV64IZHINX-NEXT: fabs.h a2, a03043; RV64IZHINX-NEXT: flt.h a1, a2, a13044; RV64IZHINX-NEXT: beqz a1, .LBB27_23045; RV64IZHINX-NEXT: # %bb.1:3046; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rmm3047; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rmm3048; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03049; RV64IZHINX-NEXT: .LBB27_2:3050; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz3051; RV64IZHINX-NEXT: ret3052;3053; RV32IZFHMIN-LABEL: test_round_si64:3054; RV32IZFHMIN: # %bb.0:3055; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03056; RV32IZFHMIN-NEXT: lui a0, 3072003057; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03058; RV32IZFHMIN-NEXT: fabs.s fa3, fa53059; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43060; RV32IZFHMIN-NEXT: beqz a0, .LBB27_23061; RV32IZFHMIN-NEXT: # %bb.1:3062; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3063; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3064; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53065; RV32IZFHMIN-NEXT: .LBB27_2:3066; RV32IZFHMIN-NEXT: addi sp, sp, -163067; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 163068; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3069; RV32IZFHMIN-NEXT: .cfi_offset ra, -43070; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa53071; RV32IZFHMIN-NEXT: call __fixhfdi3072; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3073; RV32IZFHMIN-NEXT: .cfi_restore ra3074; RV32IZFHMIN-NEXT: addi sp, sp, 163075; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 03076; RV32IZFHMIN-NEXT: ret3077;3078; RV64IZFHMIN-LABEL: test_round_si64:3079; RV64IZFHMIN: # %bb.0:3080; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03081; RV64IZFHMIN-NEXT: lui a0, 3072003082; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03083; RV64IZFHMIN-NEXT: fabs.s fa3, fa53084; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43085; RV64IZFHMIN-NEXT: beqz a0, .LBB27_23086; RV64IZFHMIN-NEXT: # %bb.1:3087; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3088; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3089; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53090; RV64IZFHMIN-NEXT: .LBB27_2:3091; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53092; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53093; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz3094; RV64IZFHMIN-NEXT: ret3095;3096; RV32IZHINXMIN-LABEL: test_round_si64:3097; RV32IZHINXMIN: # %bb.0:3098; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03099; RV32IZHINXMIN-NEXT: lui a1, 3072003100; RV32IZHINXMIN-NEXT: fabs.s a2, a03101; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13102; RV32IZHINXMIN-NEXT: beqz a1, .LBB27_23103; RV32IZHINXMIN-NEXT: # %bb.1:3104; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3105; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3106; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03107; RV32IZHINXMIN-NEXT: .LBB27_2:3108; RV32IZHINXMIN-NEXT: addi sp, sp, -163109; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 163110; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3111; RV32IZHINXMIN-NEXT: .cfi_offset ra, -43112; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a03113; RV32IZHINXMIN-NEXT: call __fixhfdi3114; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3115; RV32IZHINXMIN-NEXT: .cfi_restore ra3116; RV32IZHINXMIN-NEXT: addi sp, sp, 163117; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 03118; RV32IZHINXMIN-NEXT: ret3119;3120; RV64IZHINXMIN-LABEL: test_round_si64:3121; RV64IZHINXMIN: # %bb.0:3122; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03123; RV64IZHINXMIN-NEXT: lui a1, 3072003124; RV64IZHINXMIN-NEXT: fabs.s a2, a03125; RV64IZHINXMIN-NEXT: flt.s a1, a2, a13126; RV64IZHINXMIN-NEXT: beqz a1, .LBB27_23127; RV64IZHINXMIN-NEXT: # %bb.1:3128; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3129; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3130; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a03131; RV64IZHINXMIN-NEXT: .LBB27_2:3132; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a03133; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03134; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz3135; RV64IZHINXMIN-NEXT: ret3136 %a = call half @llvm.round.f16(half %x)3137 %b = fptosi half %a to i643138 ret i64 %b3139}3140 3141define zeroext i8 @test_round_ui8(half %x) {3142; RV32IZFH-LABEL: test_round_ui8:3143; RV32IZFH: # %bb.0:3144; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rmm3145; RV32IZFH-NEXT: ret3146;3147; RV64IZFH-LABEL: test_round_ui8:3148; RV64IZFH: # %bb.0:3149; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rmm3150; RV64IZFH-NEXT: ret3151;3152; RV32IZHINX-LABEL: test_round_ui8:3153; RV32IZHINX: # %bb.0:3154; RV32IZHINX-NEXT: li a1, 253155; RV32IZHINX-NEXT: slli a1, a1, 103156; RV32IZHINX-NEXT: fabs.h a2, a03157; RV32IZHINX-NEXT: flt.h a1, a2, a13158; RV32IZHINX-NEXT: beqz a1, .LBB28_23159; RV32IZHINX-NEXT: # %bb.1:3160; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rmm3161; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rmm3162; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03163; RV32IZHINX-NEXT: .LBB28_2:3164; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz3165; RV32IZHINX-NEXT: ret3166;3167; RV64IZHINX-LABEL: test_round_ui8:3168; RV64IZHINX: # %bb.0:3169; RV64IZHINX-NEXT: li a1, 253170; RV64IZHINX-NEXT: slli a1, a1, 103171; RV64IZHINX-NEXT: fabs.h a2, a03172; RV64IZHINX-NEXT: flt.h a1, a2, a13173; RV64IZHINX-NEXT: beqz a1, .LBB28_23174; RV64IZHINX-NEXT: # %bb.1:3175; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rmm3176; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rmm3177; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03178; RV64IZHINX-NEXT: .LBB28_2:3179; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz3180; RV64IZHINX-NEXT: ret3181;3182; RV32IZFHMIN-LABEL: test_round_ui8:3183; RV32IZFHMIN: # %bb.0:3184; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03185; RV32IZFHMIN-NEXT: lui a0, 3072003186; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03187; RV32IZFHMIN-NEXT: fabs.s fa3, fa53188; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43189; RV32IZFHMIN-NEXT: beqz a0, .LBB28_23190; RV32IZFHMIN-NEXT: # %bb.1:3191; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3192; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3193; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53194; RV32IZFHMIN-NEXT: .LBB28_2:3195; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa53196; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa53197; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz3198; RV32IZFHMIN-NEXT: ret3199;3200; RV64IZFHMIN-LABEL: test_round_ui8:3201; RV64IZFHMIN: # %bb.0:3202; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03203; RV64IZFHMIN-NEXT: lui a0, 3072003204; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03205; RV64IZFHMIN-NEXT: fabs.s fa3, fa53206; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43207; RV64IZFHMIN-NEXT: beqz a0, .LBB28_23208; RV64IZFHMIN-NEXT: # %bb.1:3209; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3210; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3211; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53212; RV64IZFHMIN-NEXT: .LBB28_2:3213; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53214; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53215; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz3216; RV64IZFHMIN-NEXT: ret3217;3218; RV32IZHINXMIN-LABEL: test_round_ui8:3219; RV32IZHINXMIN: # %bb.0:3220; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03221; RV32IZHINXMIN-NEXT: lui a1, 3072003222; RV32IZHINXMIN-NEXT: fabs.s a2, a03223; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13224; RV32IZHINXMIN-NEXT: beqz a1, .LBB28_23225; RV32IZHINXMIN-NEXT: # %bb.1:3226; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3227; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3228; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03229; RV32IZHINXMIN-NEXT: .LBB28_2:3230; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a03231; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03232; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz3233; RV32IZHINXMIN-NEXT: ret3234;3235; RV64IZHINXMIN-LABEL: test_round_ui8:3236; RV64IZHINXMIN: # %bb.0:3237; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03238; RV64IZHINXMIN-NEXT: lui a1, 3072003239; RV64IZHINXMIN-NEXT: fabs.s a2, a03240; RV64IZHINXMIN-NEXT: flt.s a1, a2, a13241; RV64IZHINXMIN-NEXT: beqz a1, .LBB28_23242; RV64IZHINXMIN-NEXT: # %bb.1:3243; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3244; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3245; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a03246; RV64IZHINXMIN-NEXT: .LBB28_2:3247; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a03248; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03249; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz3250; RV64IZHINXMIN-NEXT: ret3251 %a = call half @llvm.round.f16(half %x)3252 %b = fptoui half %a to i83253 ret i8 %b3254}3255 3256define zeroext i16 @test_round_ui16(half %x) {3257; RV32IZFH-LABEL: test_round_ui16:3258; RV32IZFH: # %bb.0:3259; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rmm3260; RV32IZFH-NEXT: ret3261;3262; RV64IZFH-LABEL: test_round_ui16:3263; RV64IZFH: # %bb.0:3264; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rmm3265; RV64IZFH-NEXT: ret3266;3267; RV32IZHINX-LABEL: test_round_ui16:3268; RV32IZHINX: # %bb.0:3269; RV32IZHINX-NEXT: li a1, 253270; RV32IZHINX-NEXT: slli a1, a1, 103271; RV32IZHINX-NEXT: fabs.h a2, a03272; RV32IZHINX-NEXT: flt.h a1, a2, a13273; RV32IZHINX-NEXT: beqz a1, .LBB29_23274; RV32IZHINX-NEXT: # %bb.1:3275; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rmm3276; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rmm3277; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03278; RV32IZHINX-NEXT: .LBB29_2:3279; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz3280; RV32IZHINX-NEXT: ret3281;3282; RV64IZHINX-LABEL: test_round_ui16:3283; RV64IZHINX: # %bb.0:3284; RV64IZHINX-NEXT: li a1, 253285; RV64IZHINX-NEXT: slli a1, a1, 103286; RV64IZHINX-NEXT: fabs.h a2, a03287; RV64IZHINX-NEXT: flt.h a1, a2, a13288; RV64IZHINX-NEXT: beqz a1, .LBB29_23289; RV64IZHINX-NEXT: # %bb.1:3290; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rmm3291; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rmm3292; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03293; RV64IZHINX-NEXT: .LBB29_2:3294; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz3295; RV64IZHINX-NEXT: ret3296;3297; RV32IZFHMIN-LABEL: test_round_ui16:3298; RV32IZFHMIN: # %bb.0:3299; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03300; RV32IZFHMIN-NEXT: lui a0, 3072003301; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03302; RV32IZFHMIN-NEXT: fabs.s fa3, fa53303; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43304; RV32IZFHMIN-NEXT: beqz a0, .LBB29_23305; RV32IZFHMIN-NEXT: # %bb.1:3306; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3307; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3308; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53309; RV32IZFHMIN-NEXT: .LBB29_2:3310; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa53311; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa53312; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz3313; RV32IZFHMIN-NEXT: ret3314;3315; RV64IZFHMIN-LABEL: test_round_ui16:3316; RV64IZFHMIN: # %bb.0:3317; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03318; RV64IZFHMIN-NEXT: lui a0, 3072003319; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03320; RV64IZFHMIN-NEXT: fabs.s fa3, fa53321; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43322; RV64IZFHMIN-NEXT: beqz a0, .LBB29_23323; RV64IZFHMIN-NEXT: # %bb.1:3324; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3325; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3326; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53327; RV64IZFHMIN-NEXT: .LBB29_2:3328; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53329; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53330; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz3331; RV64IZFHMIN-NEXT: ret3332;3333; RV32IZHINXMIN-LABEL: test_round_ui16:3334; RV32IZHINXMIN: # %bb.0:3335; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03336; RV32IZHINXMIN-NEXT: lui a1, 3072003337; RV32IZHINXMIN-NEXT: fabs.s a2, a03338; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13339; RV32IZHINXMIN-NEXT: beqz a1, .LBB29_23340; RV32IZHINXMIN-NEXT: # %bb.1:3341; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3342; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3343; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03344; RV32IZHINXMIN-NEXT: .LBB29_2:3345; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a03346; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03347; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz3348; RV32IZHINXMIN-NEXT: ret3349;3350; RV64IZHINXMIN-LABEL: test_round_ui16:3351; RV64IZHINXMIN: # %bb.0:3352; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03353; RV64IZHINXMIN-NEXT: lui a1, 3072003354; RV64IZHINXMIN-NEXT: fabs.s a2, a03355; RV64IZHINXMIN-NEXT: flt.s a1, a2, a13356; RV64IZHINXMIN-NEXT: beqz a1, .LBB29_23357; RV64IZHINXMIN-NEXT: # %bb.1:3358; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3359; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3360; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a03361; RV64IZHINXMIN-NEXT: .LBB29_2:3362; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a03363; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03364; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz3365; RV64IZHINXMIN-NEXT: ret3366 %a = call half @llvm.round.f16(half %x)3367 %b = fptoui half %a to i163368 ret i16 %b3369}3370 3371define signext i32 @test_round_ui32(half %x) {3372; CHECKIZFH-LABEL: test_round_ui32:3373; CHECKIZFH: # %bb.0:3374; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rmm3375; CHECKIZFH-NEXT: ret3376;3377; CHECKIZHINX-LABEL: test_round_ui32:3378; CHECKIZHINX: # %bb.0:3379; CHECKIZHINX-NEXT: li a1, 253380; CHECKIZHINX-NEXT: slli a1, a1, 103381; CHECKIZHINX-NEXT: fabs.h a2, a03382; CHECKIZHINX-NEXT: flt.h a1, a2, a13383; CHECKIZHINX-NEXT: beqz a1, .LBB30_23384; CHECKIZHINX-NEXT: # %bb.1:3385; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rmm3386; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rmm3387; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a03388; CHECKIZHINX-NEXT: .LBB30_2:3389; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz3390; CHECKIZHINX-NEXT: ret3391;3392; CHECKIZFHMIN-LABEL: test_round_ui32:3393; CHECKIZFHMIN: # %bb.0:3394; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa03395; CHECKIZFHMIN-NEXT: lui a0, 3072003396; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a03397; CHECKIZFHMIN-NEXT: fabs.s fa3, fa53398; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa43399; CHECKIZFHMIN-NEXT: beqz a0, .LBB30_23400; CHECKIZFHMIN-NEXT: # %bb.1:3401; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3402; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3403; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53404; CHECKIZFHMIN-NEXT: .LBB30_2:3405; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa53406; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa53407; CHECKIZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz3408; CHECKIZFHMIN-NEXT: ret3409;3410; CHECKIZHINXMIN-LABEL: test_round_ui32:3411; CHECKIZHINXMIN: # %bb.0:3412; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a03413; CHECKIZHINXMIN-NEXT: lui a1, 3072003414; CHECKIZHINXMIN-NEXT: fabs.s a2, a03415; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a13416; CHECKIZHINXMIN-NEXT: beqz a1, .LBB30_23417; CHECKIZHINXMIN-NEXT: # %bb.1:3418; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3419; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3420; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a03421; CHECKIZHINXMIN-NEXT: .LBB30_2:3422; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a03423; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a03424; CHECKIZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz3425; CHECKIZHINXMIN-NEXT: ret3426 %a = call half @llvm.round.f16(half %x)3427 %b = fptoui half %a to i323428 ret i32 %b3429}3430 3431define i64 @test_round_ui64(half %x) {3432; RV32IZFH-LABEL: test_round_ui64:3433; RV32IZFH: # %bb.0:3434; RV32IZFH-NEXT: li a0, 253435; RV32IZFH-NEXT: slli a0, a0, 103436; RV32IZFH-NEXT: fmv.h.x fa5, a03437; RV32IZFH-NEXT: fabs.h fa4, fa03438; RV32IZFH-NEXT: flt.h a0, fa4, fa53439; RV32IZFH-NEXT: beqz a0, .LBB31_23440; RV32IZFH-NEXT: # %bb.1:3441; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rmm3442; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rmm3443; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa03444; RV32IZFH-NEXT: .LBB31_2:3445; RV32IZFH-NEXT: addi sp, sp, -163446; RV32IZFH-NEXT: .cfi_def_cfa_offset 163447; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3448; RV32IZFH-NEXT: .cfi_offset ra, -43449; RV32IZFH-NEXT: call __fixunshfdi3450; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3451; RV32IZFH-NEXT: .cfi_restore ra3452; RV32IZFH-NEXT: addi sp, sp, 163453; RV32IZFH-NEXT: .cfi_def_cfa_offset 03454; RV32IZFH-NEXT: ret3455;3456; RV64IZFH-LABEL: test_round_ui64:3457; RV64IZFH: # %bb.0:3458; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rmm3459; RV64IZFH-NEXT: ret3460;3461; RV32IZHINX-LABEL: test_round_ui64:3462; RV32IZHINX: # %bb.0:3463; RV32IZHINX-NEXT: li a1, 253464; RV32IZHINX-NEXT: slli a1, a1, 103465; RV32IZHINX-NEXT: fabs.h a2, a03466; RV32IZHINX-NEXT: flt.h a1, a2, a13467; RV32IZHINX-NEXT: beqz a1, .LBB31_23468; RV32IZHINX-NEXT: # %bb.1:3469; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rmm3470; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rmm3471; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03472; RV32IZHINX-NEXT: .LBB31_2:3473; RV32IZHINX-NEXT: addi sp, sp, -163474; RV32IZHINX-NEXT: .cfi_def_cfa_offset 163475; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3476; RV32IZHINX-NEXT: .cfi_offset ra, -43477; RV32IZHINX-NEXT: call __fixunshfdi3478; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3479; RV32IZHINX-NEXT: .cfi_restore ra3480; RV32IZHINX-NEXT: addi sp, sp, 163481; RV32IZHINX-NEXT: .cfi_def_cfa_offset 03482; RV32IZHINX-NEXT: ret3483;3484; RV64IZHINX-LABEL: test_round_ui64:3485; RV64IZHINX: # %bb.0:3486; RV64IZHINX-NEXT: li a1, 253487; RV64IZHINX-NEXT: slli a1, a1, 103488; RV64IZHINX-NEXT: fabs.h a2, a03489; RV64IZHINX-NEXT: flt.h a1, a2, a13490; RV64IZHINX-NEXT: beqz a1, .LBB31_23491; RV64IZHINX-NEXT: # %bb.1:3492; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rmm3493; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rmm3494; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03495; RV64IZHINX-NEXT: .LBB31_2:3496; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz3497; RV64IZHINX-NEXT: ret3498;3499; RV32IZFHMIN-LABEL: test_round_ui64:3500; RV32IZFHMIN: # %bb.0:3501; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03502; RV32IZFHMIN-NEXT: lui a0, 3072003503; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03504; RV32IZFHMIN-NEXT: fabs.s fa3, fa53505; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43506; RV32IZFHMIN-NEXT: beqz a0, .LBB31_23507; RV32IZFHMIN-NEXT: # %bb.1:3508; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3509; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3510; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53511; RV32IZFHMIN-NEXT: .LBB31_2:3512; RV32IZFHMIN-NEXT: addi sp, sp, -163513; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 163514; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3515; RV32IZFHMIN-NEXT: .cfi_offset ra, -43516; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa53517; RV32IZFHMIN-NEXT: call __fixunshfdi3518; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3519; RV32IZFHMIN-NEXT: .cfi_restore ra3520; RV32IZFHMIN-NEXT: addi sp, sp, 163521; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 03522; RV32IZFHMIN-NEXT: ret3523;3524; RV64IZFHMIN-LABEL: test_round_ui64:3525; RV64IZFHMIN: # %bb.0:3526; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03527; RV64IZFHMIN-NEXT: lui a0, 3072003528; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03529; RV64IZFHMIN-NEXT: fabs.s fa3, fa53530; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43531; RV64IZFHMIN-NEXT: beqz a0, .LBB31_23532; RV64IZFHMIN-NEXT: # %bb.1:3533; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm3534; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm3535; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53536; RV64IZFHMIN-NEXT: .LBB31_2:3537; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53538; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53539; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz3540; RV64IZFHMIN-NEXT: ret3541;3542; RV32IZHINXMIN-LABEL: test_round_ui64:3543; RV32IZHINXMIN: # %bb.0:3544; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03545; RV32IZHINXMIN-NEXT: lui a1, 3072003546; RV32IZHINXMIN-NEXT: fabs.s a2, a03547; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13548; RV32IZHINXMIN-NEXT: beqz a1, .LBB31_23549; RV32IZHINXMIN-NEXT: # %bb.1:3550; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3551; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3552; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03553; RV32IZHINXMIN-NEXT: .LBB31_2:3554; RV32IZHINXMIN-NEXT: addi sp, sp, -163555; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 163556; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3557; RV32IZHINXMIN-NEXT: .cfi_offset ra, -43558; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a03559; RV32IZHINXMIN-NEXT: call __fixunshfdi3560; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3561; RV32IZHINXMIN-NEXT: .cfi_restore ra3562; RV32IZHINXMIN-NEXT: addi sp, sp, 163563; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 03564; RV32IZHINXMIN-NEXT: ret3565;3566; RV64IZHINXMIN-LABEL: test_round_ui64:3567; RV64IZHINXMIN: # %bb.0:3568; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03569; RV64IZHINXMIN-NEXT: lui a1, 3072003570; RV64IZHINXMIN-NEXT: fabs.s a2, a03571; RV64IZHINXMIN-NEXT: flt.s a1, a2, a13572; RV64IZHINXMIN-NEXT: beqz a1, .LBB31_23573; RV64IZHINXMIN-NEXT: # %bb.1:3574; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm3575; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm3576; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a03577; RV64IZHINXMIN-NEXT: .LBB31_2:3578; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a03579; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03580; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz3581; RV64IZHINXMIN-NEXT: ret3582 %a = call half @llvm.round.f16(half %x)3583 %b = fptoui half %a to i643584 ret i64 %b3585}3586 3587define signext i8 @test_roundeven_si8(half %x) {3588; RV32IZFH-LABEL: test_roundeven_si8:3589; RV32IZFH: # %bb.0:3590; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rne3591; RV32IZFH-NEXT: ret3592;3593; RV64IZFH-LABEL: test_roundeven_si8:3594; RV64IZFH: # %bb.0:3595; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rne3596; RV64IZFH-NEXT: ret3597;3598; RV32IZHINX-LABEL: test_roundeven_si8:3599; RV32IZHINX: # %bb.0:3600; RV32IZHINX-NEXT: li a1, 253601; RV32IZHINX-NEXT: slli a1, a1, 103602; RV32IZHINX-NEXT: fabs.h a2, a03603; RV32IZHINX-NEXT: flt.h a1, a2, a13604; RV32IZHINX-NEXT: beqz a1, .LBB32_23605; RV32IZHINX-NEXT: # %bb.1:3606; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rne3607; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rne3608; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03609; RV32IZHINX-NEXT: .LBB32_2:3610; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz3611; RV32IZHINX-NEXT: ret3612;3613; RV64IZHINX-LABEL: test_roundeven_si8:3614; RV64IZHINX: # %bb.0:3615; RV64IZHINX-NEXT: li a1, 253616; RV64IZHINX-NEXT: slli a1, a1, 103617; RV64IZHINX-NEXT: fabs.h a2, a03618; RV64IZHINX-NEXT: flt.h a1, a2, a13619; RV64IZHINX-NEXT: beqz a1, .LBB32_23620; RV64IZHINX-NEXT: # %bb.1:3621; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rne3622; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rne3623; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03624; RV64IZHINX-NEXT: .LBB32_2:3625; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz3626; RV64IZHINX-NEXT: ret3627;3628; RV32IZFHMIN-LABEL: test_roundeven_si8:3629; RV32IZFHMIN: # %bb.0:3630; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03631; RV32IZFHMIN-NEXT: lui a0, 3072003632; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03633; RV32IZFHMIN-NEXT: fabs.s fa3, fa53634; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43635; RV32IZFHMIN-NEXT: beqz a0, .LBB32_23636; RV32IZFHMIN-NEXT: # %bb.1:3637; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3638; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3639; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53640; RV32IZFHMIN-NEXT: .LBB32_2:3641; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa53642; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa53643; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz3644; RV32IZFHMIN-NEXT: ret3645;3646; RV64IZFHMIN-LABEL: test_roundeven_si8:3647; RV64IZFHMIN: # %bb.0:3648; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03649; RV64IZFHMIN-NEXT: lui a0, 3072003650; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03651; RV64IZFHMIN-NEXT: fabs.s fa3, fa53652; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43653; RV64IZFHMIN-NEXT: beqz a0, .LBB32_23654; RV64IZFHMIN-NEXT: # %bb.1:3655; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3656; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3657; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53658; RV64IZFHMIN-NEXT: .LBB32_2:3659; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53660; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53661; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz3662; RV64IZFHMIN-NEXT: ret3663;3664; RV32IZHINXMIN-LABEL: test_roundeven_si8:3665; RV32IZHINXMIN: # %bb.0:3666; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03667; RV32IZHINXMIN-NEXT: lui a1, 3072003668; RV32IZHINXMIN-NEXT: fabs.s a2, a03669; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13670; RV32IZHINXMIN-NEXT: beqz a1, .LBB32_23671; RV32IZHINXMIN-NEXT: # %bb.1:3672; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne3673; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne3674; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03675; RV32IZHINXMIN-NEXT: .LBB32_2:3676; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a03677; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03678; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz3679; RV32IZHINXMIN-NEXT: ret3680;3681; RV64IZHINXMIN-LABEL: test_roundeven_si8:3682; RV64IZHINXMIN: # %bb.0:3683; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03684; RV64IZHINXMIN-NEXT: lui a1, 3072003685; RV64IZHINXMIN-NEXT: fabs.s a2, a03686; RV64IZHINXMIN-NEXT: flt.s a1, a2, a13687; RV64IZHINXMIN-NEXT: beqz a1, .LBB32_23688; RV64IZHINXMIN-NEXT: # %bb.1:3689; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne3690; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne3691; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a03692; RV64IZHINXMIN-NEXT: .LBB32_2:3693; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a03694; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03695; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz3696; RV64IZHINXMIN-NEXT: ret3697 %a = call half @llvm.roundeven.f16(half %x)3698 %b = fptosi half %a to i83699 ret i8 %b3700}3701 3702define signext i16 @test_roundeven_si16(half %x) {3703; RV32IZFH-LABEL: test_roundeven_si16:3704; RV32IZFH: # %bb.0:3705; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rne3706; RV32IZFH-NEXT: ret3707;3708; RV64IZFH-LABEL: test_roundeven_si16:3709; RV64IZFH: # %bb.0:3710; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rne3711; RV64IZFH-NEXT: ret3712;3713; RV32IZHINX-LABEL: test_roundeven_si16:3714; RV32IZHINX: # %bb.0:3715; RV32IZHINX-NEXT: li a1, 253716; RV32IZHINX-NEXT: slli a1, a1, 103717; RV32IZHINX-NEXT: fabs.h a2, a03718; RV32IZHINX-NEXT: flt.h a1, a2, a13719; RV32IZHINX-NEXT: beqz a1, .LBB33_23720; RV32IZHINX-NEXT: # %bb.1:3721; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rne3722; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rne3723; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03724; RV32IZHINX-NEXT: .LBB33_2:3725; RV32IZHINX-NEXT: fcvt.w.h a0, a0, rtz3726; RV32IZHINX-NEXT: ret3727;3728; RV64IZHINX-LABEL: test_roundeven_si16:3729; RV64IZHINX: # %bb.0:3730; RV64IZHINX-NEXT: li a1, 253731; RV64IZHINX-NEXT: slli a1, a1, 103732; RV64IZHINX-NEXT: fabs.h a2, a03733; RV64IZHINX-NEXT: flt.h a1, a2, a13734; RV64IZHINX-NEXT: beqz a1, .LBB33_23735; RV64IZHINX-NEXT: # %bb.1:3736; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rne3737; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rne3738; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03739; RV64IZHINX-NEXT: .LBB33_2:3740; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz3741; RV64IZHINX-NEXT: ret3742;3743; RV32IZFHMIN-LABEL: test_roundeven_si16:3744; RV32IZFHMIN: # %bb.0:3745; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03746; RV32IZFHMIN-NEXT: lui a0, 3072003747; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03748; RV32IZFHMIN-NEXT: fabs.s fa3, fa53749; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43750; RV32IZFHMIN-NEXT: beqz a0, .LBB33_23751; RV32IZFHMIN-NEXT: # %bb.1:3752; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3753; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3754; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53755; RV32IZFHMIN-NEXT: .LBB33_2:3756; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa53757; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa53758; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz3759; RV32IZFHMIN-NEXT: ret3760;3761; RV64IZFHMIN-LABEL: test_roundeven_si16:3762; RV64IZFHMIN: # %bb.0:3763; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03764; RV64IZFHMIN-NEXT: lui a0, 3072003765; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03766; RV64IZFHMIN-NEXT: fabs.s fa3, fa53767; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43768; RV64IZFHMIN-NEXT: beqz a0, .LBB33_23769; RV64IZFHMIN-NEXT: # %bb.1:3770; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3771; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3772; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53773; RV64IZFHMIN-NEXT: .LBB33_2:3774; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53775; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53776; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz3777; RV64IZFHMIN-NEXT: ret3778;3779; RV32IZHINXMIN-LABEL: test_roundeven_si16:3780; RV32IZHINXMIN: # %bb.0:3781; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03782; RV32IZHINXMIN-NEXT: lui a1, 3072003783; RV32IZHINXMIN-NEXT: fabs.s a2, a03784; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13785; RV32IZHINXMIN-NEXT: beqz a1, .LBB33_23786; RV32IZHINXMIN-NEXT: # %bb.1:3787; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne3788; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne3789; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03790; RV32IZHINXMIN-NEXT: .LBB33_2:3791; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a03792; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03793; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz3794; RV32IZHINXMIN-NEXT: ret3795;3796; RV64IZHINXMIN-LABEL: test_roundeven_si16:3797; RV64IZHINXMIN: # %bb.0:3798; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03799; RV64IZHINXMIN-NEXT: lui a1, 3072003800; RV64IZHINXMIN-NEXT: fabs.s a2, a03801; RV64IZHINXMIN-NEXT: flt.s a1, a2, a13802; RV64IZHINXMIN-NEXT: beqz a1, .LBB33_23803; RV64IZHINXMIN-NEXT: # %bb.1:3804; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne3805; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne3806; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a03807; RV64IZHINXMIN-NEXT: .LBB33_2:3808; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a03809; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a03810; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz3811; RV64IZHINXMIN-NEXT: ret3812 %a = call half @llvm.roundeven.f16(half %x)3813 %b = fptosi half %a to i163814 ret i16 %b3815}3816 3817define signext i32 @test_roundeven_si32(half %x) {3818; CHECKIZFH-LABEL: test_roundeven_si32:3819; CHECKIZFH: # %bb.0:3820; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rne3821; CHECKIZFH-NEXT: ret3822;3823; CHECKIZHINX-LABEL: test_roundeven_si32:3824; CHECKIZHINX: # %bb.0:3825; CHECKIZHINX-NEXT: li a1, 253826; CHECKIZHINX-NEXT: slli a1, a1, 103827; CHECKIZHINX-NEXT: fabs.h a2, a03828; CHECKIZHINX-NEXT: flt.h a1, a2, a13829; CHECKIZHINX-NEXT: beqz a1, .LBB34_23830; CHECKIZHINX-NEXT: # %bb.1:3831; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rne3832; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rne3833; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a03834; CHECKIZHINX-NEXT: .LBB34_2:3835; CHECKIZHINX-NEXT: fcvt.w.h a0, a0, rtz3836; CHECKIZHINX-NEXT: ret3837;3838; CHECKIZFHMIN-LABEL: test_roundeven_si32:3839; CHECKIZFHMIN: # %bb.0:3840; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa03841; CHECKIZFHMIN-NEXT: lui a0, 3072003842; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a03843; CHECKIZFHMIN-NEXT: fabs.s fa3, fa53844; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa43845; CHECKIZFHMIN-NEXT: beqz a0, .LBB34_23846; CHECKIZFHMIN-NEXT: # %bb.1:3847; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3848; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3849; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53850; CHECKIZFHMIN-NEXT: .LBB34_2:3851; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa53852; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa53853; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz3854; CHECKIZFHMIN-NEXT: ret3855;3856; CHECKIZHINXMIN-LABEL: test_roundeven_si32:3857; CHECKIZHINXMIN: # %bb.0:3858; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a03859; CHECKIZHINXMIN-NEXT: lui a1, 3072003860; CHECKIZHINXMIN-NEXT: fabs.s a2, a03861; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a13862; CHECKIZHINXMIN-NEXT: beqz a1, .LBB34_23863; CHECKIZHINXMIN-NEXT: # %bb.1:3864; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rne3865; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rne3866; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a03867; CHECKIZHINXMIN-NEXT: .LBB34_2:3868; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a03869; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a03870; CHECKIZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz3871; CHECKIZHINXMIN-NEXT: ret3872 %a = call half @llvm.roundeven.f16(half %x)3873 %b = fptosi half %a to i323874 ret i32 %b3875}3876 3877define i64 @test_roundeven_si64(half %x) {3878; RV32IZFH-LABEL: test_roundeven_si64:3879; RV32IZFH: # %bb.0:3880; RV32IZFH-NEXT: li a0, 253881; RV32IZFH-NEXT: slli a0, a0, 103882; RV32IZFH-NEXT: fmv.h.x fa5, a03883; RV32IZFH-NEXT: fabs.h fa4, fa03884; RV32IZFH-NEXT: flt.h a0, fa4, fa53885; RV32IZFH-NEXT: beqz a0, .LBB35_23886; RV32IZFH-NEXT: # %bb.1:3887; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rne3888; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rne3889; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa03890; RV32IZFH-NEXT: .LBB35_2:3891; RV32IZFH-NEXT: addi sp, sp, -163892; RV32IZFH-NEXT: .cfi_def_cfa_offset 163893; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3894; RV32IZFH-NEXT: .cfi_offset ra, -43895; RV32IZFH-NEXT: call __fixhfdi3896; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3897; RV32IZFH-NEXT: .cfi_restore ra3898; RV32IZFH-NEXT: addi sp, sp, 163899; RV32IZFH-NEXT: .cfi_def_cfa_offset 03900; RV32IZFH-NEXT: ret3901;3902; RV64IZFH-LABEL: test_roundeven_si64:3903; RV64IZFH: # %bb.0:3904; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rne3905; RV64IZFH-NEXT: ret3906;3907; RV32IZHINX-LABEL: test_roundeven_si64:3908; RV32IZHINX: # %bb.0:3909; RV32IZHINX-NEXT: li a1, 253910; RV32IZHINX-NEXT: slli a1, a1, 103911; RV32IZHINX-NEXT: fabs.h a2, a03912; RV32IZHINX-NEXT: flt.h a1, a2, a13913; RV32IZHINX-NEXT: beqz a1, .LBB35_23914; RV32IZHINX-NEXT: # %bb.1:3915; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rne3916; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rne3917; RV32IZHINX-NEXT: fsgnj.h a0, a1, a03918; RV32IZHINX-NEXT: .LBB35_2:3919; RV32IZHINX-NEXT: addi sp, sp, -163920; RV32IZHINX-NEXT: .cfi_def_cfa_offset 163921; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3922; RV32IZHINX-NEXT: .cfi_offset ra, -43923; RV32IZHINX-NEXT: call __fixhfdi3924; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3925; RV32IZHINX-NEXT: .cfi_restore ra3926; RV32IZHINX-NEXT: addi sp, sp, 163927; RV32IZHINX-NEXT: .cfi_def_cfa_offset 03928; RV32IZHINX-NEXT: ret3929;3930; RV64IZHINX-LABEL: test_roundeven_si64:3931; RV64IZHINX: # %bb.0:3932; RV64IZHINX-NEXT: li a1, 253933; RV64IZHINX-NEXT: slli a1, a1, 103934; RV64IZHINX-NEXT: fabs.h a2, a03935; RV64IZHINX-NEXT: flt.h a1, a2, a13936; RV64IZHINX-NEXT: beqz a1, .LBB35_23937; RV64IZHINX-NEXT: # %bb.1:3938; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rne3939; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rne3940; RV64IZHINX-NEXT: fsgnj.h a0, a1, a03941; RV64IZHINX-NEXT: .LBB35_2:3942; RV64IZHINX-NEXT: fcvt.l.h a0, a0, rtz3943; RV64IZHINX-NEXT: ret3944;3945; RV32IZFHMIN-LABEL: test_roundeven_si64:3946; RV32IZFHMIN: # %bb.0:3947; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa03948; RV32IZFHMIN-NEXT: lui a0, 3072003949; RV32IZFHMIN-NEXT: fmv.w.x fa4, a03950; RV32IZFHMIN-NEXT: fabs.s fa3, fa53951; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa43952; RV32IZFHMIN-NEXT: beqz a0, .LBB35_23953; RV32IZFHMIN-NEXT: # %bb.1:3954; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3955; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3956; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53957; RV32IZFHMIN-NEXT: .LBB35_2:3958; RV32IZFHMIN-NEXT: addi sp, sp, -163959; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 163960; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill3961; RV32IZFHMIN-NEXT: .cfi_offset ra, -43962; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa53963; RV32IZFHMIN-NEXT: call __fixhfdi3964; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload3965; RV32IZFHMIN-NEXT: .cfi_restore ra3966; RV32IZFHMIN-NEXT: addi sp, sp, 163967; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 03968; RV32IZFHMIN-NEXT: ret3969;3970; RV64IZFHMIN-LABEL: test_roundeven_si64:3971; RV64IZFHMIN: # %bb.0:3972; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa03973; RV64IZFHMIN-NEXT: lui a0, 3072003974; RV64IZFHMIN-NEXT: fmv.w.x fa4, a03975; RV64IZFHMIN-NEXT: fabs.s fa3, fa53976; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa43977; RV64IZFHMIN-NEXT: beqz a0, .LBB35_23978; RV64IZFHMIN-NEXT: # %bb.1:3979; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne3980; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne3981; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa53982; RV64IZFHMIN-NEXT: .LBB35_2:3983; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa53984; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa53985; RV64IZFHMIN-NEXT: fcvt.l.s a0, fa5, rtz3986; RV64IZFHMIN-NEXT: ret3987;3988; RV32IZHINXMIN-LABEL: test_roundeven_si64:3989; RV32IZHINXMIN: # %bb.0:3990; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a03991; RV32IZHINXMIN-NEXT: lui a1, 3072003992; RV32IZHINXMIN-NEXT: fabs.s a2, a03993; RV32IZHINXMIN-NEXT: flt.s a1, a2, a13994; RV32IZHINXMIN-NEXT: beqz a1, .LBB35_23995; RV32IZHINXMIN-NEXT: # %bb.1:3996; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne3997; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne3998; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a03999; RV32IZHINXMIN-NEXT: .LBB35_2:4000; RV32IZHINXMIN-NEXT: addi sp, sp, -164001; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 164002; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4003; RV32IZHINXMIN-NEXT: .cfi_offset ra, -44004; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a04005; RV32IZHINXMIN-NEXT: call __fixhfdi4006; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4007; RV32IZHINXMIN-NEXT: .cfi_restore ra4008; RV32IZHINXMIN-NEXT: addi sp, sp, 164009; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 04010; RV32IZHINXMIN-NEXT: ret4011;4012; RV64IZHINXMIN-LABEL: test_roundeven_si64:4013; RV64IZHINXMIN: # %bb.0:4014; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04015; RV64IZHINXMIN-NEXT: lui a1, 3072004016; RV64IZHINXMIN-NEXT: fabs.s a2, a04017; RV64IZHINXMIN-NEXT: flt.s a1, a2, a14018; RV64IZHINXMIN-NEXT: beqz a1, .LBB35_24019; RV64IZHINXMIN-NEXT: # %bb.1:4020; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4021; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4022; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a04023; RV64IZHINXMIN-NEXT: .LBB35_2:4024; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a04025; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04026; RV64IZHINXMIN-NEXT: fcvt.l.s a0, a0, rtz4027; RV64IZHINXMIN-NEXT: ret4028 %a = call half @llvm.roundeven.f16(half %x)4029 %b = fptosi half %a to i644030 ret i64 %b4031}4032 4033define zeroext i8 @test_roundeven_ui8(half %x) {4034; RV32IZFH-LABEL: test_roundeven_ui8:4035; RV32IZFH: # %bb.0:4036; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rne4037; RV32IZFH-NEXT: ret4038;4039; RV64IZFH-LABEL: test_roundeven_ui8:4040; RV64IZFH: # %bb.0:4041; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rne4042; RV64IZFH-NEXT: ret4043;4044; RV32IZHINX-LABEL: test_roundeven_ui8:4045; RV32IZHINX: # %bb.0:4046; RV32IZHINX-NEXT: li a1, 254047; RV32IZHINX-NEXT: slli a1, a1, 104048; RV32IZHINX-NEXT: fabs.h a2, a04049; RV32IZHINX-NEXT: flt.h a1, a2, a14050; RV32IZHINX-NEXT: beqz a1, .LBB36_24051; RV32IZHINX-NEXT: # %bb.1:4052; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rne4053; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rne4054; RV32IZHINX-NEXT: fsgnj.h a0, a1, a04055; RV32IZHINX-NEXT: .LBB36_2:4056; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz4057; RV32IZHINX-NEXT: ret4058;4059; RV64IZHINX-LABEL: test_roundeven_ui8:4060; RV64IZHINX: # %bb.0:4061; RV64IZHINX-NEXT: li a1, 254062; RV64IZHINX-NEXT: slli a1, a1, 104063; RV64IZHINX-NEXT: fabs.h a2, a04064; RV64IZHINX-NEXT: flt.h a1, a2, a14065; RV64IZHINX-NEXT: beqz a1, .LBB36_24066; RV64IZHINX-NEXT: # %bb.1:4067; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rne4068; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rne4069; RV64IZHINX-NEXT: fsgnj.h a0, a1, a04070; RV64IZHINX-NEXT: .LBB36_2:4071; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz4072; RV64IZHINX-NEXT: ret4073;4074; RV32IZFHMIN-LABEL: test_roundeven_ui8:4075; RV32IZFHMIN: # %bb.0:4076; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa04077; RV32IZFHMIN-NEXT: lui a0, 3072004078; RV32IZFHMIN-NEXT: fmv.w.x fa4, a04079; RV32IZFHMIN-NEXT: fabs.s fa3, fa54080; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa44081; RV32IZFHMIN-NEXT: beqz a0, .LBB36_24082; RV32IZFHMIN-NEXT: # %bb.1:4083; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4084; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4085; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54086; RV32IZFHMIN-NEXT: .LBB36_2:4087; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa54088; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa54089; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz4090; RV32IZFHMIN-NEXT: ret4091;4092; RV64IZFHMIN-LABEL: test_roundeven_ui8:4093; RV64IZFHMIN: # %bb.0:4094; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa04095; RV64IZFHMIN-NEXT: lui a0, 3072004096; RV64IZFHMIN-NEXT: fmv.w.x fa4, a04097; RV64IZFHMIN-NEXT: fabs.s fa3, fa54098; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa44099; RV64IZFHMIN-NEXT: beqz a0, .LBB36_24100; RV64IZFHMIN-NEXT: # %bb.1:4101; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4102; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4103; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54104; RV64IZFHMIN-NEXT: .LBB36_2:4105; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa54106; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa54107; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz4108; RV64IZFHMIN-NEXT: ret4109;4110; RV32IZHINXMIN-LABEL: test_roundeven_ui8:4111; RV32IZHINXMIN: # %bb.0:4112; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a04113; RV32IZHINXMIN-NEXT: lui a1, 3072004114; RV32IZHINXMIN-NEXT: fabs.s a2, a04115; RV32IZHINXMIN-NEXT: flt.s a1, a2, a14116; RV32IZHINXMIN-NEXT: beqz a1, .LBB36_24117; RV32IZHINXMIN-NEXT: # %bb.1:4118; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4119; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4120; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a04121; RV32IZHINXMIN-NEXT: .LBB36_2:4122; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a04123; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a04124; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz4125; RV32IZHINXMIN-NEXT: ret4126;4127; RV64IZHINXMIN-LABEL: test_roundeven_ui8:4128; RV64IZHINXMIN: # %bb.0:4129; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04130; RV64IZHINXMIN-NEXT: lui a1, 3072004131; RV64IZHINXMIN-NEXT: fabs.s a2, a04132; RV64IZHINXMIN-NEXT: flt.s a1, a2, a14133; RV64IZHINXMIN-NEXT: beqz a1, .LBB36_24134; RV64IZHINXMIN-NEXT: # %bb.1:4135; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4136; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4137; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a04138; RV64IZHINXMIN-NEXT: .LBB36_2:4139; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a04140; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04141; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz4142; RV64IZHINXMIN-NEXT: ret4143 %a = call half @llvm.roundeven.f16(half %x)4144 %b = fptoui half %a to i84145 ret i8 %b4146}4147 4148define zeroext i16 @test_roundeven_ui16(half %x) {4149; RV32IZFH-LABEL: test_roundeven_ui16:4150; RV32IZFH: # %bb.0:4151; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rne4152; RV32IZFH-NEXT: ret4153;4154; RV64IZFH-LABEL: test_roundeven_ui16:4155; RV64IZFH: # %bb.0:4156; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rne4157; RV64IZFH-NEXT: ret4158;4159; RV32IZHINX-LABEL: test_roundeven_ui16:4160; RV32IZHINX: # %bb.0:4161; RV32IZHINX-NEXT: li a1, 254162; RV32IZHINX-NEXT: slli a1, a1, 104163; RV32IZHINX-NEXT: fabs.h a2, a04164; RV32IZHINX-NEXT: flt.h a1, a2, a14165; RV32IZHINX-NEXT: beqz a1, .LBB37_24166; RV32IZHINX-NEXT: # %bb.1:4167; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rne4168; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rne4169; RV32IZHINX-NEXT: fsgnj.h a0, a1, a04170; RV32IZHINX-NEXT: .LBB37_2:4171; RV32IZHINX-NEXT: fcvt.wu.h a0, a0, rtz4172; RV32IZHINX-NEXT: ret4173;4174; RV64IZHINX-LABEL: test_roundeven_ui16:4175; RV64IZHINX: # %bb.0:4176; RV64IZHINX-NEXT: li a1, 254177; RV64IZHINX-NEXT: slli a1, a1, 104178; RV64IZHINX-NEXT: fabs.h a2, a04179; RV64IZHINX-NEXT: flt.h a1, a2, a14180; RV64IZHINX-NEXT: beqz a1, .LBB37_24181; RV64IZHINX-NEXT: # %bb.1:4182; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rne4183; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rne4184; RV64IZHINX-NEXT: fsgnj.h a0, a1, a04185; RV64IZHINX-NEXT: .LBB37_2:4186; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz4187; RV64IZHINX-NEXT: ret4188;4189; RV32IZFHMIN-LABEL: test_roundeven_ui16:4190; RV32IZFHMIN: # %bb.0:4191; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa04192; RV32IZFHMIN-NEXT: lui a0, 3072004193; RV32IZFHMIN-NEXT: fmv.w.x fa4, a04194; RV32IZFHMIN-NEXT: fabs.s fa3, fa54195; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa44196; RV32IZFHMIN-NEXT: beqz a0, .LBB37_24197; RV32IZFHMIN-NEXT: # %bb.1:4198; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4199; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4200; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54201; RV32IZFHMIN-NEXT: .LBB37_2:4202; RV32IZFHMIN-NEXT: fcvt.h.s fa5, fa54203; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa54204; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz4205; RV32IZFHMIN-NEXT: ret4206;4207; RV64IZFHMIN-LABEL: test_roundeven_ui16:4208; RV64IZFHMIN: # %bb.0:4209; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa04210; RV64IZFHMIN-NEXT: lui a0, 3072004211; RV64IZFHMIN-NEXT: fmv.w.x fa4, a04212; RV64IZFHMIN-NEXT: fabs.s fa3, fa54213; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa44214; RV64IZFHMIN-NEXT: beqz a0, .LBB37_24215; RV64IZFHMIN-NEXT: # %bb.1:4216; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4217; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4218; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54219; RV64IZFHMIN-NEXT: .LBB37_2:4220; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa54221; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa54222; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz4223; RV64IZFHMIN-NEXT: ret4224;4225; RV32IZHINXMIN-LABEL: test_roundeven_ui16:4226; RV32IZHINXMIN: # %bb.0:4227; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a04228; RV32IZHINXMIN-NEXT: lui a1, 3072004229; RV32IZHINXMIN-NEXT: fabs.s a2, a04230; RV32IZHINXMIN-NEXT: flt.s a1, a2, a14231; RV32IZHINXMIN-NEXT: beqz a1, .LBB37_24232; RV32IZHINXMIN-NEXT: # %bb.1:4233; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4234; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4235; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a04236; RV32IZHINXMIN-NEXT: .LBB37_2:4237; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a04238; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a04239; RV32IZHINXMIN-NEXT: fcvt.w.s a0, a0, rtz4240; RV32IZHINXMIN-NEXT: ret4241;4242; RV64IZHINXMIN-LABEL: test_roundeven_ui16:4243; RV64IZHINXMIN: # %bb.0:4244; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04245; RV64IZHINXMIN-NEXT: lui a1, 3072004246; RV64IZHINXMIN-NEXT: fabs.s a2, a04247; RV64IZHINXMIN-NEXT: flt.s a1, a2, a14248; RV64IZHINXMIN-NEXT: beqz a1, .LBB37_24249; RV64IZHINXMIN-NEXT: # %bb.1:4250; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4251; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4252; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a04253; RV64IZHINXMIN-NEXT: .LBB37_2:4254; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a04255; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04256; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz4257; RV64IZHINXMIN-NEXT: ret4258 %a = call half @llvm.roundeven.f16(half %x)4259 %b = fptoui half %a to i164260 ret i16 %b4261}4262 4263define signext i32 @test_roundeven_ui32(half %x) {4264; CHECKIZFH-LABEL: test_roundeven_ui32:4265; CHECKIZFH: # %bb.0:4266; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rne4267; CHECKIZFH-NEXT: ret4268;4269; CHECKIZHINX-LABEL: test_roundeven_ui32:4270; CHECKIZHINX: # %bb.0:4271; CHECKIZHINX-NEXT: li a1, 254272; CHECKIZHINX-NEXT: slli a1, a1, 104273; CHECKIZHINX-NEXT: fabs.h a2, a04274; CHECKIZHINX-NEXT: flt.h a1, a2, a14275; CHECKIZHINX-NEXT: beqz a1, .LBB38_24276; CHECKIZHINX-NEXT: # %bb.1:4277; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rne4278; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rne4279; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a04280; CHECKIZHINX-NEXT: .LBB38_2:4281; CHECKIZHINX-NEXT: fcvt.wu.h a0, a0, rtz4282; CHECKIZHINX-NEXT: ret4283;4284; CHECKIZFHMIN-LABEL: test_roundeven_ui32:4285; CHECKIZFHMIN: # %bb.0:4286; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa04287; CHECKIZFHMIN-NEXT: lui a0, 3072004288; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a04289; CHECKIZFHMIN-NEXT: fabs.s fa3, fa54290; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa44291; CHECKIZFHMIN-NEXT: beqz a0, .LBB38_24292; CHECKIZFHMIN-NEXT: # %bb.1:4293; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4294; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4295; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54296; CHECKIZFHMIN-NEXT: .LBB38_2:4297; CHECKIZFHMIN-NEXT: fcvt.h.s fa5, fa54298; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa54299; CHECKIZFHMIN-NEXT: fcvt.wu.s a0, fa5, rtz4300; CHECKIZFHMIN-NEXT: ret4301;4302; CHECKIZHINXMIN-LABEL: test_roundeven_ui32:4303; CHECKIZHINXMIN: # %bb.0:4304; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04305; CHECKIZHINXMIN-NEXT: lui a1, 3072004306; CHECKIZHINXMIN-NEXT: fabs.s a2, a04307; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a14308; CHECKIZHINXMIN-NEXT: beqz a1, .LBB38_24309; CHECKIZHINXMIN-NEXT: # %bb.1:4310; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4311; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4312; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a04313; CHECKIZHINXMIN-NEXT: .LBB38_2:4314; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a04315; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04316; CHECKIZHINXMIN-NEXT: fcvt.wu.s a0, a0, rtz4317; CHECKIZHINXMIN-NEXT: ret4318 %a = call half @llvm.roundeven.f16(half %x)4319 %b = fptoui half %a to i324320 ret i32 %b4321}4322 4323define i64 @test_roundeven_ui64(half %x) {4324; RV32IZFH-LABEL: test_roundeven_ui64:4325; RV32IZFH: # %bb.0:4326; RV32IZFH-NEXT: li a0, 254327; RV32IZFH-NEXT: slli a0, a0, 104328; RV32IZFH-NEXT: fmv.h.x fa5, a04329; RV32IZFH-NEXT: fabs.h fa4, fa04330; RV32IZFH-NEXT: flt.h a0, fa4, fa54331; RV32IZFH-NEXT: beqz a0, .LBB39_24332; RV32IZFH-NEXT: # %bb.1:4333; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rne4334; RV32IZFH-NEXT: fcvt.h.w fa5, a0, rne4335; RV32IZFH-NEXT: fsgnj.h fa0, fa5, fa04336; RV32IZFH-NEXT: .LBB39_2:4337; RV32IZFH-NEXT: addi sp, sp, -164338; RV32IZFH-NEXT: .cfi_def_cfa_offset 164339; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4340; RV32IZFH-NEXT: .cfi_offset ra, -44341; RV32IZFH-NEXT: call __fixunshfdi4342; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4343; RV32IZFH-NEXT: .cfi_restore ra4344; RV32IZFH-NEXT: addi sp, sp, 164345; RV32IZFH-NEXT: .cfi_def_cfa_offset 04346; RV32IZFH-NEXT: ret4347;4348; RV64IZFH-LABEL: test_roundeven_ui64:4349; RV64IZFH: # %bb.0:4350; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rne4351; RV64IZFH-NEXT: ret4352;4353; RV32IZHINX-LABEL: test_roundeven_ui64:4354; RV32IZHINX: # %bb.0:4355; RV32IZHINX-NEXT: li a1, 254356; RV32IZHINX-NEXT: slli a1, a1, 104357; RV32IZHINX-NEXT: fabs.h a2, a04358; RV32IZHINX-NEXT: flt.h a1, a2, a14359; RV32IZHINX-NEXT: beqz a1, .LBB39_24360; RV32IZHINX-NEXT: # %bb.1:4361; RV32IZHINX-NEXT: fcvt.w.h a1, a0, rne4362; RV32IZHINX-NEXT: fcvt.h.w a1, a1, rne4363; RV32IZHINX-NEXT: fsgnj.h a0, a1, a04364; RV32IZHINX-NEXT: .LBB39_2:4365; RV32IZHINX-NEXT: addi sp, sp, -164366; RV32IZHINX-NEXT: .cfi_def_cfa_offset 164367; RV32IZHINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4368; RV32IZHINX-NEXT: .cfi_offset ra, -44369; RV32IZHINX-NEXT: call __fixunshfdi4370; RV32IZHINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4371; RV32IZHINX-NEXT: .cfi_restore ra4372; RV32IZHINX-NEXT: addi sp, sp, 164373; RV32IZHINX-NEXT: .cfi_def_cfa_offset 04374; RV32IZHINX-NEXT: ret4375;4376; RV64IZHINX-LABEL: test_roundeven_ui64:4377; RV64IZHINX: # %bb.0:4378; RV64IZHINX-NEXT: li a1, 254379; RV64IZHINX-NEXT: slli a1, a1, 104380; RV64IZHINX-NEXT: fabs.h a2, a04381; RV64IZHINX-NEXT: flt.h a1, a2, a14382; RV64IZHINX-NEXT: beqz a1, .LBB39_24383; RV64IZHINX-NEXT: # %bb.1:4384; RV64IZHINX-NEXT: fcvt.w.h a1, a0, rne4385; RV64IZHINX-NEXT: fcvt.h.w a1, a1, rne4386; RV64IZHINX-NEXT: fsgnj.h a0, a1, a04387; RV64IZHINX-NEXT: .LBB39_2:4388; RV64IZHINX-NEXT: fcvt.lu.h a0, a0, rtz4389; RV64IZHINX-NEXT: ret4390;4391; RV32IZFHMIN-LABEL: test_roundeven_ui64:4392; RV32IZFHMIN: # %bb.0:4393; RV32IZFHMIN-NEXT: fcvt.s.h fa5, fa04394; RV32IZFHMIN-NEXT: lui a0, 3072004395; RV32IZFHMIN-NEXT: fmv.w.x fa4, a04396; RV32IZFHMIN-NEXT: fabs.s fa3, fa54397; RV32IZFHMIN-NEXT: flt.s a0, fa3, fa44398; RV32IZFHMIN-NEXT: beqz a0, .LBB39_24399; RV32IZFHMIN-NEXT: # %bb.1:4400; RV32IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4401; RV32IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4402; RV32IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54403; RV32IZFHMIN-NEXT: .LBB39_2:4404; RV32IZFHMIN-NEXT: addi sp, sp, -164405; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 164406; RV32IZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4407; RV32IZFHMIN-NEXT: .cfi_offset ra, -44408; RV32IZFHMIN-NEXT: fcvt.h.s fa0, fa54409; RV32IZFHMIN-NEXT: call __fixunshfdi4410; RV32IZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4411; RV32IZFHMIN-NEXT: .cfi_restore ra4412; RV32IZFHMIN-NEXT: addi sp, sp, 164413; RV32IZFHMIN-NEXT: .cfi_def_cfa_offset 04414; RV32IZFHMIN-NEXT: ret4415;4416; RV64IZFHMIN-LABEL: test_roundeven_ui64:4417; RV64IZFHMIN: # %bb.0:4418; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa04419; RV64IZFHMIN-NEXT: lui a0, 3072004420; RV64IZFHMIN-NEXT: fmv.w.x fa4, a04421; RV64IZFHMIN-NEXT: fabs.s fa3, fa54422; RV64IZFHMIN-NEXT: flt.s a0, fa3, fa44423; RV64IZFHMIN-NEXT: beqz a0, .LBB39_24424; RV64IZFHMIN-NEXT: # %bb.1:4425; RV64IZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4426; RV64IZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4427; RV64IZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54428; RV64IZFHMIN-NEXT: .LBB39_2:4429; RV64IZFHMIN-NEXT: fcvt.h.s fa5, fa54430; RV64IZFHMIN-NEXT: fcvt.s.h fa5, fa54431; RV64IZFHMIN-NEXT: fcvt.lu.s a0, fa5, rtz4432; RV64IZFHMIN-NEXT: ret4433;4434; RV32IZHINXMIN-LABEL: test_roundeven_ui64:4435; RV32IZHINXMIN: # %bb.0:4436; RV32IZHINXMIN-NEXT: fcvt.s.h a0, a04437; RV32IZHINXMIN-NEXT: lui a1, 3072004438; RV32IZHINXMIN-NEXT: fabs.s a2, a04439; RV32IZHINXMIN-NEXT: flt.s a1, a2, a14440; RV32IZHINXMIN-NEXT: beqz a1, .LBB39_24441; RV32IZHINXMIN-NEXT: # %bb.1:4442; RV32IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4443; RV32IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4444; RV32IZHINXMIN-NEXT: fsgnj.s a0, a1, a04445; RV32IZHINXMIN-NEXT: .LBB39_2:4446; RV32IZHINXMIN-NEXT: addi sp, sp, -164447; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 164448; RV32IZHINXMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4449; RV32IZHINXMIN-NEXT: .cfi_offset ra, -44450; RV32IZHINXMIN-NEXT: fcvt.h.s a0, a04451; RV32IZHINXMIN-NEXT: call __fixunshfdi4452; RV32IZHINXMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4453; RV32IZHINXMIN-NEXT: .cfi_restore ra4454; RV32IZHINXMIN-NEXT: addi sp, sp, 164455; RV32IZHINXMIN-NEXT: .cfi_def_cfa_offset 04456; RV32IZHINXMIN-NEXT: ret4457;4458; RV64IZHINXMIN-LABEL: test_roundeven_ui64:4459; RV64IZHINXMIN: # %bb.0:4460; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04461; RV64IZHINXMIN-NEXT: lui a1, 3072004462; RV64IZHINXMIN-NEXT: fabs.s a2, a04463; RV64IZHINXMIN-NEXT: flt.s a1, a2, a14464; RV64IZHINXMIN-NEXT: beqz a1, .LBB39_24465; RV64IZHINXMIN-NEXT: # %bb.1:4466; RV64IZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4467; RV64IZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4468; RV64IZHINXMIN-NEXT: fsgnj.s a0, a1, a04469; RV64IZHINXMIN-NEXT: .LBB39_2:4470; RV64IZHINXMIN-NEXT: fcvt.h.s a0, a04471; RV64IZHINXMIN-NEXT: fcvt.s.h a0, a04472; RV64IZHINXMIN-NEXT: fcvt.lu.s a0, a0, rtz4473; RV64IZHINXMIN-NEXT: ret4474 %a = call half @llvm.roundeven.f16(half %x)4475 %b = fptoui half %a to i644476 ret i64 %b4477}4478 4479define half @test_floor_half(half %x) {4480; RV32IFD-LABEL: test_floor_half:4481; RV32IFD: # %bb.0:4482; RV32IFD-NEXT: addi sp, sp, -164483; RV32IFD-NEXT: .cfi_def_cfa_offset 164484; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4485; RV32IFD-NEXT: .cfi_offset ra, -44486; RV32IFD-NEXT: call floor@plt4487; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4488; RV32IFD-NEXT: addi sp, sp, 164489; RV32IFD-NEXT: ret4490;4491; RV64IFD-LABEL: test_floor_half:4492; RV64IFD: # %bb.0:4493; RV64IFD-NEXT: addi sp, sp, -164494; RV64IFD-NEXT: .cfi_def_cfa_offset 164495; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill4496; RV64IFD-NEXT: .cfi_offset ra, -84497; RV64IFD-NEXT: call floor@plt4498; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload4499; RV64IFD-NEXT: addi sp, sp, 164500; RV64IFD-NEXT: ret4501; CHECKIZFH-LABEL: test_floor_half:4502; CHECKIZFH: # %bb.0:4503; CHECKIZFH-NEXT: li a0, 254504; CHECKIZFH-NEXT: slli a0, a0, 104505; CHECKIZFH-NEXT: fmv.h.x fa5, a04506; CHECKIZFH-NEXT: fabs.h fa4, fa04507; CHECKIZFH-NEXT: flt.h a0, fa4, fa54508; CHECKIZFH-NEXT: beqz a0, .LBB40_24509; CHECKIZFH-NEXT: # %bb.1:4510; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rdn4511; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rdn4512; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa04513; CHECKIZFH-NEXT: .LBB40_2:4514; CHECKIZFH-NEXT: ret4515;4516; CHECKIZHINX-LABEL: test_floor_half:4517; CHECKIZHINX: # %bb.0:4518; CHECKIZHINX-NEXT: li a1, 254519; CHECKIZHINX-NEXT: slli a1, a1, 104520; CHECKIZHINX-NEXT: fabs.h a2, a04521; CHECKIZHINX-NEXT: flt.h a1, a2, a14522; CHECKIZHINX-NEXT: beqz a1, .LBB40_24523; CHECKIZHINX-NEXT: # %bb.1:4524; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rdn4525; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rdn4526; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a04527; CHECKIZHINX-NEXT: .LBB40_2:4528; CHECKIZHINX-NEXT: ret4529;4530; CHECKIZFHMIN-LABEL: test_floor_half:4531; CHECKIZFHMIN: # %bb.0:4532; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa04533; CHECKIZFHMIN-NEXT: lui a0, 3072004534; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a04535; CHECKIZFHMIN-NEXT: fabs.s fa3, fa54536; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa44537; CHECKIZFHMIN-NEXT: beqz a0, .LBB40_24538; CHECKIZFHMIN-NEXT: # %bb.1:4539; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rdn4540; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rdn4541; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54542; CHECKIZFHMIN-NEXT: .LBB40_2:4543; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa54544; CHECKIZFHMIN-NEXT: ret4545;4546; CHECKIZHINXMIN-LABEL: test_floor_half:4547; CHECKIZHINXMIN: # %bb.0:4548; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04549; CHECKIZHINXMIN-NEXT: lui a1, 3072004550; CHECKIZHINXMIN-NEXT: fabs.s a2, a04551; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a14552; CHECKIZHINXMIN-NEXT: beqz a1, .LBB40_24553; CHECKIZHINXMIN-NEXT: # %bb.1:4554; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rdn4555; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rdn4556; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a04557; CHECKIZHINXMIN-NEXT: .LBB40_2:4558; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a04559; CHECKIZHINXMIN-NEXT: ret4560 %a = call half @llvm.floor.f16(half %x)4561 ret half %a4562}4563 4564define half @test_ceil_half(half %x) {4565; RV32IFD-LABEL: test_ceil_half:4566; RV32IFD: # %bb.0:4567; RV32IFD-NEXT: addi sp, sp, -164568; RV32IFD-NEXT: .cfi_def_cfa_offset 164569; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4570; RV32IFD-NEXT: .cfi_offset ra, -44571; RV32IFD-NEXT: call ceil@plt4572; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4573; RV32IFD-NEXT: addi sp, sp, 164574; RV32IFD-NEXT: ret4575;4576; RV64IFD-LABEL: test_ceil_half:4577; RV64IFD: # %bb.0:4578; RV64IFD-NEXT: addi sp, sp, -164579; RV64IFD-NEXT: .cfi_def_cfa_offset 164580; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill4581; RV64IFD-NEXT: .cfi_offset ra, -84582; RV64IFD-NEXT: call ceil@plt4583; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload4584; RV64IFD-NEXT: addi sp, sp, 164585; RV64IFD-NEXT: ret4586; CHECKIZFH-LABEL: test_ceil_half:4587; CHECKIZFH: # %bb.0:4588; CHECKIZFH-NEXT: li a0, 254589; CHECKIZFH-NEXT: slli a0, a0, 104590; CHECKIZFH-NEXT: fmv.h.x fa5, a04591; CHECKIZFH-NEXT: fabs.h fa4, fa04592; CHECKIZFH-NEXT: flt.h a0, fa4, fa54593; CHECKIZFH-NEXT: beqz a0, .LBB41_24594; CHECKIZFH-NEXT: # %bb.1:4595; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rup4596; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rup4597; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa04598; CHECKIZFH-NEXT: .LBB41_2:4599; CHECKIZFH-NEXT: ret4600;4601; CHECKIZHINX-LABEL: test_ceil_half:4602; CHECKIZHINX: # %bb.0:4603; CHECKIZHINX-NEXT: li a1, 254604; CHECKIZHINX-NEXT: slli a1, a1, 104605; CHECKIZHINX-NEXT: fabs.h a2, a04606; CHECKIZHINX-NEXT: flt.h a1, a2, a14607; CHECKIZHINX-NEXT: beqz a1, .LBB41_24608; CHECKIZHINX-NEXT: # %bb.1:4609; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rup4610; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rup4611; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a04612; CHECKIZHINX-NEXT: .LBB41_2:4613; CHECKIZHINX-NEXT: ret4614;4615; CHECKIZFHMIN-LABEL: test_ceil_half:4616; CHECKIZFHMIN: # %bb.0:4617; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa04618; CHECKIZFHMIN-NEXT: lui a0, 3072004619; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a04620; CHECKIZFHMIN-NEXT: fabs.s fa3, fa54621; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa44622; CHECKIZFHMIN-NEXT: beqz a0, .LBB41_24623; CHECKIZFHMIN-NEXT: # %bb.1:4624; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rup4625; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rup4626; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54627; CHECKIZFHMIN-NEXT: .LBB41_2:4628; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa54629; CHECKIZFHMIN-NEXT: ret4630;4631; CHECKIZHINXMIN-LABEL: test_ceil_half:4632; CHECKIZHINXMIN: # %bb.0:4633; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04634; CHECKIZHINXMIN-NEXT: lui a1, 3072004635; CHECKIZHINXMIN-NEXT: fabs.s a2, a04636; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a14637; CHECKIZHINXMIN-NEXT: beqz a1, .LBB41_24638; CHECKIZHINXMIN-NEXT: # %bb.1:4639; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rup4640; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rup4641; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a04642; CHECKIZHINXMIN-NEXT: .LBB41_2:4643; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a04644; CHECKIZHINXMIN-NEXT: ret4645 %a = call half @llvm.ceil.f16(half %x)4646 ret half %a4647}4648 4649define half @test_trunc_half(half %x) {4650; RV32IFD-LABEL: test_trunc_half:4651; RV32IFD: # %bb.0:4652; RV32IFD-NEXT: addi sp, sp, -164653; RV32IFD-NEXT: .cfi_def_cfa_offset 164654; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4655; RV32IFD-NEXT: .cfi_offset ra, -44656; RV32IFD-NEXT: call trunc@plt4657; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4658; RV32IFD-NEXT: addi sp, sp, 164659; RV32IFD-NEXT: ret4660;4661; RV64IFD-LABEL: test_trunc_half:4662; RV64IFD: # %bb.0:4663; RV64IFD-NEXT: addi sp, sp, -164664; RV64IFD-NEXT: .cfi_def_cfa_offset 164665; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill4666; RV64IFD-NEXT: .cfi_offset ra, -84667; RV64IFD-NEXT: call trunc@plt4668; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload4669; RV64IFD-NEXT: addi sp, sp, 164670; RV64IFD-NEXT: ret4671; CHECKIZFH-LABEL: test_trunc_half:4672; CHECKIZFH: # %bb.0:4673; CHECKIZFH-NEXT: li a0, 254674; CHECKIZFH-NEXT: slli a0, a0, 104675; CHECKIZFH-NEXT: fmv.h.x fa5, a04676; CHECKIZFH-NEXT: fabs.h fa4, fa04677; CHECKIZFH-NEXT: flt.h a0, fa4, fa54678; CHECKIZFH-NEXT: beqz a0, .LBB42_24679; CHECKIZFH-NEXT: # %bb.1:4680; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rtz4681; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rtz4682; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa04683; CHECKIZFH-NEXT: .LBB42_2:4684; CHECKIZFH-NEXT: ret4685;4686; CHECKIZHINX-LABEL: test_trunc_half:4687; CHECKIZHINX: # %bb.0:4688; CHECKIZHINX-NEXT: li a1, 254689; CHECKIZHINX-NEXT: slli a1, a1, 104690; CHECKIZHINX-NEXT: fabs.h a2, a04691; CHECKIZHINX-NEXT: flt.h a1, a2, a14692; CHECKIZHINX-NEXT: beqz a1, .LBB42_24693; CHECKIZHINX-NEXT: # %bb.1:4694; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rtz4695; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rtz4696; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a04697; CHECKIZHINX-NEXT: .LBB42_2:4698; CHECKIZHINX-NEXT: ret4699;4700; CHECKIZFHMIN-LABEL: test_trunc_half:4701; CHECKIZFHMIN: # %bb.0:4702; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa04703; CHECKIZFHMIN-NEXT: lui a0, 3072004704; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a04705; CHECKIZFHMIN-NEXT: fabs.s fa3, fa54706; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa44707; CHECKIZFHMIN-NEXT: beqz a0, .LBB42_24708; CHECKIZFHMIN-NEXT: # %bb.1:4709; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rtz4710; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rtz4711; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54712; CHECKIZFHMIN-NEXT: .LBB42_2:4713; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa54714; CHECKIZFHMIN-NEXT: ret4715;4716; CHECKIZHINXMIN-LABEL: test_trunc_half:4717; CHECKIZHINXMIN: # %bb.0:4718; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04719; CHECKIZHINXMIN-NEXT: lui a1, 3072004720; CHECKIZHINXMIN-NEXT: fabs.s a2, a04721; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a14722; CHECKIZHINXMIN-NEXT: beqz a1, .LBB42_24723; CHECKIZHINXMIN-NEXT: # %bb.1:4724; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rtz4725; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rtz4726; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a04727; CHECKIZHINXMIN-NEXT: .LBB42_2:4728; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a04729; CHECKIZHINXMIN-NEXT: ret4730 %a = call half @llvm.trunc.f16(half %x)4731 ret half %a4732}4733 4734define half @test_round_half(half %x) {4735; RV32IFD-LABEL: test_round_half:4736; RV32IFD: # %bb.0:4737; RV32IFD-NEXT: addi sp, sp, -164738; RV32IFD-NEXT: .cfi_def_cfa_offset 164739; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4740; RV32IFD-NEXT: .cfi_offset ra, -44741; RV32IFD-NEXT: call round@plt4742; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4743; RV32IFD-NEXT: addi sp, sp, 164744; RV32IFD-NEXT: ret4745;4746; RV64IFD-LABEL: test_round_half:4747; RV64IFD: # %bb.0:4748; RV64IFD-NEXT: addi sp, sp, -164749; RV64IFD-NEXT: .cfi_def_cfa_offset 164750; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill4751; RV64IFD-NEXT: .cfi_offset ra, -84752; RV64IFD-NEXT: call round@plt4753; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload4754; RV64IFD-NEXT: addi sp, sp, 164755; RV64IFD-NEXT: ret4756; CHECKIZFH-LABEL: test_round_half:4757; CHECKIZFH: # %bb.0:4758; CHECKIZFH-NEXT: li a0, 254759; CHECKIZFH-NEXT: slli a0, a0, 104760; CHECKIZFH-NEXT: fmv.h.x fa5, a04761; CHECKIZFH-NEXT: fabs.h fa4, fa04762; CHECKIZFH-NEXT: flt.h a0, fa4, fa54763; CHECKIZFH-NEXT: beqz a0, .LBB43_24764; CHECKIZFH-NEXT: # %bb.1:4765; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rmm4766; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rmm4767; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa04768; CHECKIZFH-NEXT: .LBB43_2:4769; CHECKIZFH-NEXT: ret4770;4771; CHECKIZHINX-LABEL: test_round_half:4772; CHECKIZHINX: # %bb.0:4773; CHECKIZHINX-NEXT: li a1, 254774; CHECKIZHINX-NEXT: slli a1, a1, 104775; CHECKIZHINX-NEXT: fabs.h a2, a04776; CHECKIZHINX-NEXT: flt.h a1, a2, a14777; CHECKIZHINX-NEXT: beqz a1, .LBB43_24778; CHECKIZHINX-NEXT: # %bb.1:4779; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rmm4780; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rmm4781; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a04782; CHECKIZHINX-NEXT: .LBB43_2:4783; CHECKIZHINX-NEXT: ret4784;4785; CHECKIZFHMIN-LABEL: test_round_half:4786; CHECKIZFHMIN: # %bb.0:4787; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa04788; CHECKIZFHMIN-NEXT: lui a0, 3072004789; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a04790; CHECKIZFHMIN-NEXT: fabs.s fa3, fa54791; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa44792; CHECKIZFHMIN-NEXT: beqz a0, .LBB43_24793; CHECKIZFHMIN-NEXT: # %bb.1:4794; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rmm4795; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rmm4796; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54797; CHECKIZFHMIN-NEXT: .LBB43_2:4798; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa54799; CHECKIZFHMIN-NEXT: ret4800;4801; CHECKIZHINXMIN-LABEL: test_round_half:4802; CHECKIZHINXMIN: # %bb.0:4803; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04804; CHECKIZHINXMIN-NEXT: lui a1, 3072004805; CHECKIZHINXMIN-NEXT: fabs.s a2, a04806; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a14807; CHECKIZHINXMIN-NEXT: beqz a1, .LBB43_24808; CHECKIZHINXMIN-NEXT: # %bb.1:4809; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rmm4810; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rmm4811; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a04812; CHECKIZHINXMIN-NEXT: .LBB43_2:4813; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a04814; CHECKIZHINXMIN-NEXT: ret4815 %a = call half @llvm.round.f16(half %x)4816 ret half %a4817}4818 4819define half @test_roundeven_half(half %x) {4820; RV32IFD-LABEL: test_roundeven_half:4821; RV32IFD: # %bb.0:4822; RV32IFD-NEXT: addi sp, sp, -164823; RV32IFD-NEXT: .cfi_def_cfa_offset 164824; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill4825; RV32IFD-NEXT: .cfi_offset ra, -44826; RV32IFD-NEXT: call roundeven@plt4827; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload4828; RV32IFD-NEXT: addi sp, sp, 164829; RV32IFD-NEXT: ret4830;4831; RV64IFD-LABEL: test_roundeven_half:4832; RV64IFD: # %bb.0:4833; RV64IFD-NEXT: addi sp, sp, -164834; RV64IFD-NEXT: .cfi_def_cfa_offset 164835; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill4836; RV64IFD-NEXT: .cfi_offset ra, -84837; RV64IFD-NEXT: call roundeven@plt4838; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload4839; RV64IFD-NEXT: addi sp, sp, 164840; RV64IFD-NEXT: ret4841; CHECKIZFH-LABEL: test_roundeven_half:4842; CHECKIZFH: # %bb.0:4843; CHECKIZFH-NEXT: li a0, 254844; CHECKIZFH-NEXT: slli a0, a0, 104845; CHECKIZFH-NEXT: fmv.h.x fa5, a04846; CHECKIZFH-NEXT: fabs.h fa4, fa04847; CHECKIZFH-NEXT: flt.h a0, fa4, fa54848; CHECKIZFH-NEXT: beqz a0, .LBB44_24849; CHECKIZFH-NEXT: # %bb.1:4850; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rne4851; CHECKIZFH-NEXT: fcvt.h.w fa5, a0, rne4852; CHECKIZFH-NEXT: fsgnj.h fa0, fa5, fa04853; CHECKIZFH-NEXT: .LBB44_2:4854; CHECKIZFH-NEXT: ret4855;4856; CHECKIZHINX-LABEL: test_roundeven_half:4857; CHECKIZHINX: # %bb.0:4858; CHECKIZHINX-NEXT: li a1, 254859; CHECKIZHINX-NEXT: slli a1, a1, 104860; CHECKIZHINX-NEXT: fabs.h a2, a04861; CHECKIZHINX-NEXT: flt.h a1, a2, a14862; CHECKIZHINX-NEXT: beqz a1, .LBB44_24863; CHECKIZHINX-NEXT: # %bb.1:4864; CHECKIZHINX-NEXT: fcvt.w.h a1, a0, rne4865; CHECKIZHINX-NEXT: fcvt.h.w a1, a1, rne4866; CHECKIZHINX-NEXT: fsgnj.h a0, a1, a04867; CHECKIZHINX-NEXT: .LBB44_2:4868; CHECKIZHINX-NEXT: ret4869;4870; CHECKIZFHMIN-LABEL: test_roundeven_half:4871; CHECKIZFHMIN: # %bb.0:4872; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa04873; CHECKIZFHMIN-NEXT: lui a0, 3072004874; CHECKIZFHMIN-NEXT: fmv.w.x fa4, a04875; CHECKIZFHMIN-NEXT: fabs.s fa3, fa54876; CHECKIZFHMIN-NEXT: flt.s a0, fa3, fa44877; CHECKIZFHMIN-NEXT: beqz a0, .LBB44_24878; CHECKIZFHMIN-NEXT: # %bb.1:4879; CHECKIZFHMIN-NEXT: fcvt.w.s a0, fa5, rne4880; CHECKIZFHMIN-NEXT: fcvt.s.w fa4, a0, rne4881; CHECKIZFHMIN-NEXT: fsgnj.s fa5, fa4, fa54882; CHECKIZFHMIN-NEXT: .LBB44_2:4883; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa54884; CHECKIZFHMIN-NEXT: ret4885;4886; CHECKIZHINXMIN-LABEL: test_roundeven_half:4887; CHECKIZHINXMIN: # %bb.0:4888; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a04889; CHECKIZHINXMIN-NEXT: lui a1, 3072004890; CHECKIZHINXMIN-NEXT: fabs.s a2, a04891; CHECKIZHINXMIN-NEXT: flt.s a1, a2, a14892; CHECKIZHINXMIN-NEXT: beqz a1, .LBB44_24893; CHECKIZHINXMIN-NEXT: # %bb.1:4894; CHECKIZHINXMIN-NEXT: fcvt.w.s a1, a0, rne4895; CHECKIZHINXMIN-NEXT: fcvt.s.w a1, a1, rne4896; CHECKIZHINXMIN-NEXT: fsgnj.s a0, a1, a04897; CHECKIZHINXMIN-NEXT: .LBB44_2:4898; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a04899; CHECKIZHINXMIN-NEXT: ret4900 %a = call half @llvm.roundeven.f16(half %x)4901 ret half %a4902}4903 4904