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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs \3; RUN: -target-abi ilp32f < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs \5; RUN: -target-abi lp64f < %s | FileCheck %s6; RUN: llc -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs \7; RUN: -target-abi ilp32 < %s | FileCheck -check-prefix=CHECKIZHINX %s8; RUN: llc -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs \9; RUN: -target-abi lp64 < %s | FileCheck -check-prefix=CHECKIZHINX %s10; RUN: llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs < %s \11; RUN: -target-abi=ilp32f | FileCheck -check-prefixes=CHECKIZFHMIN %s12; RUN: llc -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs < %s \13; RUN: -target-abi=lp64f | FileCheck -check-prefixes=CHECKIZFHMIN %s14; RUN: llc -mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs < %s \15; RUN: -target-abi=ilp32 | FileCheck -check-prefixes=CHECKIZHINXMIN %s16; RUN: llc -mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs < %s \17; RUN: -target-abi=lp64 | FileCheck -check-prefixes=CHECKIZHINXMIN %s18 19define half @select_icmp_eq(i32 signext %a, i32 signext %b, half %c, half %d) {20; CHECK-LABEL: select_icmp_eq:21; CHECK: # %bb.0:22; CHECK-NEXT: beq a0, a1, .LBB0_223; CHECK-NEXT: # %bb.1:24; CHECK-NEXT: fmv.h fa0, fa125; CHECK-NEXT: .LBB0_2:26; CHECK-NEXT: ret27;28; CHECKIZHINX-LABEL: select_icmp_eq:29; CHECKIZHINX: # %bb.0:30; CHECKIZHINX-NEXT: beq a0, a1, .LBB0_231; CHECKIZHINX-NEXT: # %bb.1:32; CHECKIZHINX-NEXT: mv a2, a333; CHECKIZHINX-NEXT: .LBB0_2:34; CHECKIZHINX-NEXT: mv a0, a235; CHECKIZHINX-NEXT: ret36;37; CHECKIZFHMIN-LABEL: select_icmp_eq:38; CHECKIZFHMIN: # %bb.0:39; CHECKIZFHMIN-NEXT: beq a0, a1, .LBB0_240; CHECKIZFHMIN-NEXT: # %bb.1:41; CHECKIZFHMIN-NEXT: fmv.s fa0, fa142; CHECKIZFHMIN-NEXT: .LBB0_2:43; CHECKIZFHMIN-NEXT: ret44;45; CHECKIZHINXMIN-LABEL: select_icmp_eq:46; CHECKIZHINXMIN: # %bb.0:47; CHECKIZHINXMIN-NEXT: beq a0, a1, .LBB0_248; CHECKIZHINXMIN-NEXT: # %bb.1:49; CHECKIZHINXMIN-NEXT: mv a2, a350; CHECKIZHINXMIN-NEXT: .LBB0_2:51; CHECKIZHINXMIN-NEXT: mv a0, a252; CHECKIZHINXMIN-NEXT: ret53 %1 = icmp eq i32 %a, %b54 %2 = select i1 %1, half %c, half %d55 ret half %256}57 58define half @select_icmp_ne(i32 signext %a, i32 signext %b, half %c, half %d) {59; CHECK-LABEL: select_icmp_ne:60; CHECK: # %bb.0:61; CHECK-NEXT: bne a0, a1, .LBB1_262; CHECK-NEXT: # %bb.1:63; CHECK-NEXT: fmv.h fa0, fa164; CHECK-NEXT: .LBB1_2:65; CHECK-NEXT: ret66;67; CHECKIZHINX-LABEL: select_icmp_ne:68; CHECKIZHINX: # %bb.0:69; CHECKIZHINX-NEXT: bne a0, a1, .LBB1_270; CHECKIZHINX-NEXT: # %bb.1:71; CHECKIZHINX-NEXT: mv a2, a372; CHECKIZHINX-NEXT: .LBB1_2:73; CHECKIZHINX-NEXT: mv a0, a274; CHECKIZHINX-NEXT: ret75;76; CHECKIZFHMIN-LABEL: select_icmp_ne:77; CHECKIZFHMIN: # %bb.0:78; CHECKIZFHMIN-NEXT: bne a0, a1, .LBB1_279; CHECKIZFHMIN-NEXT: # %bb.1:80; CHECKIZFHMIN-NEXT: fmv.s fa0, fa181; CHECKIZFHMIN-NEXT: .LBB1_2:82; CHECKIZFHMIN-NEXT: ret83;84; CHECKIZHINXMIN-LABEL: select_icmp_ne:85; CHECKIZHINXMIN: # %bb.0:86; CHECKIZHINXMIN-NEXT: bne a0, a1, .LBB1_287; CHECKIZHINXMIN-NEXT: # %bb.1:88; CHECKIZHINXMIN-NEXT: mv a2, a389; CHECKIZHINXMIN-NEXT: .LBB1_2:90; CHECKIZHINXMIN-NEXT: mv a0, a291; CHECKIZHINXMIN-NEXT: ret92 %1 = icmp ne i32 %a, %b93 %2 = select i1 %1, half %c, half %d94 ret half %295}96 97define half @select_icmp_ugt(i32 signext %a, i32 signext %b, half %c, half %d) {98; CHECK-LABEL: select_icmp_ugt:99; CHECK: # %bb.0:100; CHECK-NEXT: bltu a1, a0, .LBB2_2101; CHECK-NEXT: # %bb.1:102; CHECK-NEXT: fmv.h fa0, fa1103; CHECK-NEXT: .LBB2_2:104; CHECK-NEXT: ret105;106; CHECKIZHINX-LABEL: select_icmp_ugt:107; CHECKIZHINX: # %bb.0:108; CHECKIZHINX-NEXT: bltu a1, a0, .LBB2_2109; CHECKIZHINX-NEXT: # %bb.1:110; CHECKIZHINX-NEXT: mv a2, a3111; CHECKIZHINX-NEXT: .LBB2_2:112; CHECKIZHINX-NEXT: mv a0, a2113; CHECKIZHINX-NEXT: ret114;115; CHECKIZFHMIN-LABEL: select_icmp_ugt:116; CHECKIZFHMIN: # %bb.0:117; CHECKIZFHMIN-NEXT: bltu a1, a0, .LBB2_2118; CHECKIZFHMIN-NEXT: # %bb.1:119; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1120; CHECKIZFHMIN-NEXT: .LBB2_2:121; CHECKIZFHMIN-NEXT: ret122;123; CHECKIZHINXMIN-LABEL: select_icmp_ugt:124; CHECKIZHINXMIN: # %bb.0:125; CHECKIZHINXMIN-NEXT: bltu a1, a0, .LBB2_2126; CHECKIZHINXMIN-NEXT: # %bb.1:127; CHECKIZHINXMIN-NEXT: mv a2, a3128; CHECKIZHINXMIN-NEXT: .LBB2_2:129; CHECKIZHINXMIN-NEXT: mv a0, a2130; CHECKIZHINXMIN-NEXT: ret131 %1 = icmp ugt i32 %a, %b132 %2 = select i1 %1, half %c, half %d133 ret half %2134}135 136define half @select_icmp_uge(i32 signext %a, i32 signext %b, half %c, half %d) {137; CHECK-LABEL: select_icmp_uge:138; CHECK: # %bb.0:139; CHECK-NEXT: bgeu a0, a1, .LBB3_2140; CHECK-NEXT: # %bb.1:141; CHECK-NEXT: fmv.h fa0, fa1142; CHECK-NEXT: .LBB3_2:143; CHECK-NEXT: ret144;145; CHECKIZHINX-LABEL: select_icmp_uge:146; CHECKIZHINX: # %bb.0:147; CHECKIZHINX-NEXT: bgeu a0, a1, .LBB3_2148; CHECKIZHINX-NEXT: # %bb.1:149; CHECKIZHINX-NEXT: mv a2, a3150; CHECKIZHINX-NEXT: .LBB3_2:151; CHECKIZHINX-NEXT: mv a0, a2152; CHECKIZHINX-NEXT: ret153;154; CHECKIZFHMIN-LABEL: select_icmp_uge:155; CHECKIZFHMIN: # %bb.0:156; CHECKIZFHMIN-NEXT: bgeu a0, a1, .LBB3_2157; CHECKIZFHMIN-NEXT: # %bb.1:158; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1159; CHECKIZFHMIN-NEXT: .LBB3_2:160; CHECKIZFHMIN-NEXT: ret161;162; CHECKIZHINXMIN-LABEL: select_icmp_uge:163; CHECKIZHINXMIN: # %bb.0:164; CHECKIZHINXMIN-NEXT: bgeu a0, a1, .LBB3_2165; CHECKIZHINXMIN-NEXT: # %bb.1:166; CHECKIZHINXMIN-NEXT: mv a2, a3167; CHECKIZHINXMIN-NEXT: .LBB3_2:168; CHECKIZHINXMIN-NEXT: mv a0, a2169; CHECKIZHINXMIN-NEXT: ret170 %1 = icmp uge i32 %a, %b171 %2 = select i1 %1, half %c, half %d172 ret half %2173}174 175define half @select_icmp_ult(i32 signext %a, i32 signext %b, half %c, half %d) {176; CHECK-LABEL: select_icmp_ult:177; CHECK: # %bb.0:178; CHECK-NEXT: bltu a0, a1, .LBB4_2179; CHECK-NEXT: # %bb.1:180; CHECK-NEXT: fmv.h fa0, fa1181; CHECK-NEXT: .LBB4_2:182; CHECK-NEXT: ret183;184; CHECKIZHINX-LABEL: select_icmp_ult:185; CHECKIZHINX: # %bb.0:186; CHECKIZHINX-NEXT: bltu a0, a1, .LBB4_2187; CHECKIZHINX-NEXT: # %bb.1:188; CHECKIZHINX-NEXT: mv a2, a3189; CHECKIZHINX-NEXT: .LBB4_2:190; CHECKIZHINX-NEXT: mv a0, a2191; CHECKIZHINX-NEXT: ret192;193; CHECKIZFHMIN-LABEL: select_icmp_ult:194; CHECKIZFHMIN: # %bb.0:195; CHECKIZFHMIN-NEXT: bltu a0, a1, .LBB4_2196; CHECKIZFHMIN-NEXT: # %bb.1:197; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1198; CHECKIZFHMIN-NEXT: .LBB4_2:199; CHECKIZFHMIN-NEXT: ret200;201; CHECKIZHINXMIN-LABEL: select_icmp_ult:202; CHECKIZHINXMIN: # %bb.0:203; CHECKIZHINXMIN-NEXT: bltu a0, a1, .LBB4_2204; CHECKIZHINXMIN-NEXT: # %bb.1:205; CHECKIZHINXMIN-NEXT: mv a2, a3206; CHECKIZHINXMIN-NEXT: .LBB4_2:207; CHECKIZHINXMIN-NEXT: mv a0, a2208; CHECKIZHINXMIN-NEXT: ret209 %1 = icmp ult i32 %a, %b210 %2 = select i1 %1, half %c, half %d211 ret half %2212}213 214define half @select_icmp_ule(i32 signext %a, i32 signext %b, half %c, half %d) {215; CHECK-LABEL: select_icmp_ule:216; CHECK: # %bb.0:217; CHECK-NEXT: bgeu a1, a0, .LBB5_2218; CHECK-NEXT: # %bb.1:219; CHECK-NEXT: fmv.h fa0, fa1220; CHECK-NEXT: .LBB5_2:221; CHECK-NEXT: ret222;223; CHECKIZHINX-LABEL: select_icmp_ule:224; CHECKIZHINX: # %bb.0:225; CHECKIZHINX-NEXT: bgeu a1, a0, .LBB5_2226; CHECKIZHINX-NEXT: # %bb.1:227; CHECKIZHINX-NEXT: mv a2, a3228; CHECKIZHINX-NEXT: .LBB5_2:229; CHECKIZHINX-NEXT: mv a0, a2230; CHECKIZHINX-NEXT: ret231;232; CHECKIZFHMIN-LABEL: select_icmp_ule:233; CHECKIZFHMIN: # %bb.0:234; CHECKIZFHMIN-NEXT: bgeu a1, a0, .LBB5_2235; CHECKIZFHMIN-NEXT: # %bb.1:236; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1237; CHECKIZFHMIN-NEXT: .LBB5_2:238; CHECKIZFHMIN-NEXT: ret239;240; CHECKIZHINXMIN-LABEL: select_icmp_ule:241; CHECKIZHINXMIN: # %bb.0:242; CHECKIZHINXMIN-NEXT: bgeu a1, a0, .LBB5_2243; CHECKIZHINXMIN-NEXT: # %bb.1:244; CHECKIZHINXMIN-NEXT: mv a2, a3245; CHECKIZHINXMIN-NEXT: .LBB5_2:246; CHECKIZHINXMIN-NEXT: mv a0, a2247; CHECKIZHINXMIN-NEXT: ret248 %1 = icmp ule i32 %a, %b249 %2 = select i1 %1, half %c, half %d250 ret half %2251}252 253define half @select_icmp_sgt(i32 signext %a, i32 signext %b, half %c, half %d) {254; CHECK-LABEL: select_icmp_sgt:255; CHECK: # %bb.0:256; CHECK-NEXT: blt a1, a0, .LBB6_2257; CHECK-NEXT: # %bb.1:258; CHECK-NEXT: fmv.h fa0, fa1259; CHECK-NEXT: .LBB6_2:260; CHECK-NEXT: ret261;262; CHECKIZHINX-LABEL: select_icmp_sgt:263; CHECKIZHINX: # %bb.0:264; CHECKIZHINX-NEXT: blt a1, a0, .LBB6_2265; CHECKIZHINX-NEXT: # %bb.1:266; CHECKIZHINX-NEXT: mv a2, a3267; CHECKIZHINX-NEXT: .LBB6_2:268; CHECKIZHINX-NEXT: mv a0, a2269; CHECKIZHINX-NEXT: ret270;271; CHECKIZFHMIN-LABEL: select_icmp_sgt:272; CHECKIZFHMIN: # %bb.0:273; CHECKIZFHMIN-NEXT: blt a1, a0, .LBB6_2274; CHECKIZFHMIN-NEXT: # %bb.1:275; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1276; CHECKIZFHMIN-NEXT: .LBB6_2:277; CHECKIZFHMIN-NEXT: ret278;279; CHECKIZHINXMIN-LABEL: select_icmp_sgt:280; CHECKIZHINXMIN: # %bb.0:281; CHECKIZHINXMIN-NEXT: blt a1, a0, .LBB6_2282; CHECKIZHINXMIN-NEXT: # %bb.1:283; CHECKIZHINXMIN-NEXT: mv a2, a3284; CHECKIZHINXMIN-NEXT: .LBB6_2:285; CHECKIZHINXMIN-NEXT: mv a0, a2286; CHECKIZHINXMIN-NEXT: ret287 %1 = icmp sgt i32 %a, %b288 %2 = select i1 %1, half %c, half %d289 ret half %2290}291 292define half @select_icmp_sge(i32 signext %a, i32 signext %b, half %c, half %d) {293; CHECK-LABEL: select_icmp_sge:294; CHECK: # %bb.0:295; CHECK-NEXT: bge a0, a1, .LBB7_2296; CHECK-NEXT: # %bb.1:297; CHECK-NEXT: fmv.h fa0, fa1298; CHECK-NEXT: .LBB7_2:299; CHECK-NEXT: ret300;301; CHECKIZHINX-LABEL: select_icmp_sge:302; CHECKIZHINX: # %bb.0:303; CHECKIZHINX-NEXT: bge a0, a1, .LBB7_2304; CHECKIZHINX-NEXT: # %bb.1:305; CHECKIZHINX-NEXT: mv a2, a3306; CHECKIZHINX-NEXT: .LBB7_2:307; CHECKIZHINX-NEXT: mv a0, a2308; CHECKIZHINX-NEXT: ret309;310; CHECKIZFHMIN-LABEL: select_icmp_sge:311; CHECKIZFHMIN: # %bb.0:312; CHECKIZFHMIN-NEXT: bge a0, a1, .LBB7_2313; CHECKIZFHMIN-NEXT: # %bb.1:314; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1315; CHECKIZFHMIN-NEXT: .LBB7_2:316; CHECKIZFHMIN-NEXT: ret317;318; CHECKIZHINXMIN-LABEL: select_icmp_sge:319; CHECKIZHINXMIN: # %bb.0:320; CHECKIZHINXMIN-NEXT: bge a0, a1, .LBB7_2321; CHECKIZHINXMIN-NEXT: # %bb.1:322; CHECKIZHINXMIN-NEXT: mv a2, a3323; CHECKIZHINXMIN-NEXT: .LBB7_2:324; CHECKIZHINXMIN-NEXT: mv a0, a2325; CHECKIZHINXMIN-NEXT: ret326 %1 = icmp sge i32 %a, %b327 %2 = select i1 %1, half %c, half %d328 ret half %2329}330 331define half @select_icmp_slt(i32 signext %a, i32 signext %b, half %c, half %d) {332; CHECK-LABEL: select_icmp_slt:333; CHECK: # %bb.0:334; CHECK-NEXT: blt a0, a1, .LBB8_2335; CHECK-NEXT: # %bb.1:336; CHECK-NEXT: fmv.h fa0, fa1337; CHECK-NEXT: .LBB8_2:338; CHECK-NEXT: ret339;340; CHECKIZHINX-LABEL: select_icmp_slt:341; CHECKIZHINX: # %bb.0:342; CHECKIZHINX-NEXT: blt a0, a1, .LBB8_2343; CHECKIZHINX-NEXT: # %bb.1:344; CHECKIZHINX-NEXT: mv a2, a3345; CHECKIZHINX-NEXT: .LBB8_2:346; CHECKIZHINX-NEXT: mv a0, a2347; CHECKIZHINX-NEXT: ret348;349; CHECKIZFHMIN-LABEL: select_icmp_slt:350; CHECKIZFHMIN: # %bb.0:351; CHECKIZFHMIN-NEXT: blt a0, a1, .LBB8_2352; CHECKIZFHMIN-NEXT: # %bb.1:353; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1354; CHECKIZFHMIN-NEXT: .LBB8_2:355; CHECKIZFHMIN-NEXT: ret356;357; CHECKIZHINXMIN-LABEL: select_icmp_slt:358; CHECKIZHINXMIN: # %bb.0:359; CHECKIZHINXMIN-NEXT: blt a0, a1, .LBB8_2360; CHECKIZHINXMIN-NEXT: # %bb.1:361; CHECKIZHINXMIN-NEXT: mv a2, a3362; CHECKIZHINXMIN-NEXT: .LBB8_2:363; CHECKIZHINXMIN-NEXT: mv a0, a2364; CHECKIZHINXMIN-NEXT: ret365 %1 = icmp slt i32 %a, %b366 %2 = select i1 %1, half %c, half %d367 ret half %2368}369 370define half @select_icmp_sle(i32 signext %a, i32 signext %b, half %c, half %d) {371; CHECK-LABEL: select_icmp_sle:372; CHECK: # %bb.0:373; CHECK-NEXT: bge a1, a0, .LBB9_2374; CHECK-NEXT: # %bb.1:375; CHECK-NEXT: fmv.h fa0, fa1376; CHECK-NEXT: .LBB9_2:377; CHECK-NEXT: ret378;379; CHECKIZHINX-LABEL: select_icmp_sle:380; CHECKIZHINX: # %bb.0:381; CHECKIZHINX-NEXT: bge a1, a0, .LBB9_2382; CHECKIZHINX-NEXT: # %bb.1:383; CHECKIZHINX-NEXT: mv a2, a3384; CHECKIZHINX-NEXT: .LBB9_2:385; CHECKIZHINX-NEXT: mv a0, a2386; CHECKIZHINX-NEXT: ret387;388; CHECKIZFHMIN-LABEL: select_icmp_sle:389; CHECKIZFHMIN: # %bb.0:390; CHECKIZFHMIN-NEXT: bge a1, a0, .LBB9_2391; CHECKIZFHMIN-NEXT: # %bb.1:392; CHECKIZFHMIN-NEXT: fmv.s fa0, fa1393; CHECKIZFHMIN-NEXT: .LBB9_2:394; CHECKIZFHMIN-NEXT: ret395;396; CHECKIZHINXMIN-LABEL: select_icmp_sle:397; CHECKIZHINXMIN: # %bb.0:398; CHECKIZHINXMIN-NEXT: bge a1, a0, .LBB9_2399; CHECKIZHINXMIN-NEXT: # %bb.1:400; CHECKIZHINXMIN-NEXT: mv a2, a3401; CHECKIZHINXMIN-NEXT: .LBB9_2:402; CHECKIZHINXMIN-NEXT: mv a0, a2403; CHECKIZHINXMIN-NEXT: ret404 %1 = icmp sle i32 %a, %b405 %2 = select i1 %1, half %c, half %d406 ret half %2407}408 409define half @select_icmp_slt_one(i32 signext %a) {410; CHECK-LABEL: select_icmp_slt_one:411; CHECK: # %bb.0:412; CHECK-NEXT: slti a0, a0, 1413; CHECK-NEXT: fcvt.h.w fa0, a0414; CHECK-NEXT: ret415;416; CHECKIZHINX-LABEL: select_icmp_slt_one:417; CHECKIZHINX: # %bb.0:418; CHECKIZHINX-NEXT: slti a0, a0, 1419; CHECKIZHINX-NEXT: fcvt.h.w a0, a0420; CHECKIZHINX-NEXT: ret421;422; CHECKIZFHMIN-LABEL: select_icmp_slt_one:423; CHECKIZFHMIN: # %bb.0:424; CHECKIZFHMIN-NEXT: slti a0, a0, 1425; CHECKIZFHMIN-NEXT: fcvt.s.w fa5, a0426; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5427; CHECKIZFHMIN-NEXT: ret428;429; CHECKIZHINXMIN-LABEL: select_icmp_slt_one:430; CHECKIZHINXMIN: # %bb.0:431; CHECKIZHINXMIN-NEXT: slti a0, a0, 1432; CHECKIZHINXMIN-NEXT: fcvt.s.w a0, a0433; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0434; CHECKIZHINXMIN-NEXT: ret435 %1 = icmp slt i32 %a, 1436 %2 = select i1 %1, half 1.000000e+00, half 0.000000e+00437 ret half %2438}439 440define half @select_icmp_sgt_zero(i32 signext %a) {441; CHECK-LABEL: select_icmp_sgt_zero:442; CHECK: # %bb.0:443; CHECK-NEXT: slti a0, a0, 1444; CHECK-NEXT: fcvt.h.w fa0, a0445; CHECK-NEXT: ret446;447; CHECKIZHINX-LABEL: select_icmp_sgt_zero:448; CHECKIZHINX: # %bb.0:449; CHECKIZHINX-NEXT: slti a0, a0, 1450; CHECKIZHINX-NEXT: fcvt.h.w a0, a0451; CHECKIZHINX-NEXT: ret452;453; CHECKIZFHMIN-LABEL: select_icmp_sgt_zero:454; CHECKIZFHMIN: # %bb.0:455; CHECKIZFHMIN-NEXT: slti a0, a0, 1456; CHECKIZFHMIN-NEXT: fcvt.s.w fa5, a0457; CHECKIZFHMIN-NEXT: fcvt.h.s fa0, fa5458; CHECKIZFHMIN-NEXT: ret459;460; CHECKIZHINXMIN-LABEL: select_icmp_sgt_zero:461; CHECKIZHINXMIN: # %bb.0:462; CHECKIZHINXMIN-NEXT: slti a0, a0, 1463; CHECKIZHINXMIN-NEXT: fcvt.s.w a0, a0464; CHECKIZHINXMIN-NEXT: fcvt.h.s a0, a0465; CHECKIZHINXMIN-NEXT: ret466 %1 = icmp sgt i32 %a, 0467 %2 = select i1 %1, half 0.000000e+00, half 1.000000e+00468 ret half %2469}470