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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-SMALL4; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs -mattr=+experimental-xqcili < %s \5; RUN: | FileCheck %s -check-prefixes=CHECK,RV32IXQCILI-SMALL6; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs < %s \7; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-MEDIUM8; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \9; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-PIC10; RUN: llc -mtriple=riscv64 -code-model=small -verify-machineinstrs < %s \11; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-SMALL12; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs < %s \13; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-MEDIUM14; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs < %s \15; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-PIC16; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs -riscv-min-jump-table-entries=7 < %s \17; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-SMALL-7-ENTRIES18; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs -riscv-min-jump-table-entries=7 -mattr=+experimental-xqcili < %s \19; RUN: | FileCheck %s -check-prefixes=CHECK,RV32IXQCILI-SMALL-7-ENTRIES20; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs -riscv-min-jump-table-entries=7 < %s \21; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-MEDIUM-7-ENTRIES22; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs -riscv-min-jump-table-entries=7 < %s \23; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-PIC-7-ENTRIES24; RUN: llc -mtriple=riscv64 -code-model=small -verify-machineinstrs -riscv-min-jump-table-entries=7 < %s \25; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-SMALL-7-ENTRIES26; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs -riscv-min-jump-table-entries=7 < %s \27; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-MEDIUM-7-ENTRIES28; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs -riscv-min-jump-table-entries=7 < %s \29; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-PIC-7-ENTRIES30 31define void @below_threshold(i32 signext %in, ptr %out) nounwind {32; CHECK-LABEL: below_threshold:33; CHECK: # %bb.0: # %entry34; CHECK-NEXT: li a2, 235; CHECK-NEXT: blt a2, a0, .LBB0_436; CHECK-NEXT: # %bb.1: # %entry37; CHECK-NEXT: li a2, 138; CHECK-NEXT: beq a0, a2, .LBB0_739; CHECK-NEXT: # %bb.2: # %entry40; CHECK-NEXT: li a2, 241; CHECK-NEXT: bne a0, a2, .LBB0_1042; CHECK-NEXT: # %bb.3: # %bb243; CHECK-NEXT: li a0, 344; CHECK-NEXT: j .LBB0_945; CHECK-NEXT: .LBB0_4: # %entry46; CHECK-NEXT: li a2, 347; CHECK-NEXT: beq a0, a2, .LBB0_848; CHECK-NEXT: # %bb.5: # %entry49; CHECK-NEXT: li a2, 450; CHECK-NEXT: bne a0, a2, .LBB0_1051; CHECK-NEXT: # %bb.6: # %bb452; CHECK-NEXT: li a0, 153; CHECK-NEXT: j .LBB0_954; CHECK-NEXT: .LBB0_7: # %bb155; CHECK-NEXT: li a0, 456; CHECK-NEXT: j .LBB0_957; CHECK-NEXT: .LBB0_8: # %bb358; CHECK-NEXT: li a0, 259; CHECK-NEXT: .LBB0_9: # %exit60; CHECK-NEXT: sw a0, 0(a1)61; CHECK-NEXT: .LBB0_10: # %exit62; CHECK-NEXT: ret63entry:64 switch i32 %in, label %exit [65 i32 1, label %bb166 i32 2, label %bb267 i32 3, label %bb368 i32 4, label %bb469 ]70bb1:71 store i32 4, ptr %out72 br label %exit73bb2:74 store i32 3, ptr %out75 br label %exit76bb3:77 store i32 2, ptr %out78 br label %exit79bb4:80 store i32 1, ptr %out81 br label %exit82exit:83 ret void84}85 86define void @above_threshold(i32 signext %in, ptr %out) nounwind {87; RV32I-SMALL-LABEL: above_threshold:88; RV32I-SMALL: # %bb.0: # %entry89; RV32I-SMALL-NEXT: addi a0, a0, -190; RV32I-SMALL-NEXT: li a2, 591; RV32I-SMALL-NEXT: bltu a2, a0, .LBB1_992; RV32I-SMALL-NEXT: # %bb.1: # %entry93; RV32I-SMALL-NEXT: slli a0, a0, 294; RV32I-SMALL-NEXT: lui a2, %hi(.LJTI1_0)95; RV32I-SMALL-NEXT: addi a2, a2, %lo(.LJTI1_0)96; RV32I-SMALL-NEXT: add a0, a2, a097; RV32I-SMALL-NEXT: lw a0, 0(a0)98; RV32I-SMALL-NEXT: jr a099; RV32I-SMALL-NEXT: .LBB1_2: # %bb1100; RV32I-SMALL-NEXT: li a0, 4101; RV32I-SMALL-NEXT: j .LBB1_8102; RV32I-SMALL-NEXT: .LBB1_3: # %bb5103; RV32I-SMALL-NEXT: li a0, 100104; RV32I-SMALL-NEXT: j .LBB1_8105; RV32I-SMALL-NEXT: .LBB1_4: # %bb3106; RV32I-SMALL-NEXT: li a0, 2107; RV32I-SMALL-NEXT: j .LBB1_8108; RV32I-SMALL-NEXT: .LBB1_5: # %bb4109; RV32I-SMALL-NEXT: li a0, 1110; RV32I-SMALL-NEXT: j .LBB1_8111; RV32I-SMALL-NEXT: .LBB1_6: # %bb2112; RV32I-SMALL-NEXT: li a0, 3113; RV32I-SMALL-NEXT: j .LBB1_8114; RV32I-SMALL-NEXT: .LBB1_7: # %bb6115; RV32I-SMALL-NEXT: li a0, 200116; RV32I-SMALL-NEXT: .LBB1_8: # %exit117; RV32I-SMALL-NEXT: sw a0, 0(a1)118; RV32I-SMALL-NEXT: .LBB1_9: # %exit119; RV32I-SMALL-NEXT: ret120;121; RV32IXQCILI-SMALL-LABEL: above_threshold:122; RV32IXQCILI-SMALL: # %bb.0: # %entry123; RV32IXQCILI-SMALL-NEXT: addi a0, a0, -1124; RV32IXQCILI-SMALL-NEXT: li a2, 5125; RV32IXQCILI-SMALL-NEXT: bltu a2, a0, .LBB1_9126; RV32IXQCILI-SMALL-NEXT: # %bb.1: # %entry127; RV32IXQCILI-SMALL-NEXT: slli a0, a0, 2128; RV32IXQCILI-SMALL-NEXT: qc.e.li a2, .LJTI1_0129; RV32IXQCILI-SMALL-NEXT: add a0, a0, a2130; RV32IXQCILI-SMALL-NEXT: lw a0, 0(a0)131; RV32IXQCILI-SMALL-NEXT: jr a0132; RV32IXQCILI-SMALL-NEXT: .LBB1_2: # %bb1133; RV32IXQCILI-SMALL-NEXT: li a0, 4134; RV32IXQCILI-SMALL-NEXT: j .LBB1_8135; RV32IXQCILI-SMALL-NEXT: .LBB1_3: # %bb5136; RV32IXQCILI-SMALL-NEXT: li a0, 100137; RV32IXQCILI-SMALL-NEXT: j .LBB1_8138; RV32IXQCILI-SMALL-NEXT: .LBB1_4: # %bb3139; RV32IXQCILI-SMALL-NEXT: li a0, 2140; RV32IXQCILI-SMALL-NEXT: j .LBB1_8141; RV32IXQCILI-SMALL-NEXT: .LBB1_5: # %bb4142; RV32IXQCILI-SMALL-NEXT: li a0, 1143; RV32IXQCILI-SMALL-NEXT: j .LBB1_8144; RV32IXQCILI-SMALL-NEXT: .LBB1_6: # %bb2145; RV32IXQCILI-SMALL-NEXT: li a0, 3146; RV32IXQCILI-SMALL-NEXT: j .LBB1_8147; RV32IXQCILI-SMALL-NEXT: .LBB1_7: # %bb6148; RV32IXQCILI-SMALL-NEXT: li a0, 200149; RV32IXQCILI-SMALL-NEXT: .LBB1_8: # %exit150; RV32IXQCILI-SMALL-NEXT: sw a0, 0(a1)151; RV32IXQCILI-SMALL-NEXT: .LBB1_9: # %exit152; RV32IXQCILI-SMALL-NEXT: ret153;154; RV32I-MEDIUM-LABEL: above_threshold:155; RV32I-MEDIUM: # %bb.0: # %entry156; RV32I-MEDIUM-NEXT: addi a0, a0, -1157; RV32I-MEDIUM-NEXT: li a2, 5158; RV32I-MEDIUM-NEXT: bltu a2, a0, .LBB1_9159; RV32I-MEDIUM-NEXT: # %bb.1: # %entry160; RV32I-MEDIUM-NEXT: slli a0, a0, 2161; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:162; RV32I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)163; RV32I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)164; RV32I-MEDIUM-NEXT: add a0, a2, a0165; RV32I-MEDIUM-NEXT: lw a0, 0(a0)166; RV32I-MEDIUM-NEXT: jr a0167; RV32I-MEDIUM-NEXT: .LBB1_2: # %bb1168; RV32I-MEDIUM-NEXT: li a0, 4169; RV32I-MEDIUM-NEXT: j .LBB1_8170; RV32I-MEDIUM-NEXT: .LBB1_3: # %bb5171; RV32I-MEDIUM-NEXT: li a0, 100172; RV32I-MEDIUM-NEXT: j .LBB1_8173; RV32I-MEDIUM-NEXT: .LBB1_4: # %bb3174; RV32I-MEDIUM-NEXT: li a0, 2175; RV32I-MEDIUM-NEXT: j .LBB1_8176; RV32I-MEDIUM-NEXT: .LBB1_5: # %bb4177; RV32I-MEDIUM-NEXT: li a0, 1178; RV32I-MEDIUM-NEXT: j .LBB1_8179; RV32I-MEDIUM-NEXT: .LBB1_6: # %bb2180; RV32I-MEDIUM-NEXT: li a0, 3181; RV32I-MEDIUM-NEXT: j .LBB1_8182; RV32I-MEDIUM-NEXT: .LBB1_7: # %bb6183; RV32I-MEDIUM-NEXT: li a0, 200184; RV32I-MEDIUM-NEXT: .LBB1_8: # %exit185; RV32I-MEDIUM-NEXT: sw a0, 0(a1)186; RV32I-MEDIUM-NEXT: .LBB1_9: # %exit187; RV32I-MEDIUM-NEXT: ret188;189; RV32I-PIC-LABEL: above_threshold:190; RV32I-PIC: # %bb.0: # %entry191; RV32I-PIC-NEXT: addi a0, a0, -1192; RV32I-PIC-NEXT: li a2, 5193; RV32I-PIC-NEXT: bltu a2, a0, .LBB1_9194; RV32I-PIC-NEXT: # %bb.1: # %entry195; RV32I-PIC-NEXT: slli a0, a0, 2196; RV32I-PIC-NEXT: .Lpcrel_hi0:197; RV32I-PIC-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)198; RV32I-PIC-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)199; RV32I-PIC-NEXT: add a0, a2, a0200; RV32I-PIC-NEXT: lw a0, 0(a0)201; RV32I-PIC-NEXT: add a0, a2, a0202; RV32I-PIC-NEXT: jr a0203; RV32I-PIC-NEXT: .LBB1_2: # %bb1204; RV32I-PIC-NEXT: li a0, 4205; RV32I-PIC-NEXT: j .LBB1_8206; RV32I-PIC-NEXT: .LBB1_3: # %bb5207; RV32I-PIC-NEXT: li a0, 100208; RV32I-PIC-NEXT: j .LBB1_8209; RV32I-PIC-NEXT: .LBB1_4: # %bb3210; RV32I-PIC-NEXT: li a0, 2211; RV32I-PIC-NEXT: j .LBB1_8212; RV32I-PIC-NEXT: .LBB1_5: # %bb4213; RV32I-PIC-NEXT: li a0, 1214; RV32I-PIC-NEXT: j .LBB1_8215; RV32I-PIC-NEXT: .LBB1_6: # %bb2216; RV32I-PIC-NEXT: li a0, 3217; RV32I-PIC-NEXT: j .LBB1_8218; RV32I-PIC-NEXT: .LBB1_7: # %bb6219; RV32I-PIC-NEXT: li a0, 200220; RV32I-PIC-NEXT: .LBB1_8: # %exit221; RV32I-PIC-NEXT: sw a0, 0(a1)222; RV32I-PIC-NEXT: .LBB1_9: # %exit223; RV32I-PIC-NEXT: ret224;225; RV64I-SMALL-LABEL: above_threshold:226; RV64I-SMALL: # %bb.0: # %entry227; RV64I-SMALL-NEXT: addi a0, a0, -1228; RV64I-SMALL-NEXT: li a2, 5229; RV64I-SMALL-NEXT: bltu a2, a0, .LBB1_9230; RV64I-SMALL-NEXT: # %bb.1: # %entry231; RV64I-SMALL-NEXT: slli a0, a0, 2232; RV64I-SMALL-NEXT: lui a2, %hi(.LJTI1_0)233; RV64I-SMALL-NEXT: addi a2, a2, %lo(.LJTI1_0)234; RV64I-SMALL-NEXT: add a0, a2, a0235; RV64I-SMALL-NEXT: lw a0, 0(a0)236; RV64I-SMALL-NEXT: jr a0237; RV64I-SMALL-NEXT: .LBB1_2: # %bb1238; RV64I-SMALL-NEXT: li a0, 4239; RV64I-SMALL-NEXT: j .LBB1_8240; RV64I-SMALL-NEXT: .LBB1_3: # %bb5241; RV64I-SMALL-NEXT: li a0, 100242; RV64I-SMALL-NEXT: j .LBB1_8243; RV64I-SMALL-NEXT: .LBB1_4: # %bb3244; RV64I-SMALL-NEXT: li a0, 2245; RV64I-SMALL-NEXT: j .LBB1_8246; RV64I-SMALL-NEXT: .LBB1_5: # %bb4247; RV64I-SMALL-NEXT: li a0, 1248; RV64I-SMALL-NEXT: j .LBB1_8249; RV64I-SMALL-NEXT: .LBB1_6: # %bb2250; RV64I-SMALL-NEXT: li a0, 3251; RV64I-SMALL-NEXT: j .LBB1_8252; RV64I-SMALL-NEXT: .LBB1_7: # %bb6253; RV64I-SMALL-NEXT: li a0, 200254; RV64I-SMALL-NEXT: .LBB1_8: # %exit255; RV64I-SMALL-NEXT: sw a0, 0(a1)256; RV64I-SMALL-NEXT: .LBB1_9: # %exit257; RV64I-SMALL-NEXT: ret258;259; RV64I-MEDIUM-LABEL: above_threshold:260; RV64I-MEDIUM: # %bb.0: # %entry261; RV64I-MEDIUM-NEXT: addi a0, a0, -1262; RV64I-MEDIUM-NEXT: li a2, 5263; RV64I-MEDIUM-NEXT: bltu a2, a0, .LBB1_9264; RV64I-MEDIUM-NEXT: # %bb.1: # %entry265; RV64I-MEDIUM-NEXT: slli a0, a0, 3266; RV64I-MEDIUM-NEXT: .Lpcrel_hi0:267; RV64I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)268; RV64I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)269; RV64I-MEDIUM-NEXT: add a0, a2, a0270; RV64I-MEDIUM-NEXT: ld a0, 0(a0)271; RV64I-MEDIUM-NEXT: jr a0272; RV64I-MEDIUM-NEXT: .LBB1_2: # %bb1273; RV64I-MEDIUM-NEXT: li a0, 4274; RV64I-MEDIUM-NEXT: j .LBB1_8275; RV64I-MEDIUM-NEXT: .LBB1_3: # %bb5276; RV64I-MEDIUM-NEXT: li a0, 100277; RV64I-MEDIUM-NEXT: j .LBB1_8278; RV64I-MEDIUM-NEXT: .LBB1_4: # %bb3279; RV64I-MEDIUM-NEXT: li a0, 2280; RV64I-MEDIUM-NEXT: j .LBB1_8281; RV64I-MEDIUM-NEXT: .LBB1_5: # %bb4282; RV64I-MEDIUM-NEXT: li a0, 1283; RV64I-MEDIUM-NEXT: j .LBB1_8284; RV64I-MEDIUM-NEXT: .LBB1_6: # %bb2285; RV64I-MEDIUM-NEXT: li a0, 3286; RV64I-MEDIUM-NEXT: j .LBB1_8287; RV64I-MEDIUM-NEXT: .LBB1_7: # %bb6288; RV64I-MEDIUM-NEXT: li a0, 200289; RV64I-MEDIUM-NEXT: .LBB1_8: # %exit290; RV64I-MEDIUM-NEXT: sw a0, 0(a1)291; RV64I-MEDIUM-NEXT: .LBB1_9: # %exit292; RV64I-MEDIUM-NEXT: ret293;294; RV64I-PIC-LABEL: above_threshold:295; RV64I-PIC: # %bb.0: # %entry296; RV64I-PIC-NEXT: addi a0, a0, -1297; RV64I-PIC-NEXT: li a2, 5298; RV64I-PIC-NEXT: bltu a2, a0, .LBB1_9299; RV64I-PIC-NEXT: # %bb.1: # %entry300; RV64I-PIC-NEXT: slli a0, a0, 2301; RV64I-PIC-NEXT: .Lpcrel_hi0:302; RV64I-PIC-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)303; RV64I-PIC-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)304; RV64I-PIC-NEXT: add a0, a2, a0305; RV64I-PIC-NEXT: lw a0, 0(a0)306; RV64I-PIC-NEXT: add a0, a2, a0307; RV64I-PIC-NEXT: jr a0308; RV64I-PIC-NEXT: .LBB1_2: # %bb1309; RV64I-PIC-NEXT: li a0, 4310; RV64I-PIC-NEXT: j .LBB1_8311; RV64I-PIC-NEXT: .LBB1_3: # %bb5312; RV64I-PIC-NEXT: li a0, 100313; RV64I-PIC-NEXT: j .LBB1_8314; RV64I-PIC-NEXT: .LBB1_4: # %bb3315; RV64I-PIC-NEXT: li a0, 2316; RV64I-PIC-NEXT: j .LBB1_8317; RV64I-PIC-NEXT: .LBB1_5: # %bb4318; RV64I-PIC-NEXT: li a0, 1319; RV64I-PIC-NEXT: j .LBB1_8320; RV64I-PIC-NEXT: .LBB1_6: # %bb2321; RV64I-PIC-NEXT: li a0, 3322; RV64I-PIC-NEXT: j .LBB1_8323; RV64I-PIC-NEXT: .LBB1_7: # %bb6324; RV64I-PIC-NEXT: li a0, 200325; RV64I-PIC-NEXT: .LBB1_8: # %exit326; RV64I-PIC-NEXT: sw a0, 0(a1)327; RV64I-PIC-NEXT: .LBB1_9: # %exit328; RV64I-PIC-NEXT: ret329;330; RV32I-SMALL-7-ENTRIES-LABEL: above_threshold:331; RV32I-SMALL-7-ENTRIES: # %bb.0: # %entry332; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 3333; RV32I-SMALL-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5334; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.1: # %entry335; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 1336; RV32I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9337; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.2: # %entry338; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 2339; RV32I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11340; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.3: # %entry341; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 3342; RV32I-SMALL-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14343; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.4: # %bb3344; RV32I-SMALL-7-ENTRIES-NEXT: li a0, 2345; RV32I-SMALL-7-ENTRIES-NEXT: j .LBB1_13346; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_5: # %entry347; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 4348; RV32I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10349; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.6: # %entry350; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 5351; RV32I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12352; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.7: # %entry353; RV32I-SMALL-7-ENTRIES-NEXT: li a2, 6354; RV32I-SMALL-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14355; RV32I-SMALL-7-ENTRIES-NEXT: # %bb.8: # %bb6356; RV32I-SMALL-7-ENTRIES-NEXT: li a0, 200357; RV32I-SMALL-7-ENTRIES-NEXT: j .LBB1_13358; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_9: # %bb1359; RV32I-SMALL-7-ENTRIES-NEXT: li a0, 4360; RV32I-SMALL-7-ENTRIES-NEXT: j .LBB1_13361; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_10: # %bb4362; RV32I-SMALL-7-ENTRIES-NEXT: li a0, 1363; RV32I-SMALL-7-ENTRIES-NEXT: j .LBB1_13364; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_11: # %bb2365; RV32I-SMALL-7-ENTRIES-NEXT: li a0, 3366; RV32I-SMALL-7-ENTRIES-NEXT: j .LBB1_13367; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_12: # %bb5368; RV32I-SMALL-7-ENTRIES-NEXT: li a0, 100369; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_13: # %exit370; RV32I-SMALL-7-ENTRIES-NEXT: sw a0, 0(a1)371; RV32I-SMALL-7-ENTRIES-NEXT: .LBB1_14: # %exit372; RV32I-SMALL-7-ENTRIES-NEXT: ret373;374; RV32IXQCILI-SMALL-7-ENTRIES-LABEL: above_threshold:375; RV32IXQCILI-SMALL-7-ENTRIES: # %bb.0: # %entry376; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 3377; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5378; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.1: # %entry379; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 1380; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9381; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.2: # %entry382; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 2383; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11384; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.3: # %entry385; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 3386; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14387; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.4: # %bb3388; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a0, 2389; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: j .LBB1_13390; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_5: # %entry391; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 4392; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10393; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.6: # %entry394; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 5395; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12396; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.7: # %entry397; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a2, 6398; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14399; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: # %bb.8: # %bb6400; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a0, 200401; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: j .LBB1_13402; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_9: # %bb1403; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a0, 4404; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: j .LBB1_13405; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_10: # %bb4406; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a0, 1407; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: j .LBB1_13408; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_11: # %bb2409; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a0, 3410; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: j .LBB1_13411; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_12: # %bb5412; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: li a0, 100413; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_13: # %exit414; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: sw a0, 0(a1)415; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: .LBB1_14: # %exit416; RV32IXQCILI-SMALL-7-ENTRIES-NEXT: ret417;418; RV32I-MEDIUM-7-ENTRIES-LABEL: above_threshold:419; RV32I-MEDIUM-7-ENTRIES: # %bb.0: # %entry420; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 3421; RV32I-MEDIUM-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5422; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.1: # %entry423; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 1424; RV32I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9425; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.2: # %entry426; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 2427; RV32I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11428; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.3: # %entry429; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 3430; RV32I-MEDIUM-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14431; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.4: # %bb3432; RV32I-MEDIUM-7-ENTRIES-NEXT: li a0, 2433; RV32I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13434; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_5: # %entry435; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 4436; RV32I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10437; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.6: # %entry438; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 5439; RV32I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12440; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.7: # %entry441; RV32I-MEDIUM-7-ENTRIES-NEXT: li a2, 6442; RV32I-MEDIUM-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14443; RV32I-MEDIUM-7-ENTRIES-NEXT: # %bb.8: # %bb6444; RV32I-MEDIUM-7-ENTRIES-NEXT: li a0, 200445; RV32I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13446; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_9: # %bb1447; RV32I-MEDIUM-7-ENTRIES-NEXT: li a0, 4448; RV32I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13449; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_10: # %bb4450; RV32I-MEDIUM-7-ENTRIES-NEXT: li a0, 1451; RV32I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13452; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_11: # %bb2453; RV32I-MEDIUM-7-ENTRIES-NEXT: li a0, 3454; RV32I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13455; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_12: # %bb5456; RV32I-MEDIUM-7-ENTRIES-NEXT: li a0, 100457; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_13: # %exit458; RV32I-MEDIUM-7-ENTRIES-NEXT: sw a0, 0(a1)459; RV32I-MEDIUM-7-ENTRIES-NEXT: .LBB1_14: # %exit460; RV32I-MEDIUM-7-ENTRIES-NEXT: ret461;462; RV32I-PIC-7-ENTRIES-LABEL: above_threshold:463; RV32I-PIC-7-ENTRIES: # %bb.0: # %entry464; RV32I-PIC-7-ENTRIES-NEXT: li a2, 3465; RV32I-PIC-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5466; RV32I-PIC-7-ENTRIES-NEXT: # %bb.1: # %entry467; RV32I-PIC-7-ENTRIES-NEXT: li a2, 1468; RV32I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9469; RV32I-PIC-7-ENTRIES-NEXT: # %bb.2: # %entry470; RV32I-PIC-7-ENTRIES-NEXT: li a2, 2471; RV32I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11472; RV32I-PIC-7-ENTRIES-NEXT: # %bb.3: # %entry473; RV32I-PIC-7-ENTRIES-NEXT: li a2, 3474; RV32I-PIC-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14475; RV32I-PIC-7-ENTRIES-NEXT: # %bb.4: # %bb3476; RV32I-PIC-7-ENTRIES-NEXT: li a0, 2477; RV32I-PIC-7-ENTRIES-NEXT: j .LBB1_13478; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_5: # %entry479; RV32I-PIC-7-ENTRIES-NEXT: li a2, 4480; RV32I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10481; RV32I-PIC-7-ENTRIES-NEXT: # %bb.6: # %entry482; RV32I-PIC-7-ENTRIES-NEXT: li a2, 5483; RV32I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12484; RV32I-PIC-7-ENTRIES-NEXT: # %bb.7: # %entry485; RV32I-PIC-7-ENTRIES-NEXT: li a2, 6486; RV32I-PIC-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14487; RV32I-PIC-7-ENTRIES-NEXT: # %bb.8: # %bb6488; RV32I-PIC-7-ENTRIES-NEXT: li a0, 200489; RV32I-PIC-7-ENTRIES-NEXT: j .LBB1_13490; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_9: # %bb1491; RV32I-PIC-7-ENTRIES-NEXT: li a0, 4492; RV32I-PIC-7-ENTRIES-NEXT: j .LBB1_13493; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_10: # %bb4494; RV32I-PIC-7-ENTRIES-NEXT: li a0, 1495; RV32I-PIC-7-ENTRIES-NEXT: j .LBB1_13496; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_11: # %bb2497; RV32I-PIC-7-ENTRIES-NEXT: li a0, 3498; RV32I-PIC-7-ENTRIES-NEXT: j .LBB1_13499; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_12: # %bb5500; RV32I-PIC-7-ENTRIES-NEXT: li a0, 100501; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_13: # %exit502; RV32I-PIC-7-ENTRIES-NEXT: sw a0, 0(a1)503; RV32I-PIC-7-ENTRIES-NEXT: .LBB1_14: # %exit504; RV32I-PIC-7-ENTRIES-NEXT: ret505;506; RV64I-SMALL-7-ENTRIES-LABEL: above_threshold:507; RV64I-SMALL-7-ENTRIES: # %bb.0: # %entry508; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 3509; RV64I-SMALL-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5510; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.1: # %entry511; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 1512; RV64I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9513; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.2: # %entry514; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 2515; RV64I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11516; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.3: # %entry517; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 3518; RV64I-SMALL-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14519; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.4: # %bb3520; RV64I-SMALL-7-ENTRIES-NEXT: li a0, 2521; RV64I-SMALL-7-ENTRIES-NEXT: j .LBB1_13522; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_5: # %entry523; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 4524; RV64I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10525; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.6: # %entry526; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 5527; RV64I-SMALL-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12528; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.7: # %entry529; RV64I-SMALL-7-ENTRIES-NEXT: li a2, 6530; RV64I-SMALL-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14531; RV64I-SMALL-7-ENTRIES-NEXT: # %bb.8: # %bb6532; RV64I-SMALL-7-ENTRIES-NEXT: li a0, 200533; RV64I-SMALL-7-ENTRIES-NEXT: j .LBB1_13534; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_9: # %bb1535; RV64I-SMALL-7-ENTRIES-NEXT: li a0, 4536; RV64I-SMALL-7-ENTRIES-NEXT: j .LBB1_13537; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_10: # %bb4538; RV64I-SMALL-7-ENTRIES-NEXT: li a0, 1539; RV64I-SMALL-7-ENTRIES-NEXT: j .LBB1_13540; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_11: # %bb2541; RV64I-SMALL-7-ENTRIES-NEXT: li a0, 3542; RV64I-SMALL-7-ENTRIES-NEXT: j .LBB1_13543; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_12: # %bb5544; RV64I-SMALL-7-ENTRIES-NEXT: li a0, 100545; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_13: # %exit546; RV64I-SMALL-7-ENTRIES-NEXT: sw a0, 0(a1)547; RV64I-SMALL-7-ENTRIES-NEXT: .LBB1_14: # %exit548; RV64I-SMALL-7-ENTRIES-NEXT: ret549;550; RV64I-MEDIUM-7-ENTRIES-LABEL: above_threshold:551; RV64I-MEDIUM-7-ENTRIES: # %bb.0: # %entry552; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 3553; RV64I-MEDIUM-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5554; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.1: # %entry555; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 1556; RV64I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9557; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.2: # %entry558; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 2559; RV64I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11560; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.3: # %entry561; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 3562; RV64I-MEDIUM-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14563; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.4: # %bb3564; RV64I-MEDIUM-7-ENTRIES-NEXT: li a0, 2565; RV64I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13566; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_5: # %entry567; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 4568; RV64I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10569; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.6: # %entry570; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 5571; RV64I-MEDIUM-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12572; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.7: # %entry573; RV64I-MEDIUM-7-ENTRIES-NEXT: li a2, 6574; RV64I-MEDIUM-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14575; RV64I-MEDIUM-7-ENTRIES-NEXT: # %bb.8: # %bb6576; RV64I-MEDIUM-7-ENTRIES-NEXT: li a0, 200577; RV64I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13578; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_9: # %bb1579; RV64I-MEDIUM-7-ENTRIES-NEXT: li a0, 4580; RV64I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13581; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_10: # %bb4582; RV64I-MEDIUM-7-ENTRIES-NEXT: li a0, 1583; RV64I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13584; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_11: # %bb2585; RV64I-MEDIUM-7-ENTRIES-NEXT: li a0, 3586; RV64I-MEDIUM-7-ENTRIES-NEXT: j .LBB1_13587; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_12: # %bb5588; RV64I-MEDIUM-7-ENTRIES-NEXT: li a0, 100589; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_13: # %exit590; RV64I-MEDIUM-7-ENTRIES-NEXT: sw a0, 0(a1)591; RV64I-MEDIUM-7-ENTRIES-NEXT: .LBB1_14: # %exit592; RV64I-MEDIUM-7-ENTRIES-NEXT: ret593;594; RV64I-PIC-7-ENTRIES-LABEL: above_threshold:595; RV64I-PIC-7-ENTRIES: # %bb.0: # %entry596; RV64I-PIC-7-ENTRIES-NEXT: li a2, 3597; RV64I-PIC-7-ENTRIES-NEXT: blt a2, a0, .LBB1_5598; RV64I-PIC-7-ENTRIES-NEXT: # %bb.1: # %entry599; RV64I-PIC-7-ENTRIES-NEXT: li a2, 1600; RV64I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_9601; RV64I-PIC-7-ENTRIES-NEXT: # %bb.2: # %entry602; RV64I-PIC-7-ENTRIES-NEXT: li a2, 2603; RV64I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_11604; RV64I-PIC-7-ENTRIES-NEXT: # %bb.3: # %entry605; RV64I-PIC-7-ENTRIES-NEXT: li a2, 3606; RV64I-PIC-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14607; RV64I-PIC-7-ENTRIES-NEXT: # %bb.4: # %bb3608; RV64I-PIC-7-ENTRIES-NEXT: li a0, 2609; RV64I-PIC-7-ENTRIES-NEXT: j .LBB1_13610; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_5: # %entry611; RV64I-PIC-7-ENTRIES-NEXT: li a2, 4612; RV64I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_10613; RV64I-PIC-7-ENTRIES-NEXT: # %bb.6: # %entry614; RV64I-PIC-7-ENTRIES-NEXT: li a2, 5615; RV64I-PIC-7-ENTRIES-NEXT: beq a0, a2, .LBB1_12616; RV64I-PIC-7-ENTRIES-NEXT: # %bb.7: # %entry617; RV64I-PIC-7-ENTRIES-NEXT: li a2, 6618; RV64I-PIC-7-ENTRIES-NEXT: bne a0, a2, .LBB1_14619; RV64I-PIC-7-ENTRIES-NEXT: # %bb.8: # %bb6620; RV64I-PIC-7-ENTRIES-NEXT: li a0, 200621; RV64I-PIC-7-ENTRIES-NEXT: j .LBB1_13622; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_9: # %bb1623; RV64I-PIC-7-ENTRIES-NEXT: li a0, 4624; RV64I-PIC-7-ENTRIES-NEXT: j .LBB1_13625; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_10: # %bb4626; RV64I-PIC-7-ENTRIES-NEXT: li a0, 1627; RV64I-PIC-7-ENTRIES-NEXT: j .LBB1_13628; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_11: # %bb2629; RV64I-PIC-7-ENTRIES-NEXT: li a0, 3630; RV64I-PIC-7-ENTRIES-NEXT: j .LBB1_13631; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_12: # %bb5632; RV64I-PIC-7-ENTRIES-NEXT: li a0, 100633; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_13: # %exit634; RV64I-PIC-7-ENTRIES-NEXT: sw a0, 0(a1)635; RV64I-PIC-7-ENTRIES-NEXT: .LBB1_14: # %exit636; RV64I-PIC-7-ENTRIES-NEXT: ret637entry:638 switch i32 %in, label %exit [639 i32 1, label %bb1640 i32 2, label %bb2641 i32 3, label %bb3642 i32 4, label %bb4643 i32 5, label %bb5644 i32 6, label %bb6645 ]646bb1:647 store i32 4, ptr %out648 br label %exit649bb2:650 store i32 3, ptr %out651 br label %exit652bb3:653 store i32 2, ptr %out654 br label %exit655bb4:656 store i32 1, ptr %out657 br label %exit658bb5:659 store i32 100, ptr %out660 br label %exit661bb6:662 store i32 200, ptr %out663 br label %exit664exit:665 ret void666}667