brintos

brintos / llvm-project-archived public Read only

0
0
Text · 2.6 KiB · 2ec8b46 Raw
91 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=riscv32 -verify-machineinstrs -mattr=+m | FileCheck %s -check-prefixes=RV323; RUN: llc < %s -mtriple=riscv64 -verify-machineinstrs -mattr=+m | FileCheck %s -check-prefixes=RV644 5; Test case:6; - Addition should be cheaper than multiplication7 8; The following LLVM IR simulates:9; int8_t flag2[8193];10; void test(int i) {11;   int tmp = i * 2;12; 	if (i * 2 > 8192) return ;13;   for (int j = 0; ; ++j) {14; 		int offset = j * i + tmp;15; 		flag2[offset] = 0;16; 		if (offset + i > 8192) break;17;   }18; }19 20; After LSR:21; int8_t flag2[8193];22; void test(int i) {23; 	int j = i * 2;24; 	if (j > 8193) return ;25;   do {26; 		flag2[j] = 0;27; 		j += i;28;   } while (j < 8193);29; }30 31@flags2 = internal global [8193 x i8] zeroinitializer, align 32		; <ptr> [#uses=1]32 33define void @test(i32 signext %i) nounwind {34; RV32-LABEL: test:35; RV32:       # %bb.0: # %entry36; RV32-NEXT:    slli a1, a0, 137; RV32-NEXT:    lui a3, 238; RV32-NEXT:    blt a3, a1, .LBB0_339; RV32-NEXT:  # %bb.1: # %bb.preheader40; RV32-NEXT:    lui a2, %hi(flags2)41; RV32-NEXT:    addi a2, a2, %lo(flags2)42; RV32-NEXT:    addi a3, a3, 143; RV32-NEXT:  .LBB0_2: # %bb44; RV32-NEXT:    # =>This Inner Loop Header: Depth=145; RV32-NEXT:    add a4, a2, a146; RV32-NEXT:    add a1, a1, a047; RV32-NEXT:    sb zero, 0(a4)48; RV32-NEXT:    blt a1, a3, .LBB0_249; RV32-NEXT:  .LBB0_3: # %return50; RV32-NEXT:    ret51;52; RV64-LABEL: test:53; RV64:       # %bb.0: # %entry54; RV64-NEXT:    slliw a1, a0, 155; RV64-NEXT:    lui a3, 256; RV64-NEXT:    blt a3, a1, .LBB0_357; RV64-NEXT:  # %bb.1: # %bb.preheader58; RV64-NEXT:    lui a2, %hi(flags2)59; RV64-NEXT:    addi a2, a2, %lo(flags2)60; RV64-NEXT:    addi a3, a3, 161; RV64-NEXT:  .LBB0_2: # %bb62; RV64-NEXT:    # =>This Inner Loop Header: Depth=163; RV64-NEXT:    slli a4, a1, 3264; RV64-NEXT:    srli a4, a4, 3265; RV64-NEXT:    add a4, a2, a466; RV64-NEXT:    addw a1, a1, a067; RV64-NEXT:    sb zero, 0(a4)68; RV64-NEXT:    blt a1, a3, .LBB0_269; RV64-NEXT:  .LBB0_3: # %return70; RV64-NEXT:    ret71entry:72	%k_addr.012 = shl i32 %i, 173	%tmp14 = icmp sgt i32 %k_addr.012, 819274	br i1 %tmp14, label %return, label %bb75 76bb:77	%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ]78	%tmp.15 = mul i32 %indvar, %i79	%tmp.16 = add i32 %tmp.15, %k_addr.01280	%gep.upgrd.1 = zext i32 %tmp.16 to i6481	%tmp = getelementptr [8193 x i8], ptr @flags2, i32 0, i64 %gep.upgrd.182	store i8 0, ptr %tmp83	%tmp.17 = add i32 %tmp.16, %i84	%tmp.upgrd.2 = icmp sgt i32 %tmp.17, 819285	%indvar.next = add i32 %indvar, 186	br i1 %tmp.upgrd.2, label %return, label %bb87 88return:89	ret void90}91