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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=riscv32 -mattr=+f,+d,+zfh -target-abi=ilp32d | \3; RUN:   FileCheck %s --check-prefixes=RV324; RUN: llc < %s -mtriple=riscv64 -mattr=+f,+d,+zfh -target-abi=lp64d | \5; RUN:   FileCheck %s --check-prefixes=RV646 7; Make sure MachineCSE can combine the adds with the operands commuted.8 9define void @commute_add_i32(i32 signext %x, i32 signext %y, ptr %p1, ptr %p2, i1 zeroext %cond) {10; RV32-LABEL: commute_add_i32:11; RV32:       # %bb.0:12; RV32-NEXT:    add a0, a0, a113; RV32-NEXT:    sw a0, 0(a2)14; RV32-NEXT:    beqz a4, .LBB0_215; RV32-NEXT:  # %bb.1: # %trueblock16; RV32-NEXT:    sw a0, 0(a2)17; RV32-NEXT:  .LBB0_2: # %falseblock18; RV32-NEXT:    ret19;20; RV64-LABEL: commute_add_i32:21; RV64:       # %bb.0:22; RV64-NEXT:    add a0, a0, a123; RV64-NEXT:    sw a0, 0(a2)24; RV64-NEXT:    beqz a4, .LBB0_225; RV64-NEXT:  # %bb.1: # %trueblock26; RV64-NEXT:    sw a0, 0(a2)27; RV64-NEXT:  .LBB0_2: # %falseblock28; RV64-NEXT:    ret29  %a = add i32 %x, %y30  store i32 %a, ptr %p131  br i1 %cond, label %trueblock, label %falseblock32 33trueblock:34  %b = add i32 %y, %x35  store i32 %b, ptr %p136  br label %falseblock37 38falseblock:39  ret void40}41 42define void @commute_add_i64(i64 %x, i64 %y, ptr %p1, ptr %p2, i1 zeroext %cond) {43; RV32-LABEL: commute_add_i64:44; RV32:       # %bb.0:45; RV32-NEXT:    add a1, a1, a346; RV32-NEXT:    add a3, a0, a247; RV32-NEXT:    sltu a0, a3, a048; RV32-NEXT:    add a0, a1, a049; RV32-NEXT:    sw a3, 0(a4)50; RV32-NEXT:    sw a0, 4(a4)51; RV32-NEXT:    beqz a6, .LBB1_252; RV32-NEXT:  # %bb.1: # %trueblock53; RV32-NEXT:    sltu a0, a3, a254; RV32-NEXT:    add a0, a1, a055; RV32-NEXT:    sw a3, 0(a4)56; RV32-NEXT:    sw a0, 4(a4)57; RV32-NEXT:  .LBB1_2: # %falseblock58; RV32-NEXT:    ret59;60; RV64-LABEL: commute_add_i64:61; RV64:       # %bb.0:62; RV64-NEXT:    add a0, a0, a163; RV64-NEXT:    sd a0, 0(a2)64; RV64-NEXT:    beqz a4, .LBB1_265; RV64-NEXT:  # %bb.1: # %trueblock66; RV64-NEXT:    sd a0, 0(a2)67; RV64-NEXT:  .LBB1_2: # %falseblock68; RV64-NEXT:    ret69  %a = add i64 %x, %y70  store i64 %a, ptr %p171  br i1 %cond, label %trueblock, label %falseblock72 73trueblock:74  %b = add i64 %y, %x75  store i64 %b, ptr %p176  br label %falseblock77 78falseblock:79  ret void80}81 82define void @commute_fmadd_f16(half %x, half %y, half %z, ptr %p1, ptr %p2, i1 zeroext %cond) {83; RV32-LABEL: commute_fmadd_f16:84; RV32:       # %bb.0:85; RV32-NEXT:    fmadd.h fa5, fa0, fa1, fa286; RV32-NEXT:    fsh fa5, 0(a0)87; RV32-NEXT:    beqz a2, .LBB2_288; RV32-NEXT:  # %bb.1: # %trueblock89; RV32-NEXT:    fsh fa5, 0(a0)90; RV32-NEXT:  .LBB2_2: # %falseblock91; RV32-NEXT:    ret92;93; RV64-LABEL: commute_fmadd_f16:94; RV64:       # %bb.0:95; RV64-NEXT:    fmadd.h fa5, fa0, fa1, fa296; RV64-NEXT:    fsh fa5, 0(a0)97; RV64-NEXT:    beqz a2, .LBB2_298; RV64-NEXT:  # %bb.1: # %trueblock99; RV64-NEXT:    fsh fa5, 0(a0)100; RV64-NEXT:  .LBB2_2: # %falseblock101; RV64-NEXT:    ret102  %a = call half @llvm.fma.f16(half %x, half %y, half %z)103  store half %a, ptr %p1104  br i1 %cond, label %trueblock, label %falseblock105 106trueblock:107  %b = call half @llvm.fma.f16(half %y, half %x, half %z)108  store half %b, ptr %p1109  br label %falseblock110 111falseblock:112  ret void113}114 115define void @commute_fmadd_f32(float %x, float %y, float %z, ptr %p1, ptr %p2, i1 zeroext %cond) {116; RV32-LABEL: commute_fmadd_f32:117; RV32:       # %bb.0:118; RV32-NEXT:    fmadd.s fa5, fa0, fa1, fa2119; RV32-NEXT:    fsw fa5, 0(a0)120; RV32-NEXT:    beqz a2, .LBB3_2121; RV32-NEXT:  # %bb.1: # %trueblock122; RV32-NEXT:    fsw fa5, 0(a0)123; RV32-NEXT:  .LBB3_2: # %falseblock124; RV32-NEXT:    ret125;126; RV64-LABEL: commute_fmadd_f32:127; RV64:       # %bb.0:128; RV64-NEXT:    fmadd.s fa5, fa0, fa1, fa2129; RV64-NEXT:    fsw fa5, 0(a0)130; RV64-NEXT:    beqz a2, .LBB3_2131; RV64-NEXT:  # %bb.1: # %trueblock132; RV64-NEXT:    fsw fa5, 0(a0)133; RV64-NEXT:  .LBB3_2: # %falseblock134; RV64-NEXT:    ret135  %a = call float @llvm.fma.f32(float %x, float %y, float %z)136  store float %a, ptr %p1137  br i1 %cond, label %trueblock, label %falseblock138 139trueblock:140  %b = call float @llvm.fma.f32(float %y, float %x, float %z)141  store float %b, ptr %p1142  br label %falseblock143 144falseblock:145  ret void146}147 148define void @commute_fmadd_f64(double %x, double %y, double %z, ptr %p1, ptr %p2, i1 zeroext %cond) {149; RV32-LABEL: commute_fmadd_f64:150; RV32:       # %bb.0:151; RV32-NEXT:    fmadd.d fa5, fa0, fa1, fa2152; RV32-NEXT:    fsd fa5, 0(a0)153; RV32-NEXT:    beqz a2, .LBB4_2154; RV32-NEXT:  # %bb.1: # %trueblock155; RV32-NEXT:    fsd fa5, 0(a0)156; RV32-NEXT:  .LBB4_2: # %falseblock157; RV32-NEXT:    ret158;159; RV64-LABEL: commute_fmadd_f64:160; RV64:       # %bb.0:161; RV64-NEXT:    fmadd.d fa5, fa0, fa1, fa2162; RV64-NEXT:    fsd fa5, 0(a0)163; RV64-NEXT:    beqz a2, .LBB4_2164; RV64-NEXT:  # %bb.1: # %trueblock165; RV64-NEXT:    fsd fa5, 0(a0)166; RV64-NEXT:  .LBB4_2: # %falseblock167; RV64-NEXT:    ret168  %a = call double @llvm.fma.f64(double %x, double %y, double %z)169  store double %a, ptr %p1170  br i1 %cond, label %trueblock, label %falseblock171 172trueblock:173  %b = call double @llvm.fma.f64(double %y, double %x, double %z)174  store double %b, ptr %p1175  br label %falseblock176 177falseblock:178  ret void179}180 181define void @commute_fmsub_f16(half %x, half %y, half %z, ptr %p1, ptr %p2, i1 zeroext %cond) {182; RV32-LABEL: commute_fmsub_f16:183; RV32:       # %bb.0:184; RV32-NEXT:    fmsub.h fa5, fa0, fa1, fa2185; RV32-NEXT:    fsh fa5, 0(a0)186; RV32-NEXT:    beqz a2, .LBB5_2187; RV32-NEXT:  # %bb.1: # %trueblock188; RV32-NEXT:    fsh fa5, 0(a0)189; RV32-NEXT:  .LBB5_2: # %falseblock190; RV32-NEXT:    ret191;192; RV64-LABEL: commute_fmsub_f16:193; RV64:       # %bb.0:194; RV64-NEXT:    fmsub.h fa5, fa0, fa1, fa2195; RV64-NEXT:    fsh fa5, 0(a0)196; RV64-NEXT:    beqz a2, .LBB5_2197; RV64-NEXT:  # %bb.1: # %trueblock198; RV64-NEXT:    fsh fa5, 0(a0)199; RV64-NEXT:  .LBB5_2: # %falseblock200; RV64-NEXT:    ret201  %negz = fneg half %z202  %a = call half @llvm.fma.f16(half %x, half %y, half %negz)203  store half %a, ptr %p1204  br i1 %cond, label %trueblock, label %falseblock205 206trueblock:207  %negz2 = fneg half %z208  %b = call half @llvm.fma.f16(half %y, half %x, half %negz2)209  store half %b, ptr %p1210  br label %falseblock211 212falseblock:213  ret void214}215 216define void @commute_fmsub_f32(float %x, float %y, float %z, ptr %p1, ptr %p2, i1 zeroext %cond) {217; RV32-LABEL: commute_fmsub_f32:218; RV32:       # %bb.0:219; RV32-NEXT:    fmsub.s fa5, fa0, fa1, fa2220; RV32-NEXT:    fsw fa5, 0(a0)221; RV32-NEXT:    beqz a2, .LBB6_2222; RV32-NEXT:  # %bb.1: # %trueblock223; RV32-NEXT:    fsw fa5, 0(a0)224; RV32-NEXT:  .LBB6_2: # %falseblock225; RV32-NEXT:    ret226;227; RV64-LABEL: commute_fmsub_f32:228; RV64:       # %bb.0:229; RV64-NEXT:    fmsub.s fa5, fa0, fa1, fa2230; RV64-NEXT:    fsw fa5, 0(a0)231; RV64-NEXT:    beqz a2, .LBB6_2232; RV64-NEXT:  # %bb.1: # %trueblock233; RV64-NEXT:    fsw fa5, 0(a0)234; RV64-NEXT:  .LBB6_2: # %falseblock235; RV64-NEXT:    ret236  %negz = fneg float %z237  %a = call float @llvm.fma.f32(float %x, float %y, float %negz)238  store float %a, ptr %p1239  br i1 %cond, label %trueblock, label %falseblock240 241trueblock:242  %negz2 = fneg float %z243  %b = call float @llvm.fma.f32(float %y, float %x, float %negz2)244  store float %b, ptr %p1245  br label %falseblock246 247falseblock:248  ret void249}250 251define void @commute_fmsub_f64(double %x, double %y, double %z, ptr %p1, ptr %p2, i1 zeroext %cond) {252; RV32-LABEL: commute_fmsub_f64:253; RV32:       # %bb.0:254; RV32-NEXT:    fmsub.d fa5, fa0, fa1, fa2255; RV32-NEXT:    fsd fa5, 0(a0)256; RV32-NEXT:    beqz a2, .LBB7_2257; RV32-NEXT:  # %bb.1: # %trueblock258; RV32-NEXT:    fsd fa5, 0(a0)259; RV32-NEXT:  .LBB7_2: # %falseblock260; RV32-NEXT:    ret261;262; RV64-LABEL: commute_fmsub_f64:263; RV64:       # %bb.0:264; RV64-NEXT:    fmsub.d fa5, fa0, fa1, fa2265; RV64-NEXT:    fsd fa5, 0(a0)266; RV64-NEXT:    beqz a2, .LBB7_2267; RV64-NEXT:  # %bb.1: # %trueblock268; RV64-NEXT:    fsd fa5, 0(a0)269; RV64-NEXT:  .LBB7_2: # %falseblock270; RV64-NEXT:    ret271  %negz = fneg double %z272  %a = call double @llvm.fma.f64(double %x, double %y, double %negz)273  store double %a, ptr %p1274  br i1 %cond, label %trueblock, label %falseblock275 276trueblock:277  %negz2 = fneg double %z278  %b = call double @llvm.fma.f64(double %y, double %x, double %negz2)279  store double %b, ptr %p1280  br label %falseblock281 282falseblock:283  ret void284}285 286define void @commute_fnmadd_f16(half %x, half %y, half %z, ptr %p1, ptr %p2, i1 zeroext %cond) {287; RV32-LABEL: commute_fnmadd_f16:288; RV32:       # %bb.0:289; RV32-NEXT:    fnmadd.h fa5, fa0, fa1, fa2290; RV32-NEXT:    fsh fa5, 0(a0)291; RV32-NEXT:    beqz a2, .LBB8_2292; RV32-NEXT:  # %bb.1: # %trueblock293; RV32-NEXT:    fsh fa5, 0(a0)294; RV32-NEXT:  .LBB8_2: # %falseblock295; RV32-NEXT:    ret296;297; RV64-LABEL: commute_fnmadd_f16:298; RV64:       # %bb.0:299; RV64-NEXT:    fnmadd.h fa5, fa0, fa1, fa2300; RV64-NEXT:    fsh fa5, 0(a0)301; RV64-NEXT:    beqz a2, .LBB8_2302; RV64-NEXT:  # %bb.1: # %trueblock303; RV64-NEXT:    fsh fa5, 0(a0)304; RV64-NEXT:  .LBB8_2: # %falseblock305; RV64-NEXT:    ret306  %negx = fneg half %x307  %negz = fneg half %z308  %a = call half @llvm.fma.f16(half %negx, half %y, half %negz)309  store half %a, ptr %p1310  br i1 %cond, label %trueblock, label %falseblock311 312trueblock:313  %negy = fneg half %y314  %negz2 = fneg half %z315  %b = call half @llvm.fma.f16(half %negy, half %x, half %negz2)316  store half %b, ptr %p1317  br label %falseblock318 319falseblock:320  ret void321}322 323define void @commute_fnmadd_f32(float %x, float %y, float %z, ptr %p1, ptr %p2, i1 zeroext %cond) {324; RV32-LABEL: commute_fnmadd_f32:325; RV32:       # %bb.0:326; RV32-NEXT:    fnmadd.s fa5, fa0, fa1, fa2327; RV32-NEXT:    fsw fa5, 0(a0)328; RV32-NEXT:    beqz a2, .LBB9_2329; RV32-NEXT:  # %bb.1: # %trueblock330; RV32-NEXT:    fsw fa5, 0(a0)331; RV32-NEXT:  .LBB9_2: # %falseblock332; RV32-NEXT:    ret333;334; RV64-LABEL: commute_fnmadd_f32:335; RV64:       # %bb.0:336; RV64-NEXT:    fnmadd.s fa5, fa0, fa1, fa2337; RV64-NEXT:    fsw fa5, 0(a0)338; RV64-NEXT:    beqz a2, .LBB9_2339; RV64-NEXT:  # %bb.1: # %trueblock340; RV64-NEXT:    fsw fa5, 0(a0)341; RV64-NEXT:  .LBB9_2: # %falseblock342; RV64-NEXT:    ret343  %negx = fneg float %x344  %negz = fneg float %z345  %a = call float @llvm.fma.f32(float %negx, float %y, float %negz)346  store float %a, ptr %p1347  br i1 %cond, label %trueblock, label %falseblock348 349trueblock:350  %negy = fneg float %y351  %negz2 = fneg float %z352  %b = call float @llvm.fma.f32(float %negy, float %x, float %negz2)353  store float %b, ptr %p1354  br label %falseblock355 356falseblock:357  ret void358}359 360define void @commute_fnmadd_f64(double %x, double %y, double %z, ptr %p1, ptr %p2, i1 zeroext %cond) {361; RV32-LABEL: commute_fnmadd_f64:362; RV32:       # %bb.0:363; RV32-NEXT:    fnmadd.d fa5, fa0, fa1, fa2364; RV32-NEXT:    fsd fa5, 0(a0)365; RV32-NEXT:    beqz a2, .LBB10_2366; RV32-NEXT:  # %bb.1: # %trueblock367; RV32-NEXT:    fsd fa5, 0(a0)368; RV32-NEXT:  .LBB10_2: # %falseblock369; RV32-NEXT:    ret370;371; RV64-LABEL: commute_fnmadd_f64:372; RV64:       # %bb.0:373; RV64-NEXT:    fnmadd.d fa5, fa0, fa1, fa2374; RV64-NEXT:    fsd fa5, 0(a0)375; RV64-NEXT:    beqz a2, .LBB10_2376; RV64-NEXT:  # %bb.1: # %trueblock377; RV64-NEXT:    fsd fa5, 0(a0)378; RV64-NEXT:  .LBB10_2: # %falseblock379; RV64-NEXT:    ret380  %negx = fneg double %x381  %negz = fneg double %z382  %a = call double @llvm.fma.f64(double %negx, double %y, double %negz)383  store double %a, ptr %p1384  br i1 %cond, label %trueblock, label %falseblock385 386trueblock:387  %negy = fneg double %y388  %negz2 = fneg double %z389  %b = call double @llvm.fma.f64(double %negy, double %x, double %negz2)390  store double %b, ptr %p1391  br label %falseblock392 393falseblock:394  ret void395}396 397define void @commute_fnmsub_f16(half %x, half %y, half %z, ptr %p1, ptr %p2, i1 zeroext %cond) {398; RV32-LABEL: commute_fnmsub_f16:399; RV32:       # %bb.0:400; RV32-NEXT:    fnmsub.h fa5, fa0, fa1, fa2401; RV32-NEXT:    fsh fa5, 0(a0)402; RV32-NEXT:    beqz a2, .LBB11_2403; RV32-NEXT:  # %bb.1: # %trueblock404; RV32-NEXT:    fsh fa5, 0(a0)405; RV32-NEXT:  .LBB11_2: # %falseblock406; RV32-NEXT:    ret407;408; RV64-LABEL: commute_fnmsub_f16:409; RV64:       # %bb.0:410; RV64-NEXT:    fnmsub.h fa5, fa0, fa1, fa2411; RV64-NEXT:    fsh fa5, 0(a0)412; RV64-NEXT:    beqz a2, .LBB11_2413; RV64-NEXT:  # %bb.1: # %trueblock414; RV64-NEXT:    fsh fa5, 0(a0)415; RV64-NEXT:  .LBB11_2: # %falseblock416; RV64-NEXT:    ret417  %negx = fneg half %x418  %a = call half @llvm.fma.f16(half %negx, half %y, half %z)419  store half %a, ptr %p1420  br i1 %cond, label %trueblock, label %falseblock421 422trueblock:423  %negy = fneg half %y424  %b = call half @llvm.fma.f16(half %negy, half %x, half %z)425  store half %b, ptr %p1426  br label %falseblock427 428falseblock:429  ret void430}431 432define void @commute_fnmsub_f32(float %x, float %y, float %z, ptr %p1, ptr %p2, i1 zeroext %cond) {433; RV32-LABEL: commute_fnmsub_f32:434; RV32:       # %bb.0:435; RV32-NEXT:    fnmsub.s fa5, fa0, fa1, fa2436; RV32-NEXT:    fsw fa5, 0(a0)437; RV32-NEXT:    beqz a2, .LBB12_2438; RV32-NEXT:  # %bb.1: # %trueblock439; RV32-NEXT:    fsw fa5, 0(a0)440; RV32-NEXT:  .LBB12_2: # %falseblock441; RV32-NEXT:    ret442;443; RV64-LABEL: commute_fnmsub_f32:444; RV64:       # %bb.0:445; RV64-NEXT:    fnmsub.s fa5, fa0, fa1, fa2446; RV64-NEXT:    fsw fa5, 0(a0)447; RV64-NEXT:    beqz a2, .LBB12_2448; RV64-NEXT:  # %bb.1: # %trueblock449; RV64-NEXT:    fsw fa5, 0(a0)450; RV64-NEXT:  .LBB12_2: # %falseblock451; RV64-NEXT:    ret452  %negx = fneg float %x453  %a = call float @llvm.fma.f32(float %negx, float %y, float %z)454  store float %a, ptr %p1455  br i1 %cond, label %trueblock, label %falseblock456 457trueblock:458  %negy = fneg float %y459  %b = call float @llvm.fma.f32(float %negy, float %x, float %z)460  store float %b, ptr %p1461  br label %falseblock462 463falseblock:464  ret void465}466 467define void @commute_fnmsub_f64(double %x, double %y, double %z, ptr %p1, ptr %p2, i1 zeroext %cond) {468; RV32-LABEL: commute_fnmsub_f64:469; RV32:       # %bb.0:470; RV32-NEXT:    fnmsub.d fa5, fa0, fa1, fa2471; RV32-NEXT:    fsd fa5, 0(a0)472; RV32-NEXT:    beqz a2, .LBB13_2473; RV32-NEXT:  # %bb.1: # %trueblock474; RV32-NEXT:    fsd fa5, 0(a0)475; RV32-NEXT:  .LBB13_2: # %falseblock476; RV32-NEXT:    ret477;478; RV64-LABEL: commute_fnmsub_f64:479; RV64:       # %bb.0:480; RV64-NEXT:    fnmsub.d fa5, fa0, fa1, fa2481; RV64-NEXT:    fsd fa5, 0(a0)482; RV64-NEXT:    beqz a2, .LBB13_2483; RV64-NEXT:  # %bb.1: # %trueblock484; RV64-NEXT:    fsd fa5, 0(a0)485; RV64-NEXT:  .LBB13_2: # %falseblock486; RV64-NEXT:    ret487  %negx = fneg double %x488  %a = call double @llvm.fma.f64(double %negx, double %y, double %z)489  store double %a, ptr %p1490  br i1 %cond, label %trueblock, label %falseblock491 492trueblock:493  %negy = fneg double %y494  %b = call double @llvm.fma.f64(double %negy, double %x, double %z)495  store double %b, ptr %p1496  br label %falseblock497 498falseblock:499  ret void500}501 502define void @commute_fadd_f16(half %x, half %y, ptr %p1, ptr %p2, i1 zeroext %cond) {503; RV32-LABEL: commute_fadd_f16:504; RV32:       # %bb.0:505; RV32-NEXT:    fadd.h fa5, fa0, fa1506; RV32-NEXT:    fsh fa5, 0(a0)507; RV32-NEXT:    beqz a2, .LBB14_2508; RV32-NEXT:  # %bb.1: # %trueblock509; RV32-NEXT:    fsh fa5, 0(a0)510; RV32-NEXT:  .LBB14_2: # %falseblock511; RV32-NEXT:    ret512;513; RV64-LABEL: commute_fadd_f16:514; RV64:       # %bb.0:515; RV64-NEXT:    fadd.h fa5, fa0, fa1516; RV64-NEXT:    fsh fa5, 0(a0)517; RV64-NEXT:    beqz a2, .LBB14_2518; RV64-NEXT:  # %bb.1: # %trueblock519; RV64-NEXT:    fsh fa5, 0(a0)520; RV64-NEXT:  .LBB14_2: # %falseblock521; RV64-NEXT:    ret522  %a = fadd half %x, %y523  store half %a, ptr %p1524  br i1 %cond, label %trueblock, label %falseblock525 526trueblock:527  %b = fadd half %y, %x528  store half %b, ptr %p1529  br label %falseblock530 531falseblock:532  ret void533}534 535define void @commute_fadd_f32(float %x, float %y, ptr %p1, ptr %p2, i1 zeroext %cond) {536; RV32-LABEL: commute_fadd_f32:537; RV32:       # %bb.0:538; RV32-NEXT:    fadd.s fa5, fa0, fa1539; RV32-NEXT:    fsw fa5, 0(a0)540; RV32-NEXT:    beqz a2, .LBB15_2541; RV32-NEXT:  # %bb.1: # %trueblock542; RV32-NEXT:    fsw fa5, 0(a0)543; RV32-NEXT:  .LBB15_2: # %falseblock544; RV32-NEXT:    ret545;546; RV64-LABEL: commute_fadd_f32:547; RV64:       # %bb.0:548; RV64-NEXT:    fadd.s fa5, fa0, fa1549; RV64-NEXT:    fsw fa5, 0(a0)550; RV64-NEXT:    beqz a2, .LBB15_2551; RV64-NEXT:  # %bb.1: # %trueblock552; RV64-NEXT:    fsw fa5, 0(a0)553; RV64-NEXT:  .LBB15_2: # %falseblock554; RV64-NEXT:    ret555  %a = fadd float %x, %y556  store float %a, ptr %p1557  br i1 %cond, label %trueblock, label %falseblock558 559trueblock:560  %b = fadd float %y, %x561  store float %b, ptr %p1562  br label %falseblock563 564falseblock:565  ret void566}567 568define void @commute_fadd_f64(double %x, double %y, ptr %p1, ptr %p2, i1 zeroext %cond) {569; RV32-LABEL: commute_fadd_f64:570; RV32:       # %bb.0:571; RV32-NEXT:    fadd.d fa5, fa0, fa1572; RV32-NEXT:    fsd fa5, 0(a0)573; RV32-NEXT:    beqz a2, .LBB16_2574; RV32-NEXT:  # %bb.1: # %trueblock575; RV32-NEXT:    fsd fa5, 0(a0)576; RV32-NEXT:  .LBB16_2: # %falseblock577; RV32-NEXT:    ret578;579; RV64-LABEL: commute_fadd_f64:580; RV64:       # %bb.0:581; RV64-NEXT:    fadd.d fa5, fa0, fa1582; RV64-NEXT:    fsd fa5, 0(a0)583; RV64-NEXT:    beqz a2, .LBB16_2584; RV64-NEXT:  # %bb.1: # %trueblock585; RV64-NEXT:    fsd fa5, 0(a0)586; RV64-NEXT:  .LBB16_2: # %falseblock587; RV64-NEXT:    ret588  %a = fadd double %x, %y589  store double %a, ptr %p1590  br i1 %cond, label %trueblock, label %falseblock591 592trueblock:593  %b = fadd double %y, %x594  store double %b, ptr %p1595  br label %falseblock596 597falseblock:598  ret void599}600 601define void @commute_feq_f16(half %x, half %y, ptr %p1, ptr %p2, i1 zeroext %cond) {602; RV32-LABEL: commute_feq_f16:603; RV32:       # %bb.0:604; RV32-NEXT:    feq.h a1, fa0, fa1605; RV32-NEXT:    sb a1, 0(a0)606; RV32-NEXT:    beqz a2, .LBB17_2607; RV32-NEXT:  # %bb.1: # %trueblock608; RV32-NEXT:    sb a1, 0(a0)609; RV32-NEXT:  .LBB17_2: # %falseblock610; RV32-NEXT:    ret611;612; RV64-LABEL: commute_feq_f16:613; RV64:       # %bb.0:614; RV64-NEXT:    feq.h a1, fa0, fa1615; RV64-NEXT:    sb a1, 0(a0)616; RV64-NEXT:    beqz a2, .LBB17_2617; RV64-NEXT:  # %bb.1: # %trueblock618; RV64-NEXT:    sb a1, 0(a0)619; RV64-NEXT:  .LBB17_2: # %falseblock620; RV64-NEXT:    ret621  %a = fcmp oeq half %x, %y622  %b = zext i1 %a to i8623  store i8 %b, ptr %p1624  br i1 %cond, label %trueblock, label %falseblock625 626trueblock:627  %c = fcmp oeq half %y, %x628  %d = zext i1 %c to i8629  store i8 %d, ptr %p1630  br label %falseblock631 632falseblock:633  ret void634}635 636define void @commute_feq_f32(float %x, float %y, ptr %p1, ptr %p2, i1 zeroext %cond) {637; RV32-LABEL: commute_feq_f32:638; RV32:       # %bb.0:639; RV32-NEXT:    feq.s a1, fa0, fa1640; RV32-NEXT:    sb a1, 0(a0)641; RV32-NEXT:    beqz a2, .LBB18_2642; RV32-NEXT:  # %bb.1: # %trueblock643; RV32-NEXT:    sb a1, 0(a0)644; RV32-NEXT:  .LBB18_2: # %falseblock645; RV32-NEXT:    ret646;647; RV64-LABEL: commute_feq_f32:648; RV64:       # %bb.0:649; RV64-NEXT:    feq.s a1, fa0, fa1650; RV64-NEXT:    sb a1, 0(a0)651; RV64-NEXT:    beqz a2, .LBB18_2652; RV64-NEXT:  # %bb.1: # %trueblock653; RV64-NEXT:    sb a1, 0(a0)654; RV64-NEXT:  .LBB18_2: # %falseblock655; RV64-NEXT:    ret656  %a = fcmp oeq float %x, %y657  %b = zext i1 %a to i8658  store i8 %b, ptr %p1659  br i1 %cond, label %trueblock, label %falseblock660 661trueblock:662  %c = fcmp oeq float %y, %x663  %d = zext i1 %c to i8664  store i8 %d, ptr %p1665  br label %falseblock666 667falseblock:668  ret void669}670 671define void @commute_feq_f64(double %x, double %y, ptr %p1, ptr %p2, i1 zeroext %cond) {672; RV32-LABEL: commute_feq_f64:673; RV32:       # %bb.0:674; RV32-NEXT:    feq.d a1, fa0, fa1675; RV32-NEXT:    sb a1, 0(a0)676; RV32-NEXT:    beqz a2, .LBB19_2677; RV32-NEXT:  # %bb.1: # %trueblock678; RV32-NEXT:    sb a1, 0(a0)679; RV32-NEXT:  .LBB19_2: # %falseblock680; RV32-NEXT:    ret681;682; RV64-LABEL: commute_feq_f64:683; RV64:       # %bb.0:684; RV64-NEXT:    feq.d a1, fa0, fa1685; RV64-NEXT:    sb a1, 0(a0)686; RV64-NEXT:    beqz a2, .LBB19_2687; RV64-NEXT:  # %bb.1: # %trueblock688; RV64-NEXT:    sb a1, 0(a0)689; RV64-NEXT:  .LBB19_2: # %falseblock690; RV64-NEXT:    ret691  %a = fcmp oeq double %x, %y692  %b = zext i1 %a to i8693  store i8 %b, ptr %p1694  br i1 %cond, label %trueblock, label %falseblock695 696trueblock:697  %c = fcmp oeq double %y, %x698  %d = zext i1 %c to i8699  store i8 %d, ptr %p1700  br label %falseblock701 702falseblock:703  ret void704}705