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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -o - %s -mtriple=riscv32 -mattr=+zilsd,+zclsd,+zdinx -simplify-mir \3# RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=RV32 %s4--- |5 define void @store_common_value_double(ptr %a, ptr %b, ptr %c, i32 %d, double %e, double %f) #0 {6 entry:7 store double %f, ptr %a, align 88 store double %f, ptr %b, align 89 store double %f, ptr %c, align 810 ret void11 }12 13 define void @store_common_value_double_zero(ptr %a, ptr %b, ptr %c) #0 {14 entry:15 store double 0.0, ptr %a, align 816 store double 0.0, ptr %b, align 817 store double 0.0, ptr %c, align 818 ret void19 }20 21 define void @store_common_ptr_double(double %a, double %b, double %d, ptr %p) #0 {22 entry:23 store volatile double %a, ptr %p, align 824 store volatile double %b, ptr %p, align 825 store volatile double %b, ptr %p, align 826 ret void27 }28 29 define void @load_common_ptr_double(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {30 entry:31 %0 = load double, ptr %g, align 832 %arrayidx1 = getelementptr inbounds { double, double, i32 }, ptr %g, i32 0, i32 133 %1 = load double, ptr %arrayidx1, align 834 %arrayidx2 = getelementptr inbounds { double, double, i32 }, ptr %g, i32 0, i32 235 %2 = load i32, ptr %arrayidx2, align 836 tail call void @load_common_ptr_double_1(double %0, double %1, i32 %2)37 ret void38 }39 40 declare void @load_common_ptr_double_1(double, double, double) #041 42 define void @store_large_offset_double(ptr %p, i32 %dummy, double %a, double %b, double %c) #0 {43 entry:44 %0 = getelementptr inbounds double, ptr %p, i32 10045 store volatile double %a, ptr %0, align 846 %1 = getelementptr inbounds double, ptr %p, i32 10147 store volatile double %b, ptr %1, align 848 %2 = getelementptr inbounds double, ptr %p, i32 10249 store volatile double %b, ptr %2, align 850 ret void51 }52 53 define void @load_large_offset_double(i32 %a, i32 %b, i32 %c, i32 %d, ptr %p) #0 {54 entry:55 %arrayidx = getelementptr inbounds { [102 x double], i32 }, ptr %p, i32 0, i32 0, i32 10056 %0 = load double, ptr %arrayidx, align 857 %arrayidx1 = getelementptr inbounds { [102 x double], i32 }, ptr %p, i32 0, i32 0, i32 10158 %1 = load double, ptr %arrayidx1, align 859 %arrayidx2 = getelementptr inbounds { [102 x double], i32 }, ptr %p, i32 0, i32 160 %2 = load i32, ptr %arrayidx2, align 861 tail call void @load_large_offset_double_1(double %0, double %1, i32 %2)62 ret void63 }64 65 declare void @load_large_offset_double_1(double, double) #066 67 define void @store_common_value_double_no_opt(ptr %a, i32 %b, double %c, double %d, double %e) #0 {68 entry:69 store double %e, ptr %a, align 870 ret void71 }72 73 define void @store_common_value_double_no_opt2(ptr %a, i32 %b, double %c, double %d, double %e) #0 {74 entry:75 store volatile double %e, ptr %a, align 876 store volatile double %e, ptr %a, align 877 ret void78 }79 80 define void @store_common_ptr_double_no_opt(double %a, i32 %b, i32 %c, i32 %d, i32 %e, ptr %p) #0 {81 entry:82 store volatile double %a, ptr %p, align 883 ret void84 }85 86 define double @load_common_ptr_double_no_opt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, ptr %g) #0 {87 entry:88 %0 = load double, ptr %g, align 889 ret double %090 }91 92 define void @store_large_offset_double_no_opt(ptr %p, double %a, double %b) #0 {93 entry:94 %0 = getelementptr inbounds double, ptr %p, i32 10095 store volatile double %a, ptr %0, align 896 %1 = getelementptr inbounds double, ptr %p, i32 10197 store volatile double %b, ptr %1, align 898 ret void99 }100 101 define { double, double } @load_large_offset_double_no_opt(ptr %p) #0 {102 entry:103 %arrayidx = getelementptr inbounds double, ptr %p, i32 100104 %0 = load double, ptr %arrayidx, align 8105 %arrayidx1 = getelementptr inbounds double, ptr %p, i32 101106 %1 = load double, ptr %arrayidx1, align 8107 %2 = insertvalue { double, double } undef, double %0, 0108 %3 = insertvalue { double, double } %2, double %1, 1109 ret { double, double } %3110 }111 112 attributes #0 = { minsize "target-features"="+zilsd,+zdinx" }113...114---115name: store_common_value_double116tracksRegLiveness: true117body: |118 bb.0.entry:119 liveins: $x10, $x11, $x12, $x16, $x17120 121 ; RV32-LABEL: name: store_common_value_double122 ; RV32: liveins: $x10, $x11, $x12, $x16, $x17123 ; RV32-NEXT: {{ $}}124 ; RV32-NEXT: $x14_x15 = FSGNJ_D_IN32X $x16_x17, $x16_x17125 ; RV32-NEXT: SD_RV32 $x14_x15, killed renamable $x10, 0 :: (store (s64) into %ir.a)126 ; RV32-NEXT: SD_RV32 $x14_x15, killed renamable $x11, 0 :: (store (s64) into %ir.b)127 ; RV32-NEXT: SD_RV32 killed $x14_x15, killed renamable $x12, 0 :: (store (s64) into %ir.c)128 ; RV32-NEXT: PseudoRET129 SD_RV32 renamable $x16_x17, killed renamable $x10, 0 :: (store (s64) into %ir.a)130 SD_RV32 renamable $x16_x17, killed renamable $x11, 0 :: (store (s64) into %ir.b)131 SD_RV32 killed renamable $x16_x17, killed renamable $x12, 0 :: (store (s64) into %ir.c)132 PseudoRET133 134...135---136name: store_common_value_double_zero137tracksRegLiveness: true138body: |139 bb.0.entry:140 liveins: $x10, $x11, $x12141 142 ; RV32-LABEL: name: store_common_value_double_zero143 ; RV32: liveins: $x10, $x11, $x12144 ; RV32-NEXT: {{ $}}145 ; RV32-NEXT: $x14_x15 = FSGNJ_D_IN32X $x0_pair, $x0_pair146 ; RV32-NEXT: SD_RV32 $x14_x15, killed renamable $x10, 0 :: (store (s64) into %ir.a)147 ; RV32-NEXT: SD_RV32 $x14_x15, killed renamable $x11, 0 :: (store (s64) into %ir.b)148 ; RV32-NEXT: SD_RV32 $x14_x15, killed renamable $x12, 0 :: (store (s64) into %ir.c)149 ; RV32-NEXT: PseudoRET150 SD_RV32 $x0_pair, killed renamable $x10, 0 :: (store (s64) into %ir.a)151 SD_RV32 $x0_pair, killed renamable $x11, 0 :: (store (s64) into %ir.b)152 SD_RV32 $x0_pair, killed renamable $x12, 0 :: (store (s64) into %ir.c)153 PseudoRET154 155...156---157name: store_common_ptr_double158tracksRegLiveness: true159body: |160 bb.0.entry:161 liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16162 163 ; RV32-LABEL: name: store_common_ptr_double164 ; RV32: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16165 ; RV32-NEXT: {{ $}}166 ; RV32-NEXT: $x14 = ADDI $x16, 0167 ; RV32-NEXT: SD_RV32 killed renamable $x10_x11, $x14, 0 :: (volatile store (s64) into %ir.p)168 ; RV32-NEXT: SD_RV32 renamable $x12_x13, $x14, 0 :: (volatile store (s64) into %ir.p)169 ; RV32-NEXT: SD_RV32 killed renamable $x12_x13, killed $x14, 0 :: (volatile store (s64) into %ir.p)170 ; RV32-NEXT: PseudoRET171 SD_RV32 killed renamable $x10_x11, renamable $x16, 0 :: (volatile store (s64) into %ir.p)172 SD_RV32 renamable $x12_x13, renamable $x16, 0 :: (volatile store (s64) into %ir.p)173 SD_RV32 killed renamable $x12_x13, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)174 PseudoRET175 176...177---178name: load_common_ptr_double179tracksRegLiveness: true180body: |181 bb.0.entry:182 liveins: $x16183 184 ; RV32-LABEL: name: load_common_ptr_double185 ; RV32: liveins: $x16186 ; RV32-NEXT: {{ $}}187 ; RV32-NEXT: $x15 = ADDI $x16, 0188 ; RV32-NEXT: renamable $x10_x11 = LD_RV32 $x15, 0 :: (load (s64) from %ir.g)189 ; RV32-NEXT: renamable $x12_x13 = LD_RV32 $x15, 8 :: (load (s64) from %ir.arrayidx1)190 ; RV32-NEXT: renamable $x14 = LW killed $x15, 16 :: (load (s32) from %ir.arrayidx2, align 8)191 ; RV32-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, csr_ilp32_lp64, implicit $x2, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14192 renamable $x10_x11 = LD_RV32 renamable $x16, 0 :: (load (s64) from %ir.g)193 renamable $x12_x13 = LD_RV32 renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)194 renamable $x14 = LW killed renamable $x16, 16 :: (load (s32) from %ir.arrayidx2, align 8)195 PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, csr_ilp32_lp64, implicit $x2, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14196 197...198---199name: store_large_offset_double200tracksRegLiveness: true201body: |202 bb.0.entry:203 liveins: $x10, $x12, $x13, $x14, $x15204 205 ; RV32-LABEL: name: store_large_offset_double206 ; RV32: liveins: $x10, $x12, $x13, $x14, $x15207 ; RV32-NEXT: {{ $}}208 ; RV32-NEXT: $x11 = ADDI $x10, 768209 ; RV32-NEXT: SD_RV32 killed renamable $x12_x13, $x11, 32 :: (volatile store (s64) into %ir.0)210 ; RV32-NEXT: SD_RV32 renamable $x14_x15, $x11, 40 :: (volatile store (s64) into %ir.1)211 ; RV32-NEXT: SD_RV32 killed renamable $x14_x15, killed $x11, 48 :: (volatile store (s64) into %ir.2)212 ; RV32-NEXT: PseudoRET213 SD_RV32 killed renamable $x12_x13, renamable $x10, 800 :: (volatile store (s64) into %ir.0)214 SD_RV32 renamable $x14_x15, renamable $x10, 808 :: (volatile store (s64) into %ir.1)215 SD_RV32 killed renamable $x14_x15, killed renamable $x10, 816 :: (volatile store (s64) into %ir.2)216 PseudoRET217 218...219---220name: load_large_offset_double221tracksRegLiveness: true222body: |223 bb.0.entry:224 liveins: $x14225 226 ; RV32-LABEL: name: load_large_offset_double227 ; RV32: liveins: $x14228 ; RV32-NEXT: {{ $}}229 ; RV32-NEXT: $x15 = ADDI $x14, 768230 ; RV32-NEXT: renamable $x10_x11 = LD_RV32 $x15, 32 :: (load (s64) from %ir.arrayidx)231 ; RV32-NEXT: renamable $x12_x13 = LD_RV32 $x15, 40 :: (load (s64) from %ir.arrayidx1)232 ; RV32-NEXT: renamable $x14 = LW killed $x15, 48 :: (load (s32) from %ir.arrayidx2, align 8)233 ; RV32-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, csr_ilp32_lp64, implicit $x2, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14234 renamable $x10_x11 = LD_RV32 renamable $x14, 800 :: (load (s64) from %ir.arrayidx)235 renamable $x12_x13 = LD_RV32 renamable $x14, 808 :: (load (s64) from %ir.arrayidx1)236 renamable $x14 = LW killed renamable $x14, 816 :: (load (s32) from %ir.arrayidx2, align 8)237 PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, csr_ilp32_lp64, implicit $x2, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14238...239---240name: store_common_value_double_no_opt241tracksRegLiveness: true242body: |243 bb.0.entry:244 liveins: $x10, $x16, $x17245 246 ; RV32-LABEL: name: store_common_value_double_no_opt247 ; RV32: liveins: $x10, $x16, $x17248 ; RV32-NEXT: {{ $}}249 ; RV32-NEXT: SD_RV32 killed renamable $x16_x17, killed renamable $x10, 0 :: (store (s64) into %ir.a)250 ; RV32-NEXT: PseudoRET251 SD_RV32 killed renamable $x16_x17, killed renamable $x10, 0 :: (store (s64) into %ir.a)252 PseudoRET253 254...255---256name: store_common_value_double_no_opt2257tracksRegLiveness: true258body: |259 bb.0.entry:260 liveins: $x10, $x16, $x17261 262 ; RV32-LABEL: name: store_common_value_double_no_opt2263 ; RV32: liveins: $x10, $x16, $x17264 ; RV32-NEXT: {{ $}}265 ; RV32-NEXT: SD_RV32 renamable $x16_x17, renamable $x10, 0 :: (volatile store (s64) into %ir.a)266 ; RV32-NEXT: SD_RV32 killed renamable $x16_x17, killed renamable $x10, 0 :: (volatile store (s64) into %ir.a)267 ; RV32-NEXT: PseudoRET268 SD_RV32 renamable $x16_x17, renamable $x10, 0 :: (volatile store (s64) into %ir.a)269 SD_RV32 killed renamable $x16_x17, killed renamable $x10, 0 :: (volatile store (s64) into %ir.a)270 PseudoRET271 272...273---274name: store_common_ptr_double_no_opt275tracksRegLiveness: true276body: |277 bb.0.entry:278 liveins: $x10, $x11, $x16279 280 ; RV32-LABEL: name: store_common_ptr_double_no_opt281 ; RV32: liveins: $x10, $x11, $x16282 ; RV32-NEXT: {{ $}}283 ; RV32-NEXT: SD_RV32 killed renamable $x10_x11, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)284 ; RV32-NEXT: PseudoRET285 SD_RV32 killed renamable $x10_x11, killed renamable $x16, 0 :: (volatile store (s64) into %ir.p)286 PseudoRET287 288...289---290name: load_common_ptr_double_no_opt291tracksRegLiveness: true292body: |293 bb.0.entry:294 liveins: $x16295 296 ; RV32-LABEL: name: load_common_ptr_double_no_opt297 ; RV32: liveins: $x16298 ; RV32-NEXT: {{ $}}299 ; RV32-NEXT: renamable $x10_x11 = LD_RV32 killed renamable $x16, 0 :: (load (s64) from %ir.g)300 ; RV32-NEXT: PseudoRET implicit $x10, implicit $x11301 renamable $x10_x11 = LD_RV32 killed renamable $x16, 0 :: (load (s64) from %ir.g)302 PseudoRET implicit $x10, implicit $x11303 304...305---306name: store_large_offset_double_no_opt307tracksRegLiveness: true308body: |309 bb.0.entry:310 liveins: $x10, $x11, $x12, $x13, $x14311 312 ; RV32-LABEL: name: store_large_offset_double_no_opt313 ; RV32: liveins: $x10, $x11, $x12, $x13, $x14314 ; RV32-NEXT: {{ $}}315 ; RV32-NEXT: $x15 = ADDI $x14, 0316 ; RV32-NEXT: $x17 = ADDI $x12, 0317 ; RV32-NEXT: $x16 = ADDI $x11, 0318 ; RV32-NEXT: SD_RV32 killed renamable $x16_x17, renamable $x10, 800 :: (volatile store (s64) into %ir.0)319 ; RV32-NEXT: $x14 = ADDI $x13, 0320 ; RV32-NEXT: SD_RV32 killed renamable $x14_x15, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)321 ; RV32-NEXT: PseudoRET322 $x15 = ADDI $x14, 0323 $x17 = ADDI $x12, 0324 $x16 = ADDI $x11, 0325 SD_RV32 killed renamable $x16_x17, renamable $x10, 800 :: (volatile store (s64) into %ir.0)326 $x14 = ADDI $x13, 0327 SD_RV32 killed renamable $x14_x15, killed renamable $x10, 808 :: (volatile store (s64) into %ir.1)328 PseudoRET329 330...331---332name: load_large_offset_double_no_opt333tracksRegLiveness: true334body: |335 bb.0.entry:336 liveins: $x10337 338 ; RV32-LABEL: name: load_large_offset_double_no_opt339 ; RV32: liveins: $x10340 ; RV32-NEXT: {{ $}}341 ; RV32-NEXT: renamable $x14_x15 = LD_RV32 renamable $x10, 800 :: (load (s64) from %ir.arrayidx)342 ; RV32-NEXT: renamable $x12_x13 = LD_RV32 killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)343 ; RV32-NEXT: $x10 = ADDI renamable $x14, 0344 ; RV32-NEXT: $x11 = ADDI killed renamable $x15, 0345 ; RV32-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12, implicit $x13346 renamable $x14_x15 = LD_RV32 renamable $x10, 800 :: (load (s64) from %ir.arrayidx)347 renamable $x12_x13 = LD_RV32 killed renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)348 $x10 = ADDI renamable $x14, 0349 $x11 = ADDI killed renamable $x15, 0350 PseudoRET implicit $x10, implicit $x11, implicit $x12, implicit $x13351 352...353