366 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV32I4 5; Check indexed and unindexed, sext, zext and anyext loads6 7define dso_local i32 @lb(ptr %a) nounwind {8; RV32I-LABEL: lb:9; RV32I: # %bb.0:10; RV32I-NEXT: lb a1, 1(a0)11; RV32I-NEXT: lbu zero, 0(a0)12; RV32I-NEXT: mv a0, a113; RV32I-NEXT: ret14 %1 = getelementptr i8, ptr %a, i32 115 %2 = load i8, ptr %116 %3 = sext i8 %2 to i3217 ; the unused load will produce an anyext for selection18 %4 = load volatile i8, ptr %a19 ret i32 %320}21 22define dso_local i32 @lh(ptr %a) nounwind {23; RV32I-LABEL: lh:24; RV32I: # %bb.0:25; RV32I-NEXT: lh a1, 4(a0)26; RV32I-NEXT: lh zero, 0(a0)27; RV32I-NEXT: mv a0, a128; RV32I-NEXT: ret29 %1 = getelementptr i16, ptr %a, i32 230 %2 = load i16, ptr %131 %3 = sext i16 %2 to i3232 ; the unused load will produce an anyext for selection33 %4 = load volatile i16, ptr %a34 ret i32 %335}36 37define dso_local i32 @lw(ptr %a) nounwind {38; RV32I-LABEL: lw:39; RV32I: # %bb.0:40; RV32I-NEXT: lw a1, 12(a0)41; RV32I-NEXT: lw zero, 0(a0)42; RV32I-NEXT: mv a0, a143; RV32I-NEXT: ret44 %1 = getelementptr i32, ptr %a, i32 345 %2 = load i32, ptr %146 %3 = load volatile i32, ptr %a47 ret i32 %248}49 50define dso_local i32 @lbu(ptr %a) nounwind {51; RV32I-LABEL: lbu:52; RV32I: # %bb.0:53; RV32I-NEXT: lbu a1, 4(a0)54; RV32I-NEXT: lbu a0, 0(a0)55; RV32I-NEXT: add a0, a1, a056; RV32I-NEXT: ret57 %1 = getelementptr i8, ptr %a, i32 458 %2 = load i8, ptr %159 %3 = zext i8 %2 to i3260 %4 = load volatile i8, ptr %a61 %5 = zext i8 %4 to i3262 %6 = add i32 %3, %563 ret i32 %664}65 66define dso_local i32 @lhu(ptr %a) nounwind {67; RV32I-LABEL: lhu:68; RV32I: # %bb.0:69; RV32I-NEXT: lhu a1, 10(a0)70; RV32I-NEXT: lhu a0, 0(a0)71; RV32I-NEXT: add a0, a1, a072; RV32I-NEXT: ret73 %1 = getelementptr i16, ptr %a, i32 574 %2 = load i16, ptr %175 %3 = zext i16 %2 to i3276 %4 = load volatile i16, ptr %a77 %5 = zext i16 %4 to i3278 %6 = add i32 %3, %579 ret i32 %680}81 82; Check indexed and unindexed stores83 84define dso_local void @sb(ptr %a, i8 %b) nounwind {85; RV32I-LABEL: sb:86; RV32I: # %bb.0:87; RV32I-NEXT: sb a1, 0(a0)88; RV32I-NEXT: sb a1, 6(a0)89; RV32I-NEXT: ret90 store i8 %b, ptr %a91 %1 = getelementptr i8, ptr %a, i32 692 store i8 %b, ptr %193 ret void94}95 96define dso_local void @sh(ptr %a, i16 %b) nounwind {97; RV32I-LABEL: sh:98; RV32I: # %bb.0:99; RV32I-NEXT: sh a1, 0(a0)100; RV32I-NEXT: sh a1, 14(a0)101; RV32I-NEXT: ret102 store i16 %b, ptr %a103 %1 = getelementptr i16, ptr %a, i32 7104 store i16 %b, ptr %1105 ret void106}107 108define dso_local void @sw(ptr %a, i32 %b) nounwind {109; RV32I-LABEL: sw:110; RV32I: # %bb.0:111; RV32I-NEXT: sw a1, 0(a0)112; RV32I-NEXT: sw a1, 32(a0)113; RV32I-NEXT: ret114 store i32 %b, ptr %a115 %1 = getelementptr i32, ptr %a, i32 8116 store i32 %b, ptr %1117 ret void118}119 120; Check load and store to an i1 location121define dso_local i32 @load_sext_zext_anyext_i1(ptr %a) nounwind {122; RV32I-LABEL: load_sext_zext_anyext_i1:123; RV32I: # %bb.0:124; RV32I-NEXT: lbu a1, 1(a0)125; RV32I-NEXT: lbu a2, 2(a0)126; RV32I-NEXT: lbu zero, 0(a0)127; RV32I-NEXT: sub a0, a2, a1128; RV32I-NEXT: ret129 ; sextload i1130 %1 = getelementptr i1, ptr %a, i32 1131 %2 = load i1, ptr %1132 %3 = sext i1 %2 to i32133 ; zextload i1134 %4 = getelementptr i1, ptr %a, i32 2135 %5 = load i1, ptr %4136 %6 = zext i1 %5 to i32137 %7 = add i32 %3, %6138 ; extload i1 (anyext). Produced as the load is unused.139 %8 = load volatile i1, ptr %a140 ret i32 %7141}142 143define dso_local i16 @load_sext_zext_anyext_i1_i16(ptr %a) nounwind {144; RV32I-LABEL: load_sext_zext_anyext_i1_i16:145; RV32I: # %bb.0:146; RV32I-NEXT: lbu a1, 1(a0)147; RV32I-NEXT: lbu a2, 2(a0)148; RV32I-NEXT: lbu zero, 0(a0)149; RV32I-NEXT: sub a0, a2, a1150; RV32I-NEXT: ret151 ; sextload i1152 %1 = getelementptr i1, ptr %a, i32 1153 %2 = load i1, ptr %1154 %3 = sext i1 %2 to i16155 ; zextload i1156 %4 = getelementptr i1, ptr %a, i32 2157 %5 = load i1, ptr %4158 %6 = zext i1 %5 to i16159 %7 = add i16 %3, %6160 ; extload i1 (anyext). Produced as the load is unused.161 %8 = load volatile i1, ptr %a162 ret i16 %7163}164 165; Check load and store to a global166@G = dso_local global i32 0167 168define dso_local i32 @lw_sw_global(i32 %a) nounwind {169; RV32I-LABEL: lw_sw_global:170; RV32I: # %bb.0:171; RV32I-NEXT: lui a2, %hi(G)172; RV32I-NEXT: addi a2, a2, %lo(G)173; RV32I-NEXT: lw a1, 0(a2)174; RV32I-NEXT: sw a0, 0(a2)175; RV32I-NEXT: lw zero, 36(a2)176; RV32I-NEXT: sw a0, 36(a2)177; RV32I-NEXT: mv a0, a1178; RV32I-NEXT: ret179 %1 = load volatile i32, ptr @G180 store i32 %a, ptr @G181 %2 = getelementptr i32, ptr @G, i32 9182 %3 = load volatile i32, ptr %2183 store i32 %a, ptr %2184 ret i32 %1185}186 187; Ensure that 1 is added to the high 20 bits if bit 11 of the low part is 1188define dso_local i32 @lw_sw_constant(i32 %a) nounwind {189; RV32I-LABEL: lw_sw_constant:190; RV32I: # %bb.0:191; RV32I-NEXT: lui a2, 912092192; RV32I-NEXT: lw a1, -273(a2)193; RV32I-NEXT: sw a0, -273(a2)194; RV32I-NEXT: mv a0, a1195; RV32I-NEXT: ret196 %1 = inttoptr i32 3735928559 to ptr197 %2 = load volatile i32, ptr %1198 store i32 %a, ptr %1199 ret i32 %2200}201 202define i32 @lw_near_local(ptr %a) {203; RV32I-LABEL: lw_near_local:204; RV32I: # %bb.0:205; RV32I-NEXT: addi a0, a0, 2047206; RV32I-NEXT: lw a0, 5(a0)207; RV32I-NEXT: ret208 %1 = getelementptr inbounds i32, ptr %a, i64 513209 %2 = load volatile i32, ptr %1210 ret i32 %2211}212 213define void @st_near_local(ptr %a, i32 %b) {214; RV32I-LABEL: st_near_local:215; RV32I: # %bb.0:216; RV32I-NEXT: addi a0, a0, 2047217; RV32I-NEXT: sw a1, 5(a0)218; RV32I-NEXT: ret219 %1 = getelementptr inbounds i32, ptr %a, i64 513220 store i32 %b, ptr %1221 ret void222}223 224define i32 @lw_sw_near_local(ptr %a, i32 %b) {225; RV32I-LABEL: lw_sw_near_local:226; RV32I: # %bb.0:227; RV32I-NEXT: addi a2, a0, 2047228; RV32I-NEXT: lw a0, 5(a2)229; RV32I-NEXT: sw a1, 5(a2)230; RV32I-NEXT: ret231 %1 = getelementptr inbounds i32, ptr %a, i64 513232 %2 = load volatile i32, ptr %1233 store i32 %b, ptr %1234 ret i32 %2235}236 237define i32 @lw_far_local(ptr %a) {238; RV32I-LABEL: lw_far_local:239; RV32I: # %bb.0:240; RV32I-NEXT: lui a1, 4241; RV32I-NEXT: add a0, a0, a1242; RV32I-NEXT: lw a0, -4(a0)243; RV32I-NEXT: ret244 %1 = getelementptr inbounds i32, ptr %a, i64 4095245 %2 = load volatile i32, ptr %1246 ret i32 %2247}248 249define void @st_far_local(ptr %a, i32 %b) {250; RV32I-LABEL: st_far_local:251; RV32I: # %bb.0:252; RV32I-NEXT: lui a2, 4253; RV32I-NEXT: add a0, a0, a2254; RV32I-NEXT: sw a1, -4(a0)255; RV32I-NEXT: ret256 %1 = getelementptr inbounds i32, ptr %a, i64 4095257 store i32 %b, ptr %1258 ret void259}260 261define i32 @lw_sw_far_local(ptr %a, i32 %b) {262; RV32I-LABEL: lw_sw_far_local:263; RV32I: # %bb.0:264; RV32I-NEXT: lui a2, 4265; RV32I-NEXT: add a2, a0, a2266; RV32I-NEXT: lw a0, -4(a2)267; RV32I-NEXT: sw a1, -4(a2)268; RV32I-NEXT: ret269 %1 = getelementptr inbounds i32, ptr %a, i64 4095270 %2 = load volatile i32, ptr %1271 store i32 %b, ptr %1272 ret i32 %2273}274 275define i32 @lw_really_far_local(ptr %a) {276; RV32I-LABEL: lw_really_far_local:277; RV32I: # %bb.0:278; RV32I-NEXT: lui a1, 524288279; RV32I-NEXT: add a0, a0, a1280; RV32I-NEXT: lw a0, -2048(a0)281; RV32I-NEXT: ret282 %1 = getelementptr inbounds i32, ptr %a, i32 536870400283 %2 = load volatile i32, ptr %1284 ret i32 %2285}286 287define void @st_really_far_local(ptr %a, i32 %b) {288; RV32I-LABEL: st_really_far_local:289; RV32I: # %bb.0:290; RV32I-NEXT: lui a2, 524288291; RV32I-NEXT: add a0, a0, a2292; RV32I-NEXT: sw a1, -2048(a0)293; RV32I-NEXT: ret294 %1 = getelementptr inbounds i32, ptr %a, i32 536870400295 store i32 %b, ptr %1296 ret void297}298 299define i32 @lw_sw_really_far_local(ptr %a, i32 %b) {300; RV32I-LABEL: lw_sw_really_far_local:301; RV32I: # %bb.0:302; RV32I-NEXT: lui a2, 524288303; RV32I-NEXT: add a2, a0, a2304; RV32I-NEXT: lw a0, -2048(a2)305; RV32I-NEXT: sw a1, -2048(a2)306; RV32I-NEXT: ret307 %1 = getelementptr inbounds i32, ptr %a, i32 536870400308 %2 = load volatile i32, ptr %1309 store i32 %b, ptr %1310 ret i32 %2311}312 313%struct.quux = type { i32, [0 x i8] }314 315; Make sure we don't remove the addi and fold the C from316; (add (addi FrameIndex, C), X) into the store address.317; FrameIndex cannot be the operand of an ADD. We must keep the ADDI.318define void @addi_fold_crash(i32 %arg) nounwind {319; RV32I-LABEL: addi_fold_crash:320; RV32I: # %bb.0: # %bb321; RV32I-NEXT: addi sp, sp, -16322; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill323; RV32I-NEXT: addi a1, sp, 12324; RV32I-NEXT: add a0, a1, a0325; RV32I-NEXT: sb zero, 0(a0)326; RV32I-NEXT: mv a0, a1327; RV32I-NEXT: call snork328; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload329; RV32I-NEXT: addi sp, sp, 16330; RV32I-NEXT: ret331bb:332 %tmp = alloca %struct.quux, align 4333 %tmp1 = getelementptr inbounds %struct.quux, ptr %tmp, i32 0, i32 1334 %tmp2 = getelementptr inbounds %struct.quux, ptr %tmp, i32 0, i32 1, i32 %arg335 store i8 0, ptr %tmp2, align 1336 call void @snork(ptr %tmp1)337 ret void338}339 340declare void @snork(ptr)341 342define i8 @disjoint_or_lb(ptr %a, i32 %off) nounwind {343; RV32I-LABEL: disjoint_or_lb:344; RV32I: # %bb.0:345; RV32I-NEXT: add a0, a0, a1346; RV32I-NEXT: lbu a0, 3(a0)347; RV32I-NEXT: ret348 %b = or disjoint i32 %off, 3349 %1 = getelementptr i8, ptr %a, i32 %b350 %2 = load i8, ptr %1351 ret i8 %2352}353 354define i32 @disjoint_or_lw(ptr %a, i32 %off) nounwind {355; RV32I-LABEL: disjoint_or_lw:356; RV32I: # %bb.0:357; RV32I-NEXT: slli a1, a1, 2358; RV32I-NEXT: add a0, a0, a1359; RV32I-NEXT: lw a0, 12(a0)360; RV32I-NEXT: ret361 %b = or disjoint i32 %off, 3362 %1 = getelementptr i32, ptr %a, i32 %b363 %2 = load i32, ptr %1364 ret i32 %2365}366