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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV64I %s4 5; Check indexed and unindexed, sext, zext and anyext loads6 7define dso_local i64 @lb(ptr %a) nounwind {8; RV64I-LABEL: lb:9; RV64I: # %bb.0:10; RV64I-NEXT: lb a1, 1(a0)11; RV64I-NEXT: lbu zero, 0(a0)12; RV64I-NEXT: mv a0, a113; RV64I-NEXT: ret14 %1 = getelementptr i8, ptr %a, i32 115 %2 = load i8, ptr %116 %3 = sext i8 %2 to i6417 ; the unused load will produce an anyext for selection18 %4 = load volatile i8, ptr %a19 ret i64 %320}21 22define dso_local i64 @lh(ptr %a) nounwind {23; RV64I-LABEL: lh:24; RV64I: # %bb.0:25; RV64I-NEXT: lh a1, 4(a0)26; RV64I-NEXT: lh zero, 0(a0)27; RV64I-NEXT: mv a0, a128; RV64I-NEXT: ret29 %1 = getelementptr i16, ptr %a, i32 230 %2 = load i16, ptr %131 %3 = sext i16 %2 to i6432 ; the unused load will produce an anyext for selection33 %4 = load volatile i16, ptr %a34 ret i64 %335}36 37define dso_local i64 @lw(ptr %a) nounwind {38; RV64I-LABEL: lw:39; RV64I: # %bb.0:40; RV64I-NEXT: lw a1, 12(a0)41; RV64I-NEXT: lw zero, 0(a0)42; RV64I-NEXT: mv a0, a143; RV64I-NEXT: ret44 %1 = getelementptr i32, ptr %a, i32 345 %2 = load i32, ptr %146 %3 = sext i32 %2 to i6447 ; the unused load will produce an anyext for selection48 %4 = load volatile i32, ptr %a49 ret i64 %350}51 52define dso_local i64 @lbu(ptr %a) nounwind {53; RV64I-LABEL: lbu:54; RV64I: # %bb.0:55; RV64I-NEXT: lbu a1, 4(a0)56; RV64I-NEXT: lbu a0, 0(a0)57; RV64I-NEXT: add a0, a1, a058; RV64I-NEXT: ret59 %1 = getelementptr i8, ptr %a, i32 460 %2 = load i8, ptr %161 %3 = zext i8 %2 to i6462 %4 = load volatile i8, ptr %a63 %5 = zext i8 %4 to i6464 %6 = add i64 %3, %565 ret i64 %666}67 68define dso_local i64 @lhu(ptr %a) nounwind {69; RV64I-LABEL: lhu:70; RV64I: # %bb.0:71; RV64I-NEXT: lhu a1, 10(a0)72; RV64I-NEXT: lhu a0, 0(a0)73; RV64I-NEXT: add a0, a1, a074; RV64I-NEXT: ret75 %1 = getelementptr i16, ptr %a, i32 576 %2 = load i16, ptr %177 %3 = zext i16 %2 to i6478 %4 = load volatile i16, ptr %a79 %5 = zext i16 %4 to i6480 %6 = add i64 %3, %581 ret i64 %682}83 84define dso_local i64 @lwu(ptr %a) nounwind {85; RV64I-LABEL: lwu:86; RV64I: # %bb.0:87; RV64I-NEXT: lwu a1, 24(a0)88; RV64I-NEXT: lwu a0, 0(a0)89; RV64I-NEXT: add a0, a1, a090; RV64I-NEXT: ret91 %1 = getelementptr i32, ptr %a, i32 692 %2 = load i32, ptr %193 %3 = zext i32 %2 to i6494 %4 = load volatile i32, ptr %a95 %5 = zext i32 %4 to i6496 %6 = add i64 %3, %597 ret i64 %698}99 100; Check indexed and unindexed stores101 102define dso_local void @sb(ptr %a, i8 %b) nounwind {103; RV64I-LABEL: sb:104; RV64I: # %bb.0:105; RV64I-NEXT: sb a1, 0(a0)106; RV64I-NEXT: sb a1, 7(a0)107; RV64I-NEXT: ret108 store i8 %b, ptr %a109 %1 = getelementptr i8, ptr %a, i32 7110 store i8 %b, ptr %1111 ret void112}113 114define dso_local void @sh(ptr %a, i16 %b) nounwind {115; RV64I-LABEL: sh:116; RV64I: # %bb.0:117; RV64I-NEXT: sh a1, 0(a0)118; RV64I-NEXT: sh a1, 16(a0)119; RV64I-NEXT: ret120 store i16 %b, ptr %a121 %1 = getelementptr i16, ptr %a, i32 8122 store i16 %b, ptr %1123 ret void124}125 126define dso_local void @sw(ptr %a, i32 %b) nounwind {127; RV64I-LABEL: sw:128; RV64I: # %bb.0:129; RV64I-NEXT: sw a1, 0(a0)130; RV64I-NEXT: sw a1, 36(a0)131; RV64I-NEXT: ret132 store i32 %b, ptr %a133 %1 = getelementptr i32, ptr %a, i32 9134 store i32 %b, ptr %1135 ret void136}137 138; 64-bit loads and stores139 140define dso_local i64 @ld(ptr %a) nounwind {141; RV64I-LABEL: ld:142; RV64I: # %bb.0:143; RV64I-NEXT: ld a1, 80(a0)144; RV64I-NEXT: ld zero, 0(a0)145; RV64I-NEXT: mv a0, a1146; RV64I-NEXT: ret147 %1 = getelementptr i64, ptr %a, i32 10148 %2 = load i64, ptr %1149 %3 = load volatile i64, ptr %a150 ret i64 %2151}152 153define dso_local void @sd(ptr %a, i64 %b) nounwind {154; RV64I-LABEL: sd:155; RV64I: # %bb.0:156; RV64I-NEXT: sd a1, 0(a0)157; RV64I-NEXT: sd a1, 88(a0)158; RV64I-NEXT: ret159 store i64 %b, ptr %a160 %1 = getelementptr i64, ptr %a, i32 11161 store i64 %b, ptr %1162 ret void163}164 165; Check load and store to an i1 location166define dso_local i64 @load_sext_zext_anyext_i1(ptr %a) nounwind {167; RV64I-LABEL: load_sext_zext_anyext_i1:168; RV64I: # %bb.0:169; RV64I-NEXT: lbu a1, 1(a0)170; RV64I-NEXT: lbu a2, 2(a0)171; RV64I-NEXT: lbu zero, 0(a0)172; RV64I-NEXT: sub a0, a2, a1173; RV64I-NEXT: ret174 ; sextload i1175 %1 = getelementptr i1, ptr %a, i32 1176 %2 = load i1, ptr %1177 %3 = sext i1 %2 to i64178 ; zextload i1179 %4 = getelementptr i1, ptr %a, i32 2180 %5 = load i1, ptr %4181 %6 = zext i1 %5 to i64182 %7 = add i64 %3, %6183 ; extload i1 (anyext). Produced as the load is unused.184 %8 = load volatile i1, ptr %a185 ret i64 %7186}187 188define dso_local i16 @load_sext_zext_anyext_i1_i16(ptr %a) nounwind {189; RV64I-LABEL: load_sext_zext_anyext_i1_i16:190; RV64I: # %bb.0:191; RV64I-NEXT: lbu a1, 1(a0)192; RV64I-NEXT: lbu a2, 2(a0)193; RV64I-NEXT: lbu zero, 0(a0)194; RV64I-NEXT: sub a0, a2, a1195; RV64I-NEXT: ret196 ; sextload i1197 %1 = getelementptr i1, ptr %a, i32 1198 %2 = load i1, ptr %1199 %3 = sext i1 %2 to i16200 ; zextload i1201 %4 = getelementptr i1, ptr %a, i32 2202 %5 = load i1, ptr %4203 %6 = zext i1 %5 to i16204 %7 = add i16 %3, %6205 ; extload i1 (anyext). Produced as the load is unused.206 %8 = load volatile i1, ptr %a207 ret i16 %7208}209 210; Check load and store to a global211@G = dso_local global i64 0212 213define dso_local i64 @ld_sd_global(i64 %a) nounwind {214; RV64I-LABEL: ld_sd_global:215; RV64I: # %bb.0:216; RV64I-NEXT: lui a2, %hi(G)217; RV64I-NEXT: addi a2, a2, %lo(G)218; RV64I-NEXT: ld a1, 0(a2)219; RV64I-NEXT: sd a0, 0(a2)220; RV64I-NEXT: ld zero, 72(a2)221; RV64I-NEXT: sd a0, 72(a2)222; RV64I-NEXT: mv a0, a1223; RV64I-NEXT: ret224 %1 = load volatile i64, ptr @G225 store i64 %a, ptr @G226 %2 = getelementptr i64, ptr @G, i64 9227 %3 = load volatile i64, ptr %2228 store i64 %a, ptr %2229 ret i64 %1230}231 232define i64 @lw_near_local(ptr %a) {233; RV64I-LABEL: lw_near_local:234; RV64I: # %bb.0:235; RV64I-NEXT: addi a0, a0, 2047236; RV64I-NEXT: ld a0, 9(a0)237; RV64I-NEXT: ret238 %1 = getelementptr inbounds i64, ptr %a, i64 257239 %2 = load volatile i64, ptr %1240 ret i64 %2241}242 243define void @st_near_local(ptr %a, i64 %b) {244; RV64I-LABEL: st_near_local:245; RV64I: # %bb.0:246; RV64I-NEXT: addi a0, a0, 2047247; RV64I-NEXT: sd a1, 9(a0)248; RV64I-NEXT: ret249 %1 = getelementptr inbounds i64, ptr %a, i64 257250 store i64 %b, ptr %1251 ret void252}253 254define i64 @lw_sw_near_local(ptr %a, i64 %b) {255; RV64I-LABEL: lw_sw_near_local:256; RV64I: # %bb.0:257; RV64I-NEXT: addi a2, a0, 2047258; RV64I-NEXT: ld a0, 9(a2)259; RV64I-NEXT: sd a1, 9(a2)260; RV64I-NEXT: ret261 %1 = getelementptr inbounds i64, ptr %a, i64 257262 %2 = load volatile i64, ptr %1263 store i64 %b, ptr %1264 ret i64 %2265}266 267define i64 @lw_far_local(ptr %a) {268; RV64I-LABEL: lw_far_local:269; RV64I: # %bb.0:270; RV64I-NEXT: lui a1, 8271; RV64I-NEXT: add a0, a0, a1272; RV64I-NEXT: ld a0, -8(a0)273; RV64I-NEXT: ret274 %1 = getelementptr inbounds i64, ptr %a, i64 4095275 %2 = load volatile i64, ptr %1276 ret i64 %2277}278 279define void @st_far_local(ptr %a, i64 %b) {280; RV64I-LABEL: st_far_local:281; RV64I: # %bb.0:282; RV64I-NEXT: lui a2, 8283; RV64I-NEXT: add a0, a0, a2284; RV64I-NEXT: sd a1, -8(a0)285; RV64I-NEXT: ret286 %1 = getelementptr inbounds i64, ptr %a, i64 4095287 store i64 %b, ptr %1288 ret void289}290 291define i64 @lw_sw_far_local(ptr %a, i64 %b) {292; RV64I-LABEL: lw_sw_far_local:293; RV64I: # %bb.0:294; RV64I-NEXT: lui a2, 8295; RV64I-NEXT: add a2, a0, a2296; RV64I-NEXT: ld a0, -8(a2)297; RV64I-NEXT: sd a1, -8(a2)298; RV64I-NEXT: ret299 %1 = getelementptr inbounds i64, ptr %a, i64 4095300 %2 = load volatile i64, ptr %1301 store i64 %b, ptr %1302 ret i64 %2303}304 305; Make sure we don't fold the addiw into the load offset. The sign extend of the306; addiw is required.307define i64 @lw_really_far_local(ptr %a) {308; RV64I-LABEL: lw_really_far_local:309; RV64I: # %bb.0:310; RV64I-NEXT: lui a1, 524288311; RV64I-NEXT: addiw a1, a1, -2048312; RV64I-NEXT: add a0, a0, a1313; RV64I-NEXT: ld a0, 0(a0)314; RV64I-NEXT: ret315 %1 = getelementptr inbounds i64, ptr %a, i64 268435200316 %2 = load volatile i64, ptr %1317 ret i64 %2318}319 320; Make sure we don't fold the addiw into the store offset. The sign extend of321; the addiw is required.322define void @st_really_far_local(ptr %a, i64 %b) {323; RV64I-LABEL: st_really_far_local:324; RV64I: # %bb.0:325; RV64I-NEXT: lui a2, 524288326; RV64I-NEXT: addiw a2, a2, -2048327; RV64I-NEXT: add a0, a0, a2328; RV64I-NEXT: sd a1, 0(a0)329; RV64I-NEXT: ret330 %1 = getelementptr inbounds i64, ptr %a, i64 268435200331 store i64 %b, ptr %1332 ret void333}334 335; Make sure we don't fold the addiw into the load/store offset. The sign extend336; of the addiw is required.337define i64 @lw_sw_really_far_local(ptr %a, i64 %b) {338; RV64I-LABEL: lw_sw_really_far_local:339; RV64I: # %bb.0:340; RV64I-NEXT: lui a2, 524288341; RV64I-NEXT: addiw a2, a2, -2048342; RV64I-NEXT: add a2, a0, a2343; RV64I-NEXT: ld a0, 0(a2)344; RV64I-NEXT: sd a1, 0(a2)345; RV64I-NEXT: ret346 %1 = getelementptr inbounds i64, ptr %a, i64 268435200347 %2 = load volatile i64, ptr %1348 store i64 %b, ptr %1349 ret i64 %2350}351 352%struct.quux = type { i32, [0 x i8] }353 354; Make sure we don't remove the addi and fold the C from355; (add (addi FrameIndex, C), X) into the store address.356; FrameIndex cannot be the operand of an ADD. We must keep the ADDI.357define void @addi_fold_crash(i64 %arg) nounwind {358; RV64I-LABEL: addi_fold_crash:359; RV64I: # %bb.0: # %bb360; RV64I-NEXT: addi sp, sp, -16361; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill362; RV64I-NEXT: addi a1, sp, 4363; RV64I-NEXT: add a0, a1, a0364; RV64I-NEXT: sb zero, 0(a0)365; RV64I-NEXT: mv a0, a1366; RV64I-NEXT: call snork367; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload368; RV64I-NEXT: addi sp, sp, 16369; RV64I-NEXT: ret370bb:371 %tmp = alloca %struct.quux, align 8372 %tmp1 = getelementptr inbounds %struct.quux, ptr %tmp, i64 0, i32 1373 %tmp2 = getelementptr inbounds %struct.quux, ptr %tmp, i64 0, i32 1, i64 %arg374 store i8 0, ptr %tmp2, align 1375 call void @snork(ptr %tmp1)376 ret void377}378 379declare void @snork(ptr)380