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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=riscv32 -mattr=+m \3; RUN: | FileCheck %s --check-prefixes=RV32-BOTH,RV324; RUN: llc < %s -mtriple=riscv64 -mattr=+m \5; RUN: | FileCheck %s --check-prefixes=RV64-BOTH,RV646; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+unaligned-scalar-mem \7; RUN: | FileCheck %s --check-prefixes=RV32-BOTH,RV32-FAST8; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+unaligned-scalar-mem \9; RUN: | FileCheck %s --check-prefixes=RV64-BOTH,RV64-FAST10 11; TODO: Due to the initial naive lowering implementation of memset.pattern in12; PreISelIntrinsicLowering, the generated code is not good.13 14define void @memset_1(ptr %a, i128 %value) nounwind {15; RV32-BOTH-LABEL: memset_1:16; RV32-BOTH: # %bb.0: # %loadstoreloop.preheader17; RV32-BOTH-NEXT: li a2, 018; RV32-BOTH-NEXT: lw a3, 0(a1)19; RV32-BOTH-NEXT: lw a4, 4(a1)20; RV32-BOTH-NEXT: lw a5, 8(a1)21; RV32-BOTH-NEXT: lw a1, 12(a1)22; RV32-BOTH-NEXT: li a6, 023; RV32-BOTH-NEXT: .LBB0_1: # %loadstoreloop24; RV32-BOTH-NEXT: # =>This Inner Loop Header: Depth=125; RV32-BOTH-NEXT: slli a7, a2, 426; RV32-BOTH-NEXT: addi a2, a2, 127; RV32-BOTH-NEXT: add a7, a0, a728; RV32-BOTH-NEXT: seqz t0, a229; RV32-BOTH-NEXT: add a6, a6, t030; RV32-BOTH-NEXT: or t0, a2, a631; RV32-BOTH-NEXT: sw a3, 0(a7)32; RV32-BOTH-NEXT: sw a4, 4(a7)33; RV32-BOTH-NEXT: sw a5, 8(a7)34; RV32-BOTH-NEXT: sw a1, 12(a7)35; RV32-BOTH-NEXT: beqz t0, .LBB0_136; RV32-BOTH-NEXT: # %bb.2: # %split37; RV32-BOTH-NEXT: ret38;39; RV64-BOTH-LABEL: memset_1:40; RV64-BOTH: # %bb.0: # %loadstoreloop.preheader41; RV64-BOTH-NEXT: addi a3, a0, 1642; RV64-BOTH-NEXT: .LBB0_1: # %loadstoreloop43; RV64-BOTH-NEXT: # =>This Inner Loop Header: Depth=144; RV64-BOTH-NEXT: sd a1, 0(a0)45; RV64-BOTH-NEXT: sd a2, 8(a0)46; RV64-BOTH-NEXT: addi a0, a0, 1647; RV64-BOTH-NEXT: bne a0, a3, .LBB0_148; RV64-BOTH-NEXT: # %bb.2: # %split49; RV64-BOTH-NEXT: ret50 tail call void @llvm.experimental.memset.pattern(ptr align 8 %a, i128 %value, i64 1, i1 0)51 ret void52}53 54define void @memset_1_noalign(ptr %a, i128 %value) nounwind {55; RV32-LABEL: memset_1_noalign:56; RV32: # %bb.0: # %loadstoreloop.preheader57; RV32-NEXT: addi sp, sp, -3258; RV32-NEXT: sw s0, 28(sp) # 4-byte Folded Spill59; RV32-NEXT: sw s1, 24(sp) # 4-byte Folded Spill60; RV32-NEXT: sw s2, 20(sp) # 4-byte Folded Spill61; RV32-NEXT: sw s3, 16(sp) # 4-byte Folded Spill62; RV32-NEXT: sw s4, 12(sp) # 4-byte Folded Spill63; RV32-NEXT: sw s5, 8(sp) # 4-byte Folded Spill64; RV32-NEXT: li a2, 065; RV32-NEXT: li a3, 066; RV32-NEXT: lw a4, 4(a1)67; RV32-NEXT: lw a5, 0(a1)68; RV32-NEXT: lw a6, 8(a1)69; RV32-NEXT: lw a1, 12(a1)70; RV32-NEXT: srli a7, a4, 2471; RV32-NEXT: srli t0, a4, 1672; RV32-NEXT: srli t1, a4, 873; RV32-NEXT: srli t2, a5, 2474; RV32-NEXT: srli t3, a5, 1675; RV32-NEXT: srli t4, a5, 876; RV32-NEXT: srli t5, a6, 2477; RV32-NEXT: srli t6, a6, 1678; RV32-NEXT: srli s0, a6, 879; RV32-NEXT: srli s1, a1, 2480; RV32-NEXT: srli s2, a1, 1681; RV32-NEXT: srli s3, a1, 882; RV32-NEXT: .LBB1_1: # %loadstoreloop83; RV32-NEXT: # =>This Inner Loop Header: Depth=184; RV32-NEXT: slli s4, a2, 485; RV32-NEXT: addi a2, a2, 186; RV32-NEXT: add s4, a0, s487; RV32-NEXT: seqz s5, a288; RV32-NEXT: sb a4, 4(s4)89; RV32-NEXT: sb t1, 5(s4)90; RV32-NEXT: sb t0, 6(s4)91; RV32-NEXT: sb a7, 7(s4)92; RV32-NEXT: sb a5, 0(s4)93; RV32-NEXT: sb t4, 1(s4)94; RV32-NEXT: sb t3, 2(s4)95; RV32-NEXT: sb t2, 3(s4)96; RV32-NEXT: sb a6, 8(s4)97; RV32-NEXT: sb s0, 9(s4)98; RV32-NEXT: sb t6, 10(s4)99; RV32-NEXT: sb t5, 11(s4)100; RV32-NEXT: add a3, a3, s5101; RV32-NEXT: or s5, a2, a3102; RV32-NEXT: sb a1, 12(s4)103; RV32-NEXT: sb s3, 13(s4)104; RV32-NEXT: sb s2, 14(s4)105; RV32-NEXT: sb s1, 15(s4)106; RV32-NEXT: beqz s5, .LBB1_1107; RV32-NEXT: # %bb.2: # %split108; RV32-NEXT: lw s0, 28(sp) # 4-byte Folded Reload109; RV32-NEXT: lw s1, 24(sp) # 4-byte Folded Reload110; RV32-NEXT: lw s2, 20(sp) # 4-byte Folded Reload111; RV32-NEXT: lw s3, 16(sp) # 4-byte Folded Reload112; RV32-NEXT: lw s4, 12(sp) # 4-byte Folded Reload113; RV32-NEXT: lw s5, 8(sp) # 4-byte Folded Reload114; RV32-NEXT: addi sp, sp, 32115; RV32-NEXT: ret116;117; RV64-LABEL: memset_1_noalign:118; RV64: # %bb.0: # %loadstoreloop.preheader119; RV64-NEXT: addi sp, sp, -32120; RV64-NEXT: sd s0, 24(sp) # 8-byte Folded Spill121; RV64-NEXT: sd s1, 16(sp) # 8-byte Folded Spill122; RV64-NEXT: sd s2, 8(sp) # 8-byte Folded Spill123; RV64-NEXT: addi a3, a0, 16124; RV64-NEXT: srli a4, a1, 56125; RV64-NEXT: srli a5, a1, 48126; RV64-NEXT: srli a6, a1, 40127; RV64-NEXT: srli a7, a1, 32128; RV64-NEXT: srli t0, a1, 24129; RV64-NEXT: srli t1, a1, 16130; RV64-NEXT: srli t2, a1, 8131; RV64-NEXT: srli t3, a2, 56132; RV64-NEXT: srli t4, a2, 48133; RV64-NEXT: srli t5, a2, 40134; RV64-NEXT: srli t6, a2, 32135; RV64-NEXT: srli s0, a2, 24136; RV64-NEXT: srli s1, a2, 16137; RV64-NEXT: srli s2, a2, 8138; RV64-NEXT: .LBB1_1: # %loadstoreloop139; RV64-NEXT: # =>This Inner Loop Header: Depth=1140; RV64-NEXT: sb a7, 4(a0)141; RV64-NEXT: sb a6, 5(a0)142; RV64-NEXT: sb a5, 6(a0)143; RV64-NEXT: sb a4, 7(a0)144; RV64-NEXT: sb a1, 0(a0)145; RV64-NEXT: sb t2, 1(a0)146; RV64-NEXT: sb t1, 2(a0)147; RV64-NEXT: sb t0, 3(a0)148; RV64-NEXT: sb t6, 12(a0)149; RV64-NEXT: sb t5, 13(a0)150; RV64-NEXT: sb t4, 14(a0)151; RV64-NEXT: sb t3, 15(a0)152; RV64-NEXT: sb a2, 8(a0)153; RV64-NEXT: sb s2, 9(a0)154; RV64-NEXT: sb s1, 10(a0)155; RV64-NEXT: sb s0, 11(a0)156; RV64-NEXT: addi a0, a0, 16157; RV64-NEXT: bne a0, a3, .LBB1_1158; RV64-NEXT: # %bb.2: # %split159; RV64-NEXT: ld s0, 24(sp) # 8-byte Folded Reload160; RV64-NEXT: ld s1, 16(sp) # 8-byte Folded Reload161; RV64-NEXT: ld s2, 8(sp) # 8-byte Folded Reload162; RV64-NEXT: addi sp, sp, 32163; RV64-NEXT: ret164;165; RV32-FAST-LABEL: memset_1_noalign:166; RV32-FAST: # %bb.0: # %loadstoreloop.preheader167; RV32-FAST-NEXT: li a2, 0168; RV32-FAST-NEXT: lw a3, 0(a1)169; RV32-FAST-NEXT: lw a4, 4(a1)170; RV32-FAST-NEXT: lw a5, 8(a1)171; RV32-FAST-NEXT: lw a1, 12(a1)172; RV32-FAST-NEXT: li a6, 0173; RV32-FAST-NEXT: .LBB1_1: # %loadstoreloop174; RV32-FAST-NEXT: # =>This Inner Loop Header: Depth=1175; RV32-FAST-NEXT: slli a7, a2, 4176; RV32-FAST-NEXT: addi a2, a2, 1177; RV32-FAST-NEXT: add a7, a0, a7178; RV32-FAST-NEXT: seqz t0, a2179; RV32-FAST-NEXT: add a6, a6, t0180; RV32-FAST-NEXT: or t0, a2, a6181; RV32-FAST-NEXT: sw a3, 0(a7)182; RV32-FAST-NEXT: sw a4, 4(a7)183; RV32-FAST-NEXT: sw a5, 8(a7)184; RV32-FAST-NEXT: sw a1, 12(a7)185; RV32-FAST-NEXT: beqz t0, .LBB1_1186; RV32-FAST-NEXT: # %bb.2: # %split187; RV32-FAST-NEXT: ret188;189; RV64-FAST-LABEL: memset_1_noalign:190; RV64-FAST: # %bb.0: # %loadstoreloop.preheader191; RV64-FAST-NEXT: addi a3, a0, 16192; RV64-FAST-NEXT: .LBB1_1: # %loadstoreloop193; RV64-FAST-NEXT: # =>This Inner Loop Header: Depth=1194; RV64-FAST-NEXT: sd a1, 0(a0)195; RV64-FAST-NEXT: sd a2, 8(a0)196; RV64-FAST-NEXT: addi a0, a0, 16197; RV64-FAST-NEXT: bne a0, a3, .LBB1_1198; RV64-FAST-NEXT: # %bb.2: # %split199; RV64-FAST-NEXT: ret200 tail call void @llvm.experimental.memset.pattern(ptr %a, i128 %value, i64 1, i1 0)201 ret void202}203 204define void @memset_4(ptr %a, i128 %value) nounwind {205; RV32-BOTH-LABEL: memset_4:206; RV32-BOTH: # %bb.0: # %loadstoreloop.preheader207; RV32-BOTH-NEXT: li a2, 0208; RV32-BOTH-NEXT: lw a3, 0(a1)209; RV32-BOTH-NEXT: lw a4, 4(a1)210; RV32-BOTH-NEXT: lw a5, 8(a1)211; RV32-BOTH-NEXT: lw a1, 12(a1)212; RV32-BOTH-NEXT: li a6, 0213; RV32-BOTH-NEXT: .LBB2_1: # %loadstoreloop214; RV32-BOTH-NEXT: # =>This Inner Loop Header: Depth=1215; RV32-BOTH-NEXT: slli a7, a2, 4216; RV32-BOTH-NEXT: addi a2, a2, 1217; RV32-BOTH-NEXT: seqz t0, a2218; RV32-BOTH-NEXT: sltiu t1, a2, 4219; RV32-BOTH-NEXT: add a6, a6, t0220; RV32-BOTH-NEXT: seqz t0, a6221; RV32-BOTH-NEXT: and t0, t0, t1222; RV32-BOTH-NEXT: add a7, a0, a7223; RV32-BOTH-NEXT: sw a3, 0(a7)224; RV32-BOTH-NEXT: sw a4, 4(a7)225; RV32-BOTH-NEXT: sw a5, 8(a7)226; RV32-BOTH-NEXT: sw a1, 12(a7)227; RV32-BOTH-NEXT: bnez t0, .LBB2_1228; RV32-BOTH-NEXT: # %bb.2: # %split229; RV32-BOTH-NEXT: ret230;231; RV64-BOTH-LABEL: memset_4:232; RV64-BOTH: # %bb.0: # %loadstoreloop.preheader233; RV64-BOTH-NEXT: addi a3, a0, 64234; RV64-BOTH-NEXT: .LBB2_1: # %loadstoreloop235; RV64-BOTH-NEXT: # =>This Inner Loop Header: Depth=1236; RV64-BOTH-NEXT: sd a1, 0(a0)237; RV64-BOTH-NEXT: sd a2, 8(a0)238; RV64-BOTH-NEXT: addi a0, a0, 16239; RV64-BOTH-NEXT: bne a0, a3, .LBB2_1240; RV64-BOTH-NEXT: # %bb.2: # %split241; RV64-BOTH-NEXT: ret242 tail call void @llvm.experimental.memset.pattern(ptr align 8 %a, i128 %value, i64 4, i1 0)243 ret void244}245 246define void @memset_x(ptr %a, i128 %value, i64 %x) nounwind {247; RV32-BOTH-LABEL: memset_x:248; RV32-BOTH: # %bb.0:249; RV32-BOTH-NEXT: or a4, a2, a3250; RV32-BOTH-NEXT: beqz a4, .LBB3_5251; RV32-BOTH-NEXT: # %bb.1: # %loadstoreloop.preheader252; RV32-BOTH-NEXT: li a4, 0253; RV32-BOTH-NEXT: lw a5, 0(a1)254; RV32-BOTH-NEXT: lw a6, 4(a1)255; RV32-BOTH-NEXT: lw a7, 8(a1)256; RV32-BOTH-NEXT: lw a1, 12(a1)257; RV32-BOTH-NEXT: li t0, 0258; RV32-BOTH-NEXT: j .LBB3_3259; RV32-BOTH-NEXT: .LBB3_2: # %loadstoreloop260; RV32-BOTH-NEXT: # in Loop: Header=BB3_3 Depth=1261; RV32-BOTH-NEXT: sltu t1, t0, a3262; RV32-BOTH-NEXT: beqz t1, .LBB3_5263; RV32-BOTH-NEXT: .LBB3_3: # %loadstoreloop264; RV32-BOTH-NEXT: # =>This Inner Loop Header: Depth=1265; RV32-BOTH-NEXT: slli t1, a4, 4266; RV32-BOTH-NEXT: addi a4, a4, 1267; RV32-BOTH-NEXT: seqz t2, a4268; RV32-BOTH-NEXT: add t0, t0, t2269; RV32-BOTH-NEXT: add t1, a0, t1270; RV32-BOTH-NEXT: sw a5, 0(t1)271; RV32-BOTH-NEXT: sw a6, 4(t1)272; RV32-BOTH-NEXT: sw a7, 8(t1)273; RV32-BOTH-NEXT: sw a1, 12(t1)274; RV32-BOTH-NEXT: bne t0, a3, .LBB3_2275; RV32-BOTH-NEXT: # %bb.4: # in Loop: Header=BB3_3 Depth=1276; RV32-BOTH-NEXT: sltu t1, a4, a2277; RV32-BOTH-NEXT: bnez t1, .LBB3_3278; RV32-BOTH-NEXT: .LBB3_5: # %split279; RV32-BOTH-NEXT: ret280;281; RV64-BOTH-LABEL: memset_x:282; RV64-BOTH: # %bb.0:283; RV64-BOTH-NEXT: beqz a3, .LBB3_3284; RV64-BOTH-NEXT: # %bb.1: # %loadstoreloop.preheader285; RV64-BOTH-NEXT: li a4, 0286; RV64-BOTH-NEXT: .LBB3_2: # %loadstoreloop287; RV64-BOTH-NEXT: # =>This Inner Loop Header: Depth=1288; RV64-BOTH-NEXT: sd a1, 0(a0)289; RV64-BOTH-NEXT: sd a2, 8(a0)290; RV64-BOTH-NEXT: addi a4, a4, 1291; RV64-BOTH-NEXT: addi a0, a0, 16292; RV64-BOTH-NEXT: bltu a4, a3, .LBB3_2293; RV64-BOTH-NEXT: .LBB3_3: # %split294; RV64-BOTH-NEXT: ret295 tail call void @llvm.experimental.memset.pattern(ptr align 8 %a, i128 %value, i64 %x, i1 0)296 ret void297}298