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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV64I %s6 7define i32 @muli32_0x555(i32 %a) nounwind {8; RV32I-LABEL: muli32_0x555:9; RV32I: # %bb.0:10; RV32I-NEXT: slli a1, a0, 211; RV32I-NEXT: slli a2, a0, 412; RV32I-NEXT: slli a3, a0, 613; RV32I-NEXT: add a2, a2, a314; RV32I-NEXT: slli a3, a0, 815; RV32I-NEXT: add a1, a0, a116; RV32I-NEXT: slli a0, a0, 1017; RV32I-NEXT: add a1, a1, a218; RV32I-NEXT: add a0, a3, a019; RV32I-NEXT: add a0, a1, a020; RV32I-NEXT: ret21;22; RV64I-LABEL: muli32_0x555:23; RV64I: # %bb.0:24; RV64I-NEXT: slli a1, a0, 225; RV64I-NEXT: slli a2, a0, 426; RV64I-NEXT: slli a3, a0, 627; RV64I-NEXT: add a2, a2, a328; RV64I-NEXT: slli a3, a0, 829; RV64I-NEXT: add a1, a0, a130; RV64I-NEXT: slli a0, a0, 1031; RV64I-NEXT: add a1, a1, a232; RV64I-NEXT: add a0, a3, a033; RV64I-NEXT: add a0, a1, a034; RV64I-NEXT: ret35 %a1 = mul i32 %a, 136536 ret i32 %a137}38 39define i64 @muli64_0x555(i64 %a) nounwind {40; RV32I-LABEL: muli64_0x555:41; RV32I: # %bb.0:42; RV32I-NEXT: addi sp, sp, -1643; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill44; RV32I-NEXT: li a2, 136545; RV32I-NEXT: li a3, 046; RV32I-NEXT: call __muldi347; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload48; RV32I-NEXT: addi sp, sp, 1649; RV32I-NEXT: ret50;51; RV64I-LABEL: muli64_0x555:52; RV64I: # %bb.0:53; RV64I-NEXT: slli a1, a0, 254; RV64I-NEXT: slli a2, a0, 455; RV64I-NEXT: slli a3, a0, 656; RV64I-NEXT: add a2, a2, a357; RV64I-NEXT: slli a3, a0, 858; RV64I-NEXT: add a1, a0, a159; RV64I-NEXT: slli a0, a0, 1060; RV64I-NEXT: add a1, a1, a261; RV64I-NEXT: add a0, a3, a062; RV64I-NEXT: add a0, a1, a063; RV64I-NEXT: ret64 %a1 = mul i64 %a, 136565 ret i64 %a166}67 68define i32 @muli32_0x33333333(i32 %a) nounwind {69; RV32I-LABEL: muli32_0x33333333:70; RV32I: # %bb.0:71; RV32I-NEXT: slli a1, a0, 472; RV32I-NEXT: slli a2, a0, 673; RV32I-NEXT: slli a3, a0, 874; RV32I-NEXT: slli a4, a0, 1075; RV32I-NEXT: slli a5, a0, 1476; RV32I-NEXT: sub a1, a1, a277; RV32I-NEXT: slli a2, a0, 1678; RV32I-NEXT: sub a3, a3, a479; RV32I-NEXT: slli a4, a0, 2280; RV32I-NEXT: sub a5, a5, a281; RV32I-NEXT: slli a2, a0, 2482; RV32I-NEXT: sub a4, a4, a283; RV32I-NEXT: slli a2, a0, 284; RV32I-NEXT: sub a2, a2, a085; RV32I-NEXT: sub a2, a2, a186; RV32I-NEXT: slli a1, a0, 1287; RV32I-NEXT: add a1, a3, a188; RV32I-NEXT: slli a3, a0, 1889; RV32I-NEXT: add a3, a5, a390; RV32I-NEXT: slli a5, a0, 2691; RV32I-NEXT: add a4, a4, a592; RV32I-NEXT: sub a2, a2, a193; RV32I-NEXT: slli a1, a0, 2094; RV32I-NEXT: sub a3, a3, a195; RV32I-NEXT: slli a1, a0, 2896; RV32I-NEXT: sub a4, a4, a197; RV32I-NEXT: slli a0, a0, 3098; RV32I-NEXT: add a2, a2, a399; RV32I-NEXT: add a0, a4, a0100; RV32I-NEXT: add a0, a2, a0101; RV32I-NEXT: ret102;103; RV64I-LABEL: muli32_0x33333333:104; RV64I: # %bb.0:105; RV64I-NEXT: slli a1, a0, 4106; RV64I-NEXT: slli a2, a0, 6107; RV64I-NEXT: slli a3, a0, 8108; RV64I-NEXT: slli a4, a0, 10109; RV64I-NEXT: slli a5, a0, 14110; RV64I-NEXT: sub a1, a1, a2111; RV64I-NEXT: slli a2, a0, 16112; RV64I-NEXT: sub a3, a3, a4113; RV64I-NEXT: slli a4, a0, 22114; RV64I-NEXT: sub a5, a5, a2115; RV64I-NEXT: slli a2, a0, 24116; RV64I-NEXT: sub a4, a4, a2117; RV64I-NEXT: slli a2, a0, 2118; RV64I-NEXT: sub a2, a2, a0119; RV64I-NEXT: sub a2, a2, a1120; RV64I-NEXT: slli a1, a0, 12121; RV64I-NEXT: add a1, a3, a1122; RV64I-NEXT: slli a3, a0, 18123; RV64I-NEXT: add a3, a5, a3124; RV64I-NEXT: slli a5, a0, 26125; RV64I-NEXT: add a4, a4, a5126; RV64I-NEXT: sub a2, a2, a1127; RV64I-NEXT: slli a1, a0, 20128; RV64I-NEXT: sub a3, a3, a1129; RV64I-NEXT: slli a1, a0, 28130; RV64I-NEXT: sub a4, a4, a1131; RV64I-NEXT: slli a0, a0, 30132; RV64I-NEXT: add a2, a2, a3133; RV64I-NEXT: add a0, a4, a0134; RV64I-NEXT: add a0, a2, a0135; RV64I-NEXT: ret136 %a1 = mul i32 %a, 858993459137 ret i32 %a1138}139 140define i64 @muli64_0x33333333(i64 %a) nounwind {141; RV32I-LABEL: muli64_0x33333333:142; RV32I: # %bb.0:143; RV32I-NEXT: addi sp, sp, -16144; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill145; RV32I-NEXT: lui a2, 209715146; RV32I-NEXT: addi a2, a2, 819147; RV32I-NEXT: li a3, 0148; RV32I-NEXT: call __muldi3149; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload150; RV32I-NEXT: addi sp, sp, 16151; RV32I-NEXT: ret152;153; RV64I-LABEL: muli64_0x33333333:154; RV64I: # %bb.0:155; RV64I-NEXT: slli a1, a0, 4156; RV64I-NEXT: slli a2, a0, 6157; RV64I-NEXT: slli a3, a0, 8158; RV64I-NEXT: slli a4, a0, 10159; RV64I-NEXT: slli a5, a0, 14160; RV64I-NEXT: sub a1, a1, a2161; RV64I-NEXT: slli a2, a0, 16162; RV64I-NEXT: sub a3, a3, a4163; RV64I-NEXT: slli a4, a0, 22164; RV64I-NEXT: sub a5, a5, a2165; RV64I-NEXT: slli a2, a0, 24166; RV64I-NEXT: sub a4, a4, a2167; RV64I-NEXT: slli a2, a0, 2168; RV64I-NEXT: sub a2, a2, a0169; RV64I-NEXT: sub a2, a2, a1170; RV64I-NEXT: slli a1, a0, 12171; RV64I-NEXT: add a1, a3, a1172; RV64I-NEXT: slli a3, a0, 18173; RV64I-NEXT: add a3, a5, a3174; RV64I-NEXT: slli a5, a0, 26175; RV64I-NEXT: add a4, a4, a5176; RV64I-NEXT: sub a2, a2, a1177; RV64I-NEXT: slli a1, a0, 20178; RV64I-NEXT: sub a3, a3, a1179; RV64I-NEXT: slli a1, a0, 28180; RV64I-NEXT: sub a4, a4, a1181; RV64I-NEXT: slli a0, a0, 30182; RV64I-NEXT: add a2, a2, a3183; RV64I-NEXT: add a0, a4, a0184; RV64I-NEXT: add a0, a2, a0185; RV64I-NEXT: ret186 %a1 = mul i64 %a, 858993459187 ret i64 %a1188}189 190define i32 @muli32_0xaaaaaaaa(i32 %a) nounwind {191; RV32I-LABEL: muli32_0xaaaaaaaa:192; RV32I: # %bb.0:193; RV32I-NEXT: slli a1, a0, 3194; RV32I-NEXT: slli a2, a0, 1195; RV32I-NEXT: slli a3, a0, 5196; RV32I-NEXT: slli a4, a0, 7197; RV32I-NEXT: slli a5, a0, 9198; RV32I-NEXT: slli a6, a0, 11199; RV32I-NEXT: add a1, a2, a1200; RV32I-NEXT: slli a2, a0, 15201; RV32I-NEXT: add a3, a3, a4202; RV32I-NEXT: slli a4, a0, 17203; RV32I-NEXT: add a5, a5, a6204; RV32I-NEXT: slli a6, a0, 23205; RV32I-NEXT: add a2, a2, a4206; RV32I-NEXT: slli a4, a0, 25207; RV32I-NEXT: add a4, a6, a4208; RV32I-NEXT: add a1, a1, a3209; RV32I-NEXT: slli a3, a0, 13210; RV32I-NEXT: add a3, a5, a3211; RV32I-NEXT: slli a5, a0, 19212; RV32I-NEXT: add a2, a2, a5213; RV32I-NEXT: slli a5, a0, 27214; RV32I-NEXT: add a4, a4, a5215; RV32I-NEXT: add a1, a1, a3216; RV32I-NEXT: slli a3, a0, 21217; RV32I-NEXT: add a2, a2, a3218; RV32I-NEXT: slli a3, a0, 29219; RV32I-NEXT: add a3, a4, a3220; RV32I-NEXT: slli a0, a0, 31221; RV32I-NEXT: add a1, a1, a2222; RV32I-NEXT: add a0, a3, a0223; RV32I-NEXT: add a0, a1, a0224; RV32I-NEXT: ret225;226; RV64I-LABEL: muli32_0xaaaaaaaa:227; RV64I: # %bb.0:228; RV64I-NEXT: slli a1, a0, 3229; RV64I-NEXT: slli a2, a0, 1230; RV64I-NEXT: slli a3, a0, 5231; RV64I-NEXT: slli a4, a0, 7232; RV64I-NEXT: slli a5, a0, 9233; RV64I-NEXT: slli a6, a0, 11234; RV64I-NEXT: add a1, a2, a1235; RV64I-NEXT: slli a2, a0, 15236; RV64I-NEXT: add a3, a3, a4237; RV64I-NEXT: slli a4, a0, 17238; RV64I-NEXT: add a5, a5, a6239; RV64I-NEXT: slli a6, a0, 23240; RV64I-NEXT: add a2, a2, a4241; RV64I-NEXT: slli a4, a0, 25242; RV64I-NEXT: add a4, a6, a4243; RV64I-NEXT: add a1, a1, a3244; RV64I-NEXT: slli a3, a0, 13245; RV64I-NEXT: add a3, a5, a3246; RV64I-NEXT: slli a5, a0, 19247; RV64I-NEXT: add a2, a2, a5248; RV64I-NEXT: slli a5, a0, 27249; RV64I-NEXT: add a4, a4, a5250; RV64I-NEXT: add a1, a1, a3251; RV64I-NEXT: slli a3, a0, 21252; RV64I-NEXT: add a2, a2, a3253; RV64I-NEXT: slli a3, a0, 29254; RV64I-NEXT: add a3, a4, a3255; RV64I-NEXT: slli a0, a0, 31256; RV64I-NEXT: add a1, a1, a2257; RV64I-NEXT: sub a0, a3, a0258; RV64I-NEXT: add a0, a1, a0259; RV64I-NEXT: ret260 %a1 = mul i32 %a, -1431655766261 ret i32 %a1262}263 264define i64 @muli64_0xaaaaaaaa(i64 %a) nounwind {265; RV32I-LABEL: muli64_0xaaaaaaaa:266; RV32I: # %bb.0:267; RV32I-NEXT: addi sp, sp, -16268; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill269; RV32I-NEXT: lui a2, 699051270; RV32I-NEXT: addi a2, a2, -1366271; RV32I-NEXT: li a3, 0272; RV32I-NEXT: call __muldi3273; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload274; RV32I-NEXT: addi sp, sp, 16275; RV32I-NEXT: ret276;277; RV64I-LABEL: muli64_0xaaaaaaaa:278; RV64I: # %bb.0:279; RV64I-NEXT: slli a1, a0, 3280; RV64I-NEXT: slli a2, a0, 1281; RV64I-NEXT: slli a3, a0, 5282; RV64I-NEXT: slli a4, a0, 7283; RV64I-NEXT: slli a5, a0, 9284; RV64I-NEXT: slli a6, a0, 11285; RV64I-NEXT: add a1, a2, a1286; RV64I-NEXT: slli a2, a0, 15287; RV64I-NEXT: add a3, a3, a4288; RV64I-NEXT: slli a4, a0, 17289; RV64I-NEXT: add a5, a5, a6290; RV64I-NEXT: slli a6, a0, 23291; RV64I-NEXT: add a2, a2, a4292; RV64I-NEXT: slli a4, a0, 25293; RV64I-NEXT: add a4, a6, a4294; RV64I-NEXT: add a1, a1, a3295; RV64I-NEXT: slli a3, a0, 13296; RV64I-NEXT: add a3, a5, a3297; RV64I-NEXT: slli a5, a0, 19298; RV64I-NEXT: add a2, a2, a5299; RV64I-NEXT: slli a5, a0, 27300; RV64I-NEXT: add a4, a4, a5301; RV64I-NEXT: add a1, a1, a3302; RV64I-NEXT: slli a3, a0, 21303; RV64I-NEXT: add a2, a2, a3304; RV64I-NEXT: slli a3, a0, 29305; RV64I-NEXT: add a3, a4, a3306; RV64I-NEXT: slli a0, a0, 31307; RV64I-NEXT: add a1, a1, a2308; RV64I-NEXT: add a0, a3, a0309; RV64I-NEXT: add a0, a1, a0310; RV64I-NEXT: ret311 %a1 = mul i64 %a, 2863311530312 ret i64 %a1313}314 315define i32 @muli32_0x0fffffff(i32 %a) nounwind {316; RV32I-LABEL: muli32_0x0fffffff:317; RV32I: # %bb.0:318; RV32I-NEXT: slli a1, a0, 28319; RV32I-NEXT: sub a0, a1, a0320; RV32I-NEXT: ret321;322; RV64I-LABEL: muli32_0x0fffffff:323; RV64I: # %bb.0:324; RV64I-NEXT: slli a1, a0, 28325; RV64I-NEXT: subw a0, a1, a0326; RV64I-NEXT: ret327 %a1 = mul i32 %a, 268435455328 ret i32 %a1329}330 331define i64 @muli64_0x0fffffff(i64 %a) nounwind {332; RV32I-LABEL: muli64_0x0fffffff:333; RV32I: # %bb.0:334; RV32I-NEXT: slli a2, a0, 28335; RV32I-NEXT: srli a3, a0, 4336; RV32I-NEXT: slli a4, a1, 28337; RV32I-NEXT: sltu a5, a2, a0338; RV32I-NEXT: or a3, a4, a3339; RV32I-NEXT: sub a1, a3, a1340; RV32I-NEXT: sub a1, a1, a5341; RV32I-NEXT: sub a0, a2, a0342; RV32I-NEXT: ret343;344; RV64I-LABEL: muli64_0x0fffffff:345; RV64I: # %bb.0:346; RV64I-NEXT: slli a1, a0, 28347; RV64I-NEXT: sub a0, a1, a0348; RV64I-NEXT: ret349 %a1 = mul i64 %a, 268435455350 ret i64 %a1351}352 353define i32 @muli32_0xf0f0f0f0(i32 %a) nounwind {354; RV32I-LABEL: muli32_0xf0f0f0f0:355; RV32I: # %bb.0:356; RV32I-NEXT: slli a1, a0, 4357; RV32I-NEXT: slli a2, a0, 8358; RV32I-NEXT: slli a3, a0, 12359; RV32I-NEXT: slli a4, a0, 16360; RV32I-NEXT: sub a2, a2, a1361; RV32I-NEXT: slli a1, a0, 20362; RV32I-NEXT: sub a3, a3, a4363; RV32I-NEXT: slli a4, a0, 24364; RV32I-NEXT: sub a1, a1, a4365; RV32I-NEXT: slli a0, a0, 28366; RV32I-NEXT: sub a2, a2, a3367; RV32I-NEXT: add a0, a1, a0368; RV32I-NEXT: sub a0, a2, a0369; RV32I-NEXT: ret370;371; RV64I-LABEL: muli32_0xf0f0f0f0:372; RV64I: # %bb.0:373; RV64I-NEXT: slli a1, a0, 4374; RV64I-NEXT: slli a2, a0, 8375; RV64I-NEXT: slli a3, a0, 12376; RV64I-NEXT: slli a4, a0, 16377; RV64I-NEXT: sub a2, a2, a1378; RV64I-NEXT: slli a1, a0, 20379; RV64I-NEXT: sub a3, a3, a4380; RV64I-NEXT: slli a4, a0, 24381; RV64I-NEXT: sub a1, a1, a4382; RV64I-NEXT: slli a0, a0, 28383; RV64I-NEXT: sub a2, a2, a3384; RV64I-NEXT: add a0, a1, a0385; RV64I-NEXT: sub a0, a2, a0386; RV64I-NEXT: ret387 %a1 = mul i32 %a, -252645136388 ret i32 %a1389}390 391define i64 @muli64_0xf0f0f0f0(i64 %a) nounwind {392; RV32I-LABEL: muli64_0xf0f0f0f0:393; RV32I: # %bb.0:394; RV32I-NEXT: addi sp, sp, -16395; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill396; RV32I-NEXT: lui a2, 986895397; RV32I-NEXT: addi a2, a2, 240398; RV32I-NEXT: li a3, 0399; RV32I-NEXT: call __muldi3400; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload401; RV32I-NEXT: addi sp, sp, 16402; RV32I-NEXT: ret403;404; RV64I-LABEL: muli64_0xf0f0f0f0:405; RV64I: # %bb.0:406; RV64I-NEXT: slli a1, a0, 4407; RV64I-NEXT: slli a2, a0, 8408; RV64I-NEXT: slli a3, a0, 12409; RV64I-NEXT: slli a4, a0, 16410; RV64I-NEXT: sub a2, a2, a1411; RV64I-NEXT: slli a1, a0, 20412; RV64I-NEXT: sub a3, a3, a4413; RV64I-NEXT: slli a4, a0, 24414; RV64I-NEXT: sub a1, a1, a4415; RV64I-NEXT: sub a2, a2, a3416; RV64I-NEXT: slli a3, a0, 28417; RV64I-NEXT: add a1, a1, a3418; RV64I-NEXT: sub a2, a2, a1419; RV64I-NEXT: slli a0, a0, 32420; RV64I-NEXT: add a0, a2, a0421; RV64I-NEXT: ret422 %a1 = mul i64 %a, 4042322160423 ret i64 %a1424}425 426define i32 @muli32_0xf7f7f7f7(i32 %a) nounwind {427; RV32I-LABEL: muli32_0xf7f7f7f7:428; RV32I: # %bb.0:429; RV32I-NEXT: slli a1, a0, 3430; RV32I-NEXT: slli a2, a0, 11431; RV32I-NEXT: slli a3, a0, 19432; RV32I-NEXT: add a1, a0, a1433; RV32I-NEXT: slli a0, a0, 27434; RV32I-NEXT: add a2, a2, a3435; RV32I-NEXT: add a1, a1, a2436; RV32I-NEXT: neg a0, a0437; RV32I-NEXT: sub a0, a0, a1438; RV32I-NEXT: ret439;440; RV64I-LABEL: muli32_0xf7f7f7f7:441; RV64I: # %bb.0:442; RV64I-NEXT: slli a1, a0, 3443; RV64I-NEXT: slli a2, a0, 11444; RV64I-NEXT: slli a3, a0, 19445; RV64I-NEXT: add a1, a0, a1446; RV64I-NEXT: slli a0, a0, 27447; RV64I-NEXT: add a2, a2, a3448; RV64I-NEXT: add a1, a1, a2449; RV64I-NEXT: neg a0, a0450; RV64I-NEXT: sub a0, a0, a1451; RV64I-NEXT: ret452 %a1 = mul i32 %a, -134744073453 ret i32 %a1454}455 456define i64 @muli64_0xf7f7f7f7(i64 %a) nounwind {457; RV32I-LABEL: muli64_0xf7f7f7f7:458; RV32I: # %bb.0:459; RV32I-NEXT: addi sp, sp, -16460; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill461; RV32I-NEXT: lui a2, 1015679462; RV32I-NEXT: addi a2, a2, 2039463; RV32I-NEXT: li a3, 0464; RV32I-NEXT: call __muldi3465; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload466; RV32I-NEXT: addi sp, sp, 16467; RV32I-NEXT: ret468;469; RV64I-LABEL: muli64_0xf7f7f7f7:470; RV64I: # %bb.0:471; RV64I-NEXT: slli a1, a0, 3472; RV64I-NEXT: slli a2, a0, 11473; RV64I-NEXT: slli a3, a0, 19474; RV64I-NEXT: add a2, a2, a3475; RV64I-NEXT: slli a3, a0, 27476; RV64I-NEXT: add a1, a0, a1477; RV64I-NEXT: slli a0, a0, 32478; RV64I-NEXT: add a1, a1, a2479; RV64I-NEXT: sub a0, a0, a3480; RV64I-NEXT: sub a0, a0, a1481; RV64I-NEXT: ret482 %a1 = mul i64 %a, 4160223223483 ret i64 %a1484}485 486define i32 @muli32_0x1000(i32 %a) nounwind {487; RV32I-LABEL: muli32_0x1000:488; RV32I: # %bb.0:489; RV32I-NEXT: slli a0, a0, 12490; RV32I-NEXT: ret491;492; RV64I-LABEL: muli32_0x1000:493; RV64I: # %bb.0:494; RV64I-NEXT: slliw a0, a0, 12495; RV64I-NEXT: ret496 %a1 = mul i32 %a, 4096497 ret i32 %a1498}499 500define i64 @muli64_0x1000(i64 %a) nounwind {501; RV32I-LABEL: muli64_0x1000:502; RV32I: # %bb.0:503; RV32I-NEXT: srli a2, a0, 20504; RV32I-NEXT: slli a1, a1, 12505; RV32I-NEXT: or a1, a1, a2506; RV32I-NEXT: slli a0, a0, 12507; RV32I-NEXT: ret508;509; RV64I-LABEL: muli64_0x1000:510; RV64I: # %bb.0:511; RV64I-NEXT: slli a0, a0, 12512; RV64I-NEXT: ret513 %a1 = mul i64 %a, 4096514 ret i64 %a1515}516 517define i32 @muli32_0x101(i32 %a) nounwind {518; RV32I-LABEL: muli32_0x101:519; RV32I: # %bb.0:520; RV32I-NEXT: slli a1, a0, 8521; RV32I-NEXT: add a0, a1, a0522; RV32I-NEXT: ret523;524; RV64I-LABEL: muli32_0x101:525; RV64I: # %bb.0:526; RV64I-NEXT: slli a1, a0, 8527; RV64I-NEXT: addw a0, a1, a0528; RV64I-NEXT: ret529 %a1 = mul i32 %a, 257530 ret i32 %a1531}532 533define i64 @muli64_0x101(i64 %a) nounwind {534; RV32I-LABEL: muli64_0x101:535; RV32I: # %bb.0:536; RV32I-NEXT: slli a2, a0, 8537; RV32I-NEXT: srli a3, a0, 24538; RV32I-NEXT: slli a4, a1, 8539; RV32I-NEXT: add a0, a2, a0540; RV32I-NEXT: or a3, a4, a3541; RV32I-NEXT: sltu a2, a0, a2542; RV32I-NEXT: add a1, a3, a1543; RV32I-NEXT: add a1, a1, a2544; RV32I-NEXT: ret545;546; RV64I-LABEL: muli64_0x101:547; RV64I: # %bb.0:548; RV64I-NEXT: slli a1, a0, 8549; RV64I-NEXT: add a0, a1, a0550; RV64I-NEXT: ret551 %a1 = mul i64 %a, 257552 ret i64 %a1553}554 555define i32 @muli32_0xfff(i32 %a) nounwind {556; RV32I-LABEL: muli32_0xfff:557; RV32I: # %bb.0:558; RV32I-NEXT: slli a1, a0, 12559; RV32I-NEXT: sub a0, a1, a0560; RV32I-NEXT: ret561;562; RV64I-LABEL: muli32_0xfff:563; RV64I: # %bb.0:564; RV64I-NEXT: slli a1, a0, 12565; RV64I-NEXT: subw a0, a1, a0566; RV64I-NEXT: ret567 %a1 = mul i32 %a, 4095568 ret i32 %a1569}570 571define i64 @muli64_0xfff(i64 %a) nounwind {572; RV32I-LABEL: muli64_0xfff:573; RV32I: # %bb.0:574; RV32I-NEXT: slli a2, a0, 12575; RV32I-NEXT: srli a3, a0, 20576; RV32I-NEXT: slli a4, a1, 12577; RV32I-NEXT: sltu a5, a2, a0578; RV32I-NEXT: or a3, a4, a3579; RV32I-NEXT: sub a1, a3, a1580; RV32I-NEXT: sub a1, a1, a5581; RV32I-NEXT: sub a0, a2, a0582; RV32I-NEXT: ret583;584; RV64I-LABEL: muli64_0xfff:585; RV64I: # %bb.0:586; RV64I-NEXT: slli a1, a0, 12587; RV64I-NEXT: sub a0, a1, a0588; RV64I-NEXT: ret589 %a1 = mul i64 %a, 4095590 ret i64 %a1591}592 593define i32 @muli32_0x7fffffff(i32 %a) nounwind {594; RV32I-LABEL: muli32_0x7fffffff:595; RV32I: # %bb.0:596; RV32I-NEXT: slli a1, a0, 31597; RV32I-NEXT: sub a0, a1, a0598; RV32I-NEXT: ret599;600; RV64I-LABEL: muli32_0x7fffffff:601; RV64I: # %bb.0:602; RV64I-NEXT: slli a1, a0, 31603; RV64I-NEXT: subw a0, a1, a0604; RV64I-NEXT: ret605 %a1 = mul i32 %a, 2147483647606 ret i32 %a1607}608 609define i64 @muli64_0x7fffffff(i64 %a) nounwind {610; RV32I-LABEL: muli64_0x7fffffff:611; RV32I: # %bb.0:612; RV32I-NEXT: slli a2, a0, 31613; RV32I-NEXT: srli a3, a0, 1614; RV32I-NEXT: slli a4, a1, 31615; RV32I-NEXT: sltu a5, a2, a0616; RV32I-NEXT: or a3, a4, a3617; RV32I-NEXT: sub a1, a3, a1618; RV32I-NEXT: sub a1, a1, a5619; RV32I-NEXT: sub a0, a2, a0620; RV32I-NEXT: ret621;622; RV64I-LABEL: muli64_0x7fffffff:623; RV64I: # %bb.0:624; RV64I-NEXT: slli a1, a0, 31625; RV64I-NEXT: sub a0, a1, a0626; RV64I-NEXT: ret627 %a1 = mul i64 %a, 2147483647628 ret i64 %a1629}630 631define i32 @muli32_0xdeadbeef(i32 %a) nounwind {632; RV32I-LABEL: muli32_0xdeadbeef:633; RV32I: # %bb.0:634; RV32I-NEXT: slli a1, a0, 8635; RV32I-NEXT: slli a2, a0, 14636; RV32I-NEXT: slli a3, a0, 17637; RV32I-NEXT: slli a4, a0, 20638; RV32I-NEXT: add a1, a1, a2639; RV32I-NEXT: slli a2, a0, 24640; RV32I-NEXT: add a3, a3, a4641; RV32I-NEXT: slli a4, a0, 29642; RV32I-NEXT: add a2, a2, a4643; RV32I-NEXT: slli a4, a0, 4644; RV32I-NEXT: add a4, a0, a4645; RV32I-NEXT: add a1, a4, a1646; RV32I-NEXT: slli a0, a0, 22647; RV32I-NEXT: add a0, a3, a0648; RV32I-NEXT: add a0, a1, a0649; RV32I-NEXT: neg a1, a2650; RV32I-NEXT: sub a0, a1, a0651; RV32I-NEXT: ret652;653; RV64I-LABEL: muli32_0xdeadbeef:654; RV64I: # %bb.0:655; RV64I-NEXT: slli a1, a0, 8656; RV64I-NEXT: slli a2, a0, 14657; RV64I-NEXT: slli a3, a0, 17658; RV64I-NEXT: slli a4, a0, 20659; RV64I-NEXT: add a1, a1, a2660; RV64I-NEXT: slli a2, a0, 24661; RV64I-NEXT: add a3, a3, a4662; RV64I-NEXT: slli a4, a0, 29663; RV64I-NEXT: add a2, a2, a4664; RV64I-NEXT: slli a4, a0, 4665; RV64I-NEXT: add a4, a0, a4666; RV64I-NEXT: add a1, a4, a1667; RV64I-NEXT: slli a0, a0, 22668; RV64I-NEXT: add a0, a3, a0669; RV64I-NEXT: add a0, a1, a0670; RV64I-NEXT: neg a1, a2671; RV64I-NEXT: sub a0, a1, a0672; RV64I-NEXT: ret673 %a1 = mul i32 %a, -559038737674 ret i32 %a1675}676 677define i64 @muli64_0xdeadbeef(i64 %a) nounwind {678; RV32I-LABEL: muli64_0xdeadbeef:679; RV32I: # %bb.0:680; RV32I-NEXT: addi sp, sp, -16681; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill682; RV32I-NEXT: lui a2, 912092683; RV32I-NEXT: addi a2, a2, -273684; RV32I-NEXT: li a3, 0685; RV32I-NEXT: call __muldi3686; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload687; RV32I-NEXT: addi sp, sp, 16688; RV32I-NEXT: ret689;690; RV64I-LABEL: muli64_0xdeadbeef:691; RV64I: # %bb.0:692; RV64I-NEXT: slli a1, a0, 8693; RV64I-NEXT: slli a2, a0, 14694; RV64I-NEXT: slli a3, a0, 17695; RV64I-NEXT: slli a4, a0, 20696; RV64I-NEXT: add a1, a1, a2697; RV64I-NEXT: slli a2, a0, 24698; RV64I-NEXT: add a3, a3, a4699; RV64I-NEXT: slli a4, a0, 29700; RV64I-NEXT: add a2, a2, a4701; RV64I-NEXT: slli a4, a0, 4702; RV64I-NEXT: add a4, a0, a4703; RV64I-NEXT: add a1, a4, a1704; RV64I-NEXT: slli a4, a0, 22705; RV64I-NEXT: add a3, a3, a4706; RV64I-NEXT: slli a0, a0, 32707; RV64I-NEXT: add a1, a1, a3708; RV64I-NEXT: sub a0, a0, a2709; RV64I-NEXT: sub a0, a0, a1710; RV64I-NEXT: ret711 %a1 = mul i64 %a, 3735928559712 ret i64 %a1713}714 715define i32 @muli32_0x12345678(i32 %a) nounwind {716; RV32I-LABEL: muli32_0x12345678:717; RV32I: # %bb.0:718; RV32I-NEXT: slli a1, a0, 3719; RV32I-NEXT: slli a2, a0, 7720; RV32I-NEXT: slli a3, a0, 9721; RV32I-NEXT: slli a4, a0, 11722; RV32I-NEXT: slli a5, a0, 13723; RV32I-NEXT: sub a2, a2, a1724; RV32I-NEXT: slli a1, a0, 15725; RV32I-NEXT: add a3, a3, a4726; RV32I-NEXT: slli a4, a0, 20727; RV32I-NEXT: sub a5, a5, a1728; RV32I-NEXT: slli a1, a0, 22729; RV32I-NEXT: sub a4, a4, a1730; RV32I-NEXT: sub a2, a2, a3731; RV32I-NEXT: slli a1, a0, 18732; RV32I-NEXT: sub a5, a5, a1733; RV32I-NEXT: slli a1, a0, 25734; RV32I-NEXT: sub a4, a4, a1735; RV32I-NEXT: slli a0, a0, 28736; RV32I-NEXT: sub a2, a2, a5737; RV32I-NEXT: sub a4, a4, a0738; RV32I-NEXT: sub a0, a2, a4739; RV32I-NEXT: ret740;741; RV64I-LABEL: muli32_0x12345678:742; RV64I: # %bb.0:743; RV64I-NEXT: slli a1, a0, 3744; RV64I-NEXT: slli a2, a0, 7745; RV64I-NEXT: slli a3, a0, 9746; RV64I-NEXT: slli a4, a0, 11747; RV64I-NEXT: slli a5, a0, 13748; RV64I-NEXT: sub a2, a2, a1749; RV64I-NEXT: slli a1, a0, 15750; RV64I-NEXT: add a3, a3, a4751; RV64I-NEXT: slli a4, a0, 20752; RV64I-NEXT: sub a5, a5, a1753; RV64I-NEXT: slli a1, a0, 22754; RV64I-NEXT: sub a4, a4, a1755; RV64I-NEXT: sub a2, a2, a3756; RV64I-NEXT: slli a1, a0, 18757; RV64I-NEXT: sub a5, a5, a1758; RV64I-NEXT: slli a1, a0, 25759; RV64I-NEXT: sub a4, a4, a1760; RV64I-NEXT: slli a0, a0, 28761; RV64I-NEXT: sub a2, a2, a5762; RV64I-NEXT: sub a4, a4, a0763; RV64I-NEXT: sub a0, a2, a4764; RV64I-NEXT: ret765 %a1 = mul i32 %a, 305419896766 ret i32 %a1767}768 769define i64 @muli64_0x12345678(i64 %a) nounwind {770; RV32I-LABEL: muli64_0x12345678:771; RV32I: # %bb.0:772; RV32I-NEXT: addi sp, sp, -16773; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill774; RV32I-NEXT: lui a2, 74565775; RV32I-NEXT: addi a2, a2, 1656776; RV32I-NEXT: li a3, 0777; RV32I-NEXT: call __muldi3778; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload779; RV32I-NEXT: addi sp, sp, 16780; RV32I-NEXT: ret781;782; RV64I-LABEL: muli64_0x12345678:783; RV64I: # %bb.0:784; RV64I-NEXT: slli a1, a0, 3785; RV64I-NEXT: slli a2, a0, 7786; RV64I-NEXT: slli a3, a0, 9787; RV64I-NEXT: slli a4, a0, 11788; RV64I-NEXT: slli a5, a0, 13789; RV64I-NEXT: sub a2, a2, a1790; RV64I-NEXT: slli a1, a0, 15791; RV64I-NEXT: add a3, a3, a4792; RV64I-NEXT: slli a4, a0, 20793; RV64I-NEXT: sub a5, a5, a1794; RV64I-NEXT: slli a1, a0, 22795; RV64I-NEXT: sub a4, a4, a1796; RV64I-NEXT: sub a2, a2, a3797; RV64I-NEXT: slli a1, a0, 18798; RV64I-NEXT: sub a5, a5, a1799; RV64I-NEXT: slli a1, a0, 25800; RV64I-NEXT: sub a4, a4, a1801; RV64I-NEXT: slli a0, a0, 28802; RV64I-NEXT: sub a2, a2, a5803; RV64I-NEXT: sub a4, a4, a0804; RV64I-NEXT: sub a0, a2, a4805; RV64I-NEXT: ret806 %a1 = mul i64 %a, 305419896807 ret i64 %a1808}809