24 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=riscv32 -mattr=+zcmp -run-pass=riscv-move-merge -verify-machineinstrs %s -o - | FileCheck %s3---4name: mov-merge5tracksRegLiveness: true6body: |7 bb.0.entry:8 liveins: $x8, $x99 ; CHECK-LABEL: name: mov-merge10 ; CHECK: liveins: $x8, $x911 ; CHECK-NEXT: {{ $}}12 ; CHECK-NEXT: $x12 = ADDI $x0, -313 ; CHECK-NEXT: SW renamable $x9, $x2, 5614 ; CHECK-NEXT: CM_MVA01S killed renamable $x9, renamable $x8, implicit-def $x10, implicit-def $x1115 ; CHECK-NEXT: SW renamable $x8, $x2, 6016 ; CHECK-NEXT: PseudoRET17 $x12 = ADDI $x0, -318 SW renamable $x9, $x2, 5619 $x10 = ADDI killed renamable $x9, 020 SW renamable $x8, $x2, 6021 $x11 = ADDI killed renamable $x8, 022 PseudoRET23...24