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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 < %s | FileCheck --check-prefix=RV64I %s3; RUN: llc -mtriple=riscv32 < %s | FileCheck --check-prefix=RV32I %s4@var = external global i325 6define void @func() {7; RV64I-LABEL: func:8; RV64I: # %bb.0:9; RV64I-NEXT: lui a0, 110; RV64I-NEXT: addi a0, a0, 1611; RV64I-NEXT: sub sp, sp, a012; RV64I-NEXT: .cfi_def_cfa_offset 411213; RV64I-NEXT: lui a0, %hi(var)14; RV64I-NEXT: lw a1, %lo(var)(a0)15; RV64I-NEXT: lw a2, %lo(var)(a0)16; RV64I-NEXT: lw a3, %lo(var)(a0)17; RV64I-NEXT: lw a4, %lo(var)(a0)18; RV64I-NEXT: lw a5, %lo(var)(a0)19; RV64I-NEXT: lw a6, %lo(var)(a0)20; RV64I-NEXT: lw a7, %lo(var)(a0)21; RV64I-NEXT: lw t0, %lo(var)(a0)22; RV64I-NEXT: lw t1, %lo(var)(a0)23; RV64I-NEXT: lw t2, %lo(var)(a0)24; RV64I-NEXT: lw t3, %lo(var)(a0)25; RV64I-NEXT: lw t4, %lo(var)(a0)26; RV64I-NEXT: lw t5, %lo(var)(a0)27; RV64I-NEXT: lw t6, %lo(var)(a0)28; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill29; RV64I-NEXT: lui s0, 130; RV64I-NEXT: add s0, sp, s031; RV64I-NEXT: sw a1, 12(s0)32; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload33; RV64I-NEXT: sw a1, %lo(var)(a0)34; RV64I-NEXT: sw a2, %lo(var)(a0)35; RV64I-NEXT: sw a3, %lo(var)(a0)36; RV64I-NEXT: sw a4, %lo(var)(a0)37; RV64I-NEXT: sw a5, %lo(var)(a0)38; RV64I-NEXT: sw a6, %lo(var)(a0)39; RV64I-NEXT: sw a7, %lo(var)(a0)40; RV64I-NEXT: sw t0, %lo(var)(a0)41; RV64I-NEXT: sw t1, %lo(var)(a0)42; RV64I-NEXT: sw t2, %lo(var)(a0)43; RV64I-NEXT: sw t3, %lo(var)(a0)44; RV64I-NEXT: sw t4, %lo(var)(a0)45; RV64I-NEXT: sw t5, %lo(var)(a0)46; RV64I-NEXT: sw t6, %lo(var)(a0)47; RV64I-NEXT: lui a0, 148; RV64I-NEXT: addi a0, a0, 1649; RV64I-NEXT: add sp, sp, a050; RV64I-NEXT: .cfi_def_cfa_offset 051; RV64I-NEXT: ret52;53; RV32I-LABEL: func:54; RV32I: # %bb.0:55; RV32I-NEXT: lui a0, 156; RV32I-NEXT: addi a0, a0, 1657; RV32I-NEXT: sub sp, sp, a058; RV32I-NEXT: .cfi_def_cfa_offset 411259; RV32I-NEXT: lui a0, %hi(var)60; RV32I-NEXT: lw a1, %lo(var)(a0)61; RV32I-NEXT: lw a2, %lo(var)(a0)62; RV32I-NEXT: lw a3, %lo(var)(a0)63; RV32I-NEXT: lw a4, %lo(var)(a0)64; RV32I-NEXT: lw a5, %lo(var)(a0)65; RV32I-NEXT: lw a6, %lo(var)(a0)66; RV32I-NEXT: lw a7, %lo(var)(a0)67; RV32I-NEXT: lw t0, %lo(var)(a0)68; RV32I-NEXT: lw t1, %lo(var)(a0)69; RV32I-NEXT: lw t2, %lo(var)(a0)70; RV32I-NEXT: lw t3, %lo(var)(a0)71; RV32I-NEXT: lw t4, %lo(var)(a0)72; RV32I-NEXT: lw t5, %lo(var)(a0)73; RV32I-NEXT: lw t6, %lo(var)(a0)74; RV32I-NEXT: sw s0, 0(sp) # 4-byte Folded Spill75; RV32I-NEXT: lui s0, 176; RV32I-NEXT: add s0, sp, s077; RV32I-NEXT: sw a1, 12(s0)78; RV32I-NEXT: lw s0, 0(sp) # 4-byte Folded Reload79; RV32I-NEXT: sw a1, %lo(var)(a0)80; RV32I-NEXT: sw a2, %lo(var)(a0)81; RV32I-NEXT: sw a3, %lo(var)(a0)82; RV32I-NEXT: sw a4, %lo(var)(a0)83; RV32I-NEXT: sw a5, %lo(var)(a0)84; RV32I-NEXT: sw a6, %lo(var)(a0)85; RV32I-NEXT: sw a7, %lo(var)(a0)86; RV32I-NEXT: sw t0, %lo(var)(a0)87; RV32I-NEXT: sw t1, %lo(var)(a0)88; RV32I-NEXT: sw t2, %lo(var)(a0)89; RV32I-NEXT: sw t3, %lo(var)(a0)90; RV32I-NEXT: sw t4, %lo(var)(a0)91; RV32I-NEXT: sw t5, %lo(var)(a0)92; RV32I-NEXT: sw t6, %lo(var)(a0)93; RV32I-NEXT: lui a0, 194; RV32I-NEXT: addi a0, a0, 1695; RV32I-NEXT: add sp, sp, a096; RV32I-NEXT: .cfi_def_cfa_offset 097; RV32I-NEXT: ret98 %space = alloca i32, align 499 %stackspace = alloca[1024 x i32], align 4100 101 ;; Load values to increase register pressure.102 %v0 = load volatile i32, ptr @var103 %v1 = load volatile i32, ptr @var104 %v2 = load volatile i32, ptr @var105 %v3 = load volatile i32, ptr @var106 %v4 = load volatile i32, ptr @var107 %v5 = load volatile i32, ptr @var108 %v6 = load volatile i32, ptr @var109 %v7 = load volatile i32, ptr @var110 %v8 = load volatile i32, ptr @var111 %v9 = load volatile i32, ptr @var112 %v10 = load volatile i32, ptr @var113 %v11 = load volatile i32, ptr @var114 %v12 = load volatile i32, ptr @var115 %v13 = load volatile i32, ptr @var116 117 store volatile i32 %v0, ptr %space118 119 ;; store values so they are used.120 store volatile i32 %v0, ptr @var121 store volatile i32 %v1, ptr @var122 store volatile i32 %v2, ptr @var123 store volatile i32 %v3, ptr @var124 store volatile i32 %v4, ptr @var125 store volatile i32 %v5, ptr @var126 store volatile i32 %v6, ptr @var127 store volatile i32 %v7, ptr @var128 store volatile i32 %v8, ptr @var129 store volatile i32 %v9, ptr @var130 store volatile i32 %v10, ptr @var131 store volatile i32 %v11, ptr @var132 store volatile i32 %v12, ptr @var133 store volatile i32 %v13, ptr @var134 135 ret void136}137 138define void @shrink_wrap(i1 %c) {139; RV64I-LABEL: shrink_wrap:140; RV64I: # %bb.0:141; RV64I-NEXT: andi a0, a0, 1142; RV64I-NEXT: bnez a0, .LBB1_2143; RV64I-NEXT: # %bb.1: # %bar144; RV64I-NEXT: lui a0, 1145; RV64I-NEXT: addi a0, a0, 16146; RV64I-NEXT: sub sp, sp, a0147; RV64I-NEXT: .cfi_def_cfa_offset 4112148; RV64I-NEXT: lui a0, %hi(var)149; RV64I-NEXT: lw a1, %lo(var)(a0)150; RV64I-NEXT: lw a2, %lo(var)(a0)151; RV64I-NEXT: lw a3, %lo(var)(a0)152; RV64I-NEXT: lw a4, %lo(var)(a0)153; RV64I-NEXT: lw a5, %lo(var)(a0)154; RV64I-NEXT: lw a6, %lo(var)(a0)155; RV64I-NEXT: lw a7, %lo(var)(a0)156; RV64I-NEXT: lw t0, %lo(var)(a0)157; RV64I-NEXT: lw t1, %lo(var)(a0)158; RV64I-NEXT: lw t2, %lo(var)(a0)159; RV64I-NEXT: lw t3, %lo(var)(a0)160; RV64I-NEXT: lw t4, %lo(var)(a0)161; RV64I-NEXT: lw t5, %lo(var)(a0)162; RV64I-NEXT: lw t6, %lo(var)(a0)163; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill164; RV64I-NEXT: lui s0, 1165; RV64I-NEXT: add s0, sp, s0166; RV64I-NEXT: sw a1, 12(s0)167; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload168; RV64I-NEXT: sw a1, %lo(var)(a0)169; RV64I-NEXT: sw a2, %lo(var)(a0)170; RV64I-NEXT: sw a3, %lo(var)(a0)171; RV64I-NEXT: sw a4, %lo(var)(a0)172; RV64I-NEXT: sw a5, %lo(var)(a0)173; RV64I-NEXT: sw a6, %lo(var)(a0)174; RV64I-NEXT: sw a7, %lo(var)(a0)175; RV64I-NEXT: sw t0, %lo(var)(a0)176; RV64I-NEXT: sw t1, %lo(var)(a0)177; RV64I-NEXT: sw t2, %lo(var)(a0)178; RV64I-NEXT: sw t3, %lo(var)(a0)179; RV64I-NEXT: sw t4, %lo(var)(a0)180; RV64I-NEXT: sw t5, %lo(var)(a0)181; RV64I-NEXT: sw t6, %lo(var)(a0)182; RV64I-NEXT: lui a0, 1183; RV64I-NEXT: addi a0, a0, 16184; RV64I-NEXT: add sp, sp, a0185; RV64I-NEXT: .cfi_def_cfa_offset 0186; RV64I-NEXT: .LBB1_2: # %foo187; RV64I-NEXT: ret188;189; RV32I-LABEL: shrink_wrap:190; RV32I: # %bb.0:191; RV32I-NEXT: andi a0, a0, 1192; RV32I-NEXT: bnez a0, .LBB1_2193; RV32I-NEXT: # %bb.1: # %bar194; RV32I-NEXT: lui a0, 1195; RV32I-NEXT: addi a0, a0, 16196; RV32I-NEXT: sub sp, sp, a0197; RV32I-NEXT: .cfi_def_cfa_offset 4112198; RV32I-NEXT: lui a0, %hi(var)199; RV32I-NEXT: lw a1, %lo(var)(a0)200; RV32I-NEXT: lw a2, %lo(var)(a0)201; RV32I-NEXT: lw a3, %lo(var)(a0)202; RV32I-NEXT: lw a4, %lo(var)(a0)203; RV32I-NEXT: lw a5, %lo(var)(a0)204; RV32I-NEXT: lw a6, %lo(var)(a0)205; RV32I-NEXT: lw a7, %lo(var)(a0)206; RV32I-NEXT: lw t0, %lo(var)(a0)207; RV32I-NEXT: lw t1, %lo(var)(a0)208; RV32I-NEXT: lw t2, %lo(var)(a0)209; RV32I-NEXT: lw t3, %lo(var)(a0)210; RV32I-NEXT: lw t4, %lo(var)(a0)211; RV32I-NEXT: lw t5, %lo(var)(a0)212; RV32I-NEXT: lw t6, %lo(var)(a0)213; RV32I-NEXT: sw s0, 0(sp) # 4-byte Folded Spill214; RV32I-NEXT: lui s0, 1215; RV32I-NEXT: add s0, sp, s0216; RV32I-NEXT: sw a1, 12(s0)217; RV32I-NEXT: lw s0, 0(sp) # 4-byte Folded Reload218; RV32I-NEXT: sw a1, %lo(var)(a0)219; RV32I-NEXT: sw a2, %lo(var)(a0)220; RV32I-NEXT: sw a3, %lo(var)(a0)221; RV32I-NEXT: sw a4, %lo(var)(a0)222; RV32I-NEXT: sw a5, %lo(var)(a0)223; RV32I-NEXT: sw a6, %lo(var)(a0)224; RV32I-NEXT: sw a7, %lo(var)(a0)225; RV32I-NEXT: sw t0, %lo(var)(a0)226; RV32I-NEXT: sw t1, %lo(var)(a0)227; RV32I-NEXT: sw t2, %lo(var)(a0)228; RV32I-NEXT: sw t3, %lo(var)(a0)229; RV32I-NEXT: sw t4, %lo(var)(a0)230; RV32I-NEXT: sw t5, %lo(var)(a0)231; RV32I-NEXT: sw t6, %lo(var)(a0)232; RV32I-NEXT: lui a0, 1233; RV32I-NEXT: addi a0, a0, 16234; RV32I-NEXT: add sp, sp, a0235; RV32I-NEXT: .cfi_def_cfa_offset 0236; RV32I-NEXT: .LBB1_2: # %foo237; RV32I-NEXT: ret238 %space = alloca i32, align 4239 %stackspace = alloca[1024 x i32], align 4240 br i1 %c, label %foo, label %bar241 242bar:243 244 ;; Load values to increase register pressure.245 %v0 = load volatile i32, ptr @var246 %v1 = load volatile i32, ptr @var247 %v2 = load volatile i32, ptr @var248 %v3 = load volatile i32, ptr @var249 %v4 = load volatile i32, ptr @var250 %v5 = load volatile i32, ptr @var251 %v6 = load volatile i32, ptr @var252 %v7 = load volatile i32, ptr @var253 %v8 = load volatile i32, ptr @var254 %v9 = load volatile i32, ptr @var255 %v10 = load volatile i32, ptr @var256 %v11 = load volatile i32, ptr @var257 %v12 = load volatile i32, ptr @var258 %v13 = load volatile i32, ptr @var259 260 store volatile i32 %v0, ptr %space261 262 ;; store values so they are used.263 store volatile i32 %v0, ptr @var264 store volatile i32 %v1, ptr @var265 store volatile i32 %v2, ptr @var266 store volatile i32 %v3, ptr @var267 store volatile i32 %v4, ptr @var268 store volatile i32 %v5, ptr @var269 store volatile i32 %v6, ptr @var270 store volatile i32 %v7, ptr @var271 store volatile i32 %v8, ptr @var272 store volatile i32 %v9, ptr @var273 store volatile i32 %v10, ptr @var274 store volatile i32 %v11, ptr @var275 store volatile i32 %v12, ptr @var276 store volatile i32 %v13, ptr @var277 br label %foo278 279foo:280 ret void281}282