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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -mtriple=riscv64 -mattr=+d | FileCheck %s3 4define void @test(ptr %0, ptr %1) nounwind {5; CHECK-LABEL: test:6; CHECK: # %bb.0:7; CHECK-NEXT: addi sp, sp, -808; CHECK-NEXT: sd ra, 72(sp) # 8-byte Folded Spill9; CHECK-NEXT: sd s0, 64(sp) # 8-byte Folded Spill10; CHECK-NEXT: sd s1, 56(sp) # 8-byte Folded Spill11; CHECK-NEXT: fsd fs0, 48(sp) # 8-byte Folded Spill12; CHECK-NEXT: fsd fs1, 40(sp) # 8-byte Folded Spill13; CHECK-NEXT: fsd fs2, 32(sp) # 8-byte Folded Spill14; CHECK-NEXT: fsd fs3, 24(sp) # 8-byte Folded Spill15; CHECK-NEXT: fsd fs4, 16(sp) # 8-byte Folded Spill16; CHECK-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill17; CHECK-NEXT: fsd fs6, 0(sp) # 8-byte Folded Spill18; CHECK-NEXT: mv s0, a119; CHECK-NEXT: mv s1, a020; CHECK-NEXT: lhu a0, 12(a0)21; CHECK-NEXT: fmv.w.x fa0, a022; CHECK-NEXT: call __extendhfsf223; CHECK-NEXT: fmv.s fs0, fa024; CHECK-NEXT: lhu a0, 10(s1)25; CHECK-NEXT: fmv.w.x fa0, a026; CHECK-NEXT: call __extendhfsf227; CHECK-NEXT: fmv.s fs1, fa028; CHECK-NEXT: lhu a0, 8(s1)29; CHECK-NEXT: fmv.w.x fa0, a030; CHECK-NEXT: call __extendhfsf231; CHECK-NEXT: fmv.s fs2, fa032; CHECK-NEXT: lhu a0, 6(s1)33; CHECK-NEXT: fmv.w.x fa0, a034; CHECK-NEXT: call __extendhfsf235; CHECK-NEXT: fmv.s fs3, fa036; CHECK-NEXT: lhu a0, 4(s1)37; CHECK-NEXT: fmv.w.x fa0, a038; CHECK-NEXT: call __extendhfsf239; CHECK-NEXT: fmv.s fs4, fa040; CHECK-NEXT: lhu a0, 2(s1)41; CHECK-NEXT: fmv.w.x fa0, a042; CHECK-NEXT: call __extendhfsf243; CHECK-NEXT: fmv.s fs5, fa044; CHECK-NEXT: lhu a0, 0(s1)45; CHECK-NEXT: fmv.w.x fa0, a046; CHECK-NEXT: call __extendhfsf247; CHECK-NEXT: fcvt.d.s fs6, fa048; CHECK-NEXT: fcvt.d.s fs5, fs549; CHECK-NEXT: fcvt.d.s fs4, fs450; CHECK-NEXT: lhu a0, 14(s1)51; CHECK-NEXT: fcvt.d.s fs3, fs352; CHECK-NEXT: fcvt.d.s fs2, fs253; CHECK-NEXT: fcvt.d.s fs1, fs154; CHECK-NEXT: fmv.w.x fa0, a055; CHECK-NEXT: fcvt.d.s fs0, fs056; CHECK-NEXT: call __extendhfsf257; CHECK-NEXT: fcvt.d.s fa5, fa058; CHECK-NEXT: fsd fs2, 32(s0)59; CHECK-NEXT: fsd fs1, 40(s0)60; CHECK-NEXT: fsd fs0, 48(s0)61; CHECK-NEXT: fsd fa5, 56(s0)62; CHECK-NEXT: fsd fs6, 0(s0)63; CHECK-NEXT: fsd fs5, 8(s0)64; CHECK-NEXT: fsd fs4, 16(s0)65; CHECK-NEXT: fsd fs3, 24(s0)66; CHECK-NEXT: ld ra, 72(sp) # 8-byte Folded Reload67; CHECK-NEXT: ld s0, 64(sp) # 8-byte Folded Reload68; CHECK-NEXT: ld s1, 56(sp) # 8-byte Folded Reload69; CHECK-NEXT: fld fs0, 48(sp) # 8-byte Folded Reload70; CHECK-NEXT: fld fs1, 40(sp) # 8-byte Folded Reload71; CHECK-NEXT: fld fs2, 32(sp) # 8-byte Folded Reload72; CHECK-NEXT: fld fs3, 24(sp) # 8-byte Folded Reload73; CHECK-NEXT: fld fs4, 16(sp) # 8-byte Folded Reload74; CHECK-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload75; CHECK-NEXT: fld fs6, 0(sp) # 8-byte Folded Reload76; CHECK-NEXT: addi sp, sp, 8077; CHECK-NEXT: ret78 %V1 = load <8 x half>, ptr %079 %V2 = fpext <8 x half> %V1 to <8 x double>80 store <8 x double> %V2, ptr %181 ret void82}83