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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefixes=NO-PREFER-W-INST %s4; RUN: llc -mtriple=riscv64 -mattr=+m -riscv-disable-strip-w-suffix -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefixes=NO-STRIP %s6; RUN: llc -mtriple=riscv64 -mattr=+m,+prefer-w-inst -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefixes=PREFER-W-INST %s8 9define i32 @addiw(i32 %a) {10; NO-PREFER-W-INST-LABEL: addiw:11; NO-PREFER-W-INST: # %bb.0:12; NO-PREFER-W-INST-NEXT: lui a1, 113; NO-PREFER-W-INST-NEXT: addi a1, a1, -114; NO-PREFER-W-INST-NEXT: addw a0, a0, a115; NO-PREFER-W-INST-NEXT: ret16;17; NO-STRIP-LABEL: addiw:18; NO-STRIP: # %bb.0:19; NO-STRIP-NEXT: lui a1, 120; NO-STRIP-NEXT: addi a1, a1, -121; NO-STRIP-NEXT: addw a0, a0, a122; NO-STRIP-NEXT: ret23;24; PREFER-W-INST-LABEL: addiw:25; PREFER-W-INST: # %bb.0:26; PREFER-W-INST-NEXT: lui a1, 127; PREFER-W-INST-NEXT: addiw a1, a1, -128; PREFER-W-INST-NEXT: addw a0, a0, a129; PREFER-W-INST-NEXT: ret30 %ret = add i32 %a, 409531 ret i32 %ret32}33 34define i32 @addw(i32 %a, i32 %b) {35; NO-PREFER-W-INST-LABEL: addw:36; NO-PREFER-W-INST: # %bb.0:37; NO-PREFER-W-INST-NEXT: add a0, a0, a138; NO-PREFER-W-INST-NEXT: addiw a0, a0, 102439; NO-PREFER-W-INST-NEXT: ret40;41; NO-STRIP-LABEL: addw:42; NO-STRIP: # %bb.0:43; NO-STRIP-NEXT: addw a0, a0, a144; NO-STRIP-NEXT: addiw a0, a0, 102445; NO-STRIP-NEXT: ret46;47; PREFER-W-INST-LABEL: addw:48; PREFER-W-INST: # %bb.0:49; PREFER-W-INST-NEXT: addw a0, a0, a150; PREFER-W-INST-NEXT: addiw a0, a0, 102451; PREFER-W-INST-NEXT: ret52 %add = add i32 %a, %b53 %ret = add i32 %add, 102454 ret i32 %ret55}56 57define i32 @mulw(i32 %a, i32 %b) {58; NO-PREFER-W-INST-LABEL: mulw:59; NO-PREFER-W-INST: # %bb.0:60; NO-PREFER-W-INST-NEXT: mul a1, a0, a161; NO-PREFER-W-INST-NEXT: mul a0, a0, a162; NO-PREFER-W-INST-NEXT: addiw a0, a0, 102463; NO-PREFER-W-INST-NEXT: ret64;65; NO-STRIP-LABEL: mulw:66; NO-STRIP: # %bb.0:67; NO-STRIP-NEXT: mulw a1, a0, a168; NO-STRIP-NEXT: mulw a0, a0, a169; NO-STRIP-NEXT: addiw a0, a0, 102470; NO-STRIP-NEXT: ret71;72; PREFER-W-INST-LABEL: mulw:73; PREFER-W-INST: # %bb.0:74; PREFER-W-INST-NEXT: mulw a1, a0, a175; PREFER-W-INST-NEXT: mulw a0, a0, a176; PREFER-W-INST-NEXT: addiw a0, a0, 102477; PREFER-W-INST-NEXT: ret78 %mul1 = mul i32 %a, %b79 %mul = mul i32 %a, %mul180 %ret = add i32 %mul, 102481 ret i32 %ret82}83 84define i32 @slliw(i32 %a) {85; NO-PREFER-W-INST-LABEL: slliw:86; NO-PREFER-W-INST: # %bb.0:87; NO-PREFER-W-INST-NEXT: slli a0, a0, 188; NO-PREFER-W-INST-NEXT: addiw a0, a0, 102489; NO-PREFER-W-INST-NEXT: ret90;91; NO-STRIP-LABEL: slliw:92; NO-STRIP: # %bb.0:93; NO-STRIP-NEXT: slliw a0, a0, 194; NO-STRIP-NEXT: addiw a0, a0, 102495; NO-STRIP-NEXT: ret96;97; PREFER-W-INST-LABEL: slliw:98; PREFER-W-INST: # %bb.0:99; PREFER-W-INST-NEXT: slliw a0, a0, 1100; PREFER-W-INST-NEXT: addiw a0, a0, 1024101; PREFER-W-INST-NEXT: ret102 %shl = shl i32 %a, 1103 %ret = add i32 %shl, 1024104 ret i32 %ret105}106