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1; RUN: llc -mtriple=riscv64 -mcpu=sifive-u74 -verify-machineinstrs < %s | FileCheck %s2 3; CHECK: .option push4; CHECK-NEXT: .option arch, +v, +zve32f, +zve32x, +zve64d, +zve64f, +zve64x, +zvl128b, +zvl32b, +zvl64b5define void @test1() "target-features"="+a,+d,+f,+m,+c,+v,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b" {6; CHECK-LABEL: test17; CHECK: .option pop8entry:9 ret void10}11 12; CHECK: .option push13; CHECK-NEXT: .option arch, +zihintntl14define void @test2() "target-features"="+a,+d,+f,+m,+zihintntl,+zifencei" {15; CHECK-LABEL: test216; CHECK: .option pop17entry:18 ret void19}20 21; CHECK: .option push22; CHECK-NEXT: .option arch, -a, -d, -f, -m23define void @test3() "target-features"="-a,-d,-f,-m" {24; CHECK-LABEL: test325; CHECK: .option pop26entry:27 ret void28}29 30; CHECK-NOT: .option push31define void @test4() {32; CHECK-LABEL: test433; CHECK-NOT: .option pop34entry:35 ret void36}37 38; CHECK-NOT: .option push39define void @test5() "target-features"="+unaligned-scalar-mem" {40; CHECK-LABEL: test541; CHECK-NOT: .option pop42entry:43 ret void44}45