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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs < %s \3; RUN: | FileCheck %s4 5; NDS.BBC6 7define i32 @bbc(i32 %a) nounwind {8; CHECK-LABEL: bbc:9; CHECK: # %bb.0:10; CHECK-NEXT: nds.bbc a0, 16, .LBB0_211; CHECK-NEXT: # %bb.1: # %t12; CHECK-NEXT: li a0, 113; CHECK-NEXT: ret14; CHECK-NEXT: .LBB0_2: # %f15; CHECK-NEXT: li a0, 016; CHECK-NEXT: ret17 %and = and i32 %a, 6553618 %tst = icmp ne i32 %and, 019 br i1 %tst, label %t, label %f20f:21 ret i32 022t:23 ret i32 124}25 26define i32 @select_bbc(i32 %a, i32 %b, i32 %c) nounwind {27; CHECK-LABEL: select_bbc:28; CHECK: # %bb.0:29; CHECK-NEXT: nds.bbc a0, 16, .LBB1_230; CHECK-NEXT: # %bb.1:31; CHECK-NEXT: mv a1, a232; CHECK-NEXT: .LBB1_2:33; CHECK-NEXT: mv a0, a134; CHECK-NEXT: ret35 %and = and i32 %a, 6553636 %tst = icmp eq i32 %and, 037 %ret = select i1 %tst, i32 %b, i32 %c38 ret i32 %ret39}40 41; NDS.BBS42 43define i32 @bbs(i32 %a) nounwind {44; CHECK-LABEL: bbs:45; CHECK: # %bb.0:46; CHECK-NEXT: nds.bbs a0, 16, .LBB2_247; CHECK-NEXT: # %bb.1: # %t48; CHECK-NEXT: li a0, 149; CHECK-NEXT: ret50; CHECK-NEXT: .LBB2_2: # %f51; CHECK-NEXT: li a0, 052; CHECK-NEXT: ret53 %and = and i32 %a, 6553654 %tst = icmp eq i32 %and, 055 br i1 %tst, label %t, label %f56f:57 ret i32 058t:59 ret i32 160}61 62define i32 @select_bbs(i32 %a, i32 %b, i32 %c) nounwind {63; CHECK-LABEL: select_bbs:64; CHECK: # %bb.0:65; CHECK-NEXT: nds.bbs a0, 16, .LBB3_266; CHECK-NEXT: # %bb.1:67; CHECK-NEXT: mv a1, a268; CHECK-NEXT: .LBB3_2:69; CHECK-NEXT: mv a0, a170; CHECK-NEXT: ret71 %and = and i32 %a, 6553672 %tst = icmp ne i32 %and, 073 %ret = select i1 %tst, i32 %b, i32 %c74 ret i32 %ret75}76 77; NDS.BEQC78 79define i32 @beqc(i32 %a) nounwind {80; CHECK-LABEL: beqc:81; CHECK: # %bb.0:82; CHECK-NEXT: nds.beqc a0, 5, .LBB4_283; CHECK-NEXT: # %bb.1: # %t84; CHECK-NEXT: li a0, 185; CHECK-NEXT: ret86; CHECK-NEXT: .LBB4_2: # %f87; CHECK-NEXT: li a0, 088; CHECK-NEXT: ret89 %tst = icmp ne i32 %a, 590 br i1 %tst, label %t, label %f91f:92 ret i32 093t:94 ret i32 195}96 97define i32 @select_beqc(i32 %a, i32 %b, i32 %c) nounwind {98; CHECK-LABEL: select_beqc:99; CHECK: # %bb.0:100; CHECK-NEXT: nds.beqc a0, 5, .LBB5_2101; CHECK-NEXT: # %bb.1:102; CHECK-NEXT: mv a1, a2103; CHECK-NEXT: .LBB5_2:104; CHECK-NEXT: mv a0, a1105; CHECK-NEXT: ret106 %tst = icmp eq i32 %a, 5107 %ret = select i1 %tst, i32 %b, i32 %c108 ret i32 %ret109}110 111; NDS.BNEC112 113define i32 @bnec(i32 %a) nounwind {114; CHECK-LABEL: bnec:115; CHECK: # %bb.0:116; CHECK-NEXT: nds.bnec a0, 5, .LBB6_2117; CHECK-NEXT: # %bb.1: # %t118; CHECK-NEXT: li a0, 1119; CHECK-NEXT: ret120; CHECK-NEXT: .LBB6_2: # %f121; CHECK-NEXT: li a0, 0122; CHECK-NEXT: ret123 %tst = icmp eq i32 %a, 5124 br i1 %tst, label %t, label %f125f:126 ret i32 0127t:128 ret i32 1129}130 131define i32 @select_bnec(i32 %a, i32 %b, i32 %c) nounwind {132; CHECK-LABEL: select_bnec:133; CHECK: # %bb.0:134; CHECK-NEXT: nds.bnec a0, 5, .LBB7_2135; CHECK-NEXT: # %bb.1:136; CHECK-NEXT: mv a1, a2137; CHECK-NEXT: .LBB7_2:138; CHECK-NEXT: mv a0, a1139; CHECK-NEXT: ret140 %tst = icmp ne i32 %a, 5141 %ret = select i1 %tst, i32 %b, i32 %c142 ret i32 %ret143}144 145; NDS.BFOZ146 147; MSB >= LSB148 149define i32 @bfoz_from_and_i32(i32 %x) {150; CHECK-LABEL: bfoz_from_and_i32:151; CHECK: # %bb.0:152; CHECK-NEXT: nds.bfoz a0, a0, 11, 0153; CHECK-NEXT: ret154 %a = and i32 %x, 4095155 ret i32 %a156}157 158define i64 @bfoz_from_and_i64(i64 %x) {159; CHECK-LABEL: bfoz_from_and_i64:160; CHECK: # %bb.0:161; CHECK-NEXT: nds.bfoz a0, a0, 11, 0162; CHECK-NEXT: li a1, 0163; CHECK-NEXT: ret164 %a = and i64 %x, 4095165 ret i64 %a166}167 168define i32 @bfoz_from_and_lshr_i32(i32 %x) {169; CHECK-LABEL: bfoz_from_and_lshr_i32:170; CHECK: # %bb.0:171; CHECK-NEXT: nds.bfoz a0, a0, 25, 23172; CHECK-NEXT: ret173 %shifted = lshr i32 %x, 23174 %masked = and i32 %shifted, 7175 ret i32 %masked176}177 178define i64 @bfoz_from_and_lshr_i64(i64 %x) {179; CHECK-LABEL: bfoz_from_and_lshr_i64:180; CHECK: # %bb.0:181; CHECK-NEXT: nds.bfoz a0, a1, 25, 14182; CHECK-NEXT: li a1, 0183; CHECK-NEXT: ret184 %shifted = lshr i64 %x, 46185 %masked = and i64 %shifted, 4095186 ret i64 %masked187}188 189define i32 @bfoz_from_lshr_and_i32(i32 %x) {190; CHECK-LABEL: bfoz_from_lshr_and_i32:191; CHECK: # %bb.0:192; CHECK-NEXT: nds.bfoz a0, a0, 23, 12193; CHECK-NEXT: ret194 %masked = and i32 %x, 16773120195 %shifted = lshr i32 %masked, 12196 ret i32 %shifted197}198 199define i64 @bfoz_from_lshr_and_i64(i64 %x) {200; CHECK-LABEL: bfoz_from_lshr_and_i64:201; CHECK: # %bb.0:202; CHECK-NEXT: andi a1, a1, 15203; CHECK-NEXT: srli a0, a0, 24204; CHECK-NEXT: slli a1, a1, 8205; CHECK-NEXT: or a0, a0, a1206; CHECK-NEXT: li a1, 0207; CHECK-NEXT: ret208 %masked = and i64 %x, 68702699520209 %shifted = lshr i64 %masked, 24210 ret i64 %shifted211}212 213; MSB = 0214 215define i32 @bfoz_from_and_shl_with_msb_zero_i32(i32 %x) {216; CHECK-LABEL: bfoz_from_and_shl_with_msb_zero_i32:217; CHECK: # %bb.0:218; CHECK-NEXT: nds.bfoz a0, a0, 0, 15219; CHECK-NEXT: ret220 %shifted = shl i32 %x, 15221 %masked = and i32 %shifted, 32768222 ret i32 %masked223}224 225define i32 @bfoz_from_lshr_shl_with_msb_zero_i32(i32 %x) {226; CHECK-LABEL: bfoz_from_lshr_shl_with_msb_zero_i32:227; CHECK: # %bb.0:228; CHECK-NEXT: nds.bfoz a0, a0, 0, 18229; CHECK-NEXT: ret230 %shl = shl i32 %x, 31231 %lshr = lshr i32 %shl, 13232 ret i32 %lshr233}234 235; MSB < LSB236 237define i32 @bfoz_from_and_shl_i32(i32 %x) {238; CHECK-LABEL: bfoz_from_and_shl_i32:239; CHECK: # %bb.0:240; CHECK-NEXT: nds.bfoz a0, a0, 12, 23241; CHECK-NEXT: ret242 %shifted = shl i32 %x, 12243 %masked = and i32 %shifted, 16773120244 ret i32 %masked245}246 247define i32 @bfoz_from_lshr_shl_i32(i32 %x) {248; CHECK-LABEL: bfoz_from_lshr_shl_i32:249; CHECK: # %bb.0:250; CHECK-NEXT: nds.bfoz a0, a0, 19, 24251; CHECK-NEXT: ret252 %shl = shl i32 %x, 26253 %lshr = lshr i32 %shl, 7254 ret i32 %lshr255}256 257; NDS.BFOS258 259; MSB >= LSB260 261define i32 @bfos_from_ashr_shl_i32(i32 %x) {262; CHECK-LABEL: bfos_from_ashr_shl_i32:263; CHECK: # %bb.0:264; CHECK-NEXT: nds.bfos a0, a0, 23, 16265; CHECK-NEXT: ret266 %shl = shl i32 %x, 8267 %ashr = ashr i32 %shl, 24268 ret i32 %ashr269}270 271define i32 @bfos_from_ashr_sexti8_i32(i8 %x) {272; CHECK-LABEL: bfos_from_ashr_sexti8_i32:273; CHECK: # %bb.0:274; CHECK-NEXT: nds.bfos a0, a0, 7, 5275; CHECK-NEXT: ret276 %sext = sext i8 %x to i32277 %ashr = ashr i32 %sext, 5278 ret i32 %ashr279}280 281define i32 @bfos_from_ashr_sexti16_i32(i16 %x) {282; CHECK-LABEL: bfos_from_ashr_sexti16_i32:283; CHECK: # %bb.0:284; CHECK-NEXT: nds.bfos a0, a0, 15, 11285; CHECK-NEXT: ret286 %sext = sext i16 %x to i32287 %ashr = ashr i32 %sext, 11288 ret i32 %ashr289}290 291; MSB = 0292 293define i32 @bfos_from_ashr_shl_with_msb_zero_insert_i32(i32 %x) {294; CHECK-LABEL: bfos_from_ashr_shl_with_msb_zero_insert_i32:295; CHECK: # %bb.0:296; CHECK-NEXT: nds.bfos a0, a0, 0, 14297; CHECK-NEXT: ret298 %shl = shl i32 %x, 31299 %lshr = ashr i32 %shl, 17300 ret i32 %lshr301}302 303; MSB < LSB304 305define i32 @bfos_from_ashr_shl_insert_i32(i32 %x) {306; CHECK-LABEL: bfos_from_ashr_shl_insert_i32:307; CHECK: # %bb.0:308; CHECK-NEXT: nds.bfos a0, a0, 18, 20309; CHECK-NEXT: ret310 %shl = shl i32 %x, 29311 %lshr = ashr i32 %shl, 11312 ret i32 %lshr313}314 315; sext316 317define i32 @sexti1_i32(i32 %a) {318; CHECK-LABEL: sexti1_i32:319; CHECK: # %bb.0:320; CHECK-NEXT: nds.bfos a0, a0, 0, 0321; CHECK-NEXT: ret322 %shl = shl i32 %a, 31323 %shr = ashr exact i32 %shl, 31324 ret i32 %shr325}326 327define i32 @sexti1_i32_2(i1 %a) {328; CHECK-LABEL: sexti1_i32_2:329; CHECK: # %bb.0:330; CHECK-NEXT: nds.bfos a0, a0, 0, 0331; CHECK-NEXT: ret332 %1 = sext i1 %a to i32333 ret i32 %1334}335 336; Make sure we don't use not+nds.bfos337define zeroext i8 @sexti1_i32_setcc(i32 signext %a) {338; CHECK-LABEL: sexti1_i32_setcc:339; CHECK: # %bb.0:340; CHECK-NEXT: srli a0, a0, 31341; CHECK-NEXT: addi a0, a0, -1342; CHECK-NEXT: zext.b a0, a0343; CHECK-NEXT: ret344 %icmp = icmp sgt i32 %a, -1345 %sext = sext i1 %icmp to i8346 ret i8 %sext347}348 349; Make sure we don't use seqz+nds.bfos instead of snez+addi350define i32 @sexti1_i32_setcc_2(i32 %a, i32 %b) {351; CHECK-LABEL: sexti1_i32_setcc_2:352; CHECK: # %bb.0:353; CHECK-NEXT: xor a0, a0, a1354; CHECK-NEXT: snez a0, a0355; CHECK-NEXT: addi a0, a0, -1356; CHECK-NEXT: ret357 %icmp = icmp eq i32 %a, %b358 %sext = sext i1 %icmp to i32359 ret i32 %sext360}361 362; Make sure we don't use nds.bfos instead of neg.363define i32 @sexti1_i32_setcc_3(i32 %a, i32 %b) {364; CHECK-LABEL: sexti1_i32_setcc_3:365; CHECK: # %bb.0:366; CHECK-NEXT: slt a0, a0, a1367; CHECK-NEXT: neg a0, a0368; CHECK-NEXT: ret369 %icmp = icmp slt i32 %a, %b370 %sext = sext i1 %icmp to i32371 ret i32 %sext372}373 374define i32 @sexti8_i32(i32 %a) {375; CHECK-LABEL: sexti8_i32:376; CHECK: # %bb.0:377; CHECK-NEXT: nds.bfos a0, a0, 7, 0378; CHECK-NEXT: ret379 %shl = shl i32 %a, 24380 %shr = ashr exact i32 %shl, 24381 ret i32 %shr382}383 384define i32 @sexti8_i32_2(i8 %a) {385; CHECK-LABEL: sexti8_i32_2:386; CHECK: # %bb.0:387; CHECK-NEXT: nds.bfos a0, a0, 7, 0388; CHECK-NEXT: ret389 %1 = sext i8 %a to i32390 ret i32 %1391}392 393define i32 @sexti16_i32(i32 %a) {394; CHECK-LABEL: sexti16_i32:395; CHECK: # %bb.0:396; CHECK-NEXT: nds.bfos a0, a0, 15, 0397; CHECK-NEXT: ret398 %shl = shl i32 %a, 16399 %shr = ashr exact i32 %shl, 16400 ret i32 %shr401}402 403define i32 @sexti16_i32_2(i16 %a) {404; CHECK-LABEL: sexti16_i32_2:405; CHECK: # %bb.0:406; CHECK-NEXT: nds.bfos a0, a0, 15, 0407; CHECK-NEXT: ret408 %1 = sext i16 %a to i32409 ret i32 %1410}411 412define i64 @sexti1_i64(i64 %a) {413; CHECK-LABEL: sexti1_i64:414; CHECK: # %bb.0:415; CHECK-NEXT: nds.bfos a0, a0, 0, 0416; CHECK-NEXT: mv a1, a0417; CHECK-NEXT: ret418 %shl = shl i64 %a, 63419 %shr = ashr exact i64 %shl, 63420 ret i64 %shr421}422 423define i64 @sexti1_i64_2(i1 %a) {424; CHECK-LABEL: sexti1_i64_2:425; CHECK: # %bb.0:426; CHECK-NEXT: nds.bfos a0, a0, 0, 0427; CHECK-NEXT: mv a1, a0428; CHECK-NEXT: ret429 %1 = sext i1 %a to i64430 ret i64 %1431}432 433define i64 @sexti8_i64(i64 %a) {434; CHECK-LABEL: sexti8_i64:435; CHECK: # %bb.0:436; CHECK-NEXT: nds.bfos a0, a0, 7, 0437; CHECK-NEXT: srai a1, a0, 31438; CHECK-NEXT: ret439 %shl = shl i64 %a, 56440 %shr = ashr exact i64 %shl, 56441 ret i64 %shr442}443 444define i64 @sexti8_i64_2(i8 %a) {445; CHECK-LABEL: sexti8_i64_2:446; CHECK: # %bb.0:447; CHECK-NEXT: nds.bfos a0, a0, 7, 0448; CHECK-NEXT: srai a1, a0, 31449; CHECK-NEXT: ret450 %1 = sext i8 %a to i64451 ret i64 %1452}453 454define i64 @sexti16_i64(i64 %a) {455; CHECK-LABEL: sexti16_i64:456; CHECK: # %bb.0:457; CHECK-NEXT: nds.bfos a0, a0, 15, 0458; CHECK-NEXT: srai a1, a0, 31459; CHECK-NEXT: ret460 %shl = shl i64 %a, 48461 %shr = ashr exact i64 %shl, 48462 ret i64 %shr463}464 465define i64 @sexti16_i64_2(i16 %a) {466; CHECK-LABEL: sexti16_i64_2:467; CHECK: # %bb.0:468; CHECK-NEXT: nds.bfos a0, a0, 15, 0469; CHECK-NEXT: srai a1, a0, 31470; CHECK-NEXT: ret471 %1 = sext i16 %a to i64472 ret i64 %1473}474 475define i64 @sexti32_i64(i64 %a) {476; CHECK-LABEL: sexti32_i64:477; CHECK: # %bb.0:478; CHECK-NEXT: srai a1, a0, 31479; CHECK-NEXT: ret480 %shl = shl i64 %a, 32481 %shr = ashr exact i64 %shl, 32482 ret i64 %shr483}484 485define i64 @sexti32_i64_2(i32 %a) {486; CHECK-LABEL: sexti32_i64_2:487; CHECK: # %bb.0:488; CHECK-NEXT: srai a1, a0, 31489; CHECK-NEXT: ret490 %1 = sext i32 %a to i64491 ret i64 %1492}493