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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zbc -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV32ZBC4 5define i32 @clmul32r(i32 %a, i32 %b) nounwind {6; RV32ZBC-LABEL: clmul32r:7; RV32ZBC: # %bb.0:8; RV32ZBC-NEXT: clmulr a0, a0, a19; RV32ZBC-NEXT: ret10 %tmp = call i32 @llvm.riscv.clmulr.i32(i32 %a, i32 %b)11 ret i32 %tmp12}13