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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zbc -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV32ZBC-ZBKC4; RUN: llc -mtriple=riscv32 -mattr=+zbkc -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefix=RV32ZBC-ZBKC6 7define i32 @clmul32(i32 %a, i32 %b) nounwind {8; RV32ZBC-ZBKC-LABEL: clmul32:9; RV32ZBC-ZBKC: # %bb.0:10; RV32ZBC-ZBKC-NEXT: clmul a0, a0, a111; RV32ZBC-ZBKC-NEXT: ret12 %tmp = call i32 @llvm.riscv.clmul.i32(i32 %a, i32 %b)13 ret i32 %tmp14}15 16define i32 @clmul32h(i32 %a, i32 %b) nounwind {17; RV32ZBC-ZBKC-LABEL: clmul32h:18; RV32ZBC-ZBKC: # %bb.0:19; RV32ZBC-ZBKC-NEXT: clmulh a0, a0, a120; RV32ZBC-ZBKC-NEXT: ret21 %tmp = call i32 @llvm.riscv.clmulh.i32(i32 %a, i32 %b)22 ret i32 %tmp23}24