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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zknh -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV32ZKNH4 5define i32 @sha256sig0_i32(i32 %a) nounwind {6; RV32ZKNH-LABEL: sha256sig0_i32:7; RV32ZKNH: # %bb.0:8; RV32ZKNH-NEXT: sha256sig0 a0, a09; RV32ZKNH-NEXT: ret10 %val = call i32 @llvm.riscv.sha256sig0(i32 %a)11 ret i32 %val12}13 14define i32 @sha256sig1_i32(i32 %a) nounwind {15; RV32ZKNH-LABEL: sha256sig1_i32:16; RV32ZKNH: # %bb.0:17; RV32ZKNH-NEXT: sha256sig1 a0, a018; RV32ZKNH-NEXT: ret19 %val = call i32 @llvm.riscv.sha256sig1(i32 %a)20 ret i32 %val21}22 23define i32 @sha256sum0_i32(i32 %a) nounwind {24; RV32ZKNH-LABEL: sha256sum0_i32:25; RV32ZKNH: # %bb.0:26; RV32ZKNH-NEXT: sha256sum0 a0, a027; RV32ZKNH-NEXT: ret28 %val = call i32 @llvm.riscv.sha256sum0(i32 %a)29 ret i32 %val30}31 32define i32 @sha256sum1_i32(i32 %a) nounwind {33; RV32ZKNH-LABEL: sha256sum1_i32:34; RV32ZKNH: # %bb.0:35; RV32ZKNH-NEXT: sha256sum1 a0, a036; RV32ZKNH-NEXT: ret37 %val = call i32 @llvm.riscv.sha256sum1(i32 %a)38 ret i32 %val39}40 41define i32 @sha512sig0l(i32 %a, i32 %b) nounwind {42; RV32ZKNH-LABEL: sha512sig0l:43; RV32ZKNH: # %bb.0:44; RV32ZKNH-NEXT: sha512sig0l a0, a0, a145; RV32ZKNH-NEXT: ret46 %val = call i32 @llvm.riscv.sha512sig0l(i32 %a, i32 %b)47 ret i32 %val48}49 50define i32 @sha512sig0h(i32 %a, i32 %b) nounwind {51; RV32ZKNH-LABEL: sha512sig0h:52; RV32ZKNH: # %bb.0:53; RV32ZKNH-NEXT: sha512sig0h a0, a0, a154; RV32ZKNH-NEXT: ret55 %val = call i32 @llvm.riscv.sha512sig0h(i32 %a, i32 %b)56 ret i32 %val57}58 59define i32 @sha512sig1l(i32 %a, i32 %b) nounwind {60; RV32ZKNH-LABEL: sha512sig1l:61; RV32ZKNH: # %bb.0:62; RV32ZKNH-NEXT: sha512sig1l a0, a0, a163; RV32ZKNH-NEXT: ret64 %val = call i32 @llvm.riscv.sha512sig1l(i32 %a, i32 %b)65 ret i32 %val66}67 68define i32 @sha512sig1h(i32 %a, i32 %b) nounwind {69; RV32ZKNH-LABEL: sha512sig1h:70; RV32ZKNH: # %bb.0:71; RV32ZKNH-NEXT: sha512sig1h a0, a0, a172; RV32ZKNH-NEXT: ret73 %val = call i32 @llvm.riscv.sha512sig1h(i32 %a, i32 %b)74 ret i32 %val75}76 77define i32 @sha512sum0r(i32 %a, i32 %b) nounwind {78; RV32ZKNH-LABEL: sha512sum0r:79; RV32ZKNH: # %bb.0:80; RV32ZKNH-NEXT: sha512sum0r a0, a0, a181; RV32ZKNH-NEXT: ret82 %val = call i32 @llvm.riscv.sha512sum0r(i32 %a, i32 %b)83 ret i32 %val84}85 86define i32 @sha512sum1r(i32 %a, i32 %b) nounwind {87; RV32ZKNH-LABEL: sha512sum1r:88; RV32ZKNH: # %bb.0:89; RV32ZKNH-NEXT: sha512sum1r a0, a0, a190; RV32ZKNH-NEXT: ret91 %val = call i32 @llvm.riscv.sha512sum1r(i32 %a, i32 %b)92 ret i32 %val93}94