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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs < %s \3; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefix=RV64IF4; RUN: llc -mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs < %s \5; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefix=RV64IFINX6 7; This file exhaustively checks float<->i32 conversions. In general,8; fcvt.l[u].s can be selected instead of fcvt.w[u].s because poison is9; generated for an fpto[s|u]i conversion if the result doesn't fit in the10; target type.11 12define i32 @aext_fptosi(float %a) nounwind strictfp {13; RV64IF-LABEL: aext_fptosi:14; RV64IF: # %bb.0:15; RV64IF-NEXT: fcvt.w.s a0, fa0, rtz16; RV64IF-NEXT: ret17;18; RV64IFINX-LABEL: aext_fptosi:19; RV64IFINX: # %bb.0:20; RV64IFINX-NEXT: fcvt.w.s a0, a0, rtz21; RV64IFINX-NEXT: ret22 %1 = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict") strictfp23 ret i32 %124}25 26define signext i32 @sext_fptosi(float %a) nounwind strictfp {27; RV64IF-LABEL: sext_fptosi:28; RV64IF: # %bb.0:29; RV64IF-NEXT: fcvt.w.s a0, fa0, rtz30; RV64IF-NEXT: ret31;32; RV64IFINX-LABEL: sext_fptosi:33; RV64IFINX: # %bb.0:34; RV64IFINX-NEXT: fcvt.w.s a0, a0, rtz35; RV64IFINX-NEXT: ret36 %1 = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict") strictfp37 ret i32 %138}39 40define zeroext i32 @zext_fptosi(float %a) nounwind strictfp {41; RV64IF-LABEL: zext_fptosi:42; RV64IF: # %bb.0:43; RV64IF-NEXT: fcvt.w.s a0, fa0, rtz44; RV64IF-NEXT: slli a0, a0, 3245; RV64IF-NEXT: srli a0, a0, 3246; RV64IF-NEXT: ret47;48; RV64IFINX-LABEL: zext_fptosi:49; RV64IFINX: # %bb.0:50; RV64IFINX-NEXT: fcvt.w.s a0, a0, rtz51; RV64IFINX-NEXT: slli a0, a0, 3252; RV64IFINX-NEXT: srli a0, a0, 3253; RV64IFINX-NEXT: ret54 %1 = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict") strictfp55 ret i32 %156}57 58define i32 @aext_fptoui(float %a) nounwind strictfp {59; RV64IF-LABEL: aext_fptoui:60; RV64IF: # %bb.0:61; RV64IF-NEXT: fcvt.wu.s a0, fa0, rtz62; RV64IF-NEXT: ret63;64; RV64IFINX-LABEL: aext_fptoui:65; RV64IFINX: # %bb.0:66; RV64IFINX-NEXT: fcvt.wu.s a0, a0, rtz67; RV64IFINX-NEXT: ret68 %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %a, metadata !"fpexcept.strict") strictfp69 ret i32 %170}71 72define signext i32 @sext_fptoui(float %a) nounwind strictfp {73; RV64IF-LABEL: sext_fptoui:74; RV64IF: # %bb.0:75; RV64IF-NEXT: fcvt.wu.s a0, fa0, rtz76; RV64IF-NEXT: ret77;78; RV64IFINX-LABEL: sext_fptoui:79; RV64IFINX: # %bb.0:80; RV64IFINX-NEXT: fcvt.wu.s a0, a0, rtz81; RV64IFINX-NEXT: ret82 %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %a, metadata !"fpexcept.strict") strictfp83 ret i32 %184}85 86define zeroext i32 @zext_fptoui(float %a) nounwind strictfp {87; RV64IF-LABEL: zext_fptoui:88; RV64IF: # %bb.0:89; RV64IF-NEXT: fcvt.lu.s a0, fa0, rtz90; RV64IF-NEXT: ret91;92; RV64IFINX-LABEL: zext_fptoui:93; RV64IFINX: # %bb.0:94; RV64IFINX-NEXT: fcvt.lu.s a0, a0, rtz95; RV64IFINX-NEXT: ret96 %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %a, metadata !"fpexcept.strict") strictfp97 ret i32 %198}99 100define float @uitofp_aext_i32_to_f32(i32 %a) nounwind strictfp {101; RV64IF-LABEL: uitofp_aext_i32_to_f32:102; RV64IF: # %bb.0:103; RV64IF-NEXT: fcvt.s.wu fa0, a0104; RV64IF-NEXT: ret105;106; RV64IFINX-LABEL: uitofp_aext_i32_to_f32:107; RV64IFINX: # %bb.0:108; RV64IFINX-NEXT: fcvt.s.wu a0, a0109; RV64IFINX-NEXT: ret110 %1 = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp111 ret float %1112}113 114define float @uitofp_sext_i32_to_f32(i32 signext %a) nounwind strictfp {115; RV64IF-LABEL: uitofp_sext_i32_to_f32:116; RV64IF: # %bb.0:117; RV64IF-NEXT: fcvt.s.wu fa0, a0118; RV64IF-NEXT: ret119;120; RV64IFINX-LABEL: uitofp_sext_i32_to_f32:121; RV64IFINX: # %bb.0:122; RV64IFINX-NEXT: fcvt.s.wu a0, a0123; RV64IFINX-NEXT: ret124 %1 = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp125 ret float %1126}127 128define float @uitofp_zext_i32_to_f32(i32 zeroext %a) nounwind strictfp {129; RV64IF-LABEL: uitofp_zext_i32_to_f32:130; RV64IF: # %bb.0:131; RV64IF-NEXT: fcvt.s.wu fa0, a0132; RV64IF-NEXT: ret133;134; RV64IFINX-LABEL: uitofp_zext_i32_to_f32:135; RV64IFINX: # %bb.0:136; RV64IFINX-NEXT: fcvt.s.wu a0, a0137; RV64IFINX-NEXT: ret138 %1 = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp139 ret float %1140}141 142define float @sitofp_aext_i32_to_f32(i32 %a) nounwind strictfp {143; RV64IF-LABEL: sitofp_aext_i32_to_f32:144; RV64IF: # %bb.0:145; RV64IF-NEXT: fcvt.s.w fa0, a0146; RV64IF-NEXT: ret147;148; RV64IFINX-LABEL: sitofp_aext_i32_to_f32:149; RV64IFINX: # %bb.0:150; RV64IFINX-NEXT: fcvt.s.w a0, a0151; RV64IFINX-NEXT: ret152 %1 = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp153 ret float %1154}155 156define float @sitofp_sext_i32_to_f32(i32 signext %a) nounwind strictfp {157; RV64IF-LABEL: sitofp_sext_i32_to_f32:158; RV64IF: # %bb.0:159; RV64IF-NEXT: fcvt.s.w fa0, a0160; RV64IF-NEXT: ret161;162; RV64IFINX-LABEL: sitofp_sext_i32_to_f32:163; RV64IFINX: # %bb.0:164; RV64IFINX-NEXT: fcvt.s.w a0, a0165; RV64IFINX-NEXT: ret166 %1 = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp167 ret float %1168}169 170define float @sitofp_zext_i32_to_f32(i32 zeroext %a) nounwind strictfp {171; RV64IF-LABEL: sitofp_zext_i32_to_f32:172; RV64IF: # %bb.0:173; RV64IF-NEXT: fcvt.s.w fa0, a0174; RV64IF-NEXT: ret175;176; RV64IFINX-LABEL: sitofp_zext_i32_to_f32:177; RV64IFINX: # %bb.0:178; RV64IFINX-NEXT: fcvt.s.w a0, a0179; RV64IFINX-NEXT: ret180 %1 = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp181 ret float %1182}183