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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s3 4; The complex floating value will be returned by a single register for LP64 ABI.5; The test case check that the real part returned by __addsf3 will be6; cleared upper bits by shifts to avoid corrupting the imaginary part.7 8define i64 @complex_float_add(i64 %a.coerce, i64 %b.coerce) nounwind {9; CHECK-LABEL: complex_float_add:10; CHECK: # %bb.0: # %entry11; CHECK-NEXT: addi sp, sp, -3212; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill13; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill14; CHECK-NEXT: sd s1, 8(sp) # 8-byte Folded Spill15; CHECK-NEXT: sd s2, 0(sp) # 8-byte Folded Spill16; CHECK-NEXT: srli s0, a0, 3217; CHECK-NEXT: srli s1, a1, 3218; CHECK-NEXT: call __addsf319; CHECK-NEXT: mv s2, a020; CHECK-NEXT: mv a0, s021; CHECK-NEXT: mv a1, s122; CHECK-NEXT: call __addsf323; CHECK-NEXT: slli a0, a0, 3224; CHECK-NEXT: slli s2, s2, 3225; CHECK-NEXT: srli a1, s2, 3226; CHECK-NEXT: or a0, a0, a127; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload28; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload29; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload30; CHECK-NEXT: ld s2, 0(sp) # 8-byte Folded Reload31; CHECK-NEXT: addi sp, sp, 3232; CHECK-NEXT: ret33entry:34 %a.sroa.0.0.extract.trunc = trunc i64 %a.coerce to i3235 %0 = bitcast i32 %a.sroa.0.0.extract.trunc to float36 %a.sroa.2.0.extract.shift = lshr i64 %a.coerce, 3237 %a.sroa.2.0.extract.trunc = trunc i64 %a.sroa.2.0.extract.shift to i3238 %1 = bitcast i32 %a.sroa.2.0.extract.trunc to float39 %b.sroa.0.0.extract.trunc = trunc i64 %b.coerce to i3240 %2 = bitcast i32 %b.sroa.0.0.extract.trunc to float41 %b.sroa.2.0.extract.shift = lshr i64 %b.coerce, 3242 %b.sroa.2.0.extract.trunc = trunc i64 %b.sroa.2.0.extract.shift to i3243 %3 = bitcast i32 %b.sroa.2.0.extract.trunc to float44 %add.r = fadd float %0, %245 %add.i = fadd float %1, %346 %4 = bitcast float %add.r to i3247 %5 = bitcast float %add.i to i3248 %retval.sroa.2.0.insert.ext = zext i32 %5 to i6449 %retval.sroa.2.0.insert.shift = shl nuw i64 %retval.sroa.2.0.insert.ext, 3250 %retval.sroa.0.0.insert.ext = zext i32 %4 to i6451 %retval.sroa.0.0.insert.insert = or i64 %retval.sroa.2.0.insert.shift, %retval.sroa.0.0.insert.ext52 ret i64 %retval.sroa.0.0.insert.insert53}54