468 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+xandesperf -verify-machineinstrs < %s \3; RUN: | FileCheck %s4 5; NDS.BFOZ6 7; MSB >= LSB8 9define i32 @bfoz_from_and_i32(i32 %x) {10; CHECK-LABEL: bfoz_from_and_i32:11; CHECK: # %bb.0:12; CHECK-NEXT: nds.bfoz a0, a0, 11, 013; CHECK-NEXT: ret14 %a = and i32 %x, 409515 ret i32 %a16}17 18define i64 @bfoz_from_and_i64(i64 %x) {19; CHECK-LABEL: bfoz_from_and_i64:20; CHECK: # %bb.0:21; CHECK-NEXT: nds.bfoz a0, a0, 11, 022; CHECK-NEXT: ret23 %a = and i64 %x, 409524 ret i64 %a25}26 27define i32 @bfoz_from_and_lshr_i32(i32 %x) {28; CHECK-LABEL: bfoz_from_and_lshr_i32:29; CHECK: # %bb.0:30; CHECK-NEXT: nds.bfoz a0, a0, 25, 2331; CHECK-NEXT: ret32 %shifted = lshr i32 %x, 2333 %masked = and i32 %shifted, 734 ret i32 %masked35}36 37define i64 @bfoz_from_and_lshr_i64(i64 %x) {38; CHECK-LABEL: bfoz_from_and_lshr_i64:39; CHECK: # %bb.0:40; CHECK-NEXT: nds.bfoz a0, a0, 57, 4641; CHECK-NEXT: ret42 %shifted = lshr i64 %x, 4643 %masked = and i64 %shifted, 409544 ret i64 %masked45}46 47define i32 @bfoz_from_lshr_and_i32(i32 %x) {48; CHECK-LABEL: bfoz_from_lshr_and_i32:49; CHECK: # %bb.0:50; CHECK-NEXT: nds.bfoz a0, a0, 23, 1251; CHECK-NEXT: ret52 %masked = and i32 %x, 1677312053 %shifted = lshr i32 %masked, 1254 ret i32 %shifted55}56 57define i64 @bfoz_from_lshr_and_i64(i64 %x) {58; CHECK-LABEL: bfoz_from_lshr_and_i64:59; CHECK: # %bb.0:60; CHECK-NEXT: nds.bfoz a0, a0, 35, 2461; CHECK-NEXT: ret62 %masked = and i64 %x, 6870269952063 %shifted = lshr i64 %masked, 2464 ret i64 %shifted65}66 67; MSB = 068 69define i32 @bfoz_from_and_shl_with_msb_zero_i32(i32 %x) {70; CHECK-LABEL: bfoz_from_and_shl_with_msb_zero_i32:71; CHECK: # %bb.0:72; CHECK-NEXT: nds.bfoz a0, a0, 0, 1573; CHECK-NEXT: ret74 %shifted = shl i32 %x, 1575 %masked = and i32 %shifted, 3276876 ret i32 %masked77}78 79define i64 @bfoz_from_and_shl_with_msb_zero_i64(i64 %x) {80; CHECK-LABEL: bfoz_from_and_shl_with_msb_zero_i64:81; CHECK: # %bb.0:82; CHECK-NEXT: nds.bfoz a0, a0, 0, 4883; CHECK-NEXT: ret84 %shifted = shl i64 %x, 4885 %masked = and i64 %shifted, 28147497671065686 ret i64 %masked87}88 89define i32 @bfoz_from_lshr_shl_with_msb_zero_i32(i32 %x) {90; CHECK-LABEL: bfoz_from_lshr_shl_with_msb_zero_i32:91; CHECK: # %bb.0:92; CHECK-NEXT: nds.bfoz a0, a0, 0, 1893; CHECK-NEXT: ret94 %shl = shl i32 %x, 3195 %lshr = lshr i32 %shl, 1396 ret i32 %lshr97}98 99define i64 @bfoz_from_lshr_shl_with_msb_zero_i64(i64 %x) {100; CHECK-LABEL: bfoz_from_lshr_shl_with_msb_zero_i64:101; CHECK: # %bb.0:102; CHECK-NEXT: nds.bfoz a0, a0, 0, 44103; CHECK-NEXT: ret104 %shl = shl i64 %x, 63105 %lshr = lshr i64 %shl, 19106 ret i64 %lshr107}108 109; MSB < LSB110 111define i32 @bfoz_from_and_shl_i32(i32 %x) {112; CHECK-LABEL: bfoz_from_and_shl_i32:113; CHECK: # %bb.0:114; CHECK-NEXT: nds.bfoz a0, a0, 12, 23115; CHECK-NEXT: ret116 %shifted = shl i32 %x, 12117 %masked = and i32 %shifted, 16773120118 ret i32 %masked119}120 121define i64 @bfoz_from_and_shl_i64(i64 %x) {122; CHECK-LABEL: bfoz_from_and_shl_i64:123; CHECK: # %bb.0:124; CHECK-NEXT: nds.bfoz a0, a0, 24, 35125; CHECK-NEXT: ret126 %shifted = shl i64 %x, 24127 %masked = and i64 %shifted, 68702699520128 ret i64 %masked129}130 131define i32 @bfoz_from_lshr_shl_i32(i32 %x) {132; CHECK-LABEL: bfoz_from_lshr_shl_i32:133; CHECK: # %bb.0:134; CHECK-NEXT: nds.bfoz a0, a0, 19, 24135; CHECK-NEXT: ret136 %shl = shl i32 %x, 26137 %lshr = lshr i32 %shl, 7138 ret i32 %lshr139}140 141define i64 @bfoz_from_lshr_shl_i64(i64 %x) {142; CHECK-LABEL: bfoz_from_lshr_shl_i64:143; CHECK: # %bb.0:144; CHECK-NEXT: nds.bfoz a0, a0, 25, 48145; CHECK-NEXT: ret146 %shl = shl i64 %x, 40147 %lshr = lshr i64 %shl, 15148 ret i64 %lshr149}150 151; NDS.BFOS152 153; MSB >= LSB154 155define i32 @bfos_from_ashr_shl_i32(i32 %x) {156; CHECK-LABEL: bfos_from_ashr_shl_i32:157; CHECK: # %bb.0:158; CHECK-NEXT: nds.bfos a0, a0, 23, 16159; CHECK-NEXT: ret160 %shl = shl i32 %x, 8161 %ashr = ashr i32 %shl, 24162 ret i32 %ashr163}164 165define i64 @bfos_from_ashr_shl_i64(i64 %x) {166; CHECK-LABEL: bfos_from_ashr_shl_i64:167; CHECK: # %bb.0:168; CHECK-NEXT: nds.bfos a0, a0, 55, 16169; CHECK-NEXT: ret170 %shl = shl i64 %x, 8171 %ashr = ashr i64 %shl, 24172 ret i64 %ashr173}174 175define i32 @bfos_from_ashr_sexti8_i32(i8 %x) {176; CHECK-LABEL: bfos_from_ashr_sexti8_i32:177; CHECK: # %bb.0:178; CHECK-NEXT: nds.bfos a0, a0, 7, 5179; CHECK-NEXT: ret180 %sext = sext i8 %x to i32181 %ashr = ashr i32 %sext, 5182 ret i32 %ashr183}184 185define i64 @bfos_from_ashr_sexti8_i64(i8 %x) {186; CHECK-LABEL: bfos_from_ashr_sexti8_i64:187; CHECK: # %bb.0:188; CHECK-NEXT: nds.bfos a0, a0, 7, 5189; CHECK-NEXT: ret190 %sext = sext i8 %x to i64191 %ashr = ashr i64 %sext, 5192 ret i64 %ashr193}194 195define i32 @bfos_from_ashr_sexti16_i32(i16 %x) {196; CHECK-LABEL: bfos_from_ashr_sexti16_i32:197; CHECK: # %bb.0:198; CHECK-NEXT: nds.bfos a0, a0, 15, 11199; CHECK-NEXT: ret200 %sext = sext i16 %x to i32201 %ashr = ashr i32 %sext, 11202 ret i32 %ashr203}204 205define i64 @bfos_from_ashr_sexti16_i64(i16 %x) {206; CHECK-LABEL: bfos_from_ashr_sexti16_i64:207; CHECK: # %bb.0:208; CHECK-NEXT: nds.bfos a0, a0, 15, 11209; CHECK-NEXT: ret210 %sext = sext i16 %x to i64211 %ashr = ashr i64 %sext, 11212 ret i64 %ashr213}214 215; MSB = 0216 217define i32 @bfos_from_ashr_shl_with_msb_zero_insert_i32(i32 %x) {218; CHECK-LABEL: bfos_from_ashr_shl_with_msb_zero_insert_i32:219; CHECK: # %bb.0:220; CHECK-NEXT: nds.bfos a0, a0, 0, 14221; CHECK-NEXT: ret222 %shl = shl i32 %x, 31223 %lshr = ashr i32 %shl, 17224 ret i32 %lshr225}226 227define i64 @bfos_from_ashr_shl_with_msb_zero_insert_i64(i64 %x) {228; CHECK-LABEL: bfos_from_ashr_shl_with_msb_zero_insert_i64:229; CHECK: # %bb.0:230; CHECK-NEXT: nds.bfos a0, a0, 0, 46231; CHECK-NEXT: ret232 %shl = shl i64 %x, 63233 %lshr = ashr i64 %shl, 17234 ret i64 %lshr235}236 237; MSB < LSB238 239define i32 @bfos_from_ashr_shl_insert_i32(i32 %x) {240; CHECK-LABEL: bfos_from_ashr_shl_insert_i32:241; CHECK: # %bb.0:242; CHECK-NEXT: nds.bfos a0, a0, 18, 20243; CHECK-NEXT: ret244 %shl = shl i32 %x, 29245 %lshr = ashr i32 %shl, 11246 ret i32 %lshr247}248 249define i64 @bfos_from_ashr_shl_insert_i64(i64 %x) {250; CHECK-LABEL: bfos_from_ashr_shl_insert_i64:251; CHECK: # %bb.0:252; CHECK-NEXT: nds.bfos a0, a0, 18, 52253; CHECK-NEXT: ret254 %shl = shl i64 %x, 29255 %lshr = ashr i64 %shl, 11256 ret i64 %lshr257}258 259; sext260 261define signext i32 @sexti1_i32(i32 signext %a) {262; CHECK-LABEL: sexti1_i32:263; CHECK: # %bb.0:264; CHECK-NEXT: nds.bfos a0, a0, 0, 0265; CHECK-NEXT: ret266 %shl = shl i32 %a, 31267 %shr = ashr exact i32 %shl, 31268 ret i32 %shr269}270 271define signext i32 @sexti1_i32_2(i1 %a) {272; CHECK-LABEL: sexti1_i32_2:273; CHECK: # %bb.0:274; CHECK-NEXT: nds.bfos a0, a0, 0, 0275; CHECK-NEXT: ret276 %1 = sext i1 %a to i32277 ret i32 %1278}279 280; Make sure we don't use not+nds.bfos281define zeroext i8 @sexti1_i32_setcc(i32 signext %a) {282; CHECK-LABEL: sexti1_i32_setcc:283; CHECK: # %bb.0:284; CHECK-NEXT: srli a0, a0, 63285; CHECK-NEXT: addi a0, a0, -1286; CHECK-NEXT: zext.b a0, a0287; CHECK-NEXT: ret288 %icmp = icmp sgt i32 %a, -1289 %sext = sext i1 %icmp to i8290 ret i8 %sext291}292 293; Make sure we don't use seqz+nds.bfos instead of snez+addi294define signext i32 @sexti1_i32_setcc_2(i32 signext %a, i32 signext %b) {295; CHECK-LABEL: sexti1_i32_setcc_2:296; CHECK: # %bb.0:297; CHECK-NEXT: xor a0, a0, a1298; CHECK-NEXT: snez a0, a0299; CHECK-NEXT: addi a0, a0, -1300; CHECK-NEXT: ret301 %icmp = icmp eq i32 %a, %b302 %sext = sext i1 %icmp to i32303 ret i32 %sext304}305 306; Make sure we don't use nds.bfos instead of neg.307define signext i32 @sexti1_i32_setcc_3(i32 signext %a, i32 signext %b) {308; CHECK-LABEL: sexti1_i32_setcc_3:309; CHECK: # %bb.0:310; CHECK-NEXT: slt a0, a0, a1311; CHECK-NEXT: neg a0, a0312; CHECK-NEXT: ret313 %icmp = icmp slt i32 %a, %b314 %sext = sext i1 %icmp to i32315 ret i32 %sext316}317 318define signext i32 @sexti8_i32(i32 signext %a) {319; CHECK-LABEL: sexti8_i32:320; CHECK: # %bb.0:321; CHECK-NEXT: nds.bfos a0, a0, 7, 0322; CHECK-NEXT: ret323 %shl = shl i32 %a, 24324 %shr = ashr exact i32 %shl, 24325 ret i32 %shr326}327 328define signext i32 @sexti8_i32_2(i8 %a) {329; CHECK-LABEL: sexti8_i32_2:330; CHECK: # %bb.0:331; CHECK-NEXT: nds.bfos a0, a0, 7, 0332; CHECK-NEXT: ret333 %1 = sext i8 %a to i32334 ret i32 %1335}336 337define signext i32 @sexti16_i32(i32 signext %a) {338; CHECK-LABEL: sexti16_i32:339; CHECK: # %bb.0:340; CHECK-NEXT: nds.bfos a0, a0, 15, 0341; CHECK-NEXT: ret342 %shl = shl i32 %a, 16343 %shr = ashr exact i32 %shl, 16344 ret i32 %shr345}346 347define signext i32 @sexti16_i32_2(i16 %a) {348; CHECK-LABEL: sexti16_i32_2:349; CHECK: # %bb.0:350; CHECK-NEXT: nds.bfos a0, a0, 15, 0351; CHECK-NEXT: ret352 %1 = sext i16 %a to i32353 ret i32 %1354}355 356define i64 @sexti1_i64(i64 %a) {357; CHECK-LABEL: sexti1_i64:358; CHECK: # %bb.0:359; CHECK-NEXT: nds.bfos a0, a0, 0, 0360; CHECK-NEXT: ret361 %shl = shl i64 %a, 63362 %shr = ashr exact i64 %shl, 63363 ret i64 %shr364}365 366define i64 @sexti1_i64_2(i1 %a) {367; CHECK-LABEL: sexti1_i64_2:368; CHECK: # %bb.0:369; CHECK-NEXT: nds.bfos a0, a0, 0, 0370; CHECK-NEXT: ret371 %1 = sext i1 %a to i64372 ret i64 %1373}374 375; Make sure we don't use not+nds.bfos376define zeroext i8 @sexti1_i64_setcc(i64 %a) {377; CHECK-LABEL: sexti1_i64_setcc:378; CHECK: # %bb.0:379; CHECK-NEXT: srli a0, a0, 63380; CHECK-NEXT: addi a0, a0, -1381; CHECK-NEXT: zext.b a0, a0382; CHECK-NEXT: ret383 %icmp = icmp sgt i64 %a, -1384 %sext = sext i1 %icmp to i8385 ret i8 %sext386}387 388; Make sure we don't use seqz+nds.bfos instead of snez+addi389define i64 @sexti1_i64_setcc_2(i64 %a, i64 %b) {390; CHECK-LABEL: sexti1_i64_setcc_2:391; CHECK: # %bb.0:392; CHECK-NEXT: xor a0, a0, a1393; CHECK-NEXT: snez a0, a0394; CHECK-NEXT: addi a0, a0, -1395; CHECK-NEXT: ret396 %icmp = icmp eq i64 %a, %b397 %sext = sext i1 %icmp to i64398 ret i64 %sext399}400 401; Make sure we don't use nds.bfos instead of neg.402define i64 @sexti1_i64_setcc_3(i64 %a, i64 %b) {403; CHECK-LABEL: sexti1_i64_setcc_3:404; CHECK: # %bb.0:405; CHECK-NEXT: slt a0, a0, a1406; CHECK-NEXT: neg a0, a0407; CHECK-NEXT: ret408 %icmp = icmp slt i64 %a, %b409 %sext = sext i1 %icmp to i64410 ret i64 %sext411}412 413define i64 @sexti8_i64(i64 %a) {414; CHECK-LABEL: sexti8_i64:415; CHECK: # %bb.0:416; CHECK-NEXT: nds.bfos a0, a0, 7, 0417; CHECK-NEXT: ret418 %shl = shl i64 %a, 56419 %shr = ashr exact i64 %shl, 56420 ret i64 %shr421}422 423define i64 @sexti8_i64_2(i8 %a) {424; CHECK-LABEL: sexti8_i64_2:425; CHECK: # %bb.0:426; CHECK-NEXT: nds.bfos a0, a0, 7, 0427; CHECK-NEXT: ret428 %1 = sext i8 %a to i64429 ret i64 %1430}431 432define i64 @sexti16_i64(i64 %a) {433; CHECK-LABEL: sexti16_i64:434; CHECK: # %bb.0:435; CHECK-NEXT: nds.bfos a0, a0, 15, 0436; CHECK-NEXT: ret437 %shl = shl i64 %a, 48438 %shr = ashr exact i64 %shl, 48439 ret i64 %shr440}441 442define i64 @sexti16_i64_2(i16 %a) {443; CHECK-LABEL: sexti16_i64_2:444; CHECK: # %bb.0:445; CHECK-NEXT: nds.bfos a0, a0, 15, 0446; CHECK-NEXT: ret447 %1 = sext i16 %a to i64448 ret i64 %1449}450 451define i64 @sexti32_i64(i64 %a) {452; CHECK-LABEL: sexti32_i64:453; CHECK: # %bb.0:454; CHECK-NEXT: sext.w a0, a0455; CHECK-NEXT: ret456 %shl = shl i64 %a, 32457 %shr = ashr exact i64 %shl, 32458 ret i64 %shr459}460 461define i64 @sexti32_i64_2(i32 signext %a) {462; CHECK-LABEL: sexti32_i64_2:463; CHECK: # %bb.0:464; CHECK-NEXT: ret465 %1 = sext i32 %a to i64466 ret i64 %1467}468