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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --extra_scrub2; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I4; RUN: llc -mtriple=riscv64 -mattr=+m,+xtheadba -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefixes=CHECK,RV64XTHEADBA6 7define signext i16 @th_addsl_1(i64 %0, ptr %1) {8; RV64I-LABEL: th_addsl_1:9; RV64I: # %bb.0:10; RV64I-NEXT: slli a0, a0, 111; RV64I-NEXT: add a0, a1, a012; RV64I-NEXT: lh a0, 0(a0)13; RV64I-NEXT: ret14;15; RV64XTHEADBA-LABEL: th_addsl_1:16; RV64XTHEADBA: # %bb.0:17; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 118; RV64XTHEADBA-NEXT: lh a0, 0(a0)19; RV64XTHEADBA-NEXT: ret20 %3 = getelementptr inbounds i16, ptr %1, i64 %021 %4 = load i16, ptr %322 ret i16 %423}24 25define signext i32 @th_addsl_2(i64 %0, ptr %1) {26; RV64I-LABEL: th_addsl_2:27; RV64I: # %bb.0:28; RV64I-NEXT: slli a0, a0, 229; RV64I-NEXT: add a0, a1, a030; RV64I-NEXT: lw a0, 0(a0)31; RV64I-NEXT: ret32;33; RV64XTHEADBA-LABEL: th_addsl_2:34; RV64XTHEADBA: # %bb.0:35; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 236; RV64XTHEADBA-NEXT: lw a0, 0(a0)37; RV64XTHEADBA-NEXT: ret38 %3 = getelementptr inbounds i32, ptr %1, i64 %039 %4 = load i32, ptr %340 ret i32 %441}42 43define i64 @th_addsl_3(i64 %0, ptr %1) {44; RV64I-LABEL: th_addsl_3:45; RV64I: # %bb.0:46; RV64I-NEXT: slli a0, a0, 347; RV64I-NEXT: add a0, a1, a048; RV64I-NEXT: ld a0, 0(a0)49; RV64I-NEXT: ret50;51; RV64XTHEADBA-LABEL: th_addsl_3:52; RV64XTHEADBA: # %bb.0:53; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 354; RV64XTHEADBA-NEXT: ld a0, 0(a0)55; RV64XTHEADBA-NEXT: ret56 %3 = getelementptr inbounds i64, ptr %1, i64 %057 %4 = load i64, ptr %358 ret i64 %459}60 61; Type legalization inserts a sext_inreg after the first add. That add will be62; selected as th.addsl which does not sign extend. SimplifyDemandedBits is unable63; to remove the sext_inreg because it has multiple uses. The ashr will use the64; sext_inreg to become sraiw. This leaves the sext_inreg only used by the shl.65; If the shl is selected as sllw, we don't need the sext_inreg.66define i64 @th_addsl_2_extra_sext(i32 %x, i32 %y, i32 %z) {67; RV64I-LABEL: th_addsl_2_extra_sext:68; RV64I: # %bb.0:69; RV64I-NEXT: slli a0, a0, 270; RV64I-NEXT: add a0, a0, a171; RV64I-NEXT: sllw a1, a2, a072; RV64I-NEXT: sraiw a0, a0, 273; RV64I-NEXT: mul a0, a1, a074; RV64I-NEXT: ret75;76; RV64XTHEADBA-LABEL: th_addsl_2_extra_sext:77; RV64XTHEADBA: # %bb.0:78; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 279; RV64XTHEADBA-NEXT: sllw a1, a2, a080; RV64XTHEADBA-NEXT: sraiw a0, a0, 281; RV64XTHEADBA-NEXT: mul a0, a1, a082; RV64XTHEADBA-NEXT: ret83 %a = shl i32 %x, 284 %b = add i32 %a, %y85 %c = shl i32 %z, %b86 %d = ashr i32 %b, 287 %e = sext i32 %c to i6488 %f = sext i32 %d to i6489 %g = mul i64 %e, %f90 ret i64 %g91}92 93define i64 @addmul6(i64 %a, i64 %b) {94; RV64I-LABEL: addmul6:95; RV64I: # %bb.0:96; RV64I-NEXT: slli a2, a0, 197; RV64I-NEXT: slli a0, a0, 298; RV64I-NEXT: add a0, a0, a299; RV64I-NEXT: add a0, a0, a1100; RV64I-NEXT: ret101;102; RV64XTHEADBA-LABEL: addmul6:103; RV64XTHEADBA: # %bb.0:104; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 1105; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1106; RV64XTHEADBA-NEXT: ret107 %c = mul i64 %a, 6108 %d = add i64 %c, %b109 ret i64 %d110}111 112define i64 @disjointormul6(i64 %a, i64 %b) {113; RV64I-LABEL: disjointormul6:114; RV64I: # %bb.0:115; RV64I-NEXT: slli a2, a0, 1116; RV64I-NEXT: slli a0, a0, 2117; RV64I-NEXT: add a0, a0, a2118; RV64I-NEXT: or a0, a0, a1119; RV64I-NEXT: ret120;121; RV64XTHEADBA-LABEL: disjointormul6:122; RV64XTHEADBA: # %bb.0:123; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 1124; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1125; RV64XTHEADBA-NEXT: ret126 %c = mul i64 %a, 6127 %d = or disjoint i64 %c, %b128 ret i64 %d129}130 131define i64 @addmul10(i64 %a, i64 %b) {132; RV64I-LABEL: addmul10:133; RV64I: # %bb.0:134; RV64I-NEXT: slli a2, a0, 1135; RV64I-NEXT: slli a0, a0, 3136; RV64I-NEXT: add a0, a0, a2137; RV64I-NEXT: add a0, a0, a1138; RV64I-NEXT: ret139;140; RV64XTHEADBA-LABEL: addmul10:141; RV64XTHEADBA: # %bb.0:142; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2143; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1144; RV64XTHEADBA-NEXT: ret145 %c = mul i64 %a, 10146 %d = add i64 %c, %b147 ret i64 %d148}149 150define i64 @addmul12(i64 %a, i64 %b) {151; RV64I-LABEL: addmul12:152; RV64I: # %bb.0:153; RV64I-NEXT: slli a2, a0, 2154; RV64I-NEXT: slli a0, a0, 3155; RV64I-NEXT: add a0, a0, a2156; RV64I-NEXT: add a0, a0, a1157; RV64I-NEXT: ret158;159; RV64XTHEADBA-LABEL: addmul12:160; RV64XTHEADBA: # %bb.0:161; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 1162; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2163; RV64XTHEADBA-NEXT: ret164 %c = mul i64 %a, 12165 %d = add i64 %c, %b166 ret i64 %d167}168 169define i64 @addmul18(i64 %a, i64 %b) {170; RV64I-LABEL: addmul18:171; RV64I: # %bb.0:172; RV64I-NEXT: slli a2, a0, 1173; RV64I-NEXT: slli a0, a0, 4174; RV64I-NEXT: add a0, a0, a2175; RV64I-NEXT: add a0, a0, a1176; RV64I-NEXT: ret177;178; RV64XTHEADBA-LABEL: addmul18:179; RV64XTHEADBA: # %bb.0:180; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3181; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1182; RV64XTHEADBA-NEXT: ret183 %c = mul i64 %a, 18184 %d = add i64 %c, %b185 ret i64 %d186}187 188define i64 @addmul20(i64 %a, i64 %b) {189; RV64I-LABEL: addmul20:190; RV64I: # %bb.0:191; RV64I-NEXT: slli a2, a0, 2192; RV64I-NEXT: slli a0, a0, 4193; RV64I-NEXT: add a0, a0, a2194; RV64I-NEXT: add a0, a0, a1195; RV64I-NEXT: ret196;197; RV64XTHEADBA-LABEL: addmul20:198; RV64XTHEADBA: # %bb.0:199; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2200; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2201; RV64XTHEADBA-NEXT: ret202 %c = mul i64 %a, 20203 %d = add i64 %c, %b204 ret i64 %d205}206 207define i64 @addmul22(i64 %a, i64 %b) {208; RV64I-LABEL: addmul22:209; RV64I: # %bb.0:210; RV64I-NEXT: li a2, 22211; RV64I-NEXT: mul a0, a0, a2212; RV64I-NEXT: add a0, a0, a1213; RV64I-NEXT: ret214;215; RV64XTHEADBA-LABEL: addmul22:216; RV64XTHEADBA: # %bb.0:217; RV64XTHEADBA-NEXT: th.addsl a2, a0, a0, 2218; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 1219; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1220; RV64XTHEADBA-NEXT: ret221 %c = mul i64 %a, 22222 %d = add i64 %c, %b223 ret i64 %d224}225 226define i64 @addmul24(i64 %a, i64 %b) {227; RV64I-LABEL: addmul24:228; RV64I: # %bb.0:229; RV64I-NEXT: slli a2, a0, 3230; RV64I-NEXT: slli a0, a0, 4231; RV64I-NEXT: add a0, a0, a2232; RV64I-NEXT: add a0, a0, a1233; RV64I-NEXT: ret234;235; RV64XTHEADBA-LABEL: addmul24:236; RV64XTHEADBA: # %bb.0:237; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 1238; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 3239; RV64XTHEADBA-NEXT: ret240 %c = mul i64 %a, 24241 %d = add i64 %c, %b242 ret i64 %d243}244 245define i64 @addmul36(i64 %a, i64 %b) {246; RV64I-LABEL: addmul36:247; RV64I: # %bb.0:248; RV64I-NEXT: slli a2, a0, 2249; RV64I-NEXT: slli a0, a0, 5250; RV64I-NEXT: add a0, a0, a2251; RV64I-NEXT: add a0, a0, a1252; RV64I-NEXT: ret253;254; RV64XTHEADBA-LABEL: addmul36:255; RV64XTHEADBA: # %bb.0:256; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3257; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2258; RV64XTHEADBA-NEXT: ret259 %c = mul i64 %a, 36260 %d = add i64 %c, %b261 ret i64 %d262}263 264define i64 @addmul40(i64 %a, i64 %b) {265; RV64I-LABEL: addmul40:266; RV64I: # %bb.0:267; RV64I-NEXT: slli a2, a0, 3268; RV64I-NEXT: slli a0, a0, 5269; RV64I-NEXT: add a0, a0, a2270; RV64I-NEXT: add a0, a0, a1271; RV64I-NEXT: ret272;273; RV64XTHEADBA-LABEL: addmul40:274; RV64XTHEADBA: # %bb.0:275; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2276; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 3277; RV64XTHEADBA-NEXT: ret278 %c = mul i64 %a, 40279 %d = add i64 %c, %b280 ret i64 %d281}282 283define i64 @addmul72(i64 %a, i64 %b) {284; RV64I-LABEL: addmul72:285; RV64I: # %bb.0:286; RV64I-NEXT: slli a2, a0, 3287; RV64I-NEXT: slli a0, a0, 6288; RV64I-NEXT: add a0, a0, a2289; RV64I-NEXT: add a0, a0, a1290; RV64I-NEXT: ret291;292; RV64XTHEADBA-LABEL: addmul72:293; RV64XTHEADBA: # %bb.0:294; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3295; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 3296; RV64XTHEADBA-NEXT: ret297 %c = mul i64 %a, 72298 %d = add i64 %c, %b299 ret i64 %d300}301 302define i64 @mul50(i64 %a) {303; RV64I-LABEL: mul50:304; RV64I: # %bb.0:305; RV64I-NEXT: li a1, 50306; RV64I-NEXT: mul a0, a0, a1307; RV64I-NEXT: ret308;309; RV64XTHEADBA-LABEL: mul50:310; RV64XTHEADBA: # %bb.0:311; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2312; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2313; RV64XTHEADBA-NEXT: slli a0, a0, 1314; RV64XTHEADBA-NEXT: ret315 %c = mul i64 %a, 50316 ret i64 %c317}318 319define i64 @addmul50(i64 %a, i64 %b) {320; RV64I-LABEL: addmul50:321; RV64I: # %bb.0:322; RV64I-NEXT: li a2, 50323; RV64I-NEXT: mul a0, a0, a2324; RV64I-NEXT: add a0, a0, a1325; RV64I-NEXT: ret326;327; RV64XTHEADBA-LABEL: addmul50:328; RV64XTHEADBA: # %bb.0:329; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2330; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2331; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1332; RV64XTHEADBA-NEXT: ret333 %c = mul i64 %a, 50334 %d = add i64 %c, %b335 ret i64 %d336}337 338define i64 @mul100(i64 %a) {339; RV64I-LABEL: mul100:340; RV64I: # %bb.0:341; RV64I-NEXT: li a1, 100342; RV64I-NEXT: mul a0, a0, a1343; RV64I-NEXT: ret344;345; RV64XTHEADBA-LABEL: mul100:346; RV64XTHEADBA: # %bb.0:347; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2348; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2349; RV64XTHEADBA-NEXT: slli a0, a0, 2350; RV64XTHEADBA-NEXT: ret351 %c = mul i64 %a, 100352 ret i64 %c353}354 355define i64 @addmul100(i64 %a, i64 %b) {356; RV64I-LABEL: addmul100:357; RV64I: # %bb.0:358; RV64I-NEXT: li a2, 100359; RV64I-NEXT: mul a0, a0, a2360; RV64I-NEXT: add a0, a0, a1361; RV64I-NEXT: ret362;363; RV64XTHEADBA-LABEL: addmul100:364; RV64XTHEADBA: # %bb.0:365; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2366; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2367; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2368; RV64XTHEADBA-NEXT: ret369 %c = mul i64 %a, 100370 %d = add i64 %c, %b371 ret i64 %d372}373 374define i64 @mul162(i64 %a) {375; RV64I-LABEL: mul162:376; RV64I: # %bb.0:377; RV64I-NEXT: li a1, 162378; RV64I-NEXT: mul a0, a0, a1379; RV64I-NEXT: ret380;381; RV64XTHEADBA-LABEL: mul162:382; RV64XTHEADBA: # %bb.0:383; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3384; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3385; RV64XTHEADBA-NEXT: slli a0, a0, 1386; RV64XTHEADBA-NEXT: ret387 %c = mul i64 %a, 162388 ret i64 %c389}390 391define i64 @addmul162(i64 %a, i64 %b) {392; RV64I-LABEL: addmul162:393; RV64I: # %bb.0:394; RV64I-NEXT: li a2, 162395; RV64I-NEXT: mul a0, a0, a2396; RV64I-NEXT: add a0, a0, a1397; RV64I-NEXT: ret398;399; RV64XTHEADBA-LABEL: addmul162:400; RV64XTHEADBA: # %bb.0:401; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3402; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3403; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1404; RV64XTHEADBA-NEXT: ret405 %c = mul i64 %a, 162406 %d = add i64 %c, %b407 ret i64 %d408}409 410define i64 @mul180(i64 %a) {411; RV64I-LABEL: mul180:412; RV64I: # %bb.0:413; RV64I-NEXT: li a1, 180414; RV64I-NEXT: mul a0, a0, a1415; RV64I-NEXT: ret416;417; RV64XTHEADBA-LABEL: mul180:418; RV64XTHEADBA: # %bb.0:419; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2420; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3421; RV64XTHEADBA-NEXT: slli a0, a0, 2422; RV64XTHEADBA-NEXT: ret423 %c = mul i64 %a, 180424 ret i64 %c425}426 427define i64 @addmul180(i64 %a, i64 %b) {428; RV64I-LABEL: addmul180:429; RV64I: # %bb.0:430; RV64I-NEXT: li a2, 180431; RV64I-NEXT: mul a0, a0, a2432; RV64I-NEXT: add a0, a0, a1433; RV64I-NEXT: ret434;435; RV64XTHEADBA-LABEL: addmul180:436; RV64XTHEADBA: # %bb.0:437; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2438; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3439; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2440; RV64XTHEADBA-NEXT: ret441 %c = mul i64 %a, 180442 %d = add i64 %c, %b443 ret i64 %d444}445 446define i64 @add255mul180(i64 %a) {447; RV64I-LABEL: add255mul180:448; RV64I: # %bb.0:449; RV64I-NEXT: li a1, 180450; RV64I-NEXT: mul a0, a0, a1451; RV64I-NEXT: addi a0, a0, 255452; RV64I-NEXT: ret453;454; RV64XTHEADBA-LABEL: add255mul180:455; RV64XTHEADBA: # %bb.0:456; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2457; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3458; RV64XTHEADBA-NEXT: slli a0, a0, 2459; RV64XTHEADBA-NEXT: addi a0, a0, 255460; RV64XTHEADBA-NEXT: ret461 %c = mul i64 %a, 180462 %d = add i64 %c, 255463 ret i64 %d464}465 466define i64 @mul200(i64 %a) {467; RV64I-LABEL: mul200:468; RV64I: # %bb.0:469; RV64I-NEXT: li a1, 200470; RV64I-NEXT: mul a0, a0, a1471; RV64I-NEXT: ret472;473; RV64XTHEADBA-LABEL: mul200:474; RV64XTHEADBA: # %bb.0:475; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2476; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2477; RV64XTHEADBA-NEXT: slli a0, a0, 3478; RV64XTHEADBA-NEXT: ret479 %c = mul i64 %a, 200480 ret i64 %c481}482 483define i64 @addmul200(i64 %a, i64 %b) {484; RV64I-LABEL: addmul200:485; RV64I: # %bb.0:486; RV64I-NEXT: li a2, 200487; RV64I-NEXT: mul a0, a0, a2488; RV64I-NEXT: add a0, a0, a1489; RV64I-NEXT: ret490;491; RV64XTHEADBA-LABEL: addmul200:492; RV64XTHEADBA: # %bb.0:493; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2494; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2495; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 3496; RV64XTHEADBA-NEXT: ret497 %c = mul i64 %a, 200498 %d = add i64 %c, %b499 ret i64 %d500}501 502define i64 @addmul4096(i64 %a, i64 %b) {503; CHECK-LABEL: addmul4096:504; CHECK: # %bb.0:505; CHECK-NEXT: slli a0, a0, 12506; CHECK-NEXT: add a0, a0, a1507; CHECK-NEXT: ret508 %c = mul i64 %a, 4096509 %d = add i64 %c, %b510 ret i64 %d511}512 513define i64 @addmul4230(i64 %a, i64 %b) {514; CHECK-LABEL: addmul4230:515; CHECK: # %bb.0:516; CHECK-NEXT: lui a2, 1517; CHECK-NEXT: addi a2, a2, 134518; CHECK-NEXT: mul a0, a0, a2519; CHECK-NEXT: add a0, a0, a1520; CHECK-NEXT: ret521 %c = mul i64 %a, 4230522 %d = add i64 %c, %b523 ret i64 %d524}525 526define i64 @mul96(i64 %a) {527; RV64I-LABEL: mul96:528; RV64I: # %bb.0:529; RV64I-NEXT: slli a1, a0, 5530; RV64I-NEXT: slli a0, a0, 6531; RV64I-NEXT: add a0, a0, a1532; RV64I-NEXT: ret533;534; RV64XTHEADBA-LABEL: mul96:535; RV64XTHEADBA: # %bb.0:536; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 1537; RV64XTHEADBA-NEXT: slli a0, a0, 5538; RV64XTHEADBA-NEXT: ret539 %c = mul i64 %a, 96540 ret i64 %c541}542 543define i64 @mul119(i64 %a) {544; RV64I-LABEL: mul119:545; RV64I: # %bb.0:546; RV64I-NEXT: li a1, 119547; RV64I-NEXT: mul a0, a0, a1548; RV64I-NEXT: ret549;550; RV64XTHEADBA-LABEL: mul119:551; RV64XTHEADBA: # %bb.0:552; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 3553; RV64XTHEADBA-NEXT: slli a0, a0, 7554; RV64XTHEADBA-NEXT: sub a0, a0, a1555; RV64XTHEADBA-NEXT: ret556 %c = mul i64 %a, 119557 ret i64 %c558}559 560define i64 @mul123(i64 %a) {561; RV64I-LABEL: mul123:562; RV64I: # %bb.0:563; RV64I-NEXT: li a1, 123564; RV64I-NEXT: mul a0, a0, a1565; RV64I-NEXT: ret566;567; RV64XTHEADBA-LABEL: mul123:568; RV64XTHEADBA: # %bb.0:569; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 2570; RV64XTHEADBA-NEXT: slli a0, a0, 7571; RV64XTHEADBA-NEXT: sub a0, a0, a1572; RV64XTHEADBA-NEXT: ret573 %c = mul i64 %a, 123574 ret i64 %c575}576 577define i64 @mul125(i64 %a) {578; RV64I-LABEL: mul125:579; RV64I: # %bb.0:580; RV64I-NEXT: li a1, 125581; RV64I-NEXT: mul a0, a0, a1582; RV64I-NEXT: ret583;584; RV64XTHEADBA-LABEL: mul125:585; RV64XTHEADBA: # %bb.0:586; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 1587; RV64XTHEADBA-NEXT: slli a0, a0, 7588; RV64XTHEADBA-NEXT: sub a0, a0, a1589; RV64XTHEADBA-NEXT: ret590 %c = mul i64 %a, 125591 ret i64 %c592}593 594define i64 @mul131(i64 %a) {595; RV64I-LABEL: mul131:596; RV64I: # %bb.0:597; RV64I-NEXT: li a1, 131598; RV64I-NEXT: mul a0, a0, a1599; RV64I-NEXT: ret600;601; RV64XTHEADBA-LABEL: mul131:602; RV64XTHEADBA: # %bb.0:603; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 1604; RV64XTHEADBA-NEXT: slli a0, a0, 7605; RV64XTHEADBA-NEXT: add a0, a0, a1606; RV64XTHEADBA-NEXT: ret607 %c = mul i64 %a, 131608 ret i64 %c609}610 611define i64 @mul133(i64 %a) {612; RV64I-LABEL: mul133:613; RV64I: # %bb.0:614; RV64I-NEXT: li a1, 133615; RV64I-NEXT: mul a0, a0, a1616; RV64I-NEXT: ret617;618; RV64XTHEADBA-LABEL: mul133:619; RV64XTHEADBA: # %bb.0:620; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 2621; RV64XTHEADBA-NEXT: slli a0, a0, 7622; RV64XTHEADBA-NEXT: add a0, a0, a1623; RV64XTHEADBA-NEXT: ret624 %c = mul i64 %a, 133625 ret i64 %c626}627 628define i64 @mul137(i64 %a) {629; RV64I-LABEL: mul137:630; RV64I: # %bb.0:631; RV64I-NEXT: li a1, 137632; RV64I-NEXT: mul a0, a0, a1633; RV64I-NEXT: ret634;635; RV64XTHEADBA-LABEL: mul137:636; RV64XTHEADBA: # %bb.0:637; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 3638; RV64XTHEADBA-NEXT: slli a0, a0, 7639; RV64XTHEADBA-NEXT: add a0, a0, a1640; RV64XTHEADBA-NEXT: ret641 %c = mul i64 %a, 137642 ret i64 %c643}644 645define i64 @mul160(i64 %a) {646; RV64I-LABEL: mul160:647; RV64I: # %bb.0:648; RV64I-NEXT: slli a1, a0, 5649; RV64I-NEXT: slli a0, a0, 7650; RV64I-NEXT: add a0, a0, a1651; RV64I-NEXT: ret652;653; RV64XTHEADBA-LABEL: mul160:654; RV64XTHEADBA: # %bb.0:655; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2656; RV64XTHEADBA-NEXT: slli a0, a0, 5657; RV64XTHEADBA-NEXT: ret658 %c = mul i64 %a, 160659 ret i64 %c660}661 662define i64 @mul288(i64 %a) {663; RV64I-LABEL: mul288:664; RV64I: # %bb.0:665; RV64I-NEXT: slli a1, a0, 5666; RV64I-NEXT: slli a0, a0, 8667; RV64I-NEXT: add a0, a0, a1668; RV64I-NEXT: ret669;670; RV64XTHEADBA-LABEL: mul288:671; RV64XTHEADBA: # %bb.0:672; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3673; RV64XTHEADBA-NEXT: slli a0, a0, 5674; RV64XTHEADBA-NEXT: ret675 %c = mul i64 %a, 288676 ret i64 %c677}678 679define i64 @sh1add_imm(i64 %0) {680; CHECK-LABEL: sh1add_imm:681; CHECK: # %bb.0:682; CHECK-NEXT: slli a0, a0, 1683; CHECK-NEXT: addi a0, a0, 5684; CHECK-NEXT: ret685 %a = shl i64 %0, 1686 %b = add i64 %a, 5687 ret i64 %b688}689 690define i64 @sh2add_imm(i64 %0) {691; CHECK-LABEL: sh2add_imm:692; CHECK: # %bb.0:693; CHECK-NEXT: slli a0, a0, 2694; CHECK-NEXT: addi a0, a0, -6695; CHECK-NEXT: ret696 %a = shl i64 %0, 2697 %b = add i64 %a, -6698 ret i64 %b699}700 701define i64 @sh3add_imm(i64 %0) {702; CHECK-LABEL: sh3add_imm:703; CHECK: # %bb.0:704; CHECK-NEXT: slli a0, a0, 3705; CHECK-NEXT: addi a0, a0, 7706; CHECK-NEXT: ret707 %a = shl i64 %0, 3708 %b = add i64 %a, 7709 ret i64 %b710}711 712define i64 @mul258(i64 %a) {713; RV64I-LABEL: mul258:714; RV64I: # %bb.0:715; RV64I-NEXT: slli a1, a0, 1716; RV64I-NEXT: slli a0, a0, 8717; RV64I-NEXT: add a0, a0, a1718; RV64I-NEXT: ret719;720; RV64XTHEADBA-LABEL: mul258:721; RV64XTHEADBA: # %bb.0:722; RV64XTHEADBA-NEXT: slli a1, a0, 8723; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1724; RV64XTHEADBA-NEXT: ret725 %c = mul i64 %a, 258726 ret i64 %c727}728 729define i64 @mul260(i64 %a) {730; RV64I-LABEL: mul260:731; RV64I: # %bb.0:732; RV64I-NEXT: slli a1, a0, 2733; RV64I-NEXT: slli a0, a0, 8734; RV64I-NEXT: add a0, a0, a1735; RV64I-NEXT: ret736;737; RV64XTHEADBA-LABEL: mul260:738; RV64XTHEADBA: # %bb.0:739; RV64XTHEADBA-NEXT: slli a1, a0, 8740; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2741; RV64XTHEADBA-NEXT: ret742 %c = mul i64 %a, 260743 ret i64 %c744}745 746define i64 @mul264(i64 %a) {747; RV64I-LABEL: mul264:748; RV64I: # %bb.0:749; RV64I-NEXT: slli a1, a0, 3750; RV64I-NEXT: slli a0, a0, 8751; RV64I-NEXT: add a0, a0, a1752; RV64I-NEXT: ret753;754; RV64XTHEADBA-LABEL: mul264:755; RV64XTHEADBA: # %bb.0:756; RV64XTHEADBA-NEXT: slli a1, a0, 8757; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 3758; RV64XTHEADBA-NEXT: ret759 %c = mul i64 %a, 264760 ret i64 %c761}762define i64 @mul11(i64 %a) {763; RV64I-LABEL: mul11:764; RV64I: # %bb.0:765; RV64I-NEXT: li a1, 11766; RV64I-NEXT: mul a0, a0, a1767; RV64I-NEXT: ret768;769; RV64XTHEADBA-LABEL: mul11:770; RV64XTHEADBA: # %bb.0:771; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 2772; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 1773; RV64XTHEADBA-NEXT: ret774 %c = mul i64 %a, 11775 ret i64 %c776}777 778define i64 @mul19(i64 %a) {779; RV64I-LABEL: mul19:780; RV64I: # %bb.0:781; RV64I-NEXT: li a1, 19782; RV64I-NEXT: mul a0, a0, a1783; RV64I-NEXT: ret784;785; RV64XTHEADBA-LABEL: mul19:786; RV64XTHEADBA: # %bb.0:787; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 3788; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 1789; RV64XTHEADBA-NEXT: ret790 %c = mul i64 %a, 19791 ret i64 %c792}793 794define i64 @mul13(i64 %a) {795; RV64I-LABEL: mul13:796; RV64I: # %bb.0:797; RV64I-NEXT: li a1, 13798; RV64I-NEXT: mul a0, a0, a1799; RV64I-NEXT: ret800;801; RV64XTHEADBA-LABEL: mul13:802; RV64XTHEADBA: # %bb.0:803; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 1804; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 2805; RV64XTHEADBA-NEXT: ret806 %c = mul i64 %a, 13807 ret i64 %c808}809 810define i64 @mul21(i64 %a) {811; RV64I-LABEL: mul21:812; RV64I: # %bb.0:813; RV64I-NEXT: li a1, 21814; RV64I-NEXT: mul a0, a0, a1815; RV64I-NEXT: ret816;817; RV64XTHEADBA-LABEL: mul21:818; RV64XTHEADBA: # %bb.0:819; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 2820; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 2821; RV64XTHEADBA-NEXT: ret822 %c = mul i64 %a, 21823 ret i64 %c824}825 826define i64 @mul37(i64 %a) {827; RV64I-LABEL: mul37:828; RV64I: # %bb.0:829; RV64I-NEXT: li a1, 37830; RV64I-NEXT: mul a0, a0, a1831; RV64I-NEXT: ret832;833; RV64XTHEADBA-LABEL: mul37:834; RV64XTHEADBA: # %bb.0:835; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 3836; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 2837; RV64XTHEADBA-NEXT: ret838 %c = mul i64 %a, 37839 ret i64 %c840}841 842define i64 @mul25(i64 %a) {843; RV64I-LABEL: mul25:844; RV64I: # %bb.0:845; RV64I-NEXT: li a1, 25846; RV64I-NEXT: mul a0, a0, a1847; RV64I-NEXT: ret848;849; RV64XTHEADBA-LABEL: mul25:850; RV64XTHEADBA: # %bb.0:851; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2852; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2853; RV64XTHEADBA-NEXT: ret854 %c = mul i64 %a, 25855 ret i64 %c856}857 858define i64 @mul41(i64 %a) {859; RV64I-LABEL: mul41:860; RV64I: # %bb.0:861; RV64I-NEXT: li a1, 41862; RV64I-NEXT: mul a0, a0, a1863; RV64I-NEXT: ret864;865; RV64XTHEADBA-LABEL: mul41:866; RV64XTHEADBA: # %bb.0:867; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 2868; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 3869; RV64XTHEADBA-NEXT: ret870 %c = mul i64 %a, 41871 ret i64 %c872}873 874define i64 @mul73(i64 %a) {875; RV64I-LABEL: mul73:876; RV64I: # %bb.0:877; RV64I-NEXT: li a1, 73878; RV64I-NEXT: mul a0, a0, a1879; RV64I-NEXT: ret880;881; RV64XTHEADBA-LABEL: mul73:882; RV64XTHEADBA: # %bb.0:883; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 3884; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 3885; RV64XTHEADBA-NEXT: ret886 %c = mul i64 %a, 73887 ret i64 %c888}889 890define i64 @mul27(i64 %a) {891; RV64I-LABEL: mul27:892; RV64I: # %bb.0:893; RV64I-NEXT: li a1, 27894; RV64I-NEXT: mul a0, a0, a1895; RV64I-NEXT: ret896;897; RV64XTHEADBA-LABEL: mul27:898; RV64XTHEADBA: # %bb.0:899; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 1900; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3901; RV64XTHEADBA-NEXT: ret902 %c = mul i64 %a, 27903 ret i64 %c904}905 906define i64 @mul45(i64 %a) {907; RV64I-LABEL: mul45:908; RV64I: # %bb.0:909; RV64I-NEXT: li a1, 45910; RV64I-NEXT: mul a0, a0, a1911; RV64I-NEXT: ret912;913; RV64XTHEADBA-LABEL: mul45:914; RV64XTHEADBA: # %bb.0:915; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 2916; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3917; RV64XTHEADBA-NEXT: ret918 %c = mul i64 %a, 45919 ret i64 %c920}921 922define i64 @mul81(i64 %a) {923; RV64I-LABEL: mul81:924; RV64I: # %bb.0:925; RV64I-NEXT: li a1, 81926; RV64I-NEXT: mul a0, a0, a1927; RV64I-NEXT: ret928;929; RV64XTHEADBA-LABEL: mul81:930; RV64XTHEADBA: # %bb.0:931; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3932; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 3933; RV64XTHEADBA-NEXT: ret934 %c = mul i64 %a, 81935 ret i64 %c936}937 938define i64 @mul4098(i64 %a) {939; RV64I-LABEL: mul4098:940; RV64I: # %bb.0:941; RV64I-NEXT: slli a1, a0, 1942; RV64I-NEXT: slli a0, a0, 12943; RV64I-NEXT: add a0, a0, a1944; RV64I-NEXT: ret945;946; RV64XTHEADBA-LABEL: mul4098:947; RV64XTHEADBA: # %bb.0:948; RV64XTHEADBA-NEXT: slli a1, a0, 12949; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 1950; RV64XTHEADBA-NEXT: ret951 %c = mul i64 %a, 4098952 ret i64 %c953}954 955define i64 @mul4100(i64 %a) {956; RV64I-LABEL: mul4100:957; RV64I: # %bb.0:958; RV64I-NEXT: slli a1, a0, 2959; RV64I-NEXT: slli a0, a0, 12960; RV64I-NEXT: add a0, a0, a1961; RV64I-NEXT: ret962;963; RV64XTHEADBA-LABEL: mul4100:964; RV64XTHEADBA: # %bb.0:965; RV64XTHEADBA-NEXT: slli a1, a0, 12966; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 2967; RV64XTHEADBA-NEXT: ret968 %c = mul i64 %a, 4100969 ret i64 %c970}971 972define i64 @mul4104(i64 %a) {973; RV64I-LABEL: mul4104:974; RV64I: # %bb.0:975; RV64I-NEXT: slli a1, a0, 3976; RV64I-NEXT: slli a0, a0, 12977; RV64I-NEXT: add a0, a0, a1978; RV64I-NEXT: ret979;980; RV64XTHEADBA-LABEL: mul4104:981; RV64XTHEADBA: # %bb.0:982; RV64XTHEADBA-NEXT: slli a1, a0, 12983; RV64XTHEADBA-NEXT: th.addsl a0, a1, a0, 3984; RV64XTHEADBA-NEXT: ret985 %c = mul i64 %a, 4104986 ret i64 %c987}988 989define signext i32 @mulw192(i32 signext %a) {990; RV64I-LABEL: mulw192:991; RV64I: # %bb.0:992; RV64I-NEXT: slli a1, a0, 6993; RV64I-NEXT: slli a0, a0, 7994; RV64I-NEXT: addw a0, a0, a1995; RV64I-NEXT: ret996;997; RV64XTHEADBA-LABEL: mulw192:998; RV64XTHEADBA: # %bb.0:999; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 11000; RV64XTHEADBA-NEXT: slliw a0, a0, 61001; RV64XTHEADBA-NEXT: ret1002 %c = mul i32 %a, 1921003 ret i32 %c1004}1005 1006define signext i32 @mulw320(i32 signext %a) {1007; RV64I-LABEL: mulw320:1008; RV64I: # %bb.0:1009; RV64I-NEXT: slli a1, a0, 61010; RV64I-NEXT: slli a0, a0, 81011; RV64I-NEXT: addw a0, a0, a11012; RV64I-NEXT: ret1013;1014; RV64XTHEADBA-LABEL: mulw320:1015; RV64XTHEADBA: # %bb.0:1016; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 21017; RV64XTHEADBA-NEXT: slliw a0, a0, 61018; RV64XTHEADBA-NEXT: ret1019 %c = mul i32 %a, 3201020 ret i32 %c1021}1022 1023define signext i32 @mulw576(i32 signext %a) {1024; RV64I-LABEL: mulw576:1025; RV64I: # %bb.0:1026; RV64I-NEXT: slli a1, a0, 61027; RV64I-NEXT: slli a0, a0, 91028; RV64I-NEXT: addw a0, a0, a11029; RV64I-NEXT: ret1030;1031; RV64XTHEADBA-LABEL: mulw576:1032; RV64XTHEADBA: # %bb.0:1033; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 31034; RV64XTHEADBA-NEXT: slliw a0, a0, 61035; RV64XTHEADBA-NEXT: ret1036 %c = mul i32 %a, 5761037 ret i32 %c1038}1039 1040define i64 @add4104(i64 %a) {1041; RV64I-LABEL: add4104:1042; RV64I: # %bb.0:1043; RV64I-NEXT: lui a1, 11044; RV64I-NEXT: addi a1, a1, 81045; RV64I-NEXT: add a0, a0, a11046; RV64I-NEXT: ret1047;1048; RV64XTHEADBA-LABEL: add4104:1049; RV64XTHEADBA: # %bb.0:1050; RV64XTHEADBA-NEXT: li a1, 10261051; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21052; RV64XTHEADBA-NEXT: ret1053 %c = add i64 %a, 41041054 ret i64 %c1055}1056 1057define i64 @add4104_2(i64 %a) {1058; RV64I-LABEL: add4104_2:1059; RV64I: # %bb.0:1060; RV64I-NEXT: lui a1, 11061; RV64I-NEXT: addi a1, a1, 81062; RV64I-NEXT: or a0, a0, a11063; RV64I-NEXT: ret1064;1065; RV64XTHEADBA-LABEL: add4104_2:1066; RV64XTHEADBA: # %bb.0:1067; RV64XTHEADBA-NEXT: li a1, 10261068; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21069; RV64XTHEADBA-NEXT: ret1070 %c = or disjoint i64 %a, 41041071 ret i64 %c1072}1073 1074define i64 @add8208(i64 %a) {1075; RV64I-LABEL: add8208:1076; RV64I: # %bb.0:1077; RV64I-NEXT: lui a1, 21078; RV64I-NEXT: addi a1, a1, 161079; RV64I-NEXT: add a0, a0, a11080; RV64I-NEXT: ret1081;1082; RV64XTHEADBA-LABEL: add8208:1083; RV64XTHEADBA: # %bb.0:1084; RV64XTHEADBA-NEXT: li a1, 10261085; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31086; RV64XTHEADBA-NEXT: ret1087 %c = add i64 %a, 82081088 ret i64 %c1089}1090 1091; Make sure we prefer LUI for the 8192 instead of using sh3add.1092define signext i32 @add8192_i32(i32 signext %a) {1093; CHECK-LABEL: add8192_i32:1094; CHECK: # %bb.0:1095; CHECK-NEXT: lui a1, 21096; CHECK-NEXT: addw a0, a0, a11097; CHECK-NEXT: ret1098 %c = add i32 %a, 81921099 ret i32 %c1100}1101 1102; Make sure we prefer LUI for the 8192 instead of using sh3add.1103define i64 @add8192(i64 %a) {1104; CHECK-LABEL: add8192:1105; CHECK: # %bb.0:1106; CHECK-NEXT: lui a1, 21107; CHECK-NEXT: add a0, a0, a11108; CHECK-NEXT: ret1109 %c = add i64 %a, 81921110 ret i64 %c1111}1112 1113define signext i32 @addshl32_5_6(i32 signext %a, i32 signext %b) {1114; RV64I-LABEL: addshl32_5_6:1115; RV64I: # %bb.0:1116; RV64I-NEXT: slli a0, a0, 51117; RV64I-NEXT: slli a1, a1, 61118; RV64I-NEXT: addw a0, a0, a11119; RV64I-NEXT: ret1120;1121; RV64XTHEADBA-LABEL: addshl32_5_6:1122; RV64XTHEADBA: # %bb.0:1123; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 11124; RV64XTHEADBA-NEXT: slliw a0, a0, 51125; RV64XTHEADBA-NEXT: ret1126 %c = shl i32 %a, 51127 %d = shl i32 %b, 61128 %e = add i32 %c, %d1129 ret i32 %e1130}1131 1132define i64 @addshl64_5_6(i64 %a, i64 %b) {1133; RV64I-LABEL: addshl64_5_6:1134; RV64I: # %bb.0:1135; RV64I-NEXT: slli a0, a0, 51136; RV64I-NEXT: slli a1, a1, 61137; RV64I-NEXT: add a0, a0, a11138; RV64I-NEXT: ret1139;1140; RV64XTHEADBA-LABEL: addshl64_5_6:1141; RV64XTHEADBA: # %bb.0:1142; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 11143; RV64XTHEADBA-NEXT: slli a0, a0, 51144; RV64XTHEADBA-NEXT: ret1145 %c = shl i64 %a, 51146 %d = shl i64 %b, 61147 %e = add i64 %c, %d1148 ret i64 %e1149}1150 1151define signext i32 @addshl32_5_7(i32 signext %a, i32 signext %b) {1152; RV64I-LABEL: addshl32_5_7:1153; RV64I: # %bb.0:1154; RV64I-NEXT: slli a0, a0, 51155; RV64I-NEXT: slli a1, a1, 71156; RV64I-NEXT: addw a0, a0, a11157; RV64I-NEXT: ret1158;1159; RV64XTHEADBA-LABEL: addshl32_5_7:1160; RV64XTHEADBA: # %bb.0:1161; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21162; RV64XTHEADBA-NEXT: slliw a0, a0, 51163; RV64XTHEADBA-NEXT: ret1164 %c = shl i32 %a, 51165 %d = shl i32 %b, 71166 %e = add i32 %c, %d1167 ret i32 %e1168}1169 1170define i64 @addshl64_5_7(i64 %a, i64 %b) {1171; RV64I-LABEL: addshl64_5_7:1172; RV64I: # %bb.0:1173; RV64I-NEXT: slli a0, a0, 51174; RV64I-NEXT: slli a1, a1, 71175; RV64I-NEXT: add a0, a0, a11176; RV64I-NEXT: ret1177;1178; RV64XTHEADBA-LABEL: addshl64_5_7:1179; RV64XTHEADBA: # %bb.0:1180; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21181; RV64XTHEADBA-NEXT: slli a0, a0, 51182; RV64XTHEADBA-NEXT: ret1183 %c = shl i64 %a, 51184 %d = shl i64 %b, 71185 %e = add i64 %c, %d1186 ret i64 %e1187}1188 1189define signext i32 @addshl32_5_8(i32 signext %a, i32 signext %b) {1190; RV64I-LABEL: addshl32_5_8:1191; RV64I: # %bb.0:1192; RV64I-NEXT: slli a0, a0, 51193; RV64I-NEXT: slli a1, a1, 81194; RV64I-NEXT: addw a0, a0, a11195; RV64I-NEXT: ret1196;1197; RV64XTHEADBA-LABEL: addshl32_5_8:1198; RV64XTHEADBA: # %bb.0:1199; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31200; RV64XTHEADBA-NEXT: slliw a0, a0, 51201; RV64XTHEADBA-NEXT: ret1202 %c = shl i32 %a, 51203 %d = shl i32 %b, 81204 %e = add i32 %c, %d1205 ret i32 %e1206}1207 1208define i64 @addshl64_5_8(i64 %a, i64 %b) {1209; RV64I-LABEL: addshl64_5_8:1210; RV64I: # %bb.0:1211; RV64I-NEXT: slli a0, a0, 51212; RV64I-NEXT: slli a1, a1, 81213; RV64I-NEXT: add a0, a0, a11214; RV64I-NEXT: ret1215;1216; RV64XTHEADBA-LABEL: addshl64_5_8:1217; RV64XTHEADBA: # %bb.0:1218; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31219; RV64XTHEADBA-NEXT: slli a0, a0, 51220; RV64XTHEADBA-NEXT: ret1221 %c = shl i64 %a, 51222 %d = shl i64 %b, 81223 %e = add i64 %c, %d1224 ret i64 %e1225}1226 1227define i64 @sh6_sh3_add1(i64 noundef %x, i64 noundef %y, i64 noundef %z) {1228; RV64I-LABEL: sh6_sh3_add1:1229; RV64I: # %bb.0: # %entry1230; RV64I-NEXT: slli a2, a2, 31231; RV64I-NEXT: slli a1, a1, 61232; RV64I-NEXT: add a1, a1, a21233; RV64I-NEXT: add a0, a1, a01234; RV64I-NEXT: ret1235;1236; RV64XTHEADBA-LABEL: sh6_sh3_add1:1237; RV64XTHEADBA: # %bb.0: # %entry1238; RV64XTHEADBA-NEXT: th.addsl a1, a2, a1, 31239; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31240; RV64XTHEADBA-NEXT: ret1241entry:1242 %shl = shl i64 %z, 31243 %shl1 = shl i64 %y, 61244 %add = add nsw i64 %shl1, %shl1245 %add2 = add nsw i64 %add, %x1246 ret i64 %add21247}1248 1249define i64 @sh6_sh3_add2(i64 noundef %x, i64 noundef %y, i64 noundef %z) {1250; RV64I-LABEL: sh6_sh3_add2:1251; RV64I: # %bb.0: # %entry1252; RV64I-NEXT: slli a2, a2, 31253; RV64I-NEXT: slli a1, a1, 61254; RV64I-NEXT: add a0, a1, a01255; RV64I-NEXT: add a0, a0, a21256; RV64I-NEXT: ret1257;1258; RV64XTHEADBA-LABEL: sh6_sh3_add2:1259; RV64XTHEADBA: # %bb.0: # %entry1260; RV64XTHEADBA-NEXT: slli a1, a1, 61261; RV64XTHEADBA-NEXT: add a0, a1, a01262; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31263; RV64XTHEADBA-NEXT: ret1264entry:1265 %shl = shl i64 %z, 31266 %shl1 = shl i64 %y, 61267 %add = add nsw i64 %shl1, %x1268 %add2 = add nsw i64 %add, %shl1269 ret i64 %add21270}1271 1272define i64 @sh6_sh3_add3(i64 noundef %x, i64 noundef %y, i64 noundef %z) {1273; RV64I-LABEL: sh6_sh3_add3:1274; RV64I: # %bb.0: # %entry1275; RV64I-NEXT: slli a2, a2, 31276; RV64I-NEXT: slli a1, a1, 61277; RV64I-NEXT: add a1, a1, a21278; RV64I-NEXT: add a0, a0, a11279; RV64I-NEXT: ret1280;1281; RV64XTHEADBA-LABEL: sh6_sh3_add3:1282; RV64XTHEADBA: # %bb.0: # %entry1283; RV64XTHEADBA-NEXT: th.addsl a1, a2, a1, 31284; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31285; RV64XTHEADBA-NEXT: ret1286entry:1287 %shl = shl i64 %z, 31288 %shl1 = shl i64 %y, 61289 %add = add nsw i64 %shl1, %shl1290 %add2 = add nsw i64 %x, %add1291 ret i64 %add21292}1293 1294define i64 @sh6_sh3_add4(i64 noundef %x, i64 noundef %y, i64 noundef %z) {1295; RV64I-LABEL: sh6_sh3_add4:1296; RV64I: # %bb.0: # %entry1297; RV64I-NEXT: slli a2, a2, 31298; RV64I-NEXT: slli a1, a1, 61299; RV64I-NEXT: add a0, a0, a21300; RV64I-NEXT: add a0, a0, a11301; RV64I-NEXT: ret1302;1303; RV64XTHEADBA-LABEL: sh6_sh3_add4:1304; RV64XTHEADBA: # %bb.0: # %entry1305; RV64XTHEADBA-NEXT: slli a1, a1, 61306; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31307; RV64XTHEADBA-NEXT: add a0, a0, a11308; RV64XTHEADBA-NEXT: ret1309entry:1310 %shl = shl i64 %z, 31311 %shl1 = shl i64 %y, 61312 %add = add nsw i64 %x, %shl1313 %add2 = add nsw i64 %add, %shl11314 ret i64 %add21315}1316 1317define signext i16 @srliw_1_sh1add(ptr %0, i32 signext %1) {1318; CHECK-LABEL: srliw_1_sh1add:1319; CHECK: # %bb.0:1320; CHECK-NEXT: srliw a1, a1, 11321; CHECK-NEXT: slli a1, a1, 11322; CHECK-NEXT: add a0, a0, a11323; CHECK-NEXT: lh a0, 0(a0)1324; CHECK-NEXT: ret1325 %3 = lshr i32 %1, 11326 %4 = zext i32 %3 to i641327 %5 = getelementptr inbounds i16, ptr %0, i64 %41328 %6 = load i16, ptr %5, align 21329 ret i16 %61330}1331 1332define signext i32 @srliw_2_sh2add(ptr %0, i32 signext %1) {1333; CHECK-LABEL: srliw_2_sh2add:1334; CHECK: # %bb.0:1335; CHECK-NEXT: srliw a1, a1, 21336; CHECK-NEXT: slli a1, a1, 21337; CHECK-NEXT: add a0, a0, a11338; CHECK-NEXT: lw a0, 0(a0)1339; CHECK-NEXT: ret1340 %3 = lshr i32 %1, 21341 %4 = zext i32 %3 to i641342 %5 = getelementptr inbounds i32, ptr %0, i64 %41343 %6 = load i32, ptr %5, align 41344 ret i32 %61345}1346 1347define i64 @srliw_3_sh3add(ptr %0, i32 signext %1) {1348; CHECK-LABEL: srliw_3_sh3add:1349; CHECK: # %bb.0:1350; CHECK-NEXT: srliw a1, a1, 31351; CHECK-NEXT: slli a1, a1, 31352; CHECK-NEXT: add a0, a0, a11353; CHECK-NEXT: ld a0, 0(a0)1354; CHECK-NEXT: ret1355 %3 = lshr i32 %1, 31356 %4 = zext i32 %3 to i641357 %5 = getelementptr inbounds i64, ptr %0, i64 %41358 %6 = load i64, ptr %5, align 81359 ret i64 %61360}1361 1362define signext i32 @srliw_1_sh2add(ptr %0, i32 signext %1) {1363; RV64I-LABEL: srliw_1_sh2add:1364; RV64I: # %bb.0:1365; RV64I-NEXT: srliw a1, a1, 11366; RV64I-NEXT: slli a1, a1, 21367; RV64I-NEXT: add a0, a0, a11368; RV64I-NEXT: lw a0, 0(a0)1369; RV64I-NEXT: ret1370;1371; RV64XTHEADBA-LABEL: srliw_1_sh2add:1372; RV64XTHEADBA: # %bb.0:1373; RV64XTHEADBA-NEXT: srliw a1, a1, 11374; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21375; RV64XTHEADBA-NEXT: lw a0, 0(a0)1376; RV64XTHEADBA-NEXT: ret1377 %3 = lshr i32 %1, 11378 %4 = zext i32 %3 to i641379 %5 = getelementptr inbounds i32, ptr %0, i64 %41380 %6 = load i32, ptr %5, align 41381 ret i32 %61382}1383 1384define i64 @srliw_1_sh3add(ptr %0, i32 signext %1) {1385; RV64I-LABEL: srliw_1_sh3add:1386; RV64I: # %bb.0:1387; RV64I-NEXT: srliw a1, a1, 11388; RV64I-NEXT: slli a1, a1, 31389; RV64I-NEXT: add a0, a0, a11390; RV64I-NEXT: ld a0, 0(a0)1391; RV64I-NEXT: ret1392;1393; RV64XTHEADBA-LABEL: srliw_1_sh3add:1394; RV64XTHEADBA: # %bb.0:1395; RV64XTHEADBA-NEXT: srliw a1, a1, 11396; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31397; RV64XTHEADBA-NEXT: ld a0, 0(a0)1398; RV64XTHEADBA-NEXT: ret1399 %3 = lshr i32 %1, 11400 %4 = zext i32 %3 to i641401 %5 = getelementptr inbounds i64, ptr %0, i64 %41402 %6 = load i64, ptr %5, align 81403 ret i64 %61404}1405 1406define i64 @srliw_2_sh3add(ptr %0, i32 signext %1) {1407; RV64I-LABEL: srliw_2_sh3add:1408; RV64I: # %bb.0:1409; RV64I-NEXT: srliw a1, a1, 21410; RV64I-NEXT: slli a1, a1, 31411; RV64I-NEXT: add a0, a0, a11412; RV64I-NEXT: ld a0, 0(a0)1413; RV64I-NEXT: ret1414;1415; RV64XTHEADBA-LABEL: srliw_2_sh3add:1416; RV64XTHEADBA: # %bb.0:1417; RV64XTHEADBA-NEXT: srliw a1, a1, 21418; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31419; RV64XTHEADBA-NEXT: ld a0, 0(a0)1420; RV64XTHEADBA-NEXT: ret1421 %3 = lshr i32 %1, 21422 %4 = zext i32 %3 to i641423 %5 = getelementptr inbounds i64, ptr %0, i64 %41424 %6 = load i64, ptr %5, align 81425 ret i64 %61426}1427 1428define signext i16 @srliw_2_sh1add(ptr %0, i32 signext %1) {1429; RV64I-LABEL: srliw_2_sh1add:1430; RV64I: # %bb.0:1431; RV64I-NEXT: srliw a1, a1, 21432; RV64I-NEXT: slli a1, a1, 11433; RV64I-NEXT: add a0, a0, a11434; RV64I-NEXT: lh a0, 0(a0)1435; RV64I-NEXT: ret1436;1437; RV64XTHEADBA-LABEL: srliw_2_sh1add:1438; RV64XTHEADBA: # %bb.0:1439; RV64XTHEADBA-NEXT: srliw a1, a1, 21440; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 11441; RV64XTHEADBA-NEXT: lh a0, 0(a0)1442; RV64XTHEADBA-NEXT: ret1443 %3 = lshr i32 %1, 21444 %4 = zext i32 %3 to i641445 %5 = getelementptr inbounds i16, ptr %0, i64 %41446 %6 = load i16, ptr %5, align 21447 ret i16 %61448}1449 1450 1451define signext i32 @srliw_3_sh2add(ptr %0, i32 signext %1) {1452; RV64I-LABEL: srliw_3_sh2add:1453; RV64I: # %bb.0:1454; RV64I-NEXT: srliw a1, a1, 31455; RV64I-NEXT: slli a1, a1, 21456; RV64I-NEXT: add a0, a0, a11457; RV64I-NEXT: lw a0, 0(a0)1458; RV64I-NEXT: ret1459;1460; RV64XTHEADBA-LABEL: srliw_3_sh2add:1461; RV64XTHEADBA: # %bb.0:1462; RV64XTHEADBA-NEXT: srliw a1, a1, 31463; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21464; RV64XTHEADBA-NEXT: lw a0, 0(a0)1465; RV64XTHEADBA-NEXT: ret1466 %3 = lshr i32 %1, 31467 %4 = zext i32 %3 to i641468 %5 = getelementptr inbounds i32, ptr %0, i64 %41469 %6 = load i32, ptr %5, align 41470 ret i32 %61471}1472 1473define i64 @srliw_4_sh3add(ptr %0, i32 signext %1) {1474; RV64I-LABEL: srliw_4_sh3add:1475; RV64I: # %bb.0:1476; RV64I-NEXT: srliw a1, a1, 41477; RV64I-NEXT: slli a1, a1, 31478; RV64I-NEXT: add a0, a0, a11479; RV64I-NEXT: ld a0, 0(a0)1480; RV64I-NEXT: ret1481;1482; RV64XTHEADBA-LABEL: srliw_4_sh3add:1483; RV64XTHEADBA: # %bb.0:1484; RV64XTHEADBA-NEXT: srliw a1, a1, 41485; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31486; RV64XTHEADBA-NEXT: ld a0, 0(a0)1487; RV64XTHEADBA-NEXT: ret1488 %3 = lshr i32 %1, 41489 %4 = zext i32 %3 to i641490 %5 = getelementptr inbounds i64, ptr %0, i64 %41491 %6 = load i64, ptr %5, align 81492 ret i64 %61493}1494 1495define signext i32 @srli_1_sh2add(ptr %0, i64 %1) {1496; RV64I-LABEL: srli_1_sh2add:1497; RV64I: # %bb.0:1498; RV64I-NEXT: slli a1, a1, 11499; RV64I-NEXT: andi a1, a1, -41500; RV64I-NEXT: add a0, a0, a11501; RV64I-NEXT: lw a0, 0(a0)1502; RV64I-NEXT: ret1503;1504; RV64XTHEADBA-LABEL: srli_1_sh2add:1505; RV64XTHEADBA: # %bb.0:1506; RV64XTHEADBA-NEXT: srli a1, a1, 11507; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21508; RV64XTHEADBA-NEXT: lw a0, 0(a0)1509; RV64XTHEADBA-NEXT: ret1510 %3 = lshr i64 %1, 11511 %4 = getelementptr inbounds i32, ptr %0, i64 %31512 %5 = load i32, ptr %4, align 41513 ret i32 %51514}1515 1516define i64 @srli_2_sh3add(ptr %0, i64 %1) {1517; RV64I-LABEL: srli_2_sh3add:1518; RV64I: # %bb.0:1519; RV64I-NEXT: slli a1, a1, 11520; RV64I-NEXT: andi a1, a1, -81521; RV64I-NEXT: add a0, a0, a11522; RV64I-NEXT: ld a0, 0(a0)1523; RV64I-NEXT: ret1524;1525; RV64XTHEADBA-LABEL: srli_2_sh3add:1526; RV64XTHEADBA: # %bb.0:1527; RV64XTHEADBA-NEXT: srli a1, a1, 21528; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31529; RV64XTHEADBA-NEXT: ld a0, 0(a0)1530; RV64XTHEADBA-NEXT: ret1531 %3 = lshr i64 %1, 21532 %4 = getelementptr inbounds i64, ptr %0, i64 %31533 %5 = load i64, ptr %4, align 81534 ret i64 %51535}1536 1537define signext i16 @srli_2_sh1add(ptr %0, i64 %1) {1538; RV64I-LABEL: srli_2_sh1add:1539; RV64I: # %bb.0:1540; RV64I-NEXT: srli a1, a1, 11541; RV64I-NEXT: andi a1, a1, -21542; RV64I-NEXT: add a0, a0, a11543; RV64I-NEXT: lh a0, 0(a0)1544; RV64I-NEXT: ret1545;1546; RV64XTHEADBA-LABEL: srli_2_sh1add:1547; RV64XTHEADBA: # %bb.0:1548; RV64XTHEADBA-NEXT: srli a1, a1, 21549; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 11550; RV64XTHEADBA-NEXT: lh a0, 0(a0)1551; RV64XTHEADBA-NEXT: ret1552 %3 = lshr i64 %1, 21553 %4 = getelementptr inbounds i16, ptr %0, i64 %31554 %5 = load i16, ptr %4, align 21555 ret i16 %51556}1557 1558define signext i32 @srli_3_sh2add(ptr %0, i64 %1) {1559; RV64I-LABEL: srli_3_sh2add:1560; RV64I: # %bb.0:1561; RV64I-NEXT: srli a1, a1, 11562; RV64I-NEXT: andi a1, a1, -41563; RV64I-NEXT: add a0, a0, a11564; RV64I-NEXT: lw a0, 0(a0)1565; RV64I-NEXT: ret1566;1567; RV64XTHEADBA-LABEL: srli_3_sh2add:1568; RV64XTHEADBA: # %bb.0:1569; RV64XTHEADBA-NEXT: srli a1, a1, 31570; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21571; RV64XTHEADBA-NEXT: lw a0, 0(a0)1572; RV64XTHEADBA-NEXT: ret1573 %3 = lshr i64 %1, 31574 %4 = getelementptr inbounds i32, ptr %0, i64 %31575 %5 = load i32, ptr %4, align 41576 ret i32 %51577}1578 1579define i64 @srli_4_sh3add(ptr %0, i64 %1) {1580; RV64I-LABEL: srli_4_sh3add:1581; RV64I: # %bb.0:1582; RV64I-NEXT: srli a1, a1, 11583; RV64I-NEXT: andi a1, a1, -81584; RV64I-NEXT: add a0, a0, a11585; RV64I-NEXT: ld a0, 0(a0)1586; RV64I-NEXT: ret1587;1588; RV64XTHEADBA-LABEL: srli_4_sh3add:1589; RV64XTHEADBA: # %bb.0:1590; RV64XTHEADBA-NEXT: srli a1, a1, 41591; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31592; RV64XTHEADBA-NEXT: ld a0, 0(a0)1593; RV64XTHEADBA-NEXT: ret1594 %3 = lshr i64 %1, 41595 %4 = getelementptr inbounds i64, ptr %0, i64 %31596 %5 = load i64, ptr %4, align 81597 ret i64 %51598}1599 1600define i8 @array_index_sh1_sh0(ptr %p, i64 %idx1, i64 %idx2) {1601; RV64I-LABEL: array_index_sh1_sh0:1602; RV64I: # %bb.0:1603; RV64I-NEXT: slli a1, a1, 11604; RV64I-NEXT: add a0, a0, a21605; RV64I-NEXT: add a0, a0, a11606; RV64I-NEXT: lbu a0, 0(a0)1607; RV64I-NEXT: ret1608;1609; RV64XTHEADBA-LABEL: array_index_sh1_sh0:1610; RV64XTHEADBA: # %bb.0:1611; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 11612; RV64XTHEADBA-NEXT: add a0, a0, a21613; RV64XTHEADBA-NEXT: lbu a0, 0(a0)1614; RV64XTHEADBA-NEXT: ret1615 %a = getelementptr inbounds [2 x i8], ptr %p, i64 %idx1, i64 %idx21616 %b = load i8, ptr %a, align 11617 ret i8 %b1618}1619 1620define i16 @array_index_sh1_sh1(ptr %p, i64 %idx1, i64 %idx2) {1621; RV64I-LABEL: array_index_sh1_sh1:1622; RV64I: # %bb.0:1623; RV64I-NEXT: slli a1, a1, 21624; RV64I-NEXT: add a0, a0, a11625; RV64I-NEXT: slli a2, a2, 11626; RV64I-NEXT: add a0, a0, a21627; RV64I-NEXT: lh a0, 0(a0)1628; RV64I-NEXT: ret1629;1630; RV64XTHEADBA-LABEL: array_index_sh1_sh1:1631; RV64XTHEADBA: # %bb.0:1632; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21633; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 11634; RV64XTHEADBA-NEXT: lh a0, 0(a0)1635; RV64XTHEADBA-NEXT: ret1636 %a = getelementptr inbounds [2 x i16], ptr %p, i64 %idx1, i64 %idx21637 %b = load i16, ptr %a, align 21638 ret i16 %b1639}1640 1641define i32 @array_index_sh1_sh2(ptr %p, i64 %idx1, i64 %idx2) {1642; RV64I-LABEL: array_index_sh1_sh2:1643; RV64I: # %bb.0:1644; RV64I-NEXT: slli a1, a1, 31645; RV64I-NEXT: add a0, a0, a11646; RV64I-NEXT: slli a2, a2, 21647; RV64I-NEXT: add a0, a0, a21648; RV64I-NEXT: lw a0, 0(a0)1649; RV64I-NEXT: ret1650;1651; RV64XTHEADBA-LABEL: array_index_sh1_sh2:1652; RV64XTHEADBA: # %bb.0:1653; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31654; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 21655; RV64XTHEADBA-NEXT: lw a0, 0(a0)1656; RV64XTHEADBA-NEXT: ret1657 %a = getelementptr inbounds [2 x i32], ptr %p, i64 %idx1, i64 %idx21658 %b = load i32, ptr %a, align 41659 ret i32 %b1660}1661 1662define i64 @array_index_sh1_sh3(ptr %p, i64 %idx1, i64 %idx2) {1663; RV64I-LABEL: array_index_sh1_sh3:1664; RV64I: # %bb.0:1665; RV64I-NEXT: slli a1, a1, 41666; RV64I-NEXT: add a0, a0, a11667; RV64I-NEXT: slli a2, a2, 31668; RV64I-NEXT: add a0, a0, a21669; RV64I-NEXT: ld a0, 0(a0)1670; RV64I-NEXT: ret1671;1672; RV64XTHEADBA-LABEL: array_index_sh1_sh3:1673; RV64XTHEADBA: # %bb.0:1674; RV64XTHEADBA-NEXT: slli a1, a1, 41675; RV64XTHEADBA-NEXT: add a0, a0, a11676; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31677; RV64XTHEADBA-NEXT: ld a0, 0(a0)1678; RV64XTHEADBA-NEXT: ret1679 %a = getelementptr inbounds [2 x i64], ptr %p, i64 %idx1, i64 %idx21680 %b = load i64, ptr %a, align 81681 ret i64 %b1682}1683 1684define i8 @array_index_sh2_sh0(ptr %p, i64 %idx1, i64 %idx2) {1685; RV64I-LABEL: array_index_sh2_sh0:1686; RV64I: # %bb.0:1687; RV64I-NEXT: slli a1, a1, 21688; RV64I-NEXT: add a0, a0, a21689; RV64I-NEXT: add a0, a0, a11690; RV64I-NEXT: lbu a0, 0(a0)1691; RV64I-NEXT: ret1692;1693; RV64XTHEADBA-LABEL: array_index_sh2_sh0:1694; RV64XTHEADBA: # %bb.0:1695; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 21696; RV64XTHEADBA-NEXT: add a0, a0, a21697; RV64XTHEADBA-NEXT: lbu a0, 0(a0)1698; RV64XTHEADBA-NEXT: ret1699 %a = getelementptr inbounds [4 x i8], ptr %p, i64 %idx1, i64 %idx21700 %b = load i8, ptr %a, align 11701 ret i8 %b1702}1703 1704define i16 @array_index_sh2_sh1(ptr %p, i64 %idx1, i64 %idx2) {1705; RV64I-LABEL: array_index_sh2_sh1:1706; RV64I: # %bb.0:1707; RV64I-NEXT: slli a1, a1, 31708; RV64I-NEXT: add a0, a0, a11709; RV64I-NEXT: slli a2, a2, 11710; RV64I-NEXT: add a0, a0, a21711; RV64I-NEXT: lh a0, 0(a0)1712; RV64I-NEXT: ret1713;1714; RV64XTHEADBA-LABEL: array_index_sh2_sh1:1715; RV64XTHEADBA: # %bb.0:1716; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31717; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 11718; RV64XTHEADBA-NEXT: lh a0, 0(a0)1719; RV64XTHEADBA-NEXT: ret1720 %a = getelementptr inbounds [4 x i16], ptr %p, i64 %idx1, i64 %idx21721 %b = load i16, ptr %a, align 21722 ret i16 %b1723}1724 1725define i32 @array_index_sh2_sh2(ptr %p, i64 %idx1, i64 %idx2) {1726; RV64I-LABEL: array_index_sh2_sh2:1727; RV64I: # %bb.0:1728; RV64I-NEXT: slli a1, a1, 41729; RV64I-NEXT: add a0, a0, a11730; RV64I-NEXT: slli a2, a2, 21731; RV64I-NEXT: add a0, a0, a21732; RV64I-NEXT: lw a0, 0(a0)1733; RV64I-NEXT: ret1734;1735; RV64XTHEADBA-LABEL: array_index_sh2_sh2:1736; RV64XTHEADBA: # %bb.0:1737; RV64XTHEADBA-NEXT: slli a1, a1, 41738; RV64XTHEADBA-NEXT: add a0, a0, a11739; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 21740; RV64XTHEADBA-NEXT: lw a0, 0(a0)1741; RV64XTHEADBA-NEXT: ret1742 %a = getelementptr inbounds [4 x i32], ptr %p, i64 %idx1, i64 %idx21743 %b = load i32, ptr %a, align 41744 ret i32 %b1745}1746 1747define i64 @array_index_sh2_sh3(ptr %p, i64 %idx1, i64 %idx2) {1748; RV64I-LABEL: array_index_sh2_sh3:1749; RV64I: # %bb.0:1750; RV64I-NEXT: slli a1, a1, 51751; RV64I-NEXT: add a0, a0, a11752; RV64I-NEXT: slli a2, a2, 31753; RV64I-NEXT: add a0, a0, a21754; RV64I-NEXT: ld a0, 0(a0)1755; RV64I-NEXT: ret1756;1757; RV64XTHEADBA-LABEL: array_index_sh2_sh3:1758; RV64XTHEADBA: # %bb.0:1759; RV64XTHEADBA-NEXT: slli a1, a1, 51760; RV64XTHEADBA-NEXT: add a0, a0, a11761; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31762; RV64XTHEADBA-NEXT: ld a0, 0(a0)1763; RV64XTHEADBA-NEXT: ret1764 %a = getelementptr inbounds [4 x i64], ptr %p, i64 %idx1, i64 %idx21765 %b = load i64, ptr %a, align 81766 ret i64 %b1767}1768 1769define i8 @array_index_sh3_sh0(ptr %p, i64 %idx1, i64 %idx2) {1770; RV64I-LABEL: array_index_sh3_sh0:1771; RV64I: # %bb.0:1772; RV64I-NEXT: slli a1, a1, 31773; RV64I-NEXT: add a0, a0, a21774; RV64I-NEXT: add a0, a0, a11775; RV64I-NEXT: lbu a0, 0(a0)1776; RV64I-NEXT: ret1777;1778; RV64XTHEADBA-LABEL: array_index_sh3_sh0:1779; RV64XTHEADBA: # %bb.0:1780; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 31781; RV64XTHEADBA-NEXT: add a0, a0, a21782; RV64XTHEADBA-NEXT: lbu a0, 0(a0)1783; RV64XTHEADBA-NEXT: ret1784 %a = getelementptr inbounds [8 x i8], ptr %p, i64 %idx1, i64 %idx21785 %b = load i8, ptr %a, align 11786 ret i8 %b1787}1788 1789define i16 @array_index_sh3_sh1(ptr %p, i64 %idx1, i64 %idx2) {1790; RV64I-LABEL: array_index_sh3_sh1:1791; RV64I: # %bb.0:1792; RV64I-NEXT: slli a1, a1, 41793; RV64I-NEXT: add a0, a0, a11794; RV64I-NEXT: slli a2, a2, 11795; RV64I-NEXT: add a0, a0, a21796; RV64I-NEXT: lh a0, 0(a0)1797; RV64I-NEXT: ret1798;1799; RV64XTHEADBA-LABEL: array_index_sh3_sh1:1800; RV64XTHEADBA: # %bb.0:1801; RV64XTHEADBA-NEXT: slli a1, a1, 41802; RV64XTHEADBA-NEXT: add a0, a0, a11803; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 11804; RV64XTHEADBA-NEXT: lh a0, 0(a0)1805; RV64XTHEADBA-NEXT: ret1806 %a = getelementptr inbounds [8 x i16], ptr %p, i64 %idx1, i64 %idx21807 %b = load i16, ptr %a, align 21808 ret i16 %b1809}1810 1811define i32 @array_index_sh3_sh2(ptr %p, i64 %idx1, i64 %idx2) {1812; RV64I-LABEL: array_index_sh3_sh2:1813; RV64I: # %bb.0:1814; RV64I-NEXT: slli a1, a1, 51815; RV64I-NEXT: add a0, a0, a11816; RV64I-NEXT: slli a2, a2, 21817; RV64I-NEXT: add a0, a0, a21818; RV64I-NEXT: lw a0, 0(a0)1819; RV64I-NEXT: ret1820;1821; RV64XTHEADBA-LABEL: array_index_sh3_sh2:1822; RV64XTHEADBA: # %bb.0:1823; RV64XTHEADBA-NEXT: slli a1, a1, 51824; RV64XTHEADBA-NEXT: add a0, a0, a11825; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 21826; RV64XTHEADBA-NEXT: lw a0, 0(a0)1827; RV64XTHEADBA-NEXT: ret1828 %a = getelementptr inbounds [8 x i32], ptr %p, i64 %idx1, i64 %idx21829 %b = load i32, ptr %a, align 41830 ret i32 %b1831}1832 1833define i64 @array_index_sh3_sh3(ptr %p, i64 %idx1, i64 %idx2) {1834; RV64I-LABEL: array_index_sh3_sh3:1835; RV64I: # %bb.0:1836; RV64I-NEXT: slli a1, a1, 61837; RV64I-NEXT: add a0, a0, a11838; RV64I-NEXT: slli a2, a2, 31839; RV64I-NEXT: add a0, a0, a21840; RV64I-NEXT: ld a0, 0(a0)1841; RV64I-NEXT: ret1842;1843; RV64XTHEADBA-LABEL: array_index_sh3_sh3:1844; RV64XTHEADBA: # %bb.0:1845; RV64XTHEADBA-NEXT: slli a1, a1, 61846; RV64XTHEADBA-NEXT: add a0, a0, a11847; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31848; RV64XTHEADBA-NEXT: ld a0, 0(a0)1849; RV64XTHEADBA-NEXT: ret1850 %a = getelementptr inbounds [8 x i64], ptr %p, i64 %idx1, i64 %idx21851 %b = load i64, ptr %a, align 81852 ret i64 %b1853}1854 1855; Similar to above, but with a lshr on one of the indices. This requires1856; special handling during isel to form a shift pair.1857define i64 @array_index_lshr_sh3_sh3(ptr %p, i64 %idx1, i64 %idx2) {1858; RV64I-LABEL: array_index_lshr_sh3_sh3:1859; RV64I: # %bb.0:1860; RV64I-NEXT: srli a1, a1, 581861; RV64I-NEXT: slli a2, a2, 31862; RV64I-NEXT: slli a1, a1, 61863; RV64I-NEXT: add a0, a0, a21864; RV64I-NEXT: add a0, a0, a11865; RV64I-NEXT: ld a0, 0(a0)1866; RV64I-NEXT: ret1867;1868; RV64XTHEADBA-LABEL: array_index_lshr_sh3_sh3:1869; RV64XTHEADBA: # %bb.0:1870; RV64XTHEADBA-NEXT: srli a1, a1, 581871; RV64XTHEADBA-NEXT: slli a1, a1, 61872; RV64XTHEADBA-NEXT: add a0, a0, a11873; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31874; RV64XTHEADBA-NEXT: ld a0, 0(a0)1875; RV64XTHEADBA-NEXT: ret1876 %shr = lshr i64 %idx1, 581877 %a = getelementptr inbounds [8 x i64], ptr %p, i64 %shr, i64 %idx21878 %b = load i64, ptr %a, align 81879 ret i64 %b1880}1881 1882define i8 @array_index_sh4_sh0(ptr %p, i64 %idx1, i64 %idx2) {1883; CHECK-LABEL: array_index_sh4_sh0:1884; CHECK: # %bb.0:1885; CHECK-NEXT: slli a1, a1, 41886; CHECK-NEXT: add a0, a0, a21887; CHECK-NEXT: add a0, a0, a11888; CHECK-NEXT: lbu a0, 0(a0)1889; CHECK-NEXT: ret1890 %a = getelementptr inbounds [16 x i8], ptr %p, i64 %idx1, i64 %idx21891 %b = load i8, ptr %a, align 11892 ret i8 %b1893}1894 1895define i16 @array_index_sh4_sh1(ptr %p, i64 %idx1, i64 %idx2) {1896; RV64I-LABEL: array_index_sh4_sh1:1897; RV64I: # %bb.0:1898; RV64I-NEXT: slli a1, a1, 51899; RV64I-NEXT: add a0, a0, a11900; RV64I-NEXT: slli a2, a2, 11901; RV64I-NEXT: add a0, a0, a21902; RV64I-NEXT: lh a0, 0(a0)1903; RV64I-NEXT: ret1904;1905; RV64XTHEADBA-LABEL: array_index_sh4_sh1:1906; RV64XTHEADBA: # %bb.0:1907; RV64XTHEADBA-NEXT: slli a1, a1, 51908; RV64XTHEADBA-NEXT: add a0, a0, a11909; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 11910; RV64XTHEADBA-NEXT: lh a0, 0(a0)1911; RV64XTHEADBA-NEXT: ret1912 %a = getelementptr inbounds [16 x i16], ptr %p, i64 %idx1, i64 %idx21913 %b = load i16, ptr %a, align 21914 ret i16 %b1915}1916 1917define i32 @array_index_sh4_sh2(ptr %p, i64 %idx1, i64 %idx2) {1918; RV64I-LABEL: array_index_sh4_sh2:1919; RV64I: # %bb.0:1920; RV64I-NEXT: slli a1, a1, 61921; RV64I-NEXT: add a0, a0, a11922; RV64I-NEXT: slli a2, a2, 21923; RV64I-NEXT: add a0, a0, a21924; RV64I-NEXT: lw a0, 0(a0)1925; RV64I-NEXT: ret1926;1927; RV64XTHEADBA-LABEL: array_index_sh4_sh2:1928; RV64XTHEADBA: # %bb.0:1929; RV64XTHEADBA-NEXT: slli a1, a1, 61930; RV64XTHEADBA-NEXT: add a0, a0, a11931; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 21932; RV64XTHEADBA-NEXT: lw a0, 0(a0)1933; RV64XTHEADBA-NEXT: ret1934 %a = getelementptr inbounds [16 x i32], ptr %p, i64 %idx1, i64 %idx21935 %b = load i32, ptr %a, align 41936 ret i32 %b1937}1938 1939define i64 @array_index_sh4_sh3(ptr %p, i64 %idx1, i64 %idx2) {1940; RV64I-LABEL: array_index_sh4_sh3:1941; RV64I: # %bb.0:1942; RV64I-NEXT: slli a1, a1, 71943; RV64I-NEXT: add a0, a0, a11944; RV64I-NEXT: slli a2, a2, 31945; RV64I-NEXT: add a0, a0, a21946; RV64I-NEXT: ld a0, 0(a0)1947; RV64I-NEXT: ret1948;1949; RV64XTHEADBA-LABEL: array_index_sh4_sh3:1950; RV64XTHEADBA: # %bb.0:1951; RV64XTHEADBA-NEXT: slli a1, a1, 71952; RV64XTHEADBA-NEXT: add a0, a0, a11953; RV64XTHEADBA-NEXT: th.addsl a0, a0, a2, 31954; RV64XTHEADBA-NEXT: ld a0, 0(a0)1955; RV64XTHEADBA-NEXT: ret1956 %a = getelementptr inbounds [16 x i64], ptr %p, i64 %idx1, i64 %idx21957 %b = load i64, ptr %a, align 81958 ret i64 %b1959}1960 1961define i64 @mul_neg1(i64 %a) {1962; CHECK-LABEL: mul_neg1:1963; CHECK: # %bb.0:1964; CHECK-NEXT: neg a0, a01965; CHECK-NEXT: ret1966 %c = mul i64 %a, -11967 ret i64 %c1968}1969 1970define i64 @mul_neg2(i64 %a) {1971; CHECK-LABEL: mul_neg2:1972; CHECK: # %bb.0:1973; CHECK-NEXT: slli a0, a0, 11974; CHECK-NEXT: neg a0, a01975; CHECK-NEXT: ret1976 %c = mul i64 %a, -21977 ret i64 %c1978}1979 1980define i64 @mul_neg3(i64 %a) {1981; RV64I-LABEL: mul_neg3:1982; RV64I: # %bb.0:1983; RV64I-NEXT: slli a1, a0, 11984; RV64I-NEXT: neg a0, a01985; RV64I-NEXT: sub a0, a0, a11986; RV64I-NEXT: ret1987;1988; RV64XTHEADBA-LABEL: mul_neg3:1989; RV64XTHEADBA: # %bb.0:1990; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 11991; RV64XTHEADBA-NEXT: neg a0, a01992; RV64XTHEADBA-NEXT: ret1993 %c = mul i64 %a, -31994 ret i64 %c1995}1996 1997define i64 @mul_neg4(i64 %a) {1998; CHECK-LABEL: mul_neg4:1999; CHECK: # %bb.0:2000; CHECK-NEXT: slli a0, a0, 22001; CHECK-NEXT: neg a0, a02002; CHECK-NEXT: ret2003 %c = mul i64 %a, -42004 ret i64 %c2005}2006 2007define i64 @mul_neg5(i64 %a) {2008; RV64I-LABEL: mul_neg5:2009; RV64I: # %bb.0:2010; RV64I-NEXT: slli a1, a0, 22011; RV64I-NEXT: neg a0, a02012; RV64I-NEXT: sub a0, a0, a12013; RV64I-NEXT: ret2014;2015; RV64XTHEADBA-LABEL: mul_neg5:2016; RV64XTHEADBA: # %bb.0:2017; RV64XTHEADBA-NEXT: th.addsl a0, a0, a0, 22018; RV64XTHEADBA-NEXT: neg a0, a02019; RV64XTHEADBA-NEXT: ret2020 %c = mul i64 %a, -52021 ret i64 %c2022}2023 2024define i64 @mul_neg6(i64 %a) {2025; CHECK-LABEL: mul_neg6:2026; CHECK: # %bb.0:2027; CHECK-NEXT: li a1, -62028; CHECK-NEXT: mul a0, a0, a12029; CHECK-NEXT: ret2030 %c = mul i64 %a, -62031 ret i64 %c2032}2033 2034define i64 @mul_neg7(i64 %a) {2035; CHECK-LABEL: mul_neg7:2036; CHECK: # %bb.0:2037; CHECK-NEXT: slli a1, a0, 32038; CHECK-NEXT: sub a0, a0, a12039; CHECK-NEXT: ret2040 %c = mul i64 %a, -72041 ret i64 %c2042}2043 2044define i64 @mul_neg8(i64 %a) {2045; CHECK-LABEL: mul_neg8:2046; CHECK: # %bb.0:2047; CHECK-NEXT: slli a0, a0, 32048; CHECK-NEXT: neg a0, a02049; CHECK-NEXT: ret2050 %c = mul i64 %a, -82051 ret i64 %c2052}2053 2054define ptr @srai_srli_sh3add(ptr %0, i64 %1) nounwind {2055; RV64I-LABEL: srai_srli_sh3add:2056; RV64I: # %bb.0: # %entry2057; RV64I-NEXT: srai a1, a1, 322058; RV64I-NEXT: srli a1, a1, 62059; RV64I-NEXT: slli a1, a1, 32060; RV64I-NEXT: add a0, a0, a12061; RV64I-NEXT: ret2062;2063; RV64XTHEADBA-LABEL: srai_srli_sh3add:2064; RV64XTHEADBA: # %bb.0: # %entry2065; RV64XTHEADBA-NEXT: srai a1, a1, 322066; RV64XTHEADBA-NEXT: srli a1, a1, 62067; RV64XTHEADBA-NEXT: th.addsl a0, a0, a1, 32068; RV64XTHEADBA-NEXT: ret2069entry:2070 %2 = ashr i64 %1, 322071 %3 = lshr i64 %2, 62072 %4 = getelementptr i64, ptr %0, i64 %32073 ret ptr %42074}2075 2076define ptr @srai_srli_slli(ptr %0, i64 %1) nounwind {2077; CHECK-LABEL: srai_srli_slli:2078; CHECK: # %bb.0: # %entry2079; CHECK-NEXT: srai a1, a1, 322080; CHECK-NEXT: srli a1, a1, 62081; CHECK-NEXT: slli a1, a1, 42082; CHECK-NEXT: add a0, a0, a12083; CHECK-NEXT: ret2084entry:2085 %2 = ashr i64 %1, 322086 %3 = lshr i64 %2, 62087 %4 = getelementptr i128, ptr %0, i64 %32088 ret ptr %42089}2090 2091; Negative to make sure the peephole added for srai_srli_slli and2092; srai_srli_sh3add doesn't break this.2093define i64 @srai_andi(i64 %x) nounwind {2094; CHECK-LABEL: srai_andi:2095; CHECK: # %bb.0: # %entry2096; CHECK-NEXT: srai a0, a0, 82097; CHECK-NEXT: andi a0, a0, -82098; CHECK-NEXT: ret2099entry:2100 %y = ashr i64 %x, 82101 %z = and i64 %y, -82102 ret i64 %z2103}2104 2105; Negative to make sure the peephole added for srai_srli_slli and2106; srai_srli_sh3add doesn't break this.2107define i64 @srai_lui_and(i64 %x) nounwind {2108; CHECK-LABEL: srai_lui_and:2109; CHECK: # %bb.0: # %entry2110; CHECK-NEXT: srai a0, a0, 82111; CHECK-NEXT: lui a1, 10485742112; CHECK-NEXT: and a0, a0, a12113; CHECK-NEXT: ret2114entry:2115 %y = ashr i64 %x, 82116 %z = and i64 %y, -81922117 ret i64 %z2118}2119