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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+experimental-p -enable-p-ext-codegen -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,CHECK-RV32 %s3; RUN: llc -mtriple=riscv64 -mattr=+experimental-p -enable-p-ext-codegen -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,CHECK-RV64 %s4 5; Test basic add/sub operations for v2i166define void @test_padd_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {7; CHECK-LABEL: test_padd_h:8; CHECK: # %bb.0:9; CHECK-NEXT: lw a1, 0(a1)10; CHECK-NEXT: lw a2, 0(a2)11; CHECK-NEXT: padd.h a1, a1, a212; CHECK-NEXT: sw a1, 0(a0)13; CHECK-NEXT: ret14 %a = load <2 x i16>, ptr %a_ptr15 %b = load <2 x i16>, ptr %b_ptr16 %res = add <2 x i16> %a, %b17 store <2 x i16> %res, ptr %ret_ptr18 ret void19}20 21define void @test_psub_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {22; CHECK-LABEL: test_psub_h:23; CHECK: # %bb.0:24; CHECK-NEXT: lw a1, 0(a1)25; CHECK-NEXT: lw a2, 0(a2)26; CHECK-NEXT: psub.h a1, a1, a227; CHECK-NEXT: sw a1, 0(a0)28; CHECK-NEXT: ret29 %a = load <2 x i16>, ptr %a_ptr30 %b = load <2 x i16>, ptr %b_ptr31 %res = sub <2 x i16> %a, %b32 store <2 x i16> %res, ptr %ret_ptr33 ret void34}35 36; Test basic add/sub operations for v4i837define void @test_padd_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {38; CHECK-LABEL: test_padd_b:39; CHECK: # %bb.0:40; CHECK-NEXT: lw a1, 0(a1)41; CHECK-NEXT: lw a2, 0(a2)42; CHECK-NEXT: padd.b a1, a1, a243; CHECK-NEXT: sw a1, 0(a0)44; CHECK-NEXT: ret45 %a = load <4 x i8>, ptr %a_ptr46 %b = load <4 x i8>, ptr %b_ptr47 %res = add <4 x i8> %a, %b48 store <4 x i8> %res, ptr %ret_ptr49 ret void50}51 52define void @test_psub_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {53; CHECK-LABEL: test_psub_b:54; CHECK: # %bb.0:55; CHECK-NEXT: lw a1, 0(a1)56; CHECK-NEXT: lw a2, 0(a2)57; CHECK-NEXT: psub.b a1, a1, a258; CHECK-NEXT: sw a1, 0(a0)59; CHECK-NEXT: ret60 %a = load <4 x i8>, ptr %a_ptr61 %b = load <4 x i8>, ptr %b_ptr62 %res = sub <4 x i8> %a, %b63 store <4 x i8> %res, ptr %ret_ptr64 ret void65}66 67; Test saturating add operations for v2i1668define void @test_psadd_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {69; CHECK-LABEL: test_psadd_h:70; CHECK: # %bb.0:71; CHECK-NEXT: lw a1, 0(a1)72; CHECK-NEXT: lw a2, 0(a2)73; CHECK-NEXT: psadd.h a1, a1, a274; CHECK-NEXT: sw a1, 0(a0)75; CHECK-NEXT: ret76 %a = load <2 x i16>, ptr %a_ptr77 %b = load <2 x i16>, ptr %b_ptr78 %res = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> %a, <2 x i16> %b)79 store <2 x i16> %res, ptr %ret_ptr80 ret void81}82 83define void @test_psaddu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {84; CHECK-LABEL: test_psaddu_h:85; CHECK: # %bb.0:86; CHECK-NEXT: lw a1, 0(a1)87; CHECK-NEXT: lw a2, 0(a2)88; CHECK-NEXT: psaddu.h a1, a1, a289; CHECK-NEXT: sw a1, 0(a0)90; CHECK-NEXT: ret91 %a = load <2 x i16>, ptr %a_ptr92 %b = load <2 x i16>, ptr %b_ptr93 %res = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> %a, <2 x i16> %b)94 store <2 x i16> %res, ptr %ret_ptr95 ret void96}97 98; Test saturating sub operations for v2i1699define void @test_pssub_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {100; CHECK-LABEL: test_pssub_h:101; CHECK: # %bb.0:102; CHECK-NEXT: lw a1, 0(a1)103; CHECK-NEXT: lw a2, 0(a2)104; CHECK-NEXT: pssub.h a1, a1, a2105; CHECK-NEXT: sw a1, 0(a0)106; CHECK-NEXT: ret107 %a = load <2 x i16>, ptr %a_ptr108 %b = load <2 x i16>, ptr %b_ptr109 %res = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> %a, <2 x i16> %b)110 store <2 x i16> %res, ptr %ret_ptr111 ret void112}113 114define void @test_pssubu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {115; CHECK-LABEL: test_pssubu_h:116; CHECK: # %bb.0:117; CHECK-NEXT: lw a1, 0(a1)118; CHECK-NEXT: lw a2, 0(a2)119; CHECK-NEXT: pssubu.h a1, a1, a2120; CHECK-NEXT: sw a1, 0(a0)121; CHECK-NEXT: ret122 %a = load <2 x i16>, ptr %a_ptr123 %b = load <2 x i16>, ptr %b_ptr124 %res = call <2 x i16> @llvm.usub.sat.v2i16(<2 x i16> %a, <2 x i16> %b)125 store <2 x i16> %res, ptr %ret_ptr126 ret void127}128 129; Test saturating add operations for v4i8130define void @test_psadd_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {131; CHECK-LABEL: test_psadd_b:132; CHECK: # %bb.0:133; CHECK-NEXT: lw a1, 0(a1)134; CHECK-NEXT: lw a2, 0(a2)135; CHECK-NEXT: psadd.b a1, a1, a2136; CHECK-NEXT: sw a1, 0(a0)137; CHECK-NEXT: ret138 %a = load <4 x i8>, ptr %a_ptr139 %b = load <4 x i8>, ptr %b_ptr140 %res = call <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8> %a, <4 x i8> %b)141 store <4 x i8> %res, ptr %ret_ptr142 ret void143}144 145define void @test_psaddu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {146; CHECK-LABEL: test_psaddu_b:147; CHECK: # %bb.0:148; CHECK-NEXT: lw a1, 0(a1)149; CHECK-NEXT: lw a2, 0(a2)150; CHECK-NEXT: psaddu.b a1, a1, a2151; CHECK-NEXT: sw a1, 0(a0)152; CHECK-NEXT: ret153 %a = load <4 x i8>, ptr %a_ptr154 %b = load <4 x i8>, ptr %b_ptr155 %res = call <4 x i8> @llvm.uadd.sat.v4i8(<4 x i8> %a, <4 x i8> %b)156 store <4 x i8> %res, ptr %ret_ptr157 ret void158}159 160; Test saturating sub operations for v4i8161define void @test_pssub_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {162; CHECK-LABEL: test_pssub_b:163; CHECK: # %bb.0:164; CHECK-NEXT: lw a1, 0(a1)165; CHECK-NEXT: lw a2, 0(a2)166; CHECK-NEXT: pssub.b a1, a1, a2167; CHECK-NEXT: sw a1, 0(a0)168; CHECK-NEXT: ret169 %a = load <4 x i8>, ptr %a_ptr170 %b = load <4 x i8>, ptr %b_ptr171 %res = call <4 x i8> @llvm.ssub.sat.v4i8(<4 x i8> %a, <4 x i8> %b)172 store <4 x i8> %res, ptr %ret_ptr173 ret void174}175 176define void @test_pssubu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {177; CHECK-LABEL: test_pssubu_b:178; CHECK: # %bb.0:179; CHECK-NEXT: lw a1, 0(a1)180; CHECK-NEXT: lw a2, 0(a2)181; CHECK-NEXT: pssubu.b a1, a1, a2182; CHECK-NEXT: sw a1, 0(a0)183; CHECK-NEXT: ret184 %a = load <4 x i8>, ptr %a_ptr185 %b = load <4 x i8>, ptr %b_ptr186 %res = call <4 x i8> @llvm.usub.sat.v4i8(<4 x i8> %a, <4 x i8> %b)187 store <4 x i8> %res, ptr %ret_ptr188 ret void189}190 191; Test averaging floor signed operations for v2i16192define void @test_paadd_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {193; CHECK-LABEL: test_paadd_h:194; CHECK: # %bb.0:195; CHECK-NEXT: lw a1, 0(a1)196; CHECK-NEXT: lw a2, 0(a2)197; CHECK-NEXT: paadd.h a1, a1, a2198; CHECK-NEXT: sw a1, 0(a0)199; CHECK-NEXT: ret200 %a = load <2 x i16>, ptr %a_ptr201 %b = load <2 x i16>, ptr %b_ptr202 %ext.a = sext <2 x i16> %a to <2 x i32>203 %ext.b = sext <2 x i16> %b to <2 x i32>204 %add = add nsw <2 x i32> %ext.a, %ext.b205 %shift = ashr <2 x i32> %add, <i32 1, i32 1>206 %res = trunc <2 x i32> %shift to <2 x i16>207 store <2 x i16> %res, ptr %ret_ptr208 ret void209}210 211; Test averaging floor unsigned operations for v2i16212define void @test_paaddu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {213; CHECK-LABEL: test_paaddu_h:214; CHECK: # %bb.0:215; CHECK-NEXT: lw a1, 0(a1)216; CHECK-NEXT: lw a2, 0(a2)217; CHECK-NEXT: paaddu.h a1, a1, a2218; CHECK-NEXT: sw a1, 0(a0)219; CHECK-NEXT: ret220 %a = load <2 x i16>, ptr %a_ptr221 %b = load <2 x i16>, ptr %b_ptr222 %and = and <2 x i16> %a, %b223 %xor = xor <2 x i16> %a, %b224 %shift = lshr <2 x i16> %xor, <i16 1, i16 1>225 %res = add <2 x i16> %and, %shift226 store <2 x i16> %res, ptr %ret_ptr227 ret void228}229 230; Test averaging floor signed operations for v4i8231define void @test_paadd_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {232; CHECK-LABEL: test_paadd_b:233; CHECK: # %bb.0:234; CHECK-NEXT: lw a1, 0(a1)235; CHECK-NEXT: lw a2, 0(a2)236; CHECK-NEXT: paadd.b a1, a1, a2237; CHECK-NEXT: sw a1, 0(a0)238; CHECK-NEXT: ret239 %a = load <4 x i8>, ptr %a_ptr240 %b = load <4 x i8>, ptr %b_ptr241 %ext.a = sext <4 x i8> %a to <4 x i16>242 %ext.b = sext <4 x i8> %b to <4 x i16>243 %add = add nsw <4 x i16> %ext.a, %ext.b244 %shift = ashr <4 x i16> %add, <i16 1, i16 1, i16 1, i16 1>245 %res = trunc <4 x i16> %shift to <4 x i8>246 store <4 x i8> %res, ptr %ret_ptr247 ret void248}249 250; Test averaging floor unsigned operations for v4i8251define void @test_paaddu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {252; CHECK-LABEL: test_paaddu_b:253; CHECK: # %bb.0:254; CHECK-NEXT: lw a1, 0(a1)255; CHECK-NEXT: lw a2, 0(a2)256; CHECK-NEXT: paaddu.b a1, a1, a2257; CHECK-NEXT: sw a1, 0(a0)258; CHECK-NEXT: ret259 %a = load <4 x i8>, ptr %a_ptr260 %b = load <4 x i8>, ptr %b_ptr261 %and = and <4 x i8> %a, %b262 %xor = xor <4 x i8> %a, %b263 %shift = lshr <4 x i8> %xor, <i8 1, i8 1, i8 1, i8 1>264 %res = add <4 x i8> %and, %shift265 store <4 x i8> %res, ptr %ret_ptr266 ret void267}268 269; Test absolute difference signed for v2i16270define void @test_pdif_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {271; CHECK-LABEL: test_pdif_h:272; CHECK: # %bb.0:273; CHECK-NEXT: lw a1, 0(a1)274; CHECK-NEXT: lw a2, 0(a2)275; CHECK-NEXT: pdif.h a1, a1, a2276; CHECK-NEXT: sw a1, 0(a0)277; CHECK-NEXT: ret278 %a = load <2 x i16>, ptr %a_ptr279 %b = load <2 x i16>, ptr %b_ptr280 %min = call <2 x i16> @llvm.smin.v2i16(<2 x i16> %a, <2 x i16> %b)281 %max = call <2 x i16> @llvm.smax.v2i16(<2 x i16> %a, <2 x i16> %b)282 %res = sub <2 x i16> %max, %min283 store <2 x i16> %res, ptr %ret_ptr284 ret void285}286 287; Test absolute difference unsigned for v2i16288define void @test_pdifu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {289; CHECK-LABEL: test_pdifu_h:290; CHECK: # %bb.0:291; CHECK-NEXT: lw a1, 0(a1)292; CHECK-NEXT: lw a2, 0(a2)293; CHECK-NEXT: pdifu.h a1, a1, a2294; CHECK-NEXT: sw a1, 0(a0)295; CHECK-NEXT: ret296 %a = load <2 x i16>, ptr %a_ptr297 %b = load <2 x i16>, ptr %b_ptr298 %min = call <2 x i16> @llvm.umin.v2i16(<2 x i16> %a, <2 x i16> %b)299 %max = call <2 x i16> @llvm.umax.v2i16(<2 x i16> %a, <2 x i16> %b)300 %res = sub <2 x i16> %max, %min301 store <2 x i16> %res, ptr %ret_ptr302 ret void303}304 305; Test absolute difference signed for v4i8306define void @test_pdif_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {307; CHECK-LABEL: test_pdif_b:308; CHECK: # %bb.0:309; CHECK-NEXT: lw a1, 0(a1)310; CHECK-NEXT: lw a2, 0(a2)311; CHECK-NEXT: pdif.b a1, a1, a2312; CHECK-NEXT: sw a1, 0(a0)313; CHECK-NEXT: ret314 %a = load <4 x i8>, ptr %a_ptr315 %b = load <4 x i8>, ptr %b_ptr316 %min = call <4 x i8> @llvm.smin.v4i8(<4 x i8> %a, <4 x i8> %b)317 %max = call <4 x i8> @llvm.smax.v4i8(<4 x i8> %a, <4 x i8> %b)318 %res = sub <4 x i8> %max, %min319 store <4 x i8> %res, ptr %ret_ptr320 ret void321}322 323; Test absolute difference unsigned for v4i8324define void @test_pdifu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {325; CHECK-LABEL: test_pdifu_b:326; CHECK: # %bb.0:327; CHECK-NEXT: lw a1, 0(a1)328; CHECK-NEXT: lw a2, 0(a2)329; CHECK-NEXT: pdifu.b a1, a1, a2330; CHECK-NEXT: sw a1, 0(a0)331; CHECK-NEXT: ret332 %a = load <4 x i8>, ptr %a_ptr333 %b = load <4 x i8>, ptr %b_ptr334 %min = call <4 x i8> @llvm.umin.v4i8(<4 x i8> %a, <4 x i8> %b)335 %max = call <4 x i8> @llvm.umax.v4i8(<4 x i8> %a, <4 x i8> %b)336 %res = sub <4 x i8> %max, %min337 store <4 x i8> %res, ptr %ret_ptr338 ret void339}340 341; Test averaging floor subtraction signed for v2i16342; pasub pattern: (a - b) arithmetic shift right 1343define void @test_pasub_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {344; CHECK-LABEL: test_pasub_h:345; CHECK: # %bb.0:346; CHECK-NEXT: lw a1, 0(a1)347; CHECK-NEXT: lw a2, 0(a2)348; CHECK-NEXT: pasub.h a1, a1, a2349; CHECK-NEXT: sw a1, 0(a0)350; CHECK-NEXT: ret351 %a = load <2 x i16>, ptr %a_ptr352 %b = load <2 x i16>, ptr %b_ptr353 %a_ext = sext <2 x i16> %a to <2 x i32>354 %b_ext = sext <2 x i16> %b to <2 x i32>355 %sub = sub <2 x i32> %a_ext, %b_ext356 %res = ashr <2 x i32> %sub, <i32 1, i32 1>357 %res_trunc = trunc <2 x i32> %res to <2 x i16>358 store <2 x i16> %res_trunc, ptr %ret_ptr359 ret void360}361 362; Test averaging floor subtraction unsigned for v2i16363; pasubu pattern: (a - b) logical shift right 1364define void @test_pasubu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {365; CHECK-LABEL: test_pasubu_h:366; CHECK: # %bb.0:367; CHECK-NEXT: lw a1, 0(a1)368; CHECK-NEXT: lw a2, 0(a2)369; CHECK-NEXT: pasubu.h a1, a1, a2370; CHECK-NEXT: sw a1, 0(a0)371; CHECK-NEXT: ret372 %a = load <2 x i16>, ptr %a_ptr373 %b = load <2 x i16>, ptr %b_ptr374 %a_ext = zext <2 x i16> %a to <2 x i32>375 %b_ext = zext <2 x i16> %b to <2 x i32>376 %sub = sub <2 x i32> %a_ext, %b_ext377 %res = lshr <2 x i32> %sub, <i32 1, i32 1>378 %res_trunc = trunc <2 x i32> %res to <2 x i16>379 store <2 x i16> %res_trunc, ptr %ret_ptr380 ret void381}382 383; Test averaging floor subtraction signed for v4i8384define void @test_pasub_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {385; CHECK-LABEL: test_pasub_b:386; CHECK: # %bb.0:387; CHECK-NEXT: lw a1, 0(a1)388; CHECK-NEXT: lw a2, 0(a2)389; CHECK-NEXT: pasub.b a1, a1, a2390; CHECK-NEXT: sw a1, 0(a0)391; CHECK-NEXT: ret392 %a = load <4 x i8>, ptr %a_ptr393 %b = load <4 x i8>, ptr %b_ptr394 %a_ext = sext <4 x i8> %a to <4 x i16>395 %b_ext = sext <4 x i8> %b to <4 x i16>396 %sub = sub <4 x i16> %a_ext, %b_ext397 %res = ashr <4 x i16> %sub, <i16 1, i16 1, i16 1, i16 1>398 %res_trunc = trunc <4 x i16> %res to <4 x i8>399 store <4 x i8> %res_trunc, ptr %ret_ptr400 ret void401}402 403; Test averaging floor subtraction unsigned for v4i8404define void @test_pasubu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {405; CHECK-LABEL: test_pasubu_b:406; CHECK: # %bb.0:407; CHECK-NEXT: lw a1, 0(a1)408; CHECK-NEXT: lw a2, 0(a2)409; CHECK-NEXT: pasubu.b a1, a1, a2410; CHECK-NEXT: sw a1, 0(a0)411; CHECK-NEXT: ret412 %a = load <4 x i8>, ptr %a_ptr413 %b = load <4 x i8>, ptr %b_ptr414 %a_ext = zext <4 x i8> %a to <4 x i16>415 %b_ext = zext <4 x i8> %b to <4 x i16>416 %sub = sub <4 x i16> %a_ext, %b_ext417 %res = lshr <4 x i16> %sub, <i16 1, i16 1, i16 1, i16 1>418 %res_trunc = trunc <4 x i16> %res to <4 x i8>419 store <4 x i8> %res_trunc, ptr %ret_ptr420 ret void421}422 423; Test PLI (pack load immediate) for v2i16424define void @test_pli_h(ptr %ret_ptr) {425; CHECK-LABEL: test_pli_h:426; CHECK: # %bb.0:427; CHECK-NEXT: pli.h a1, 42428; CHECK-NEXT: sw a1, 0(a0)429; CHECK-NEXT: ret430 %res = add <2 x i16> <i16 42, i16 42>, <i16 0, i16 0>431 store <2 x i16> %res, ptr %ret_ptr432 ret void433}434 435define void @test_pli_h_negative(ptr %ret_ptr) {436; CHECK-LABEL: test_pli_h_negative:437; CHECK: # %bb.0:438; CHECK-NEXT: pli.h a1, -5439; CHECK-NEXT: sw a1, 0(a0)440; CHECK-NEXT: ret441 %res = add <2 x i16> <i16 -5, i16 -5>, <i16 0, i16 0>442 store <2 x i16> %res, ptr %ret_ptr443 ret void444}445 446; Test PLI for v4i8 with unsigned immediate447define void @test_pli_b(ptr %ret_ptr) {448; CHECK-LABEL: test_pli_b:449; CHECK: # %bb.0:450; CHECK-NEXT: pli.b a1, 32451; CHECK-NEXT: sw a1, 0(a0)452; CHECK-NEXT: ret453 %res = add <4 x i8> <i8 32, i8 32, i8 32, i8 32>, <i8 0, i8 0, i8 0, i8 0>454 store <4 x i8> %res, ptr %ret_ptr455 ret void456}457 458define void @test_pli_b_negative(ptr %ret_ptr) {459; CHECK-RV32-LABEL: test_pli_b_negative:460; CHECK-RV32: # %bb.0:461; CHECK-RV32-NEXT: pli.b a1, -2462; CHECK-RV32-NEXT: sw a1, 0(a0)463; CHECK-RV32-NEXT: ret464;465; CHECK-RV64-LABEL: test_pli_b_negative:466; CHECK-RV64: # %bb.0:467; CHECK-RV64-NEXT: pli.h a1, -258468; CHECK-RV64-NEXT: sw a1, 0(a0)469; CHECK-RV64-NEXT: ret470 %res = add <4 x i8> <i8 -2, i8 -2, i8 -2, i8 -2>, <i8 0, i8 0, i8 0, i8 0>471 store <4 x i8> %res, ptr %ret_ptr472 ret void473}474 475define void @test_extract_vector_16(ptr %ret_ptr, ptr %a_ptr) {476; CHECK-LABEL: test_extract_vector_16:477; CHECK: # %bb.0:478; CHECK-NEXT: lw a1, 0(a1)479; CHECK-NEXT: sh a1, 0(a0)480; CHECK-NEXT: ret481 %a = load <2 x i16>, ptr %a_ptr482 %extracted = extractelement <2 x i16> %a, i32 0483 store i16 %extracted, ptr %ret_ptr484 ret void485}486 487define void @test_extract_vector_16_elem1(ptr %ret_ptr, ptr %a_ptr) {488; CHECK-RV32-LABEL: test_extract_vector_16_elem1:489; CHECK-RV32: # %bb.0:490; CHECK-RV32-NEXT: lhu a1, 2(a1)491; CHECK-RV32-NEXT: sh a1, 0(a0)492; CHECK-RV32-NEXT: ret493;494; CHECK-RV64-LABEL: test_extract_vector_16_elem1:495; CHECK-RV64: # %bb.0:496; CHECK-RV64-NEXT: lw a1, 0(a1)497; CHECK-RV64-NEXT: srli a1, a1, 16498; CHECK-RV64-NEXT: sh a1, 0(a0)499; CHECK-RV64-NEXT: ret500 %a = load <2 x i16>, ptr %a_ptr501 %extracted = extractelement <2 x i16> %a, i32 1502 store i16 %extracted, ptr %ret_ptr503 ret void504}505 506define void @test_extract_vector_8(ptr %ret_ptr, ptr %a_ptr) {507; CHECK-LABEL: test_extract_vector_8:508; CHECK: # %bb.0:509; CHECK-NEXT: lw a1, 0(a1)510; CHECK-NEXT: sb a1, 0(a0)511; CHECK-NEXT: ret512 %a = load <4 x i8>, ptr %a_ptr513 %extracted = extractelement <4 x i8> %a, i32 0514 store i8 %extracted, ptr %ret_ptr515 ret void516}517 518define void @test_extract_vector_8_elem1(ptr %ret_ptr, ptr %a_ptr) {519; CHECK-LABEL: test_extract_vector_8_elem1:520; CHECK: # %bb.0:521; CHECK-NEXT: lw a1, 0(a1)522; CHECK-NEXT: srli a1, a1, 8523; CHECK-NEXT: sb a1, 0(a0)524; CHECK-NEXT: ret525 %a = load <4 x i8>, ptr %a_ptr526 %extracted = extractelement <4 x i8> %a, i32 1527 store i8 %extracted, ptr %ret_ptr528 ret void529}530 531; Test for splat532define void @test_non_const_splat_i8(ptr %ret_ptr, ptr %a_ptr, i8 %elt) {533; CHECK-LABEL: test_non_const_splat_i8:534; CHECK: # %bb.0:535; CHECK-NEXT: padd.bs a1, zero, a2536; CHECK-NEXT: sw a1, 0(a0)537; CHECK-NEXT: ret538 %a = load <4 x i8>, ptr %a_ptr539 %insert = insertelement <4 x i8> poison, i8 %elt, i32 0540 %splat = shufflevector <4 x i8> %insert, <4 x i8> poison, <4 x i32> zeroinitializer541 store <4 x i8> %splat, ptr %ret_ptr542 ret void543}544 545define void @test_non_const_splat_i16(ptr %ret_ptr, ptr %a_ptr, i16 %elt) {546; CHECK-LABEL: test_non_const_splat_i16:547; CHECK: # %bb.0:548; CHECK-NEXT: padd.hs a1, zero, a2549; CHECK-NEXT: sw a1, 0(a0)550; CHECK-NEXT: ret551 %a = load <2 x i16>, ptr %a_ptr552 %insert = insertelement <2 x i16> poison, i16 %elt, i32 0553 %splat = shufflevector <2 x i16> %insert, <2 x i16> poison, <2 x i32> zeroinitializer554 store <2 x i16> %splat, ptr %ret_ptr555 ret void556}557 558define void @test_build_vector_i8(i8 %a, i8 %c, i8 %b, i8 %d, ptr %ret_ptr) {559; CHECK-RV32-LABEL: test_build_vector_i8:560; CHECK-RV32: # %bb.0:561; CHECK-RV32-NEXT: ppack.dh a0, a0, a2562; CHECK-RV32-NEXT: pack a0, a0, a1563; CHECK-RV32-NEXT: sw a0, 0(a4)564; CHECK-RV32-NEXT: ret565;566; CHECK-RV64-LABEL: test_build_vector_i8:567; CHECK-RV64: # %bb.0:568; CHECK-RV64-NEXT: ppack.h a1, a1, a3569; CHECK-RV64-NEXT: ppack.h a0, a0, a2570; CHECK-RV64-NEXT: ppack.w a0, a0, a1571; CHECK-RV64-NEXT: sw a0, 0(a4)572; CHECK-RV64-NEXT: ret573 %v0 = insertelement <4 x i8> poison, i8 %a, i32 0574 %v1 = insertelement <4 x i8> %v0, i8 %b, i32 1575 %v2 = insertelement <4 x i8> %v1, i8 %c, i32 2576 %v3 = insertelement <4 x i8> %v2, i8 %d, i32 3577 store <4 x i8> %v3, ptr %ret_ptr578 ret void579}580 581define void @test_build_vector_i16(ptr %ret_ptr, i16 %a, i16 %b) {582; CHECK-RV32-LABEL: test_build_vector_i16:583; CHECK-RV32: # %bb.0:584; CHECK-RV32-NEXT: pack a1, a1, a2585; CHECK-RV32-NEXT: sw a1, 0(a0)586; CHECK-RV32-NEXT: ret587;588; CHECK-RV64-LABEL: test_build_vector_i16:589; CHECK-RV64: # %bb.0:590; CHECK-RV64-NEXT: ppack.w a1, a1, a2591; CHECK-RV64-NEXT: sw a1, 0(a0)592; CHECK-RV64-NEXT: ret593 %v0 = insertelement <2 x i16> poison, i16 %a, i32 0594 %v1 = insertelement <2 x i16> %v0, i16 %b, i32 1595 store <2 x i16> %v1, ptr %ret_ptr596 ret void597}598 599; Test logical shift left immediate for v2i16600define void @test_pslli_h(ptr %ret_ptr, ptr %a_ptr) {601; CHECK-LABEL: test_pslli_h:602; CHECK: # %bb.0:603; CHECK-NEXT: lw a1, 0(a1)604; CHECK-NEXT: pslli.h a1, a1, 2605; CHECK-NEXT: sw a1, 0(a0)606; CHECK-NEXT: ret607 %a = load <2 x i16>, ptr %a_ptr608 %res = shl <2 x i16> %a, splat(i16 2)609 store <2 x i16> %res, ptr %ret_ptr610 ret void611}612 613; Test logical shift left immediate for v4i8614define void @test_pslli_b(ptr %ret_ptr, ptr %a_ptr) {615; CHECK-LABEL: test_pslli_b:616; CHECK: # %bb.0:617; CHECK-NEXT: lw a1, 0(a1)618; CHECK-NEXT: pslli.b a1, a1, 2619; CHECK-NEXT: sw a1, 0(a0)620; CHECK-NEXT: ret621 %a = load <4 x i8>, ptr %a_ptr622 %res = shl <4 x i8> %a, splat(i8 2)623 store <4 x i8> %res, ptr %ret_ptr624 ret void625}626 627; Test arithmetic saturation shift left immediate for v2i16628define void @test_psslai_h(ptr %ret_ptr, ptr %a_ptr) {629; CHECK-LABEL: test_psslai_h:630; CHECK: # %bb.0:631; CHECK-NEXT: lw a1, 0(a1)632; CHECK-NEXT: psslai.h a1, a1, 2633; CHECK-NEXT: sw a1, 0(a0)634; CHECK-NEXT: ret635 %a = load <2 x i16>, ptr %a_ptr636 %res = call <2 x i16> @llvm.sshl.sat.v2i16(<2 x i16> %a, <2 x i16> splat(i16 2))637 store <2 x i16> %res, ptr %ret_ptr638 ret void639}640