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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=riscv32 -mattr=+v,+zbb | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc < %s -mtriple=riscv64 -mattr=+v,+zbb | FileCheck %s --check-prefixes=CHECK,RV644 5define i2 @test_v2i1(<2 x i1> %x) {6; CHECK-LABEL: test_v2i1:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma9; CHECK-NEXT: vcpop.m a0, v010; CHECK-NEXT: ret11entry:12 %a = bitcast <2 x i1> %x to i213 %b = call i2 @llvm.ctpop.i2(i2 %a)14 ret i2 %b15}16 17define i4 @test_v4i1(<4 x i1> %x) {18; CHECK-LABEL: test_v4i1:19; CHECK: # %bb.0: # %entry20; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma21; CHECK-NEXT: vcpop.m a0, v022; CHECK-NEXT: ret23entry:24 %a = bitcast <4 x i1> %x to i425 %b = call i4 @llvm.ctpop.i4(i4 %a)26 ret i4 %b27}28 29define i8 @test_v8i1(<8 x i1> %x) {30; CHECK-LABEL: test_v8i1:31; CHECK: # %bb.0: # %entry32; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma33; CHECK-NEXT: vcpop.m a0, v034; CHECK-NEXT: ret35entry:36 %a = bitcast <8 x i1> %x to i837 %b = call i8 @llvm.ctpop.i8(i8 %a)38 ret i8 %b39}40 41define i16 @test_v16i1(<16 x i1> %x) {42; CHECK-LABEL: test_v16i1:43; CHECK: # %bb.0: # %entry44; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma45; CHECK-NEXT: vcpop.m a0, v046; CHECK-NEXT: ret47entry:48 %a = bitcast <16 x i1> %x to i1649 %b = call i16 @llvm.ctpop.i16(i16 %a)50 ret i16 %b51}52 53define i32 @test_v32i1(<32 x i1> %x) {54; CHECK-LABEL: test_v32i1:55; CHECK: # %bb.0: # %entry56; CHECK-NEXT: li a0, 3257; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma58; CHECK-NEXT: vcpop.m a0, v059; CHECK-NEXT: ret60entry:61 %a = bitcast <32 x i1> %x to i3262 %b = call i32 @llvm.ctpop.i32(i32 %a)63 ret i32 %b64}65 66define i64 @test_v64i1(<64 x i1> %x) {67; RV32-LABEL: test_v64i1:68; RV32: # %bb.0: # %entry69; RV32-NEXT: li a0, 6470; RV32-NEXT: vsetvli zero, a0, e8, m4, ta, ma71; RV32-NEXT: vcpop.m a0, v072; RV32-NEXT: li a1, 073; RV32-NEXT: ret74;75; RV64-LABEL: test_v64i1:76; RV64: # %bb.0: # %entry77; RV64-NEXT: li a0, 6478; RV64-NEXT: vsetvli zero, a0, e8, m4, ta, ma79; RV64-NEXT: vcpop.m a0, v080; RV64-NEXT: ret81entry:82 %a = bitcast <64 x i1> %x to i6483 %b = call i64 @llvm.ctpop.i64(i64 %a)84 ret i64 %b85}86 87define i128 @test_v128i1(<128 x i1> %x) {88; RV32-LABEL: test_v128i1:89; RV32: # %bb.0: # %entry90; RV32-NEXT: li a1, 12891; RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma92; RV32-NEXT: vcpop.m a1, v093; RV32-NEXT: sw a1, 0(a0)94; RV32-NEXT: sw zero, 4(a0)95; RV32-NEXT: sw zero, 8(a0)96; RV32-NEXT: sw zero, 12(a0)97; RV32-NEXT: ret98;99; RV64-LABEL: test_v128i1:100; RV64: # %bb.0: # %entry101; RV64-NEXT: li a0, 128102; RV64-NEXT: vsetvli zero, a0, e8, m8, ta, ma103; RV64-NEXT: vcpop.m a0, v0104; RV64-NEXT: li a1, 0105; RV64-NEXT: ret106entry:107 %a = bitcast <128 x i1> %x to i128108 %b = call i128 @llvm.ctpop.i128(i128 %a)109 ret i128 %b110}111 112define i32 @test_trunc_v128i1(<128 x i1> %x) {113; CHECK-LABEL: test_trunc_v128i1:114; CHECK: # %bb.0: # %entry115; CHECK-NEXT: li a0, 128116; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma117; CHECK-NEXT: vcpop.m a0, v0118; CHECK-NEXT: ret119entry:120 %a = bitcast <128 x i1> %x to i128121 %b = call i128 @llvm.ctpop.i128(i128 %a)122 %c = trunc i128 %b to i32123 ret i32 %c124}125 126define i256 @test_v256i1(<256 x i1> %x) {127; RV32-LABEL: test_v256i1:128; RV32: # %bb.0: # %entry129; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma130; RV32-NEXT: vslidedown.vi v9, v0, 1131; RV32-NEXT: li a1, 32132; RV32-NEXT: vslidedown.vi v10, v8, 1133; RV32-NEXT: vmv.x.s a2, v0134; RV32-NEXT: vmv.x.s a3, v8135; RV32-NEXT: vsrl.vx v11, v9, a1136; RV32-NEXT: vsrl.vx v12, v0, a1137; RV32-NEXT: vmv.x.s a4, v9138; RV32-NEXT: vsrl.vx v9, v10, a1139; RV32-NEXT: vsrl.vx v8, v8, a1140; RV32-NEXT: vmv.x.s a1, v10141; RV32-NEXT: cpop a3, a3142; RV32-NEXT: cpop a2, a2143; RV32-NEXT: vmv.x.s a5, v11144; RV32-NEXT: vmv.x.s a6, v12145; RV32-NEXT: vmv.x.s a7, v9146; RV32-NEXT: vmv.x.s t0, v8147; RV32-NEXT: cpop a1, a1148; RV32-NEXT: cpop a4, a4149; RV32-NEXT: cpop t0, t0150; RV32-NEXT: cpop a7, a7151; RV32-NEXT: cpop a6, a6152; RV32-NEXT: cpop a5, a5153; RV32-NEXT: add a3, a3, t0154; RV32-NEXT: add a1, a1, a7155; RV32-NEXT: add a2, a2, a6156; RV32-NEXT: add a4, a4, a5157; RV32-NEXT: add a5, a3, a1158; RV32-NEXT: add a6, a2, a4159; RV32-NEXT: add a1, a6, a5160; RV32-NEXT: sltu a3, a5, a3161; RV32-NEXT: sltu a4, a6, a2162; RV32-NEXT: sltu a2, a1, a6163; RV32-NEXT: add a3, a4, a3164; RV32-NEXT: add a3, a3, a2165; RV32-NEXT: beq a3, a4, .LBB8_2166; RV32-NEXT: # %bb.1: # %entry167; RV32-NEXT: sltu a2, a3, a4168; RV32-NEXT: .LBB8_2: # %entry169; RV32-NEXT: sw zero, 16(a0)170; RV32-NEXT: sw zero, 20(a0)171; RV32-NEXT: sw zero, 24(a0)172; RV32-NEXT: sw zero, 28(a0)173; RV32-NEXT: sw a1, 0(a0)174; RV32-NEXT: sw a3, 4(a0)175; RV32-NEXT: sw a2, 8(a0)176; RV32-NEXT: sw zero, 12(a0)177; RV32-NEXT: ret178;179; RV64-LABEL: test_v256i1:180; RV64: # %bb.0: # %entry181; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma182; RV64-NEXT: vslidedown.vi v9, v0, 1183; RV64-NEXT: vmv.x.s a1, v0184; RV64-NEXT: vslidedown.vi v10, v8, 1185; RV64-NEXT: vmv.x.s a2, v8186; RV64-NEXT: vmv.x.s a3, v9187; RV64-NEXT: vmv.x.s a4, v10188; RV64-NEXT: cpop a2, a2189; RV64-NEXT: cpop a1, a1190; RV64-NEXT: cpop a4, a4191; RV64-NEXT: cpop a3, a3192; RV64-NEXT: add a2, a2, a4193; RV64-NEXT: add a1, a1, a3194; RV64-NEXT: add a2, a1, a2195; RV64-NEXT: sltu a1, a2, a1196; RV64-NEXT: sd a2, 0(a0)197; RV64-NEXT: sd a1, 8(a0)198; RV64-NEXT: sd zero, 16(a0)199; RV64-NEXT: sd zero, 24(a0)200; RV64-NEXT: ret201entry:202 %a = bitcast <256 x i1> %x to i256203 %b = call i256 @llvm.ctpop.i256(i256 %a)204 ret i256 %b205}206 207define i32 @test_trunc_v256i1(<256 x i1> %x) {208; RV32-LABEL: test_trunc_v256i1:209; RV32: # %bb.0: # %entry210; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma211; RV32-NEXT: vslidedown.vi v9, v0, 1212; RV32-NEXT: li a0, 32213; RV32-NEXT: vslidedown.vi v10, v8, 1214; RV32-NEXT: vmv.x.s a1, v0215; RV32-NEXT: vmv.x.s a2, v8216; RV32-NEXT: vsrl.vx v11, v9, a0217; RV32-NEXT: vsrl.vx v12, v0, a0218; RV32-NEXT: vmv.x.s a3, v9219; RV32-NEXT: vsrl.vx v9, v10, a0220; RV32-NEXT: vsrl.vx v8, v8, a0221; RV32-NEXT: vmv.x.s a0, v10222; RV32-NEXT: cpop a2, a2223; RV32-NEXT: cpop a1, a1224; RV32-NEXT: vmv.x.s a4, v11225; RV32-NEXT: vmv.x.s a5, v12226; RV32-NEXT: vmv.x.s a6, v9227; RV32-NEXT: vmv.x.s a7, v8228; RV32-NEXT: cpop a0, a0229; RV32-NEXT: cpop a3, a3230; RV32-NEXT: cpop a7, a7231; RV32-NEXT: cpop a6, a6232; RV32-NEXT: cpop a5, a5233; RV32-NEXT: cpop a4, a4234; RV32-NEXT: add a2, a2, a7235; RV32-NEXT: add a0, a0, a6236; RV32-NEXT: add a1, a1, a5237; RV32-NEXT: add a3, a3, a4238; RV32-NEXT: add a0, a2, a0239; RV32-NEXT: add a1, a1, a3240; RV32-NEXT: add a0, a1, a0241; RV32-NEXT: ret242;243; RV64-LABEL: test_trunc_v256i1:244; RV64: # %bb.0: # %entry245; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma246; RV64-NEXT: vslidedown.vi v9, v0, 1247; RV64-NEXT: vmv.x.s a0, v0248; RV64-NEXT: vslidedown.vi v10, v8, 1249; RV64-NEXT: vmv.x.s a1, v8250; RV64-NEXT: vmv.x.s a2, v9251; RV64-NEXT: vmv.x.s a3, v10252; RV64-NEXT: cpop a1, a1253; RV64-NEXT: cpop a0, a0254; RV64-NEXT: cpop a3, a3255; RV64-NEXT: cpop a2, a2256; RV64-NEXT: add a1, a1, a3257; RV64-NEXT: add a0, a0, a2258; RV64-NEXT: add a0, a0, a1259; RV64-NEXT: ret260entry:261 %a = bitcast <256 x i1> %x to i256262 %b = call i256 @llvm.ctpop.i256(i256 %a)263 %c = trunc i256 %b to i32264 ret i32 %c265}266