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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644 5define void @matmul_min(ptr %vptr, ptr %scalars, ptr %acc0_ptr, ptr %acc1_ptr) {6; CHECK-LABEL: matmul_min:7; CHECK:       # %bb.0: # %entry8; CHECK-NEXT:    li a4, 649; CHECK-NEXT:    li a5, 3210; CHECK-NEXT:    vsetvli zero, a5, e8, m2, ta, ma11; CHECK-NEXT:    vle8.v v16, (a0)12; CHECK-NEXT:    lb a0, 0(a1)13; CHECK-NEXT:    lb a1, 1(a1)14; CHECK-NEXT:    vsetvli zero, a4, e8, m4, ta, ma15; CHECK-NEXT:    vle8.v v8, (a2)16; CHECK-NEXT:    vle8.v v12, (a3)17; CHECK-NEXT:    vsetvli zero, a5, e8, m2, ta, ma18; CHECK-NEXT:    vwmacc.vx v8, a0, v1619; CHECK-NEXT:    vwmacc.vx v12, a1, v1620; CHECK-NEXT:    vsetvli zero, a4, e8, m4, ta, ma21; CHECK-NEXT:    vse8.v v8, (a2)22; CHECK-NEXT:    vse8.v v12, (a3)23; CHECK-NEXT:    ret24entry:25  %acc0 = load <32 x i16>, ptr %acc0_ptr, align 126  %acc1 = load <32 x i16>, ptr %acc1_ptr, align 127 28  %v8 = load <32 x i8>, ptr %vptr, align 129  %v16 = sext <32 x i8> %v8 to <32 x i16>30 31  %s0_ptr = getelementptr i8, ptr %scalars, i32 032  %s0_i8 = load i8, ptr %s0_ptr, align 133  %s0_i16 = sext i8 %s0_i8 to i1634  %tmp0 = insertelement <32 x i16> poison, i16 %s0_i16, i32 035  %splat0 = shufflevector <32 x i16> %tmp0, <32 x i16> poison, <32 x i32> zeroinitializer36  %mul0 = mul <32 x i16> %splat0, %v1637  %add0 = add <32 x i16> %mul0, %acc038 39  %s1_ptr = getelementptr i8, ptr %scalars, i32 140  %s1_i8 = load i8, ptr %s1_ptr, align 141  %s1_i16 = sext i8 %s1_i8 to i1642  %tmp1 = insertelement <32 x i16> poison, i16 %s1_i16, i32 043  %splat1 = shufflevector <32 x i16> %tmp1, <32 x i16> poison, <32 x i32> zeroinitializer44  %mul1 = mul <32 x i16> %splat1, %v1645  %add1 = add <32 x i16> %mul1, %acc146 47  store <32 x i16> %add0, ptr %acc0_ptr, align 148  store <32 x i16> %add1, ptr %acc1_ptr, align 149 50  ret void51}52;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:53; RV32: {{.*}}54; RV64: {{.*}}55