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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \3; RUN: -verify-machineinstrs | FileCheck %s4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \5; RUN: -verify-machineinstrs | FileCheck %s6 7; vadd.vv8define <vscale x 1 x i64> @commutable_vadd_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {9; CHECK-LABEL: commutable_vadd_vv:10; CHECK: # %bb.0: # %entry11; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma12; CHECK-NEXT: vadd.vv v8, v8, v913; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma14; CHECK-NEXT: vadd.vv v8, v8, v815; CHECK-NEXT: ret16entry:17 %a = call <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)18 %b = call <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)19 %ret = add <vscale x 1 x i64> %a, %b20 ret <vscale x 1 x i64> %ret21}22 23define <vscale x 1 x i64> @commutable_vadd_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {24; CHECK-LABEL: commutable_vadd_vv_masked:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma27; CHECK-NEXT: vadd.vv v8, v8, v9, v0.t28; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma29; CHECK-NEXT: vadd.vv v8, v8, v830; CHECK-NEXT: ret31 %a = call <vscale x 1 x i64> @llvm.riscv.vadd.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)32 %b = call <vscale x 1 x i64> @llvm.riscv.vadd.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)33 %ret = add <vscale x 1 x i64> %a, %b34 ret <vscale x 1 x i64> %ret35}36 37; vand.vv38define <vscale x 1 x i64> @commutable_vand_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {39; CHECK-LABEL: commutable_vand_vv:40; CHECK: # %bb.0: # %entry41; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma42; CHECK-NEXT: vand.vv v8, v8, v943; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma44; CHECK-NEXT: vadd.vv v8, v8, v845; CHECK-NEXT: ret46entry:47 %a = call <vscale x 1 x i64> @llvm.riscv.vand.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)48 %b = call <vscale x 1 x i64> @llvm.riscv.vand.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)49 %ret = add <vscale x 1 x i64> %a, %b50 ret <vscale x 1 x i64> %ret51}52 53define <vscale x 1 x i64> @commutable_vand_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {54; CHECK-LABEL: commutable_vand_vv_masked:55; CHECK: # %bb.0:56; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma57; CHECK-NEXT: vand.vv v8, v8, v9, v0.t58; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma59; CHECK-NEXT: vadd.vv v8, v8, v860; CHECK-NEXT: ret61 %a = call <vscale x 1 x i64> @llvm.riscv.vand.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)62 %b = call <vscale x 1 x i64> @llvm.riscv.vand.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)63 %ret = add <vscale x 1 x i64> %a, %b64 ret <vscale x 1 x i64> %ret65}66 67; vor.vv68define <vscale x 1 x i64> @commutable_vor_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {69; CHECK-LABEL: commutable_vor_vv:70; CHECK: # %bb.0: # %entry71; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma72; CHECK-NEXT: vor.vv v8, v8, v973; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma74; CHECK-NEXT: vadd.vv v8, v8, v875; CHECK-NEXT: ret76entry:77 %a = call <vscale x 1 x i64> @llvm.riscv.vor.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)78 %b = call <vscale x 1 x i64> @llvm.riscv.vor.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)79 %ret = add <vscale x 1 x i64> %a, %b80 ret <vscale x 1 x i64> %ret81}82 83define <vscale x 1 x i64> @commutable_vor_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {84; CHECK-LABEL: commutable_vor_vv_masked:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma87; CHECK-NEXT: vor.vv v8, v8, v9, v0.t88; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma89; CHECK-NEXT: vadd.vv v8, v8, v890; CHECK-NEXT: ret91 %a = call <vscale x 1 x i64> @llvm.riscv.vor.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)92 %b = call <vscale x 1 x i64> @llvm.riscv.vor.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)93 %ret = add <vscale x 1 x i64> %a, %b94 ret <vscale x 1 x i64> %ret95}96 97; vxor.vv98define <vscale x 1 x i64> @commutable_vxor_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {99; CHECK-LABEL: commutable_vxor_vv:100; CHECK: # %bb.0: # %entry101; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma102; CHECK-NEXT: vxor.vv v8, v8, v9103; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma104; CHECK-NEXT: vadd.vv v8, v8, v8105; CHECK-NEXT: ret106entry:107 %a = call <vscale x 1 x i64> @llvm.riscv.vxor.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)108 %b = call <vscale x 1 x i64> @llvm.riscv.vxor.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)109 %ret = add <vscale x 1 x i64> %a, %b110 ret <vscale x 1 x i64> %ret111}112 113define <vscale x 1 x i64> @commutable_vxor_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {114; CHECK-LABEL: commutable_vxor_vv_masked:115; CHECK: # %bb.0:116; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma117; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t118; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma119; CHECK-NEXT: vadd.vv v8, v8, v8120; CHECK-NEXT: ret121 %a = call <vscale x 1 x i64> @llvm.riscv.vxor.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)122 %b = call <vscale x 1 x i64> @llvm.riscv.vxor.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)123 %ret = add <vscale x 1 x i64> %a, %b124 ret <vscale x 1 x i64> %ret125}126 127; vmseq.vv128define <vscale x 1 x i1> @commutable_vmseq_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {129; CHECK-LABEL: commutable_vmseq_vv:130; CHECK: # %bb.0: # %entry131; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma132; CHECK-NEXT: vmseq.vv v8, v8, v9133; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma134; CHECK-NEXT: vmxor.mm v0, v8, v8135; CHECK-NEXT: ret136entry:137 %a = call <vscale x 1 x i1> @llvm.riscv.vmseq.nxv1i64(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)138 %b = call <vscale x 1 x i1> @llvm.riscv.vmseq.nxv1i64(<vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)139 %ret = add <vscale x 1 x i1> %a, %b140 ret <vscale x 1 x i1> %ret141}142 143define <vscale x 1 x i1> @commutable_vmseq_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {144; CHECK-LABEL: commutable_vmseq_vv_masked:145; CHECK: # %bb.0:146; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma147; CHECK-NEXT: vmseq.vv v8, v8, v9, v0.t148; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma149; CHECK-NEXT: vmxor.mm v0, v8, v8150; CHECK-NEXT: ret151 %a = call <vscale x 1 x i1> @llvm.riscv.vmseq.mask.nxv1i64(<vscale x 1 x i1> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2)152 %b = call <vscale x 1 x i1> @llvm.riscv.vmseq.mask.nxv1i64(<vscale x 1 x i1> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2)153 %ret = add <vscale x 1 x i1> %a, %b154 ret <vscale x 1 x i1> %ret155}156 157; vmsne.vv158define <vscale x 1 x i1> @commutable_vmsne_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {159; CHECK-LABEL: commutable_vmsne_vv:160; CHECK: # %bb.0: # %entry161; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma162; CHECK-NEXT: vmsne.vv v8, v8, v9163; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma164; CHECK-NEXT: vmxor.mm v0, v8, v8165; CHECK-NEXT: ret166entry:167 %a = call <vscale x 1 x i1> @llvm.riscv.vmsne.nxv1i64(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)168 %b = call <vscale x 1 x i1> @llvm.riscv.vmsne.nxv1i64(<vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)169 %ret = add <vscale x 1 x i1> %a, %b170 ret <vscale x 1 x i1> %ret171}172 173define <vscale x 1 x i1> @commutable_vmsne_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {174; CHECK-LABEL: commutable_vmsne_vv_masked:175; CHECK: # %bb.0:176; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma177; CHECK-NEXT: vmsne.vv v8, v8, v9, v0.t178; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma179; CHECK-NEXT: vmxor.mm v0, v8, v8180; CHECK-NEXT: ret181 %a = call <vscale x 1 x i1> @llvm.riscv.vmsne.mask.nxv1i64(<vscale x 1 x i1> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2)182 %b = call <vscale x 1 x i1> @llvm.riscv.vmsne.mask.nxv1i64(<vscale x 1 x i1> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2)183 %ret = add <vscale x 1 x i1> %a, %b184 ret <vscale x 1 x i1> %ret185}186 187; vmin.vv188define <vscale x 1 x i64> @commutable_vmin_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {189; CHECK-LABEL: commutable_vmin_vv:190; CHECK: # %bb.0: # %entry191; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma192; CHECK-NEXT: vmin.vv v8, v8, v9193; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma194; CHECK-NEXT: vadd.vv v8, v8, v8195; CHECK-NEXT: ret196entry:197 %a = call <vscale x 1 x i64> @llvm.riscv.vmin.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)198 %b = call <vscale x 1 x i64> @llvm.riscv.vmin.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)199 %ret = add <vscale x 1 x i64> %a, %b200 ret <vscale x 1 x i64> %ret201}202 203define <vscale x 1 x i64> @commutable_vmin_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {204; CHECK-LABEL: commutable_vmin_vv_masked:205; CHECK: # %bb.0:206; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma207; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t208; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma209; CHECK-NEXT: vadd.vv v8, v8, v8210; CHECK-NEXT: ret211 %a = call <vscale x 1 x i64> @llvm.riscv.vmin.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)212 %b = call <vscale x 1 x i64> @llvm.riscv.vmin.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)213 %ret = add <vscale x 1 x i64> %a, %b214 ret <vscale x 1 x i64> %ret215}216 217; vminu.vv218define <vscale x 1 x i64> @commutable_vminu_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {219; CHECK-LABEL: commutable_vminu_vv:220; CHECK: # %bb.0: # %entry221; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma222; CHECK-NEXT: vminu.vv v8, v8, v9223; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma224; CHECK-NEXT: vadd.vv v8, v8, v8225; CHECK-NEXT: ret226entry:227 %a = call <vscale x 1 x i64> @llvm.riscv.vminu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)228 %b = call <vscale x 1 x i64> @llvm.riscv.vminu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)229 %ret = add <vscale x 1 x i64> %a, %b230 ret <vscale x 1 x i64> %ret231}232 233define <vscale x 1 x i64> @commutable_vminu_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {234; CHECK-LABEL: commutable_vminu_vv_masked:235; CHECK: # %bb.0:236; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma237; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t238; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma239; CHECK-NEXT: vadd.vv v8, v8, v8240; CHECK-NEXT: ret241 %a = call <vscale x 1 x i64> @llvm.riscv.vminu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)242 %b = call <vscale x 1 x i64> @llvm.riscv.vminu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)243 %ret = add <vscale x 1 x i64> %a, %b244 ret <vscale x 1 x i64> %ret245}246 247; vmax.vv248define <vscale x 1 x i64> @commutable_vmax_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {249; CHECK-LABEL: commutable_vmax_vv:250; CHECK: # %bb.0: # %entry251; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma252; CHECK-NEXT: vmax.vv v8, v8, v9253; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma254; CHECK-NEXT: vadd.vv v8, v8, v8255; CHECK-NEXT: ret256entry:257 %a = call <vscale x 1 x i64> @llvm.riscv.vmax.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)258 %b = call <vscale x 1 x i64> @llvm.riscv.vmax.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)259 %ret = add <vscale x 1 x i64> %a, %b260 ret <vscale x 1 x i64> %ret261}262 263define <vscale x 1 x i64> @commutable_vmax_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {264; CHECK-LABEL: commutable_vmax_vv_masked:265; CHECK: # %bb.0:266; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma267; CHECK-NEXT: vmax.vv v8, v8, v9, v0.t268; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma269; CHECK-NEXT: vadd.vv v8, v8, v8270; CHECK-NEXT: ret271 %a = call <vscale x 1 x i64> @llvm.riscv.vmax.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)272 %b = call <vscale x 1 x i64> @llvm.riscv.vmax.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)273 %ret = add <vscale x 1 x i64> %a, %b274 ret <vscale x 1 x i64> %ret275}276 277; vmaxu.vv278define <vscale x 1 x i64> @commutable_vmaxu_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {279; CHECK-LABEL: commutable_vmaxu_vv:280; CHECK: # %bb.0: # %entry281; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma282; CHECK-NEXT: vmaxu.vv v8, v8, v9283; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma284; CHECK-NEXT: vadd.vv v8, v8, v8285; CHECK-NEXT: ret286entry:287 %a = call <vscale x 1 x i64> @llvm.riscv.vmaxu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)288 %b = call <vscale x 1 x i64> @llvm.riscv.vmaxu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)289 %ret = add <vscale x 1 x i64> %a, %b290 ret <vscale x 1 x i64> %ret291}292 293define <vscale x 1 x i64> @commutable_vmaxu_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {294; CHECK-LABEL: commutable_vmaxu_vv_masked:295; CHECK: # %bb.0:296; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma297; CHECK-NEXT: vmaxu.vv v8, v8, v9, v0.t298; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma299; CHECK-NEXT: vadd.vv v8, v8, v8300; CHECK-NEXT: ret301 %a = call <vscale x 1 x i64> @llvm.riscv.vmaxu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)302 %b = call <vscale x 1 x i64> @llvm.riscv.vmaxu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)303 %ret = add <vscale x 1 x i64> %a, %b304 ret <vscale x 1 x i64> %ret305}306 307; vmul.vv308define <vscale x 1 x i64> @commutable_vmul_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {309; CHECK-LABEL: commutable_vmul_vv:310; CHECK: # %bb.0: # %entry311; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma312; CHECK-NEXT: vmul.vv v8, v8, v9313; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma314; CHECK-NEXT: vadd.vv v8, v8, v8315; CHECK-NEXT: ret316entry:317 %a = call <vscale x 1 x i64> @llvm.riscv.vmul.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)318 %b = call <vscale x 1 x i64> @llvm.riscv.vmul.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)319 %ret = add <vscale x 1 x i64> %a, %b320 ret <vscale x 1 x i64> %ret321}322 323define <vscale x 1 x i64> @commutable_vmul_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {324; CHECK-LABEL: commutable_vmul_vv_masked:325; CHECK: # %bb.0:326; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma327; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t328; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma329; CHECK-NEXT: vadd.vv v8, v8, v8330; CHECK-NEXT: ret331 %a = call <vscale x 1 x i64> @llvm.riscv.vmul.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)332 %b = call <vscale x 1 x i64> @llvm.riscv.vmul.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)333 %ret = add <vscale x 1 x i64> %a, %b334 ret <vscale x 1 x i64> %ret335}336 337; vmulh.vv338define <vscale x 1 x i64> @commutable_vmulh_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {339; CHECK-LABEL: commutable_vmulh_vv:340; CHECK: # %bb.0: # %entry341; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma342; CHECK-NEXT: vmulh.vv v8, v8, v9343; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma344; CHECK-NEXT: vadd.vv v8, v8, v8345; CHECK-NEXT: ret346entry:347 %a = call <vscale x 1 x i64> @llvm.riscv.vmulh.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)348 %b = call <vscale x 1 x i64> @llvm.riscv.vmulh.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)349 %ret = add <vscale x 1 x i64> %a, %b350 ret <vscale x 1 x i64> %ret351}352 353define <vscale x 1 x i64> @commutable_vmulh_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {354; CHECK-LABEL: commutable_vmulh_vv_masked:355; CHECK: # %bb.0:356; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma357; CHECK-NEXT: vmulh.vv v8, v8, v9, v0.t358; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma359; CHECK-NEXT: vadd.vv v8, v8, v8360; CHECK-NEXT: ret361 %a = call <vscale x 1 x i64> @llvm.riscv.vmulh.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)362 %b = call <vscale x 1 x i64> @llvm.riscv.vmulh.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)363 %ret = add <vscale x 1 x i64> %a, %b364 ret <vscale x 1 x i64> %ret365}366 367; vmulhu.vv368define <vscale x 1 x i64> @commutable_vmulhu_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {369; CHECK-LABEL: commutable_vmulhu_vv:370; CHECK: # %bb.0: # %entry371; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma372; CHECK-NEXT: vmulhu.vv v8, v8, v9373; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma374; CHECK-NEXT: vadd.vv v8, v8, v8375; CHECK-NEXT: ret376entry:377 %a = call <vscale x 1 x i64> @llvm.riscv.vmulhu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)378 %b = call <vscale x 1 x i64> @llvm.riscv.vmulhu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)379 %ret = add <vscale x 1 x i64> %a, %b380 ret <vscale x 1 x i64> %ret381}382 383define <vscale x 1 x i64> @commutable_vmulhu_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {384; CHECK-LABEL: commutable_vmulhu_vv_masked:385; CHECK: # %bb.0:386; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma387; CHECK-NEXT: vmulhu.vv v8, v8, v9, v0.t388; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma389; CHECK-NEXT: vadd.vv v8, v8, v8390; CHECK-NEXT: ret391 %a = call <vscale x 1 x i64> @llvm.riscv.vmulhu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)392 %b = call <vscale x 1 x i64> @llvm.riscv.vmulhu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)393 %ret = add <vscale x 1 x i64> %a, %b394 ret <vscale x 1 x i64> %ret395}396 397; vwadd.vv398define <vscale x 1 x i64> @commutable_vwadd_vv(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {399; CHECK-LABEL: commutable_vwadd_vv:400; CHECK: # %bb.0: # %entry401; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma402; CHECK-NEXT: vwadd.vv v10, v8, v9403; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma404; CHECK-NEXT: vadd.vv v8, v10, v10405; CHECK-NEXT: ret406entry:407 %a = call <vscale x 1 x i64> @llvm.riscv.vwadd.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2)408 %b = call <vscale x 1 x i64> @llvm.riscv.vwadd.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, iXLen %2)409 %ret = add <vscale x 1 x i64> %a, %b410 ret <vscale x 1 x i64> %ret411}412 413define <vscale x 1 x i64> @commutable_vwadd_vv_masked(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2) {414; CHECK-LABEL: commutable_vwadd_vv_masked:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma417; CHECK-NEXT: vwadd.vv v10, v8, v9, v0.t418; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma419; CHECK-NEXT: vadd.vv v8, v10, v10420; CHECK-NEXT: ret421 %a = call <vscale x 1 x i64> @llvm.riscv.vwadd.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)422 %b = call <vscale x 1 x i64> @llvm.riscv.vwadd.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)423 %ret = add <vscale x 1 x i64> %a, %b424 ret <vscale x 1 x i64> %ret425}426 427; vwaddu.vv428define <vscale x 1 x i64> @commutable_vwaddu_vv(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {429; CHECK-LABEL: commutable_vwaddu_vv:430; CHECK: # %bb.0: # %entry431; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma432; CHECK-NEXT: vwaddu.vv v10, v8, v9433; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma434; CHECK-NEXT: vadd.vv v8, v10, v10435; CHECK-NEXT: ret436entry:437 %a = call <vscale x 1 x i64> @llvm.riscv.vwaddu.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2)438 %b = call <vscale x 1 x i64> @llvm.riscv.vwaddu.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, iXLen %2)439 %ret = add <vscale x 1 x i64> %a, %b440 ret <vscale x 1 x i64> %ret441}442 443define <vscale x 1 x i64> @commutable_vwaddu_vv_masked(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2) {444; CHECK-LABEL: commutable_vwaddu_vv_masked:445; CHECK: # %bb.0:446; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma447; CHECK-NEXT: vwaddu.vv v10, v8, v9, v0.t448; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma449; CHECK-NEXT: vadd.vv v8, v10, v10450; CHECK-NEXT: ret451 %a = call <vscale x 1 x i64> @llvm.riscv.vwaddu.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)452 %b = call <vscale x 1 x i64> @llvm.riscv.vwaddu.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)453 %ret = add <vscale x 1 x i64> %a, %b454 ret <vscale x 1 x i64> %ret455}456 457; vwmul.vv458define <vscale x 1 x i64> @commutable_vwmul_vv(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {459; CHECK-LABEL: commutable_vwmul_vv:460; CHECK: # %bb.0: # %entry461; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma462; CHECK-NEXT: vwmul.vv v10, v8, v9463; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma464; CHECK-NEXT: vadd.vv v8, v10, v10465; CHECK-NEXT: ret466entry:467 %a = call <vscale x 1 x i64> @llvm.riscv.vwmul.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2)468 %b = call <vscale x 1 x i64> @llvm.riscv.vwmul.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, iXLen %2)469 %ret = add <vscale x 1 x i64> %a, %b470 ret <vscale x 1 x i64> %ret471}472 473define <vscale x 1 x i64> @commutable_vwmul_vv_masked(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2) {474; CHECK-LABEL: commutable_vwmul_vv_masked:475; CHECK: # %bb.0:476; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma477; CHECK-NEXT: vwmul.vv v10, v8, v9, v0.t478; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma479; CHECK-NEXT: vadd.vv v8, v10, v10480; CHECK-NEXT: ret481 %a = call <vscale x 1 x i64> @llvm.riscv.vwmul.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)482 %b = call <vscale x 1 x i64> @llvm.riscv.vwmul.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)483 %ret = add <vscale x 1 x i64> %a, %b484 ret <vscale x 1 x i64> %ret485}486 487; vwmulu.vv488define <vscale x 1 x i64> @commutable_vwmulu_vv(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {489; CHECK-LABEL: commutable_vwmulu_vv:490; CHECK: # %bb.0: # %entry491; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma492; CHECK-NEXT: vwmulu.vv v10, v8, v9493; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma494; CHECK-NEXT: vadd.vv v8, v10, v10495; CHECK-NEXT: ret496entry:497 %a = call <vscale x 1 x i64> @llvm.riscv.vwmulu.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2)498 %b = call <vscale x 1 x i64> @llvm.riscv.vwmulu.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, iXLen %2)499 %ret = add <vscale x 1 x i64> %a, %b500 ret <vscale x 1 x i64> %ret501}502 503define <vscale x 1 x i64> @commutable_vwmulu_vv_masked(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2) {504; CHECK-LABEL: commutable_vwmulu_vv_masked:505; CHECK: # %bb.0:506; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma507; CHECK-NEXT: vwmulu.vv v10, v8, v9, v0.t508; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma509; CHECK-NEXT: vadd.vv v8, v10, v10510; CHECK-NEXT: ret511 %a = call <vscale x 1 x i64> @llvm.riscv.vwmulu.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)512 %b = call <vscale x 1 x i64> @llvm.riscv.vwmulu.mask.nxv1i64.nxv1i32.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)513 %ret = add <vscale x 1 x i64> %a, %b514 ret <vscale x 1 x i64> %ret515}516 517; vwmacc.vv518define <vscale x 1 x i64> @commutable_vwmacc_vv(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {519; CHECK-LABEL: commutable_vwmacc_vv:520; CHECK: # %bb.0: # %entry521; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma522; CHECK-NEXT: vwmacc.vv v10, v8, v9523; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma524; CHECK-NEXT: vadd.vv v8, v10, v10525; CHECK-NEXT: ret526entry:527 %a = call <vscale x 1 x i64> @llvm.riscv.vwmacc.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2, iXLen 1)528 %b = call <vscale x 1 x i64> @llvm.riscv.vwmacc.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, iXLen %2, iXLen 1)529 %ret = add <vscale x 1 x i64> %a, %b530 ret <vscale x 1 x i64> %ret531}532 533define <vscale x 1 x i64> @commutable_vwmacc_vv_masked(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2) {534; CHECK-LABEL: commutable_vwmacc_vv_masked:535; CHECK: # %bb.0:536; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma537; CHECK-NEXT: vwmacc.vv v10, v8, v9, v0.t538; CHECK-NEXT: vwmacc.vv v11, v9, v8, v0.t539; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma540; CHECK-NEXT: vadd.vv v8, v10, v11541; CHECK-NEXT: ret542 %a = call <vscale x 1 x i64> @llvm.riscv.vwmacc.mask.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)543 %b = call <vscale x 1 x i64> @llvm.riscv.vwmacc.mask.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)544 %ret = add <vscale x 1 x i64> %a, %b545 ret <vscale x 1 x i64> %ret546}547 548; vwmaccu.vv549define <vscale x 1 x i64> @commutable_vwmaccu_vv(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2) nounwind {550; CHECK-LABEL: commutable_vwmaccu_vv:551; CHECK: # %bb.0: # %entry552; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma553; CHECK-NEXT: vwmaccu.vv v10, v8, v9554; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma555; CHECK-NEXT: vadd.vv v8, v10, v10556; CHECK-NEXT: ret557entry:558 %a = call <vscale x 1 x i64> @llvm.riscv.vwmaccu.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, iXLen %2, iXLen 1)559 %b = call <vscale x 1 x i64> @llvm.riscv.vwmaccu.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, iXLen %2, iXLen 1)560 %ret = add <vscale x 1 x i64> %a, %b561 ret <vscale x 1 x i64> %ret562}563 564define <vscale x 1 x i64> @commutable_vwmaccu_vv_masked(<vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2) {565; CHECK-LABEL: commutable_vwmaccu_vv_masked:566; CHECK: # %bb.0:567; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma568; CHECK-NEXT: vwmaccu.vv v10, v8, v9, v0.t569; CHECK-NEXT: vwmaccu.vv v11, v9, v8, v0.t570; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma571; CHECK-NEXT: vadd.vv v8, v10, v11572; CHECK-NEXT: ret573 %a = call <vscale x 1 x i64> @llvm.riscv.vwmaccu.mask.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %0, <vscale x 1 x i32> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)574 %b = call <vscale x 1 x i64> @llvm.riscv.vwmaccu.mask.nxv1i64.nxv1i32(<vscale x 1 x i64> poison, <vscale x 1 x i32> %1, <vscale x 1 x i32> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)575 %ret = add <vscale x 1 x i64> %a, %b576 ret <vscale x 1 x i64> %ret577}578 579; vadc.vvm580define <vscale x 1 x i64> @commutable_vadc_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) nounwind {581; CHECK-LABEL: commutable_vadc_vv:582; CHECK: # %bb.0: # %entry583; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma584; CHECK-NEXT: vadc.vvm v8, v8, v9, v0585; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma586; CHECK-NEXT: vadd.vv v8, v8, v8587; CHECK-NEXT: ret588entry:589 %a = call <vscale x 1 x i64> @llvm.riscv.vadc.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2)590 %b = call <vscale x 1 x i64> @llvm.riscv.vadc.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2)591 %ret = add <vscale x 1 x i64> %a, %b592 ret <vscale x 1 x i64> %ret593}594 595; vsadd.vv596define <vscale x 1 x i64> @commutable_vsadd_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {597; CHECK-LABEL: commutable_vsadd_vv:598; CHECK: # %bb.0: # %entry599; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma600; CHECK-NEXT: vsadd.vv v8, v8, v9601; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma602; CHECK-NEXT: vadd.vv v8, v8, v8603; CHECK-NEXT: ret604entry:605 %a = call <vscale x 1 x i64> @llvm.riscv.vsadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)606 %b = call <vscale x 1 x i64> @llvm.riscv.vsadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)607 %ret = add <vscale x 1 x i64> %a, %b608 ret <vscale x 1 x i64> %ret609}610 611define <vscale x 1 x i64> @commutable_vsadd_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {612; CHECK-LABEL: commutable_vsadd_vv_masked:613; CHECK: # %bb.0:614; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma615; CHECK-NEXT: vsadd.vv v8, v8, v9, v0.t616; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma617; CHECK-NEXT: vadd.vv v8, v8, v8618; CHECK-NEXT: ret619 %a = call <vscale x 1 x i64> @llvm.riscv.vsadd.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)620 %b = call <vscale x 1 x i64> @llvm.riscv.vsadd.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)621 %ret = add <vscale x 1 x i64> %a, %b622 ret <vscale x 1 x i64> %ret623}624 625; vsaddu.vv626define <vscale x 1 x i64> @commutable_vsaddu_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {627; CHECK-LABEL: commutable_vsaddu_vv:628; CHECK: # %bb.0: # %entry629; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma630; CHECK-NEXT: vsaddu.vv v8, v8, v9631; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma632; CHECK-NEXT: vadd.vv v8, v8, v8633; CHECK-NEXT: ret634entry:635 %a = call <vscale x 1 x i64> @llvm.riscv.vsaddu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2)636 %b = call <vscale x 1 x i64> @llvm.riscv.vsaddu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen %2)637 %ret = add <vscale x 1 x i64> %a, %b638 ret <vscale x 1 x i64> %ret639}640 641define <vscale x 1 x i64> @commutable_vsaddu_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {642; CHECK-LABEL: commutable_vsaddu_vv_masked:643; CHECK: # %bb.0:644; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma645; CHECK-NEXT: vsaddu.vv v8, v8, v9, v0.t646; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma647; CHECK-NEXT: vadd.vv v8, v8, v8648; CHECK-NEXT: ret649 %a = call <vscale x 1 x i64> @llvm.riscv.vsaddu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)650 %b = call <vscale x 1 x i64> @llvm.riscv.vsaddu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen %2, iXLen 1)651 %ret = add <vscale x 1 x i64> %a, %b652 ret <vscale x 1 x i64> %ret653}654 655; vaadd.vv656define <vscale x 1 x i64> @commutable_vaadd_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {657; CHECK-LABEL: commutable_vaadd_vv:658; CHECK: # %bb.0: # %entry659; CHECK-NEXT: csrwi vxrm, 0660; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma661; CHECK-NEXT: vaadd.vv v8, v8, v9662; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma663; CHECK-NEXT: vadd.vv v8, v8, v8664; CHECK-NEXT: ret665entry:666 %a = call <vscale x 1 x i64> @llvm.riscv.vaadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen 0, iXLen %2)667 %b = call <vscale x 1 x i64> @llvm.riscv.vaadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen 0, iXLen %2)668 %ret = add <vscale x 1 x i64> %a, %b669 ret <vscale x 1 x i64> %ret670}671 672define <vscale x 1 x i64> @commutable_vaadd_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {673; CHECK-LABEL: commutable_vaadd_vv_masked:674; CHECK: # %bb.0:675; CHECK-NEXT: csrwi vxrm, 0676; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma677; CHECK-NEXT: vaadd.vv v8, v8, v9, v0.t678; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma679; CHECK-NEXT: vadd.vv v8, v8, v8680; CHECK-NEXT: ret681 %a = call <vscale x 1 x i64> @llvm.riscv.vaadd.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen 0, iXLen %2, iXLen 1)682 %b = call <vscale x 1 x i64> @llvm.riscv.vaadd.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen 0, iXLen %2, iXLen 1)683 %ret = add <vscale x 1 x i64> %a, %b684 ret <vscale x 1 x i64> %ret685}686 687; vaaddu.vv688define <vscale x 1 x i64> @commutable_vaaddu_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {689; CHECK-LABEL: commutable_vaaddu_vv:690; CHECK: # %bb.0: # %entry691; CHECK-NEXT: csrwi vxrm, 0692; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma693; CHECK-NEXT: vaaddu.vv v8, v8, v9694; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma695; CHECK-NEXT: vadd.vv v8, v8, v8696; CHECK-NEXT: ret697entry:698 %a = call <vscale x 1 x i64> @llvm.riscv.vaaddu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen 0, iXLen %2)699 %b = call <vscale x 1 x i64> @llvm.riscv.vaaddu.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen 0, iXLen %2)700 %ret = add <vscale x 1 x i64> %a, %b701 ret <vscale x 1 x i64> %ret702}703 704define <vscale x 1 x i64> @commutable_vaaddu_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {705; CHECK-LABEL: commutable_vaaddu_vv_masked:706; CHECK: # %bb.0:707; CHECK-NEXT: csrwi vxrm, 0708; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma709; CHECK-NEXT: vaaddu.vv v8, v8, v9, v0.t710; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma711; CHECK-NEXT: vadd.vv v8, v8, v8712; CHECK-NEXT: ret713 %a = call <vscale x 1 x i64> @llvm.riscv.vaaddu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen 0, iXLen %2, iXLen 1)714 %b = call <vscale x 1 x i64> @llvm.riscv.vaaddu.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen 0, iXLen %2, iXLen 1)715 %ret = add <vscale x 1 x i64> %a, %b716 ret <vscale x 1 x i64> %ret717}718 719; vsmul.vv720define <vscale x 1 x i64> @commutable_vsmul_vv(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen %2) nounwind {721; CHECK-LABEL: commutable_vsmul_vv:722; CHECK: # %bb.0: # %entry723; CHECK-NEXT: csrwi vxrm, 0724; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma725; CHECK-NEXT: vsmul.vv v8, v8, v9726; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma727; CHECK-NEXT: vadd.vv v8, v8, v8728; CHECK-NEXT: ret729entry:730 %a = call <vscale x 1 x i64> @llvm.riscv.vsmul.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, iXLen 0, iXLen %2)731 %b = call <vscale x 1 x i64> @llvm.riscv.vsmul.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, iXLen 0, iXLen %2)732 %ret = add <vscale x 1 x i64> %a, %b733 ret <vscale x 1 x i64> %ret734}735 736define <vscale x 1 x i64> @commutable_vsmul_vv_masked(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen %2) {737; CHECK-LABEL: commutable_vsmul_vv_masked:738; CHECK: # %bb.0:739; CHECK-NEXT: csrwi vxrm, 0740; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma741; CHECK-NEXT: vsmul.vv v8, v8, v9, v0.t742; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma743; CHECK-NEXT: vadd.vv v8, v8, v8744; CHECK-NEXT: ret745 %a = call <vscale x 1 x i64> @llvm.riscv.vsmul.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %0, <vscale x 1 x i64> %1, <vscale x 1 x i1> %mask, iXLen 0, iXLen %2, iXLen 1)746 %b = call <vscale x 1 x i64> @llvm.riscv.vsmul.mask.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %1, <vscale x 1 x i64> %0, <vscale x 1 x i1> %mask, iXLen 0, iXLen %2, iXLen 1)747 %ret = add <vscale x 1 x i64> %a, %b748 ret <vscale x 1 x i64> %ret749}750