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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -verify-machineinstrs -mtriple=riscv64 -mattr=+v,+d,+m,+zbb %s -o - | FileCheck %s --check-prefix=RV643; RUN: llc -verify-machineinstrs -mtriple=riscv32 -mattr=+v,+d,+m,+zbb %s -o - | FileCheck %s --check-prefix=RV324 5; Compress + store for i8 type6 7define void @test_compresstore_v1i8(ptr %p, <1 x i1> %mask, <1 x i8> %data) {8; RV64-LABEL: test_compresstore_v1i8:9; RV64: # %bb.0: # %entry10; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma11; RV64-NEXT: vcompress.vm v9, v8, v012; RV64-NEXT: vcpop.m a1, v013; RV64-NEXT: vsetvli zero, a1, e8, mf8, ta, ma14; RV64-NEXT: vse8.v v9, (a0)15; RV64-NEXT: ret16;17; RV32-LABEL: test_compresstore_v1i8:18; RV32: # %bb.0: # %entry19; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma20; RV32-NEXT: vcompress.vm v9, v8, v021; RV32-NEXT: vcpop.m a1, v022; RV32-NEXT: vsetvli zero, a1, e8, mf8, ta, ma23; RV32-NEXT: vse8.v v9, (a0)24; RV32-NEXT: ret25entry:26 tail call void @llvm.masked.compressstore.v1i8(<1 x i8> %data, ptr align 1 %p, <1 x i1> %mask)27 ret void28}29 30define void @test_compresstore_v2i8(ptr %p, <2 x i1> %mask, <2 x i8> %data) {31; RV64-LABEL: test_compresstore_v2i8:32; RV64: # %bb.0: # %entry33; RV64-NEXT: vsetivli zero, 2, e8, mf8, ta, ma34; RV64-NEXT: vcompress.vm v9, v8, v035; RV64-NEXT: vcpop.m a1, v036; RV64-NEXT: vsetvli zero, a1, e8, mf8, ta, ma37; RV64-NEXT: vse8.v v9, (a0)38; RV64-NEXT: ret39;40; RV32-LABEL: test_compresstore_v2i8:41; RV32: # %bb.0: # %entry42; RV32-NEXT: vsetivli zero, 2, e8, mf8, ta, ma43; RV32-NEXT: vcompress.vm v9, v8, v044; RV32-NEXT: vcpop.m a1, v045; RV32-NEXT: vsetvli zero, a1, e8, mf8, ta, ma46; RV32-NEXT: vse8.v v9, (a0)47; RV32-NEXT: ret48entry:49 tail call void @llvm.masked.compressstore.v2i8(<2 x i8> %data, ptr align 1 %p, <2 x i1> %mask)50 ret void51}52 53define void @test_compresstore_v4i8(ptr %p, <4 x i1> %mask, <4 x i8> %data) {54; RV64-LABEL: test_compresstore_v4i8:55; RV64: # %bb.0: # %entry56; RV64-NEXT: vsetivli zero, 4, e8, mf4, ta, ma57; RV64-NEXT: vcompress.vm v9, v8, v058; RV64-NEXT: vcpop.m a1, v059; RV64-NEXT: vsetvli zero, a1, e8, mf4, ta, ma60; RV64-NEXT: vse8.v v9, (a0)61; RV64-NEXT: ret62;63; RV32-LABEL: test_compresstore_v4i8:64; RV32: # %bb.0: # %entry65; RV32-NEXT: vsetivli zero, 4, e8, mf4, ta, ma66; RV32-NEXT: vcompress.vm v9, v8, v067; RV32-NEXT: vcpop.m a1, v068; RV32-NEXT: vsetvli zero, a1, e8, mf4, ta, ma69; RV32-NEXT: vse8.v v9, (a0)70; RV32-NEXT: ret71entry:72 tail call void @llvm.masked.compressstore.v4i8(<4 x i8> %data, ptr align 1 %p, <4 x i1> %mask)73 ret void74}75 76define void @test_compresstore_v8i8(ptr %p, <8 x i1> %mask, <8 x i8> %data) {77; RV64-LABEL: test_compresstore_v8i8:78; RV64: # %bb.0: # %entry79; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma80; RV64-NEXT: vcompress.vm v9, v8, v081; RV64-NEXT: vcpop.m a1, v082; RV64-NEXT: vsetvli zero, a1, e8, mf2, ta, ma83; RV64-NEXT: vse8.v v9, (a0)84; RV64-NEXT: ret85;86; RV32-LABEL: test_compresstore_v8i8:87; RV32: # %bb.0: # %entry88; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma89; RV32-NEXT: vcompress.vm v9, v8, v090; RV32-NEXT: vcpop.m a1, v091; RV32-NEXT: vsetvli zero, a1, e8, mf2, ta, ma92; RV32-NEXT: vse8.v v9, (a0)93; RV32-NEXT: ret94entry:95 tail call void @llvm.masked.compressstore.v8i8(<8 x i8> %data, ptr align 1 %p, <8 x i1> %mask)96 ret void97}98 99define void @test_compresstore_v16i8(ptr %p, <16 x i1> %mask, <16 x i8> %data) {100; RV64-LABEL: test_compresstore_v16i8:101; RV64: # %bb.0: # %entry102; RV64-NEXT: vsetivli zero, 16, e8, m1, ta, ma103; RV64-NEXT: vcompress.vm v9, v8, v0104; RV64-NEXT: vcpop.m a1, v0105; RV64-NEXT: vsetvli zero, a1, e8, m1, ta, ma106; RV64-NEXT: vse8.v v9, (a0)107; RV64-NEXT: ret108;109; RV32-LABEL: test_compresstore_v16i8:110; RV32: # %bb.0: # %entry111; RV32-NEXT: vsetivli zero, 16, e8, m1, ta, ma112; RV32-NEXT: vcompress.vm v9, v8, v0113; RV32-NEXT: vcpop.m a1, v0114; RV32-NEXT: vsetvli zero, a1, e8, m1, ta, ma115; RV32-NEXT: vse8.v v9, (a0)116; RV32-NEXT: ret117entry:118 tail call void @llvm.masked.compressstore.v16i8(<16 x i8> %data, ptr align 1 %p, <16 x i1> %mask)119 ret void120}121 122define void @test_compresstore_v32i8(ptr %p, <32 x i1> %mask, <32 x i8> %data) {123; RV64-LABEL: test_compresstore_v32i8:124; RV64: # %bb.0: # %entry125; RV64-NEXT: li a1, 32126; RV64-NEXT: vsetvli zero, a1, e8, m2, ta, ma127; RV64-NEXT: vcompress.vm v10, v8, v0128; RV64-NEXT: vcpop.m a1, v0129; RV64-NEXT: vsetvli zero, a1, e8, m2, ta, ma130; RV64-NEXT: vse8.v v10, (a0)131; RV64-NEXT: ret132;133; RV32-LABEL: test_compresstore_v32i8:134; RV32: # %bb.0: # %entry135; RV32-NEXT: li a1, 32136; RV32-NEXT: vsetvli zero, a1, e8, m2, ta, ma137; RV32-NEXT: vcompress.vm v10, v8, v0138; RV32-NEXT: vcpop.m a1, v0139; RV32-NEXT: vsetvli zero, a1, e8, m2, ta, ma140; RV32-NEXT: vse8.v v10, (a0)141; RV32-NEXT: ret142entry:143 tail call void @llvm.masked.compressstore.v32i8(<32 x i8> %data, ptr align 1 %p, <32 x i1> %mask)144 ret void145}146 147define void @test_compresstore_v64i8(ptr %p, <64 x i1> %mask, <64 x i8> %data) {148; RV64-LABEL: test_compresstore_v64i8:149; RV64: # %bb.0: # %entry150; RV64-NEXT: li a1, 64151; RV64-NEXT: vsetvli zero, a1, e8, m4, ta, ma152; RV64-NEXT: vcompress.vm v12, v8, v0153; RV64-NEXT: vcpop.m a1, v0154; RV64-NEXT: vsetvli zero, a1, e8, m4, ta, ma155; RV64-NEXT: vse8.v v12, (a0)156; RV64-NEXT: ret157;158; RV32-LABEL: test_compresstore_v64i8:159; RV32: # %bb.0: # %entry160; RV32-NEXT: li a1, 64161; RV32-NEXT: vsetvli zero, a1, e8, m4, ta, ma162; RV32-NEXT: vcompress.vm v12, v8, v0163; RV32-NEXT: vcpop.m a1, v0164; RV32-NEXT: vsetvli zero, a1, e8, m4, ta, ma165; RV32-NEXT: vse8.v v12, (a0)166; RV32-NEXT: ret167entry:168 tail call void @llvm.masked.compressstore.v64i8(<64 x i8> %data, ptr align 1 %p, <64 x i1> %mask)169 ret void170}171 172define void @test_compresstore_v128i8(ptr %p, <128 x i1> %mask, <128 x i8> %data) {173; RV64-LABEL: test_compresstore_v128i8:174; RV64: # %bb.0: # %entry175; RV64-NEXT: li a1, 128176; RV64-NEXT: vsetvli zero, a1, e8, m8, ta, ma177; RV64-NEXT: vcompress.vm v16, v8, v0178; RV64-NEXT: vcpop.m a1, v0179; RV64-NEXT: vsetvli zero, a1, e8, m8, ta, ma180; RV64-NEXT: vse8.v v16, (a0)181; RV64-NEXT: ret182;183; RV32-LABEL: test_compresstore_v128i8:184; RV32: # %bb.0: # %entry185; RV32-NEXT: li a1, 128186; RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma187; RV32-NEXT: vcompress.vm v16, v8, v0188; RV32-NEXT: vcpop.m a1, v0189; RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma190; RV32-NEXT: vse8.v v16, (a0)191; RV32-NEXT: ret192entry:193 tail call void @llvm.masked.compressstore.v128i8(<128 x i8> %data, ptr align 1 %p, <128 x i1> %mask)194 ret void195}196 197define void @test_compresstore_v256i8(ptr %p, <256 x i1> %mask, <256 x i8> %data) {198; RV64-LABEL: test_compresstore_v256i8:199; RV64: # %bb.0: # %entry200; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma201; RV64-NEXT: vmv1r.v v7, v8202; RV64-NEXT: li a2, 128203; RV64-NEXT: vslidedown.vi v8, v0, 1204; RV64-NEXT: vmv.x.s a3, v0205; RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma206; RV64-NEXT: vle8.v v24, (a1)207; RV64-NEXT: vsetvli zero, a2, e64, m1, ta, ma208; RV64-NEXT: vmv.x.s a1, v8209; RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma210; RV64-NEXT: vcompress.vm v8, v16, v0211; RV64-NEXT: vcpop.m a4, v0212; RV64-NEXT: vsetvli zero, a4, e8, m8, ta, ma213; RV64-NEXT: vse8.v v8, (a0)214; RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma215; RV64-NEXT: vcpop.m a2, v7216; RV64-NEXT: cpop a3, a3217; RV64-NEXT: cpop a1, a1218; RV64-NEXT: add a0, a0, a3219; RV64-NEXT: vcompress.vm v8, v24, v7220; RV64-NEXT: add a0, a0, a1221; RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma222; RV64-NEXT: vse8.v v8, (a0)223; RV64-NEXT: ret224;225; RV32-LABEL: test_compresstore_v256i8:226; RV32: # %bb.0: # %entry227; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma228; RV32-NEXT: vmv1r.v v7, v8229; RV32-NEXT: li a2, 128230; RV32-NEXT: vslidedown.vi v8, v0, 1231; RV32-NEXT: li a3, 32232; RV32-NEXT: vmv.x.s a4, v0233; RV32-NEXT: vsetvli zero, a2, e8, m8, ta, ma234; RV32-NEXT: vle8.v v24, (a1)235; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma236; RV32-NEXT: vsrl.vx v6, v8, a3237; RV32-NEXT: vmv.x.s a1, v8238; RV32-NEXT: vsrl.vx v5, v0, a3239; RV32-NEXT: vsetvli zero, a2, e8, m8, ta, ma240; RV32-NEXT: vcompress.vm v8, v16, v0241; RV32-NEXT: vcpop.m a3, v0242; RV32-NEXT: cpop a4, a4243; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma244; RV32-NEXT: vmv.x.s a5, v6245; RV32-NEXT: vmv.x.s a6, v5246; RV32-NEXT: vsetvli zero, a3, e8, m8, ta, ma247; RV32-NEXT: vse8.v v8, (a0)248; RV32-NEXT: cpop a1, a1249; RV32-NEXT: cpop a3, a6250; RV32-NEXT: cpop a5, a5251; RV32-NEXT: add a3, a4, a3252; RV32-NEXT: add a1, a1, a5253; RV32-NEXT: add a1, a3, a1254; RV32-NEXT: vsetvli zero, a2, e8, m8, ta, ma255; RV32-NEXT: vcompress.vm v8, v24, v7256; RV32-NEXT: add a0, a0, a1257; RV32-NEXT: vcpop.m a1, v7258; RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma259; RV32-NEXT: vse8.v v8, (a0)260; RV32-NEXT: ret261entry:262 tail call void @llvm.masked.compressstore.v256i8(<256 x i8> %data, ptr align 1 %p, <256 x i1> %mask)263 ret void264}265 266; Compress + store for i16 type267 268define void @test_compresstore_v1i16(ptr %p, <1 x i1> %mask, <1 x i16> %data) {269; RV64-LABEL: test_compresstore_v1i16:270; RV64: # %bb.0: # %entry271; RV64-NEXT: vsetivli zero, 1, e16, mf4, ta, ma272; RV64-NEXT: vcompress.vm v9, v8, v0273; RV64-NEXT: vcpop.m a1, v0274; RV64-NEXT: vsetvli zero, a1, e16, mf4, ta, ma275; RV64-NEXT: vse16.v v9, (a0)276; RV64-NEXT: ret277;278; RV32-LABEL: test_compresstore_v1i16:279; RV32: # %bb.0: # %entry280; RV32-NEXT: vsetivli zero, 1, e16, mf4, ta, ma281; RV32-NEXT: vcompress.vm v9, v8, v0282; RV32-NEXT: vcpop.m a1, v0283; RV32-NEXT: vsetvli zero, a1, e16, mf4, ta, ma284; RV32-NEXT: vse16.v v9, (a0)285; RV32-NEXT: ret286entry:287 tail call void @llvm.masked.compressstore.v1i16(<1 x i16> %data, ptr align 2 %p, <1 x i1> %mask)288 ret void289}290 291define void @test_compresstore_v2i16(ptr %p, <2 x i1> %mask, <2 x i16> %data) {292; RV64-LABEL: test_compresstore_v2i16:293; RV64: # %bb.0: # %entry294; RV64-NEXT: vsetivli zero, 2, e16, mf4, ta, ma295; RV64-NEXT: vcompress.vm v9, v8, v0296; RV64-NEXT: vcpop.m a1, v0297; RV64-NEXT: vsetvli zero, a1, e16, mf4, ta, ma298; RV64-NEXT: vse16.v v9, (a0)299; RV64-NEXT: ret300;301; RV32-LABEL: test_compresstore_v2i16:302; RV32: # %bb.0: # %entry303; RV32-NEXT: vsetivli zero, 2, e16, mf4, ta, ma304; RV32-NEXT: vcompress.vm v9, v8, v0305; RV32-NEXT: vcpop.m a1, v0306; RV32-NEXT: vsetvli zero, a1, e16, mf4, ta, ma307; RV32-NEXT: vse16.v v9, (a0)308; RV32-NEXT: ret309entry:310 tail call void @llvm.masked.compressstore.v2i16(<2 x i16> %data, ptr align 2 %p, <2 x i1> %mask)311 ret void312}313 314define void @test_compresstore_v4i16(ptr %p, <4 x i1> %mask, <4 x i16> %data) {315; RV64-LABEL: test_compresstore_v4i16:316; RV64: # %bb.0: # %entry317; RV64-NEXT: vsetivli zero, 4, e16, mf2, ta, ma318; RV64-NEXT: vcompress.vm v9, v8, v0319; RV64-NEXT: vcpop.m a1, v0320; RV64-NEXT: vsetvli zero, a1, e16, mf2, ta, ma321; RV64-NEXT: vse16.v v9, (a0)322; RV64-NEXT: ret323;324; RV32-LABEL: test_compresstore_v4i16:325; RV32: # %bb.0: # %entry326; RV32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma327; RV32-NEXT: vcompress.vm v9, v8, v0328; RV32-NEXT: vcpop.m a1, v0329; RV32-NEXT: vsetvli zero, a1, e16, mf2, ta, ma330; RV32-NEXT: vse16.v v9, (a0)331; RV32-NEXT: ret332entry:333 tail call void @llvm.masked.compressstore.v4i16(<4 x i16> %data, ptr align 2 %p, <4 x i1> %mask)334 ret void335}336 337define void @test_compresstore_v8i16(ptr %p, <8 x i1> %mask, <8 x i16> %data) {338; RV64-LABEL: test_compresstore_v8i16:339; RV64: # %bb.0: # %entry340; RV64-NEXT: vsetivli zero, 8, e16, m1, ta, ma341; RV64-NEXT: vcompress.vm v9, v8, v0342; RV64-NEXT: vcpop.m a1, v0343; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma344; RV64-NEXT: vse16.v v9, (a0)345; RV64-NEXT: ret346;347; RV32-LABEL: test_compresstore_v8i16:348; RV32: # %bb.0: # %entry349; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma350; RV32-NEXT: vcompress.vm v9, v8, v0351; RV32-NEXT: vcpop.m a1, v0352; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma353; RV32-NEXT: vse16.v v9, (a0)354; RV32-NEXT: ret355entry:356 tail call void @llvm.masked.compressstore.v8i16(<8 x i16> %data, ptr align 2 %p, <8 x i1> %mask)357 ret void358}359 360define void @test_compresstore_v16i16(ptr %p, <16 x i1> %mask, <16 x i16> %data) {361; RV64-LABEL: test_compresstore_v16i16:362; RV64: # %bb.0: # %entry363; RV64-NEXT: vsetivli zero, 16, e16, m2, ta, ma364; RV64-NEXT: vcompress.vm v10, v8, v0365; RV64-NEXT: vcpop.m a1, v0366; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, ma367; RV64-NEXT: vse16.v v10, (a0)368; RV64-NEXT: ret369;370; RV32-LABEL: test_compresstore_v16i16:371; RV32: # %bb.0: # %entry372; RV32-NEXT: vsetivli zero, 16, e16, m2, ta, ma373; RV32-NEXT: vcompress.vm v10, v8, v0374; RV32-NEXT: vcpop.m a1, v0375; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, ma376; RV32-NEXT: vse16.v v10, (a0)377; RV32-NEXT: ret378entry:379 tail call void @llvm.masked.compressstore.v16i16(<16 x i16> %data, ptr align 2 %p, <16 x i1> %mask)380 ret void381}382 383define void @test_compresstore_v32i16(ptr %p, <32 x i1> %mask, <32 x i16> %data) {384; RV64-LABEL: test_compresstore_v32i16:385; RV64: # %bb.0: # %entry386; RV64-NEXT: li a1, 32387; RV64-NEXT: vsetvli zero, a1, e16, m4, ta, ma388; RV64-NEXT: vcompress.vm v12, v8, v0389; RV64-NEXT: vcpop.m a1, v0390; RV64-NEXT: vsetvli zero, a1, e16, m4, ta, ma391; RV64-NEXT: vse16.v v12, (a0)392; RV64-NEXT: ret393;394; RV32-LABEL: test_compresstore_v32i16:395; RV32: # %bb.0: # %entry396; RV32-NEXT: li a1, 32397; RV32-NEXT: vsetvli zero, a1, e16, m4, ta, ma398; RV32-NEXT: vcompress.vm v12, v8, v0399; RV32-NEXT: vcpop.m a1, v0400; RV32-NEXT: vsetvli zero, a1, e16, m4, ta, ma401; RV32-NEXT: vse16.v v12, (a0)402; RV32-NEXT: ret403entry:404 tail call void @llvm.masked.compressstore.v32i16(<32 x i16> %data, ptr align 2 %p, <32 x i1> %mask)405 ret void406}407 408define void @test_compresstore_v64i16(ptr %p, <64 x i1> %mask, <64 x i16> %data) {409; RV64-LABEL: test_compresstore_v64i16:410; RV64: # %bb.0: # %entry411; RV64-NEXT: li a1, 64412; RV64-NEXT: vsetvli zero, a1, e16, m8, ta, ma413; RV64-NEXT: vcompress.vm v16, v8, v0414; RV64-NEXT: vcpop.m a1, v0415; RV64-NEXT: vsetvli zero, a1, e16, m8, ta, ma416; RV64-NEXT: vse16.v v16, (a0)417; RV64-NEXT: ret418;419; RV32-LABEL: test_compresstore_v64i16:420; RV32: # %bb.0: # %entry421; RV32-NEXT: li a1, 64422; RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma423; RV32-NEXT: vcompress.vm v16, v8, v0424; RV32-NEXT: vcpop.m a1, v0425; RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma426; RV32-NEXT: vse16.v v16, (a0)427; RV32-NEXT: ret428entry:429 tail call void @llvm.masked.compressstore.v64i16(<64 x i16> %data, ptr align 2 %p, <64 x i1> %mask)430 ret void431}432 433define void @test_compresstore_v128i16(ptr %p, <128 x i1> %mask, <128 x i16> %data) {434; RV64-LABEL: test_compresstore_v128i16:435; RV64: # %bb.0: # %entry436; RV64-NEXT: li a1, 64437; RV64-NEXT: vsetvli zero, a1, e16, m8, ta, ma438; RV64-NEXT: vcompress.vm v24, v8, v0439; RV64-NEXT: vcpop.m a2, v0440; RV64-NEXT: vsetivli zero, 8, e8, m1, ta, ma441; RV64-NEXT: vslidedown.vi v7, v0, 8442; RV64-NEXT: vsetvli zero, a1, e16, m8, ta, ma443; RV64-NEXT: vcompress.vm v8, v16, v7444; RV64-NEXT: vcpop.m a1, v7445; RV64-NEXT: vsetvli zero, a2, e16, m8, ta, ma446; RV64-NEXT: vse16.v v24, (a0)447; RV64-NEXT: slli a2, a2, 1448; RV64-NEXT: add a0, a0, a2449; RV64-NEXT: vsetvli zero, a1, e16, m8, ta, ma450; RV64-NEXT: vse16.v v8, (a0)451; RV64-NEXT: ret452;453; RV32-LABEL: test_compresstore_v128i16:454; RV32: # %bb.0: # %entry455; RV32-NEXT: li a1, 64456; RV32-NEXT: vsetivli zero, 8, e8, m1, ta, ma457; RV32-NEXT: vslidedown.vi v7, v0, 8458; RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma459; RV32-NEXT: vcompress.vm v24, v16, v7460; RV32-NEXT: vcpop.m a2, v7461; RV32-NEXT: li a3, 32462; RV32-NEXT: vsetvli zero, a1, e64, m1, ta, ma463; RV32-NEXT: vmv.x.s a4, v0464; RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma465; RV32-NEXT: vcompress.vm v16, v8, v0466; RV32-NEXT: vcpop.m a1, v0467; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma468; RV32-NEXT: vsrl.vx v8, v0, a3469; RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma470; RV32-NEXT: vse16.v v16, (a0)471; RV32-NEXT: vsetvli zero, a1, e64, m1, ta, ma472; RV32-NEXT: vmv.x.s a1, v8473; RV32-NEXT: cpop a1, a1474; RV32-NEXT: cpop a3, a4475; RV32-NEXT: add a1, a3, a1476; RV32-NEXT: slli a1, a1, 1477; RV32-NEXT: add a0, a0, a1478; RV32-NEXT: vsetvli zero, a2, e16, m8, ta, ma479; RV32-NEXT: vse16.v v24, (a0)480; RV32-NEXT: ret481entry:482 tail call void @llvm.masked.compressstore.v128i16(<128 x i16> %data, ptr align 2 %p, <128 x i1> %mask)483 ret void484}485 486; Compress + store for i32 type487 488define void @test_compresstore_v1i32(ptr %p, <1 x i1> %mask, <1 x i32> %data) {489; RV64-LABEL: test_compresstore_v1i32:490; RV64: # %bb.0: # %entry491; RV64-NEXT: vsetivli zero, 1, e32, mf2, ta, ma492; RV64-NEXT: vcompress.vm v9, v8, v0493; RV64-NEXT: vcpop.m a1, v0494; RV64-NEXT: vsetvli zero, a1, e32, mf2, ta, ma495; RV64-NEXT: vse32.v v9, (a0)496; RV64-NEXT: ret497;498; RV32-LABEL: test_compresstore_v1i32:499; RV32: # %bb.0: # %entry500; RV32-NEXT: vsetivli zero, 1, e32, mf2, ta, ma501; RV32-NEXT: vcompress.vm v9, v8, v0502; RV32-NEXT: vcpop.m a1, v0503; RV32-NEXT: vsetvli zero, a1, e32, mf2, ta, ma504; RV32-NEXT: vse32.v v9, (a0)505; RV32-NEXT: ret506entry:507 tail call void @llvm.masked.compressstore.v1i32(<1 x i32> %data, ptr align 4 %p, <1 x i1> %mask)508 ret void509}510 511define void @test_compresstore_v2i32(ptr %p, <2 x i1> %mask, <2 x i32> %data) {512; RV64-LABEL: test_compresstore_v2i32:513; RV64: # %bb.0: # %entry514; RV64-NEXT: vsetivli zero, 2, e32, mf2, ta, ma515; RV64-NEXT: vcompress.vm v9, v8, v0516; RV64-NEXT: vcpop.m a1, v0517; RV64-NEXT: vsetvli zero, a1, e32, mf2, ta, ma518; RV64-NEXT: vse32.v v9, (a0)519; RV64-NEXT: ret520;521; RV32-LABEL: test_compresstore_v2i32:522; RV32: # %bb.0: # %entry523; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma524; RV32-NEXT: vcompress.vm v9, v8, v0525; RV32-NEXT: vcpop.m a1, v0526; RV32-NEXT: vsetvli zero, a1, e32, mf2, ta, ma527; RV32-NEXT: vse32.v v9, (a0)528; RV32-NEXT: ret529entry:530 tail call void @llvm.masked.compressstore.v2i32(<2 x i32> %data, ptr align 4 %p, <2 x i1> %mask)531 ret void532}533 534define void @test_compresstore_v4i32(ptr %p, <4 x i1> %mask, <4 x i32> %data) {535; RV64-LABEL: test_compresstore_v4i32:536; RV64: # %bb.0: # %entry537; RV64-NEXT: vsetivli zero, 4, e32, m1, ta, ma538; RV64-NEXT: vcompress.vm v9, v8, v0539; RV64-NEXT: vcpop.m a1, v0540; RV64-NEXT: vsetvli zero, a1, e32, m1, ta, ma541; RV64-NEXT: vse32.v v9, (a0)542; RV64-NEXT: ret543;544; RV32-LABEL: test_compresstore_v4i32:545; RV32: # %bb.0: # %entry546; RV32-NEXT: vsetivli zero, 4, e32, m1, ta, ma547; RV32-NEXT: vcompress.vm v9, v8, v0548; RV32-NEXT: vcpop.m a1, v0549; RV32-NEXT: vsetvli zero, a1, e32, m1, ta, ma550; RV32-NEXT: vse32.v v9, (a0)551; RV32-NEXT: ret552entry:553 tail call void @llvm.masked.compressstore.v4i32(<4 x i32> %data, ptr align 4 %p, <4 x i1> %mask)554 ret void555}556 557define void @test_compresstore_v8i32(ptr %p, <8 x i1> %mask, <8 x i32> %data) {558; RV64-LABEL: test_compresstore_v8i32:559; RV64: # %bb.0: # %entry560; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma561; RV64-NEXT: vcompress.vm v10, v8, v0562; RV64-NEXT: vcpop.m a1, v0563; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma564; RV64-NEXT: vse32.v v10, (a0)565; RV64-NEXT: ret566;567; RV32-LABEL: test_compresstore_v8i32:568; RV32: # %bb.0: # %entry569; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma570; RV32-NEXT: vcompress.vm v10, v8, v0571; RV32-NEXT: vcpop.m a1, v0572; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma573; RV32-NEXT: vse32.v v10, (a0)574; RV32-NEXT: ret575entry:576 tail call void @llvm.masked.compressstore.v8i32(<8 x i32> %data, ptr align 4 %p, <8 x i1> %mask)577 ret void578}579 580define void @test_compresstore_v16i32(ptr %p, <16 x i1> %mask, <16 x i32> %data) {581; RV64-LABEL: test_compresstore_v16i32:582; RV64: # %bb.0: # %entry583; RV64-NEXT: vsetivli zero, 16, e32, m4, ta, ma584; RV64-NEXT: vcompress.vm v12, v8, v0585; RV64-NEXT: vcpop.m a1, v0586; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, ma587; RV64-NEXT: vse32.v v12, (a0)588; RV64-NEXT: ret589;590; RV32-LABEL: test_compresstore_v16i32:591; RV32: # %bb.0: # %entry592; RV32-NEXT: vsetivli zero, 16, e32, m4, ta, ma593; RV32-NEXT: vcompress.vm v12, v8, v0594; RV32-NEXT: vcpop.m a1, v0595; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, ma596; RV32-NEXT: vse32.v v12, (a0)597; RV32-NEXT: ret598entry:599 tail call void @llvm.masked.compressstore.v16i32(<16 x i32> %data, ptr align 4 %p, <16 x i1> %mask)600 ret void601}602 603define void @test_compresstore_v32i32(ptr %p, <32 x i1> %mask, <32 x i32> %data) {604; RV64-LABEL: test_compresstore_v32i32:605; RV64: # %bb.0: # %entry606; RV64-NEXT: li a1, 32607; RV64-NEXT: vsetvli zero, a1, e32, m8, ta, ma608; RV64-NEXT: vcompress.vm v16, v8, v0609; RV64-NEXT: vcpop.m a1, v0610; RV64-NEXT: vsetvli zero, a1, e32, m8, ta, ma611; RV64-NEXT: vse32.v v16, (a0)612; RV64-NEXT: ret613;614; RV32-LABEL: test_compresstore_v32i32:615; RV32: # %bb.0: # %entry616; RV32-NEXT: li a1, 32617; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma618; RV32-NEXT: vcompress.vm v16, v8, v0619; RV32-NEXT: vcpop.m a1, v0620; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma621; RV32-NEXT: vse32.v v16, (a0)622; RV32-NEXT: ret623entry:624 tail call void @llvm.masked.compressstore.v32i32(<32 x i32> %data, ptr align 4 %p, <32 x i1> %mask)625 ret void626}627 628define void @test_compresstore_v64i32(ptr %p, <64 x i1> %mask, <64 x i32> %data) {629; RV64-LABEL: test_compresstore_v64i32:630; RV64: # %bb.0: # %entry631; RV64-NEXT: li a1, 32632; RV64-NEXT: vsetvli zero, a1, e32, m8, ta, ma633; RV64-NEXT: vcompress.vm v24, v8, v0634; RV64-NEXT: vcpop.m a2, v0635; RV64-NEXT: vsetvli zero, a2, e32, m8, ta, ma636; RV64-NEXT: vse32.v v24, (a0)637; RV64-NEXT: vsetivli zero, 4, e8, mf2, ta, ma638; RV64-NEXT: vslidedown.vi v24, v0, 4639; RV64-NEXT: vsetvli zero, a1, e32, m8, ta, ma640; RV64-NEXT: vmv.x.s a1, v0641; RV64-NEXT: vcompress.vm v8, v16, v24642; RV64-NEXT: vcpop.m a2, v24643; RV64-NEXT: cpopw a1, a1644; RV64-NEXT: slli a1, a1, 2645; RV64-NEXT: add a0, a0, a1646; RV64-NEXT: vsetvli zero, a2, e32, m8, ta, ma647; RV64-NEXT: vse32.v v8, (a0)648; RV64-NEXT: ret649;650; RV32-LABEL: test_compresstore_v64i32:651; RV32: # %bb.0: # %entry652; RV32-NEXT: li a1, 32653; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma654; RV32-NEXT: vcompress.vm v24, v8, v0655; RV32-NEXT: vcpop.m a2, v0656; RV32-NEXT: vsetivli zero, 4, e8, mf2, ta, ma657; RV32-NEXT: vslidedown.vi v7, v0, 4658; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma659; RV32-NEXT: vcompress.vm v8, v16, v7660; RV32-NEXT: vcpop.m a1, v7661; RV32-NEXT: vsetvli zero, a2, e32, m8, ta, ma662; RV32-NEXT: vse32.v v24, (a0)663; RV32-NEXT: slli a2, a2, 2664; RV32-NEXT: add a0, a0, a2665; RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma666; RV32-NEXT: vse32.v v8, (a0)667; RV32-NEXT: ret668entry:669 tail call void @llvm.masked.compressstore.v64i32(<64 x i32> %data, ptr align 4 %p, <64 x i1> %mask)670 ret void671}672 673; Compress + store for i64 type674 675define void @test_compresstore_v1i64(ptr %p, <1 x i1> %mask, <1 x i64> %data) {676; RV64-LABEL: test_compresstore_v1i64:677; RV64: # %bb.0: # %entry678; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma679; RV64-NEXT: vcompress.vm v9, v8, v0680; RV64-NEXT: vcpop.m a1, v0681; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma682; RV64-NEXT: vse64.v v9, (a0)683; RV64-NEXT: ret684;685; RV32-LABEL: test_compresstore_v1i64:686; RV32: # %bb.0: # %entry687; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma688; RV32-NEXT: vcompress.vm v9, v8, v0689; RV32-NEXT: vcpop.m a1, v0690; RV32-NEXT: vsetvli zero, a1, e64, m1, ta, ma691; RV32-NEXT: vse64.v v9, (a0)692; RV32-NEXT: ret693entry:694 tail call void @llvm.masked.compressstore.v1i64(<1 x i64> %data, ptr align 8 %p, <1 x i1> %mask)695 ret void696}697 698define void @test_compresstore_v2i64(ptr %p, <2 x i1> %mask, <2 x i64> %data) {699; RV64-LABEL: test_compresstore_v2i64:700; RV64: # %bb.0: # %entry701; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma702; RV64-NEXT: vcompress.vm v9, v8, v0703; RV64-NEXT: vcpop.m a1, v0704; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma705; RV64-NEXT: vse64.v v9, (a0)706; RV64-NEXT: ret707;708; RV32-LABEL: test_compresstore_v2i64:709; RV32: # %bb.0: # %entry710; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma711; RV32-NEXT: vcompress.vm v9, v8, v0712; RV32-NEXT: vcpop.m a1, v0713; RV32-NEXT: vsetvli zero, a1, e64, m1, ta, ma714; RV32-NEXT: vse64.v v9, (a0)715; RV32-NEXT: ret716entry:717 tail call void @llvm.masked.compressstore.v2i64(<2 x i64> %data, ptr align 8 %p, <2 x i1> %mask)718 ret void719}720 721define void @test_compresstore_v4i64(ptr %p, <4 x i1> %mask, <4 x i64> %data) {722; RV64-LABEL: test_compresstore_v4i64:723; RV64: # %bb.0: # %entry724; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma725; RV64-NEXT: vcompress.vm v10, v8, v0726; RV64-NEXT: vcpop.m a1, v0727; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma728; RV64-NEXT: vse64.v v10, (a0)729; RV64-NEXT: ret730;731; RV32-LABEL: test_compresstore_v4i64:732; RV32: # %bb.0: # %entry733; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma734; RV32-NEXT: vcompress.vm v10, v8, v0735; RV32-NEXT: vcpop.m a1, v0736; RV32-NEXT: vsetvli zero, a1, e64, m2, ta, ma737; RV32-NEXT: vse64.v v10, (a0)738; RV32-NEXT: ret739entry:740 tail call void @llvm.masked.compressstore.v4i64(<4 x i64> %data, ptr align 8 %p, <4 x i1> %mask)741 ret void742}743 744define void @test_compresstore_v8i64(ptr %p, <8 x i1> %mask, <8 x i64> %data) {745; RV64-LABEL: test_compresstore_v8i64:746; RV64: # %bb.0: # %entry747; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma748; RV64-NEXT: vcompress.vm v12, v8, v0749; RV64-NEXT: vcpop.m a1, v0750; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma751; RV64-NEXT: vse64.v v12, (a0)752; RV64-NEXT: ret753;754; RV32-LABEL: test_compresstore_v8i64:755; RV32: # %bb.0: # %entry756; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma757; RV32-NEXT: vcompress.vm v12, v8, v0758; RV32-NEXT: vcpop.m a1, v0759; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma760; RV32-NEXT: vse64.v v12, (a0)761; RV32-NEXT: ret762entry:763 tail call void @llvm.masked.compressstore.v8i64(<8 x i64> %data, ptr align 8 %p, <8 x i1> %mask)764 ret void765}766 767define void @test_compresstore_v16i64(ptr %p, <16 x i1> %mask, <16 x i64> %data) {768; RV64-LABEL: test_compresstore_v16i64:769; RV64: # %bb.0: # %entry770; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma771; RV64-NEXT: vcompress.vm v16, v8, v0772; RV64-NEXT: vcpop.m a1, v0773; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma774; RV64-NEXT: vse64.v v16, (a0)775; RV64-NEXT: ret776;777; RV32-LABEL: test_compresstore_v16i64:778; RV32: # %bb.0: # %entry779; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma780; RV32-NEXT: vcompress.vm v16, v8, v0781; RV32-NEXT: vcpop.m a1, v0782; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma783; RV32-NEXT: vse64.v v16, (a0)784; RV32-NEXT: ret785entry:786 tail call void @llvm.masked.compressstore.v16i64(<16 x i64> %data, ptr align 8 %p, <16 x i1> %mask)787 ret void788}789 790define void @test_compresstore_v32i64(ptr %p, <32 x i1> %mask, <32 x i64> %data) {791; RV64-LABEL: test_compresstore_v32i64:792; RV64: # %bb.0: # %entry793; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma794; RV64-NEXT: vcompress.vm v24, v8, v0795; RV64-NEXT: vcpop.m a1, v0796; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma797; RV64-NEXT: vse64.v v24, (a0)798; RV64-NEXT: vsetivli zero, 2, e8, mf4, ta, ma799; RV64-NEXT: vslidedown.vi v24, v0, 2800; RV64-NEXT: vsetvli zero, zero, e16, mf2, ta, ma801; RV64-NEXT: vmv.x.s a1, v0802; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma803; RV64-NEXT: vcompress.vm v8, v16, v24804; RV64-NEXT: zext.h a1, a1805; RV64-NEXT: cpopw a1, a1806; RV64-NEXT: slli a1, a1, 3807; RV64-NEXT: add a0, a0, a1808; RV64-NEXT: vcpop.m a1, v24809; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma810; RV64-NEXT: vse64.v v8, (a0)811; RV64-NEXT: ret812;813; RV32-LABEL: test_compresstore_v32i64:814; RV32: # %bb.0: # %entry815; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma816; RV32-NEXT: vcompress.vm v24, v8, v0817; RV32-NEXT: vcpop.m a1, v0818; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma819; RV32-NEXT: vse64.v v24, (a0)820; RV32-NEXT: vsetivli zero, 2, e8, mf4, ta, ma821; RV32-NEXT: vslidedown.vi v24, v0, 2822; RV32-NEXT: vsetvli zero, zero, e16, mf2, ta, ma823; RV32-NEXT: vmv.x.s a1, v0824; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma825; RV32-NEXT: vcompress.vm v8, v16, v24826; RV32-NEXT: zext.h a1, a1827; RV32-NEXT: cpop a1, a1828; RV32-NEXT: slli a1, a1, 3829; RV32-NEXT: add a0, a0, a1830; RV32-NEXT: vcpop.m a1, v24831; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma832; RV32-NEXT: vse64.v v8, (a0)833; RV32-NEXT: ret834entry:835 tail call void @llvm.masked.compressstore.v32i64(<32 x i64> %data, ptr align 8 %p, <32 x i1> %mask)836 ret void837}838 839