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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+m -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+m -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV646; RUN: llc -mtriple=riscv32 -mattr=+v,+zvbb,+m -target-abi=ilp32d \7; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVBB8; RUN: llc -mtriple=riscv64 -mattr=+v,+zvbb,+m -target-abi=lp64d \9; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVBB10 11define <vscale x 1 x i8> @vp_ctlz_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {12; CHECK-LABEL: vp_ctlz_nxv1i8:13; CHECK: # %bb.0:14; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma15; CHECK-NEXT: vzext.vf2 v9, v8, v0.t16; CHECK-NEXT: li a0, 13417; CHECK-NEXT: vfwcvt.f.xu.v v8, v9, v0.t18; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma19; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t20; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma21; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t22; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma23; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t24; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t25; CHECK-NEXT: li a0, 826; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t27; CHECK-NEXT: ret28;29; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i8:30; CHECK-ZVBB: # %bb.0:31; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf8, ta, ma32; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t33; CHECK-ZVBB-NEXT: ret34 %v = call <vscale x 1 x i8> @llvm.vp.ctlz.nxv1i8(<vscale x 1 x i8> %va, i1 false, <vscale x 1 x i1> %m, i32 %evl)35 ret <vscale x 1 x i8> %v36}37 38define <vscale x 1 x i8> @vp_ctlz_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {39; CHECK-LABEL: vp_ctlz_nxv1i8_unmasked:40; CHECK: # %bb.0:41; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma42; CHECK-NEXT: vzext.vf2 v9, v843; CHECK-NEXT: li a0, 13444; CHECK-NEXT: vfwcvt.f.xu.v v8, v945; CHECK-NEXT: vnsrl.wi v8, v8, 2346; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma47; CHECK-NEXT: vnsrl.wi v8, v8, 048; CHECK-NEXT: vrsub.vx v8, v8, a049; CHECK-NEXT: li a0, 850; CHECK-NEXT: vminu.vx v8, v8, a051; CHECK-NEXT: ret52;53; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i8_unmasked:54; CHECK-ZVBB: # %bb.0:55; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf8, ta, ma56; CHECK-ZVBB-NEXT: vclz.v v8, v857; CHECK-ZVBB-NEXT: ret58 %v = call <vscale x 1 x i8> @llvm.vp.ctlz.nxv1i8(<vscale x 1 x i8> %va, i1 false, <vscale x 1 x i1> splat (i1 true), i32 %evl)59 ret <vscale x 1 x i8> %v60}61 62define <vscale x 2 x i8> @vp_ctlz_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {63; CHECK-LABEL: vp_ctlz_nxv2i8:64; CHECK: # %bb.0:65; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma66; CHECK-NEXT: vzext.vf2 v9, v8, v0.t67; CHECK-NEXT: li a0, 13468; CHECK-NEXT: vfwcvt.f.xu.v v8, v9, v0.t69; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma70; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t71; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma72; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t73; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma74; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t75; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t76; CHECK-NEXT: li a0, 877; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t78; CHECK-NEXT: ret79;80; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i8:81; CHECK-ZVBB: # %bb.0:82; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf4, ta, ma83; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t84; CHECK-ZVBB-NEXT: ret85 %v = call <vscale x 2 x i8> @llvm.vp.ctlz.nxv2i8(<vscale x 2 x i8> %va, i1 false, <vscale x 2 x i1> %m, i32 %evl)86 ret <vscale x 2 x i8> %v87}88 89define <vscale x 2 x i8> @vp_ctlz_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {90; CHECK-LABEL: vp_ctlz_nxv2i8_unmasked:91; CHECK: # %bb.0:92; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma93; CHECK-NEXT: vzext.vf2 v9, v894; CHECK-NEXT: li a0, 13495; CHECK-NEXT: vfwcvt.f.xu.v v8, v996; CHECK-NEXT: vnsrl.wi v8, v8, 2397; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma98; CHECK-NEXT: vnsrl.wi v8, v8, 099; CHECK-NEXT: vrsub.vx v8, v8, a0100; CHECK-NEXT: li a0, 8101; CHECK-NEXT: vminu.vx v8, v8, a0102; CHECK-NEXT: ret103;104; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i8_unmasked:105; CHECK-ZVBB: # %bb.0:106; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf4, ta, ma107; CHECK-ZVBB-NEXT: vclz.v v8, v8108; CHECK-ZVBB-NEXT: ret109 %v = call <vscale x 2 x i8> @llvm.vp.ctlz.nxv2i8(<vscale x 2 x i8> %va, i1 false, <vscale x 2 x i1> splat (i1 true), i32 %evl)110 ret <vscale x 2 x i8> %v111}112 113define <vscale x 4 x i8> @vp_ctlz_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {114; CHECK-LABEL: vp_ctlz_nxv4i8:115; CHECK: # %bb.0:116; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma117; CHECK-NEXT: vzext.vf2 v10, v8, v0.t118; CHECK-NEXT: li a0, 134119; CHECK-NEXT: vfwcvt.f.xu.v v8, v10, v0.t120; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma121; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t122; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma123; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t124; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma125; CHECK-NEXT: vnsrl.wi v8, v10, 0, v0.t126; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t127; CHECK-NEXT: li a0, 8128; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t129; CHECK-NEXT: ret130;131; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i8:132; CHECK-ZVBB: # %bb.0:133; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf2, ta, ma134; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t135; CHECK-ZVBB-NEXT: ret136 %v = call <vscale x 4 x i8> @llvm.vp.ctlz.nxv4i8(<vscale x 4 x i8> %va, i1 false, <vscale x 4 x i1> %m, i32 %evl)137 ret <vscale x 4 x i8> %v138}139 140define <vscale x 4 x i8> @vp_ctlz_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {141; CHECK-LABEL: vp_ctlz_nxv4i8_unmasked:142; CHECK: # %bb.0:143; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma144; CHECK-NEXT: vzext.vf2 v10, v8145; CHECK-NEXT: li a0, 134146; CHECK-NEXT: vfwcvt.f.xu.v v8, v10147; CHECK-NEXT: vnsrl.wi v10, v8, 23148; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma149; CHECK-NEXT: vnsrl.wi v8, v10, 0150; CHECK-NEXT: vrsub.vx v8, v8, a0151; CHECK-NEXT: li a0, 8152; CHECK-NEXT: vminu.vx v8, v8, a0153; CHECK-NEXT: ret154;155; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i8_unmasked:156; CHECK-ZVBB: # %bb.0:157; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf2, ta, ma158; CHECK-ZVBB-NEXT: vclz.v v8, v8159; CHECK-ZVBB-NEXT: ret160 %v = call <vscale x 4 x i8> @llvm.vp.ctlz.nxv4i8(<vscale x 4 x i8> %va, i1 false, <vscale x 4 x i1> splat (i1 true), i32 %evl)161 ret <vscale x 4 x i8> %v162}163 164define <vscale x 8 x i8> @vp_ctlz_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {165; CHECK-LABEL: vp_ctlz_nxv8i8:166; CHECK: # %bb.0:167; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma168; CHECK-NEXT: vzext.vf2 v12, v8, v0.t169; CHECK-NEXT: li a0, 134170; CHECK-NEXT: vfwcvt.f.xu.v v8, v12, v0.t171; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma172; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t173; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma174; CHECK-NEXT: vnsrl.wi v12, v8, 0, v0.t175; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma176; CHECK-NEXT: vnsrl.wi v8, v12, 0, v0.t177; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t178; CHECK-NEXT: li a0, 8179; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t180; CHECK-NEXT: ret181;182; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i8:183; CHECK-ZVBB: # %bb.0:184; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m1, ta, ma185; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t186; CHECK-ZVBB-NEXT: ret187 %v = call <vscale x 8 x i8> @llvm.vp.ctlz.nxv8i8(<vscale x 8 x i8> %va, i1 false, <vscale x 8 x i1> %m, i32 %evl)188 ret <vscale x 8 x i8> %v189}190 191define <vscale x 8 x i8> @vp_ctlz_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {192; CHECK-LABEL: vp_ctlz_nxv8i8_unmasked:193; CHECK: # %bb.0:194; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma195; CHECK-NEXT: vzext.vf2 v12, v8196; CHECK-NEXT: li a0, 134197; CHECK-NEXT: vfwcvt.f.xu.v v8, v12198; CHECK-NEXT: vnsrl.wi v12, v8, 23199; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma200; CHECK-NEXT: vnsrl.wi v8, v12, 0201; CHECK-NEXT: vrsub.vx v8, v8, a0202; CHECK-NEXT: li a0, 8203; CHECK-NEXT: vminu.vx v8, v8, a0204; CHECK-NEXT: ret205;206; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i8_unmasked:207; CHECK-ZVBB: # %bb.0:208; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m1, ta, ma209; CHECK-ZVBB-NEXT: vclz.v v8, v8210; CHECK-ZVBB-NEXT: ret211 %v = call <vscale x 8 x i8> @llvm.vp.ctlz.nxv8i8(<vscale x 8 x i8> %va, i1 false, <vscale x 8 x i1> splat (i1 true), i32 %evl)212 ret <vscale x 8 x i8> %v213}214 215define <vscale x 16 x i8> @vp_ctlz_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {216; CHECK-LABEL: vp_ctlz_nxv16i8:217; CHECK: # %bb.0:218; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma219; CHECK-NEXT: vzext.vf2 v16, v8, v0.t220; CHECK-NEXT: li a0, 134221; CHECK-NEXT: vfwcvt.f.xu.v v8, v16, v0.t222; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma223; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t224; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma225; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t226; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma227; CHECK-NEXT: vnsrl.wi v8, v16, 0, v0.t228; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t229; CHECK-NEXT: li a0, 8230; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t231; CHECK-NEXT: ret232;233; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i8:234; CHECK-ZVBB: # %bb.0:235; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m2, ta, ma236; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t237; CHECK-ZVBB-NEXT: ret238 %v = call <vscale x 16 x i8> @llvm.vp.ctlz.nxv16i8(<vscale x 16 x i8> %va, i1 false, <vscale x 16 x i1> %m, i32 %evl)239 ret <vscale x 16 x i8> %v240}241 242define <vscale x 16 x i8> @vp_ctlz_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {243; CHECK-LABEL: vp_ctlz_nxv16i8_unmasked:244; CHECK: # %bb.0:245; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma246; CHECK-NEXT: vzext.vf2 v16, v8247; CHECK-NEXT: li a0, 134248; CHECK-NEXT: vfwcvt.f.xu.v v8, v16249; CHECK-NEXT: vnsrl.wi v16, v8, 23250; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma251; CHECK-NEXT: vnsrl.wi v8, v16, 0252; CHECK-NEXT: vrsub.vx v8, v8, a0253; CHECK-NEXT: li a0, 8254; CHECK-NEXT: vminu.vx v8, v8, a0255; CHECK-NEXT: ret256;257; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i8_unmasked:258; CHECK-ZVBB: # %bb.0:259; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m2, ta, ma260; CHECK-ZVBB-NEXT: vclz.v v8, v8261; CHECK-ZVBB-NEXT: ret262 %v = call <vscale x 16 x i8> @llvm.vp.ctlz.nxv16i8(<vscale x 16 x i8> %va, i1 false, <vscale x 16 x i1> splat (i1 true), i32 %evl)263 ret <vscale x 16 x i8> %v264}265 266define <vscale x 32 x i8> @vp_ctlz_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {267; CHECK-LABEL: vp_ctlz_nxv32i8:268; CHECK: # %bb.0:269; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma270; CHECK-NEXT: vsrl.vi v12, v8, 1, v0.t271; CHECK-NEXT: li a0, 85272; CHECK-NEXT: vor.vv v8, v8, v12, v0.t273; CHECK-NEXT: vsrl.vi v12, v8, 2, v0.t274; CHECK-NEXT: vor.vv v8, v8, v12, v0.t275; CHECK-NEXT: vsrl.vi v12, v8, 4, v0.t276; CHECK-NEXT: vor.vv v8, v8, v12, v0.t277; CHECK-NEXT: vnot.v v8, v8, v0.t278; CHECK-NEXT: vsrl.vi v12, v8, 1, v0.t279; CHECK-NEXT: vand.vx v12, v12, a0, v0.t280; CHECK-NEXT: li a0, 51281; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t282; CHECK-NEXT: vand.vx v12, v8, a0, v0.t283; CHECK-NEXT: vsrl.vi v8, v8, 2, v0.t284; CHECK-NEXT: vand.vx v8, v8, a0, v0.t285; CHECK-NEXT: vadd.vv v8, v12, v8, v0.t286; CHECK-NEXT: vsrl.vi v12, v8, 4, v0.t287; CHECK-NEXT: vadd.vv v8, v8, v12, v0.t288; CHECK-NEXT: vand.vi v8, v8, 15, v0.t289; CHECK-NEXT: ret290;291; CHECK-ZVBB-LABEL: vp_ctlz_nxv32i8:292; CHECK-ZVBB: # %bb.0:293; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m4, ta, ma294; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t295; CHECK-ZVBB-NEXT: ret296 %v = call <vscale x 32 x i8> @llvm.vp.ctlz.nxv32i8(<vscale x 32 x i8> %va, i1 false, <vscale x 32 x i1> %m, i32 %evl)297 ret <vscale x 32 x i8> %v298}299 300define <vscale x 32 x i8> @vp_ctlz_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {301; CHECK-LABEL: vp_ctlz_nxv32i8_unmasked:302; CHECK: # %bb.0:303; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma304; CHECK-NEXT: vsrl.vi v12, v8, 1305; CHECK-NEXT: li a0, 85306; CHECK-NEXT: vor.vv v8, v8, v12307; CHECK-NEXT: vsrl.vi v12, v8, 2308; CHECK-NEXT: vor.vv v8, v8, v12309; CHECK-NEXT: vsrl.vi v12, v8, 4310; CHECK-NEXT: vor.vv v8, v8, v12311; CHECK-NEXT: vnot.v v8, v8312; CHECK-NEXT: vsrl.vi v12, v8, 1313; CHECK-NEXT: vand.vx v12, v12, a0314; CHECK-NEXT: li a0, 51315; CHECK-NEXT: vsub.vv v8, v8, v12316; CHECK-NEXT: vand.vx v12, v8, a0317; CHECK-NEXT: vsrl.vi v8, v8, 2318; CHECK-NEXT: vand.vx v8, v8, a0319; CHECK-NEXT: vadd.vv v8, v12, v8320; CHECK-NEXT: vsrl.vi v12, v8, 4321; CHECK-NEXT: vadd.vv v8, v8, v12322; CHECK-NEXT: vand.vi v8, v8, 15323; CHECK-NEXT: ret324;325; CHECK-ZVBB-LABEL: vp_ctlz_nxv32i8_unmasked:326; CHECK-ZVBB: # %bb.0:327; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m4, ta, ma328; CHECK-ZVBB-NEXT: vclz.v v8, v8329; CHECK-ZVBB-NEXT: ret330 %v = call <vscale x 32 x i8> @llvm.vp.ctlz.nxv32i8(<vscale x 32 x i8> %va, i1 false, <vscale x 32 x i1> splat (i1 true), i32 %evl)331 ret <vscale x 32 x i8> %v332}333 334define <vscale x 64 x i8> @vp_ctlz_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {335; CHECK-LABEL: vp_ctlz_nxv64i8:336; CHECK: # %bb.0:337; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma338; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t339; CHECK-NEXT: li a0, 85340; CHECK-NEXT: vor.vv v8, v8, v16, v0.t341; CHECK-NEXT: vsrl.vi v16, v8, 2, v0.t342; CHECK-NEXT: vor.vv v8, v8, v16, v0.t343; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t344; CHECK-NEXT: vor.vv v8, v8, v16, v0.t345; CHECK-NEXT: vnot.v v8, v8, v0.t346; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t347; CHECK-NEXT: vand.vx v16, v16, a0, v0.t348; CHECK-NEXT: li a0, 51349; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t350; CHECK-NEXT: vand.vx v16, v8, a0, v0.t351; CHECK-NEXT: vsrl.vi v8, v8, 2, v0.t352; CHECK-NEXT: vand.vx v8, v8, a0, v0.t353; CHECK-NEXT: vadd.vv v8, v16, v8, v0.t354; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t355; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t356; CHECK-NEXT: vand.vi v8, v8, 15, v0.t357; CHECK-NEXT: ret358;359; CHECK-ZVBB-LABEL: vp_ctlz_nxv64i8:360; CHECK-ZVBB: # %bb.0:361; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m8, ta, ma362; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t363; CHECK-ZVBB-NEXT: ret364 %v = call <vscale x 64 x i8> @llvm.vp.ctlz.nxv64i8(<vscale x 64 x i8> %va, i1 false, <vscale x 64 x i1> %m, i32 %evl)365 ret <vscale x 64 x i8> %v366}367 368define <vscale x 64 x i8> @vp_ctlz_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {369; CHECK-LABEL: vp_ctlz_nxv64i8_unmasked:370; CHECK: # %bb.0:371; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma372; CHECK-NEXT: vsrl.vi v16, v8, 1373; CHECK-NEXT: li a0, 85374; CHECK-NEXT: vor.vv v8, v8, v16375; CHECK-NEXT: vsrl.vi v16, v8, 2376; CHECK-NEXT: vor.vv v8, v8, v16377; CHECK-NEXT: vsrl.vi v16, v8, 4378; CHECK-NEXT: vor.vv v8, v8, v16379; CHECK-NEXT: vnot.v v8, v8380; CHECK-NEXT: vsrl.vi v16, v8, 1381; CHECK-NEXT: vand.vx v16, v16, a0382; CHECK-NEXT: li a0, 51383; CHECK-NEXT: vsub.vv v8, v8, v16384; CHECK-NEXT: vand.vx v16, v8, a0385; CHECK-NEXT: vsrl.vi v8, v8, 2386; CHECK-NEXT: vand.vx v8, v8, a0387; CHECK-NEXT: vadd.vv v8, v16, v8388; CHECK-NEXT: vsrl.vi v16, v8, 4389; CHECK-NEXT: vadd.vv v8, v8, v16390; CHECK-NEXT: vand.vi v8, v8, 15391; CHECK-NEXT: ret392;393; CHECK-ZVBB-LABEL: vp_ctlz_nxv64i8_unmasked:394; CHECK-ZVBB: # %bb.0:395; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m8, ta, ma396; CHECK-ZVBB-NEXT: vclz.v v8, v8397; CHECK-ZVBB-NEXT: ret398 %v = call <vscale x 64 x i8> @llvm.vp.ctlz.nxv64i8(<vscale x 64 x i8> %va, i1 false, <vscale x 64 x i1> splat (i1 true), i32 %evl)399 ret <vscale x 64 x i8> %v400}401 402define <vscale x 1 x i16> @vp_ctlz_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {403; CHECK-LABEL: vp_ctlz_nxv1i16:404; CHECK: # %bb.0:405; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma406; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t407; CHECK-NEXT: li a0, 142408; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma409; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t410; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma411; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t412; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t413; CHECK-NEXT: li a0, 16414; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t415; CHECK-NEXT: ret416;417; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i16:418; CHECK-ZVBB: # %bb.0:419; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma420; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t421; CHECK-ZVBB-NEXT: ret422 %v = call <vscale x 1 x i16> @llvm.vp.ctlz.nxv1i16(<vscale x 1 x i16> %va, i1 false, <vscale x 1 x i1> %m, i32 %evl)423 ret <vscale x 1 x i16> %v424}425 426define <vscale x 1 x i16> @vp_ctlz_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {427; CHECK-LABEL: vp_ctlz_nxv1i16_unmasked:428; CHECK: # %bb.0:429; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma430; CHECK-NEXT: vfwcvt.f.xu.v v9, v8431; CHECK-NEXT: li a0, 142432; CHECK-NEXT: vnsrl.wi v8, v9, 23433; CHECK-NEXT: vrsub.vx v8, v8, a0434; CHECK-NEXT: li a0, 16435; CHECK-NEXT: vminu.vx v8, v8, a0436; CHECK-NEXT: ret437;438; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i16_unmasked:439; CHECK-ZVBB: # %bb.0:440; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma441; CHECK-ZVBB-NEXT: vclz.v v8, v8442; CHECK-ZVBB-NEXT: ret443 %v = call <vscale x 1 x i16> @llvm.vp.ctlz.nxv1i16(<vscale x 1 x i16> %va, i1 false, <vscale x 1 x i1> splat (i1 true), i32 %evl)444 ret <vscale x 1 x i16> %v445}446 447define <vscale x 2 x i16> @vp_ctlz_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {448; CHECK-LABEL: vp_ctlz_nxv2i16:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma451; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t452; CHECK-NEXT: li a0, 142453; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma454; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t455; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma456; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t457; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t458; CHECK-NEXT: li a0, 16459; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t460; CHECK-NEXT: ret461;462; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i16:463; CHECK-ZVBB: # %bb.0:464; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf2, ta, ma465; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t466; CHECK-ZVBB-NEXT: ret467 %v = call <vscale x 2 x i16> @llvm.vp.ctlz.nxv2i16(<vscale x 2 x i16> %va, i1 false, <vscale x 2 x i1> %m, i32 %evl)468 ret <vscale x 2 x i16> %v469}470 471define <vscale x 2 x i16> @vp_ctlz_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {472; CHECK-LABEL: vp_ctlz_nxv2i16_unmasked:473; CHECK: # %bb.0:474; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma475; CHECK-NEXT: vfwcvt.f.xu.v v9, v8476; CHECK-NEXT: li a0, 142477; CHECK-NEXT: vnsrl.wi v8, v9, 23478; CHECK-NEXT: vrsub.vx v8, v8, a0479; CHECK-NEXT: li a0, 16480; CHECK-NEXT: vminu.vx v8, v8, a0481; CHECK-NEXT: ret482;483; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i16_unmasked:484; CHECK-ZVBB: # %bb.0:485; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf2, ta, ma486; CHECK-ZVBB-NEXT: vclz.v v8, v8487; CHECK-ZVBB-NEXT: ret488 %v = call <vscale x 2 x i16> @llvm.vp.ctlz.nxv2i16(<vscale x 2 x i16> %va, i1 false, <vscale x 2 x i1> splat (i1 true), i32 %evl)489 ret <vscale x 2 x i16> %v490}491 492define <vscale x 4 x i16> @vp_ctlz_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {493; CHECK-LABEL: vp_ctlz_nxv4i16:494; CHECK: # %bb.0:495; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma496; CHECK-NEXT: vfwcvt.f.xu.v v10, v8, v0.t497; CHECK-NEXT: li a0, 142498; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma499; CHECK-NEXT: vsrl.vi v8, v10, 23, v0.t500; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma501; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t502; CHECK-NEXT: vrsub.vx v8, v10, a0, v0.t503; CHECK-NEXT: li a0, 16504; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t505; CHECK-NEXT: ret506;507; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i16:508; CHECK-ZVBB: # %bb.0:509; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m1, ta, ma510; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t511; CHECK-ZVBB-NEXT: ret512 %v = call <vscale x 4 x i16> @llvm.vp.ctlz.nxv4i16(<vscale x 4 x i16> %va, i1 false, <vscale x 4 x i1> %m, i32 %evl)513 ret <vscale x 4 x i16> %v514}515 516define <vscale x 4 x i16> @vp_ctlz_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {517; CHECK-LABEL: vp_ctlz_nxv4i16_unmasked:518; CHECK: # %bb.0:519; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma520; CHECK-NEXT: vfwcvt.f.xu.v v10, v8521; CHECK-NEXT: li a0, 142522; CHECK-NEXT: vnsrl.wi v8, v10, 23523; CHECK-NEXT: vrsub.vx v8, v8, a0524; CHECK-NEXT: li a0, 16525; CHECK-NEXT: vminu.vx v8, v8, a0526; CHECK-NEXT: ret527;528; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i16_unmasked:529; CHECK-ZVBB: # %bb.0:530; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m1, ta, ma531; CHECK-ZVBB-NEXT: vclz.v v8, v8532; CHECK-ZVBB-NEXT: ret533 %v = call <vscale x 4 x i16> @llvm.vp.ctlz.nxv4i16(<vscale x 4 x i16> %va, i1 false, <vscale x 4 x i1> splat (i1 true), i32 %evl)534 ret <vscale x 4 x i16> %v535}536 537define <vscale x 8 x i16> @vp_ctlz_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {538; CHECK-LABEL: vp_ctlz_nxv8i16:539; CHECK: # %bb.0:540; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma541; CHECK-NEXT: vfwcvt.f.xu.v v12, v8, v0.t542; CHECK-NEXT: li a0, 142543; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma544; CHECK-NEXT: vsrl.vi v8, v12, 23, v0.t545; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma546; CHECK-NEXT: vnsrl.wi v12, v8, 0, v0.t547; CHECK-NEXT: vrsub.vx v8, v12, a0, v0.t548; CHECK-NEXT: li a0, 16549; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t550; CHECK-NEXT: ret551;552; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i16:553; CHECK-ZVBB: # %bb.0:554; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m2, ta, ma555; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t556; CHECK-ZVBB-NEXT: ret557 %v = call <vscale x 8 x i16> @llvm.vp.ctlz.nxv8i16(<vscale x 8 x i16> %va, i1 false, <vscale x 8 x i1> %m, i32 %evl)558 ret <vscale x 8 x i16> %v559}560 561define <vscale x 8 x i16> @vp_ctlz_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {562; CHECK-LABEL: vp_ctlz_nxv8i16_unmasked:563; CHECK: # %bb.0:564; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma565; CHECK-NEXT: vfwcvt.f.xu.v v12, v8566; CHECK-NEXT: li a0, 142567; CHECK-NEXT: vnsrl.wi v8, v12, 23568; CHECK-NEXT: vrsub.vx v8, v8, a0569; CHECK-NEXT: li a0, 16570; CHECK-NEXT: vminu.vx v8, v8, a0571; CHECK-NEXT: ret572;573; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i16_unmasked:574; CHECK-ZVBB: # %bb.0:575; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m2, ta, ma576; CHECK-ZVBB-NEXT: vclz.v v8, v8577; CHECK-ZVBB-NEXT: ret578 %v = call <vscale x 8 x i16> @llvm.vp.ctlz.nxv8i16(<vscale x 8 x i16> %va, i1 false, <vscale x 8 x i1> splat (i1 true), i32 %evl)579 ret <vscale x 8 x i16> %v580}581 582define <vscale x 16 x i16> @vp_ctlz_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {583; CHECK-LABEL: vp_ctlz_nxv16i16:584; CHECK: # %bb.0:585; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma586; CHECK-NEXT: vfwcvt.f.xu.v v16, v8, v0.t587; CHECK-NEXT: li a0, 142588; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma589; CHECK-NEXT: vsrl.vi v8, v16, 23, v0.t590; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma591; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t592; CHECK-NEXT: vrsub.vx v8, v16, a0, v0.t593; CHECK-NEXT: li a0, 16594; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t595; CHECK-NEXT: ret596;597; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i16:598; CHECK-ZVBB: # %bb.0:599; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m4, ta, ma600; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t601; CHECK-ZVBB-NEXT: ret602 %v = call <vscale x 16 x i16> @llvm.vp.ctlz.nxv16i16(<vscale x 16 x i16> %va, i1 false, <vscale x 16 x i1> %m, i32 %evl)603 ret <vscale x 16 x i16> %v604}605 606define <vscale x 16 x i16> @vp_ctlz_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {607; CHECK-LABEL: vp_ctlz_nxv16i16_unmasked:608; CHECK: # %bb.0:609; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma610; CHECK-NEXT: vfwcvt.f.xu.v v16, v8611; CHECK-NEXT: li a0, 142612; CHECK-NEXT: vnsrl.wi v8, v16, 23613; CHECK-NEXT: vrsub.vx v8, v8, a0614; CHECK-NEXT: li a0, 16615; CHECK-NEXT: vminu.vx v8, v8, a0616; CHECK-NEXT: ret617;618; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i16_unmasked:619; CHECK-ZVBB: # %bb.0:620; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m4, ta, ma621; CHECK-ZVBB-NEXT: vclz.v v8, v8622; CHECK-ZVBB-NEXT: ret623 %v = call <vscale x 16 x i16> @llvm.vp.ctlz.nxv16i16(<vscale x 16 x i16> %va, i1 false, <vscale x 16 x i1> splat (i1 true), i32 %evl)624 ret <vscale x 16 x i16> %v625}626 627define <vscale x 32 x i16> @vp_ctlz_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {628; CHECK-LABEL: vp_ctlz_nxv32i16:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma631; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t632; CHECK-NEXT: lui a0, 5633; CHECK-NEXT: vor.vv v8, v8, v16, v0.t634; CHECK-NEXT: addi a0, a0, 1365635; CHECK-NEXT: vsrl.vi v16, v8, 2, v0.t636; CHECK-NEXT: vor.vv v8, v8, v16, v0.t637; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t638; CHECK-NEXT: vor.vv v8, v8, v16, v0.t639; CHECK-NEXT: vsrl.vi v16, v8, 8, v0.t640; CHECK-NEXT: vor.vv v8, v8, v16, v0.t641; CHECK-NEXT: vnot.v v8, v8, v0.t642; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t643; CHECK-NEXT: vand.vx v16, v16, a0, v0.t644; CHECK-NEXT: lui a0, 3645; CHECK-NEXT: addi a0, a0, 819646; CHECK-NEXT: vsub.vv v16, v8, v16, v0.t647; CHECK-NEXT: vand.vx v8, v16, a0, v0.t648; CHECK-NEXT: vsrl.vi v16, v16, 2, v0.t649; CHECK-NEXT: vand.vx v16, v16, a0, v0.t650; CHECK-NEXT: lui a0, 1651; CHECK-NEXT: addi a0, a0, -241652; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t653; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t654; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t655; CHECK-NEXT: vand.vx v8, v8, a0, v0.t656; CHECK-NEXT: li a0, 257657; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t658; CHECK-NEXT: vsrl.vi v8, v8, 8, v0.t659; CHECK-NEXT: ret660;661; CHECK-ZVBB-LABEL: vp_ctlz_nxv32i16:662; CHECK-ZVBB: # %bb.0:663; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m8, ta, ma664; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t665; CHECK-ZVBB-NEXT: ret666 %v = call <vscale x 32 x i16> @llvm.vp.ctlz.nxv32i16(<vscale x 32 x i16> %va, i1 false, <vscale x 32 x i1> %m, i32 %evl)667 ret <vscale x 32 x i16> %v668}669 670define <vscale x 32 x i16> @vp_ctlz_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {671; CHECK-LABEL: vp_ctlz_nxv32i16_unmasked:672; CHECK: # %bb.0:673; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma674; CHECK-NEXT: vsrl.vi v16, v8, 1675; CHECK-NEXT: lui a0, 5676; CHECK-NEXT: vor.vv v8, v8, v16677; CHECK-NEXT: addi a0, a0, 1365678; CHECK-NEXT: vsrl.vi v16, v8, 2679; CHECK-NEXT: vor.vv v8, v8, v16680; CHECK-NEXT: vsrl.vi v16, v8, 4681; CHECK-NEXT: vor.vv v8, v8, v16682; CHECK-NEXT: vsrl.vi v16, v8, 8683; CHECK-NEXT: vor.vv v8, v8, v16684; CHECK-NEXT: vnot.v v8, v8685; CHECK-NEXT: vsrl.vi v16, v8, 1686; CHECK-NEXT: vand.vx v16, v16, a0687; CHECK-NEXT: lui a0, 3688; CHECK-NEXT: addi a0, a0, 819689; CHECK-NEXT: vsub.vv v8, v8, v16690; CHECK-NEXT: vand.vx v16, v8, a0691; CHECK-NEXT: vsrl.vi v8, v8, 2692; CHECK-NEXT: vand.vx v8, v8, a0693; CHECK-NEXT: lui a0, 1694; CHECK-NEXT: addi a0, a0, -241695; CHECK-NEXT: vadd.vv v8, v16, v8696; CHECK-NEXT: vsrl.vi v16, v8, 4697; CHECK-NEXT: vadd.vv v8, v8, v16698; CHECK-NEXT: vand.vx v8, v8, a0699; CHECK-NEXT: li a0, 257700; CHECK-NEXT: vmul.vx v8, v8, a0701; CHECK-NEXT: vsrl.vi v8, v8, 8702; CHECK-NEXT: ret703;704; CHECK-ZVBB-LABEL: vp_ctlz_nxv32i16_unmasked:705; CHECK-ZVBB: # %bb.0:706; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m8, ta, ma707; CHECK-ZVBB-NEXT: vclz.v v8, v8708; CHECK-ZVBB-NEXT: ret709 %v = call <vscale x 32 x i16> @llvm.vp.ctlz.nxv32i16(<vscale x 32 x i16> %va, i1 false, <vscale x 32 x i1> splat (i1 true), i32 %evl)710 ret <vscale x 32 x i16> %v711}712 713define <vscale x 1 x i32> @vp_ctlz_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {714; CHECK-LABEL: vp_ctlz_nxv1i32:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma717; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t718; CHECK-NEXT: li a0, 52719; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma720; CHECK-NEXT: vsrl.vx v8, v9, a0, v0.t721; CHECK-NEXT: li a0, 1054722; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma723; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t724; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t725; CHECK-NEXT: li a0, 32726; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t727; CHECK-NEXT: ret728;729; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i32:730; CHECK-ZVBB: # %bb.0:731; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, mf2, ta, ma732; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t733; CHECK-ZVBB-NEXT: ret734 %v = call <vscale x 1 x i32> @llvm.vp.ctlz.nxv1i32(<vscale x 1 x i32> %va, i1 false, <vscale x 1 x i1> %m, i32 %evl)735 ret <vscale x 1 x i32> %v736}737 738define <vscale x 1 x i32> @vp_ctlz_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {739; CHECK-LABEL: vp_ctlz_nxv1i32_unmasked:740; CHECK: # %bb.0:741; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma742; CHECK-NEXT: vfwcvt.f.xu.v v9, v8743; CHECK-NEXT: li a0, 52744; CHECK-NEXT: vnsrl.wx v8, v9, a0745; CHECK-NEXT: li a0, 1054746; CHECK-NEXT: vrsub.vx v8, v8, a0747; CHECK-NEXT: li a0, 32748; CHECK-NEXT: vminu.vx v8, v8, a0749; CHECK-NEXT: ret750;751; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i32_unmasked:752; CHECK-ZVBB: # %bb.0:753; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, mf2, ta, ma754; CHECK-ZVBB-NEXT: vclz.v v8, v8755; CHECK-ZVBB-NEXT: ret756 %v = call <vscale x 1 x i32> @llvm.vp.ctlz.nxv1i32(<vscale x 1 x i32> %va, i1 false, <vscale x 1 x i1> splat (i1 true), i32 %evl)757 ret <vscale x 1 x i32> %v758}759 760define <vscale x 2 x i32> @vp_ctlz_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {761; CHECK-LABEL: vp_ctlz_nxv2i32:762; CHECK: # %bb.0:763; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma764; CHECK-NEXT: vfwcvt.f.xu.v v10, v8, v0.t765; CHECK-NEXT: li a0, 52766; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, ma767; CHECK-NEXT: vsrl.vx v8, v10, a0, v0.t768; CHECK-NEXT: li a0, 1054769; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma770; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t771; CHECK-NEXT: vrsub.vx v8, v10, a0, v0.t772; CHECK-NEXT: li a0, 32773; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t774; CHECK-NEXT: ret775;776; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i32:777; CHECK-ZVBB: # %bb.0:778; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m1, ta, ma779; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t780; CHECK-ZVBB-NEXT: ret781 %v = call <vscale x 2 x i32> @llvm.vp.ctlz.nxv2i32(<vscale x 2 x i32> %va, i1 false, <vscale x 2 x i1> %m, i32 %evl)782 ret <vscale x 2 x i32> %v783}784 785define <vscale x 2 x i32> @vp_ctlz_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {786; CHECK-LABEL: vp_ctlz_nxv2i32_unmasked:787; CHECK: # %bb.0:788; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma789; CHECK-NEXT: vfwcvt.f.xu.v v10, v8790; CHECK-NEXT: li a0, 52791; CHECK-NEXT: vnsrl.wx v8, v10, a0792; CHECK-NEXT: li a0, 1054793; CHECK-NEXT: vrsub.vx v8, v8, a0794; CHECK-NEXT: li a0, 32795; CHECK-NEXT: vminu.vx v8, v8, a0796; CHECK-NEXT: ret797;798; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i32_unmasked:799; CHECK-ZVBB: # %bb.0:800; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m1, ta, ma801; CHECK-ZVBB-NEXT: vclz.v v8, v8802; CHECK-ZVBB-NEXT: ret803 %v = call <vscale x 2 x i32> @llvm.vp.ctlz.nxv2i32(<vscale x 2 x i32> %va, i1 false, <vscale x 2 x i1> splat (i1 true), i32 %evl)804 ret <vscale x 2 x i32> %v805}806 807define <vscale x 4 x i32> @vp_ctlz_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {808; CHECK-LABEL: vp_ctlz_nxv4i32:809; CHECK: # %bb.0:810; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma811; CHECK-NEXT: vfwcvt.f.xu.v v12, v8, v0.t812; CHECK-NEXT: li a0, 52813; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, ma814; CHECK-NEXT: vsrl.vx v8, v12, a0, v0.t815; CHECK-NEXT: li a0, 1054816; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma817; CHECK-NEXT: vnsrl.wi v12, v8, 0, v0.t818; CHECK-NEXT: vrsub.vx v8, v12, a0, v0.t819; CHECK-NEXT: li a0, 32820; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t821; CHECK-NEXT: ret822;823; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i32:824; CHECK-ZVBB: # %bb.0:825; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m2, ta, ma826; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t827; CHECK-ZVBB-NEXT: ret828 %v = call <vscale x 4 x i32> @llvm.vp.ctlz.nxv4i32(<vscale x 4 x i32> %va, i1 false, <vscale x 4 x i1> %m, i32 %evl)829 ret <vscale x 4 x i32> %v830}831 832define <vscale x 4 x i32> @vp_ctlz_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {833; CHECK-LABEL: vp_ctlz_nxv4i32_unmasked:834; CHECK: # %bb.0:835; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma836; CHECK-NEXT: vfwcvt.f.xu.v v12, v8837; CHECK-NEXT: li a0, 52838; CHECK-NEXT: vnsrl.wx v8, v12, a0839; CHECK-NEXT: li a0, 1054840; CHECK-NEXT: vrsub.vx v8, v8, a0841; CHECK-NEXT: li a0, 32842; CHECK-NEXT: vminu.vx v8, v8, a0843; CHECK-NEXT: ret844;845; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i32_unmasked:846; CHECK-ZVBB: # %bb.0:847; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m2, ta, ma848; CHECK-ZVBB-NEXT: vclz.v v8, v8849; CHECK-ZVBB-NEXT: ret850 %v = call <vscale x 4 x i32> @llvm.vp.ctlz.nxv4i32(<vscale x 4 x i32> %va, i1 false, <vscale x 4 x i1> splat (i1 true), i32 %evl)851 ret <vscale x 4 x i32> %v852}853 854define <vscale x 8 x i32> @vp_ctlz_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {855; CHECK-LABEL: vp_ctlz_nxv8i32:856; CHECK: # %bb.0:857; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma858; CHECK-NEXT: vfwcvt.f.xu.v v16, v8, v0.t859; CHECK-NEXT: li a0, 52860; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma861; CHECK-NEXT: vsrl.vx v8, v16, a0, v0.t862; CHECK-NEXT: li a0, 1054863; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma864; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t865; CHECK-NEXT: vrsub.vx v8, v16, a0, v0.t866; CHECK-NEXT: li a0, 32867; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t868; CHECK-NEXT: ret869;870; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i32:871; CHECK-ZVBB: # %bb.0:872; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m4, ta, ma873; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t874; CHECK-ZVBB-NEXT: ret875 %v = call <vscale x 8 x i32> @llvm.vp.ctlz.nxv8i32(<vscale x 8 x i32> %va, i1 false, <vscale x 8 x i1> %m, i32 %evl)876 ret <vscale x 8 x i32> %v877}878 879define <vscale x 8 x i32> @vp_ctlz_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {880; CHECK-LABEL: vp_ctlz_nxv8i32_unmasked:881; CHECK: # %bb.0:882; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma883; CHECK-NEXT: vfwcvt.f.xu.v v16, v8884; CHECK-NEXT: li a0, 52885; CHECK-NEXT: vnsrl.wx v8, v16, a0886; CHECK-NEXT: li a0, 1054887; CHECK-NEXT: vrsub.vx v8, v8, a0888; CHECK-NEXT: li a0, 32889; CHECK-NEXT: vminu.vx v8, v8, a0890; CHECK-NEXT: ret891;892; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i32_unmasked:893; CHECK-ZVBB: # %bb.0:894; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m4, ta, ma895; CHECK-ZVBB-NEXT: vclz.v v8, v8896; CHECK-ZVBB-NEXT: ret897 %v = call <vscale x 8 x i32> @llvm.vp.ctlz.nxv8i32(<vscale x 8 x i32> %va, i1 false, <vscale x 8 x i1> splat (i1 true), i32 %evl)898 ret <vscale x 8 x i32> %v899}900 901define <vscale x 16 x i32> @vp_ctlz_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {902; CHECK-LABEL: vp_ctlz_nxv16i32:903; CHECK: # %bb.0:904; CHECK-NEXT: fsrmi a1, 1905; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma906; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t907; CHECK-NEXT: li a0, 158908; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t909; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t910; CHECK-NEXT: li a0, 32911; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t912; CHECK-NEXT: fsrm a1913; CHECK-NEXT: ret914;915; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i32:916; CHECK-ZVBB: # %bb.0:917; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m8, ta, ma918; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t919; CHECK-ZVBB-NEXT: ret920 %v = call <vscale x 16 x i32> @llvm.vp.ctlz.nxv16i32(<vscale x 16 x i32> %va, i1 false, <vscale x 16 x i1> %m, i32 %evl)921 ret <vscale x 16 x i32> %v922}923 924define <vscale x 16 x i32> @vp_ctlz_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {925; CHECK-LABEL: vp_ctlz_nxv16i32_unmasked:926; CHECK: # %bb.0:927; CHECK-NEXT: fsrmi a1, 1928; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma929; CHECK-NEXT: vfcvt.f.xu.v v8, v8930; CHECK-NEXT: li a0, 158931; CHECK-NEXT: vsrl.vi v8, v8, 23932; CHECK-NEXT: vrsub.vx v8, v8, a0933; CHECK-NEXT: li a0, 32934; CHECK-NEXT: vminu.vx v8, v8, a0935; CHECK-NEXT: fsrm a1936; CHECK-NEXT: ret937;938; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i32_unmasked:939; CHECK-ZVBB: # %bb.0:940; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m8, ta, ma941; CHECK-ZVBB-NEXT: vclz.v v8, v8942; CHECK-ZVBB-NEXT: ret943 %v = call <vscale x 16 x i32> @llvm.vp.ctlz.nxv16i32(<vscale x 16 x i32> %va, i1 false, <vscale x 16 x i1> splat (i1 true), i32 %evl)944 ret <vscale x 16 x i32> %v945}946 947define <vscale x 1 x i64> @vp_ctlz_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {948; CHECK-LABEL: vp_ctlz_nxv1i64:949; CHECK: # %bb.0:950; CHECK-NEXT: fsrmi a1, 1951; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma952; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t953; CHECK-NEXT: li a0, 52954; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t955; CHECK-NEXT: li a0, 1086956; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t957; CHECK-NEXT: li a0, 64958; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t959; CHECK-NEXT: fsrm a1960; CHECK-NEXT: ret961;962; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i64:963; CHECK-ZVBB: # %bb.0:964; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m1, ta, ma965; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t966; CHECK-ZVBB-NEXT: ret967 %v = call <vscale x 1 x i64> @llvm.vp.ctlz.nxv1i64(<vscale x 1 x i64> %va, i1 false, <vscale x 1 x i1> %m, i32 %evl)968 ret <vscale x 1 x i64> %v969}970 971define <vscale x 1 x i64> @vp_ctlz_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {972; CHECK-LABEL: vp_ctlz_nxv1i64_unmasked:973; CHECK: # %bb.0:974; CHECK-NEXT: fsrmi a1, 1975; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma976; CHECK-NEXT: vfcvt.f.xu.v v8, v8977; CHECK-NEXT: li a0, 52978; CHECK-NEXT: vsrl.vx v8, v8, a0979; CHECK-NEXT: li a0, 1086980; CHECK-NEXT: vrsub.vx v8, v8, a0981; CHECK-NEXT: li a0, 64982; CHECK-NEXT: vminu.vx v8, v8, a0983; CHECK-NEXT: fsrm a1984; CHECK-NEXT: ret985;986; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i64_unmasked:987; CHECK-ZVBB: # %bb.0:988; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m1, ta, ma989; CHECK-ZVBB-NEXT: vclz.v v8, v8990; CHECK-ZVBB-NEXT: ret991 %v = call <vscale x 1 x i64> @llvm.vp.ctlz.nxv1i64(<vscale x 1 x i64> %va, i1 false, <vscale x 1 x i1> splat (i1 true), i32 %evl)992 ret <vscale x 1 x i64> %v993}994 995define <vscale x 2 x i64> @vp_ctlz_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {996; CHECK-LABEL: vp_ctlz_nxv2i64:997; CHECK: # %bb.0:998; CHECK-NEXT: fsrmi a1, 1999; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1000; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t1001; CHECK-NEXT: li a0, 521002; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1003; CHECK-NEXT: li a0, 10861004; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1005; CHECK-NEXT: li a0, 641006; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t1007; CHECK-NEXT: fsrm a11008; CHECK-NEXT: ret1009;1010; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i64:1011; CHECK-ZVBB: # %bb.0:1012; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m2, ta, ma1013; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1014; CHECK-ZVBB-NEXT: ret1015 %v = call <vscale x 2 x i64> @llvm.vp.ctlz.nxv2i64(<vscale x 2 x i64> %va, i1 false, <vscale x 2 x i1> %m, i32 %evl)1016 ret <vscale x 2 x i64> %v1017}1018 1019define <vscale x 2 x i64> @vp_ctlz_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {1020; CHECK-LABEL: vp_ctlz_nxv2i64_unmasked:1021; CHECK: # %bb.0:1022; CHECK-NEXT: fsrmi a1, 11023; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1024; CHECK-NEXT: vfcvt.f.xu.v v8, v81025; CHECK-NEXT: li a0, 521026; CHECK-NEXT: vsrl.vx v8, v8, a01027; CHECK-NEXT: li a0, 10861028; CHECK-NEXT: vrsub.vx v8, v8, a01029; CHECK-NEXT: li a0, 641030; CHECK-NEXT: vminu.vx v8, v8, a01031; CHECK-NEXT: fsrm a11032; CHECK-NEXT: ret1033;1034; CHECK-ZVBB-LABEL: vp_ctlz_nxv2i64_unmasked:1035; CHECK-ZVBB: # %bb.0:1036; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m2, ta, ma1037; CHECK-ZVBB-NEXT: vclz.v v8, v81038; CHECK-ZVBB-NEXT: ret1039 %v = call <vscale x 2 x i64> @llvm.vp.ctlz.nxv2i64(<vscale x 2 x i64> %va, i1 false, <vscale x 2 x i1> splat (i1 true), i32 %evl)1040 ret <vscale x 2 x i64> %v1041}1042 1043define <vscale x 4 x i64> @vp_ctlz_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1044; CHECK-LABEL: vp_ctlz_nxv4i64:1045; CHECK: # %bb.0:1046; CHECK-NEXT: fsrmi a1, 11047; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1048; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t1049; CHECK-NEXT: li a0, 521050; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1051; CHECK-NEXT: li a0, 10861052; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1053; CHECK-NEXT: li a0, 641054; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t1055; CHECK-NEXT: fsrm a11056; CHECK-NEXT: ret1057;1058; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i64:1059; CHECK-ZVBB: # %bb.0:1060; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m4, ta, ma1061; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1062; CHECK-ZVBB-NEXT: ret1063 %v = call <vscale x 4 x i64> @llvm.vp.ctlz.nxv4i64(<vscale x 4 x i64> %va, i1 false, <vscale x 4 x i1> %m, i32 %evl)1064 ret <vscale x 4 x i64> %v1065}1066 1067define <vscale x 4 x i64> @vp_ctlz_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {1068; CHECK-LABEL: vp_ctlz_nxv4i64_unmasked:1069; CHECK: # %bb.0:1070; CHECK-NEXT: fsrmi a1, 11071; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1072; CHECK-NEXT: vfcvt.f.xu.v v8, v81073; CHECK-NEXT: li a0, 521074; CHECK-NEXT: vsrl.vx v8, v8, a01075; CHECK-NEXT: li a0, 10861076; CHECK-NEXT: vrsub.vx v8, v8, a01077; CHECK-NEXT: li a0, 641078; CHECK-NEXT: vminu.vx v8, v8, a01079; CHECK-NEXT: fsrm a11080; CHECK-NEXT: ret1081;1082; CHECK-ZVBB-LABEL: vp_ctlz_nxv4i64_unmasked:1083; CHECK-ZVBB: # %bb.0:1084; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m4, ta, ma1085; CHECK-ZVBB-NEXT: vclz.v v8, v81086; CHECK-ZVBB-NEXT: ret1087 %v = call <vscale x 4 x i64> @llvm.vp.ctlz.nxv4i64(<vscale x 4 x i64> %va, i1 false, <vscale x 4 x i1> splat (i1 true), i32 %evl)1088 ret <vscale x 4 x i64> %v1089}1090 1091define <vscale x 7 x i64> @vp_ctlz_nxv7i64(<vscale x 7 x i64> %va, <vscale x 7 x i1> %m, i32 zeroext %evl) {1092; CHECK-LABEL: vp_ctlz_nxv7i64:1093; CHECK: # %bb.0:1094; CHECK-NEXT: fsrmi a1, 11095; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1096; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t1097; CHECK-NEXT: li a0, 521098; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1099; CHECK-NEXT: li a0, 10861100; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1101; CHECK-NEXT: li a0, 641102; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t1103; CHECK-NEXT: fsrm a11104; CHECK-NEXT: ret1105;1106; CHECK-ZVBB-LABEL: vp_ctlz_nxv7i64:1107; CHECK-ZVBB: # %bb.0:1108; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1109; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1110; CHECK-ZVBB-NEXT: ret1111 %v = call <vscale x 7 x i64> @llvm.vp.ctlz.nxv7i64(<vscale x 7 x i64> %va, i1 false, <vscale x 7 x i1> %m, i32 %evl)1112 ret <vscale x 7 x i64> %v1113}1114 1115define <vscale x 7 x i64> @vp_ctlz_nxv7i64_unmasked(<vscale x 7 x i64> %va, i32 zeroext %evl) {1116; CHECK-LABEL: vp_ctlz_nxv7i64_unmasked:1117; CHECK: # %bb.0:1118; CHECK-NEXT: fsrmi a1, 11119; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1120; CHECK-NEXT: vfcvt.f.xu.v v8, v81121; CHECK-NEXT: li a0, 521122; CHECK-NEXT: vsrl.vx v8, v8, a01123; CHECK-NEXT: li a0, 10861124; CHECK-NEXT: vrsub.vx v8, v8, a01125; CHECK-NEXT: li a0, 641126; CHECK-NEXT: vminu.vx v8, v8, a01127; CHECK-NEXT: fsrm a11128; CHECK-NEXT: ret1129;1130; CHECK-ZVBB-LABEL: vp_ctlz_nxv7i64_unmasked:1131; CHECK-ZVBB: # %bb.0:1132; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1133; CHECK-ZVBB-NEXT: vclz.v v8, v81134; CHECK-ZVBB-NEXT: ret1135 %v = call <vscale x 7 x i64> @llvm.vp.ctlz.nxv7i64(<vscale x 7 x i64> %va, i1 false, <vscale x 7 x i1> splat (i1 true), i32 %evl)1136 ret <vscale x 7 x i64> %v1137}1138 1139define <vscale x 8 x i64> @vp_ctlz_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1140; CHECK-LABEL: vp_ctlz_nxv8i64:1141; CHECK: # %bb.0:1142; CHECK-NEXT: fsrmi a1, 11143; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1144; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t1145; CHECK-NEXT: li a0, 521146; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t1147; CHECK-NEXT: li a0, 10861148; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1149; CHECK-NEXT: li a0, 641150; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t1151; CHECK-NEXT: fsrm a11152; CHECK-NEXT: ret1153;1154; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i64:1155; CHECK-ZVBB: # %bb.0:1156; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1157; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1158; CHECK-ZVBB-NEXT: ret1159 %v = call <vscale x 8 x i64> @llvm.vp.ctlz.nxv8i64(<vscale x 8 x i64> %va, i1 false, <vscale x 8 x i1> %m, i32 %evl)1160 ret <vscale x 8 x i64> %v1161}1162 1163define <vscale x 8 x i64> @vp_ctlz_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {1164; CHECK-LABEL: vp_ctlz_nxv8i64_unmasked:1165; CHECK: # %bb.0:1166; CHECK-NEXT: fsrmi a1, 11167; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1168; CHECK-NEXT: vfcvt.f.xu.v v8, v81169; CHECK-NEXT: li a0, 521170; CHECK-NEXT: vsrl.vx v8, v8, a01171; CHECK-NEXT: li a0, 10861172; CHECK-NEXT: vrsub.vx v8, v8, a01173; CHECK-NEXT: li a0, 641174; CHECK-NEXT: vminu.vx v8, v8, a01175; CHECK-NEXT: fsrm a11176; CHECK-NEXT: ret1177;1178; CHECK-ZVBB-LABEL: vp_ctlz_nxv8i64_unmasked:1179; CHECK-ZVBB: # %bb.0:1180; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1181; CHECK-ZVBB-NEXT: vclz.v v8, v81182; CHECK-ZVBB-NEXT: ret1183 %v = call <vscale x 8 x i64> @llvm.vp.ctlz.nxv8i64(<vscale x 8 x i64> %va, i1 false, <vscale x 8 x i1> splat (i1 true), i32 %evl)1184 ret <vscale x 8 x i64> %v1185}1186 1187define <vscale x 16 x i64> @vp_ctlz_nxv16i64(<vscale x 16 x i64> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1188; CHECK-LABEL: vp_ctlz_nxv16i64:1189; CHECK: # %bb.0:1190; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma1191; CHECK-NEXT: vmv1r.v v24, v01192; CHECK-NEXT: csrr a1, vlenb1193; CHECK-NEXT: fsrmi a4, 11194; CHECK-NEXT: li a2, 521195; CHECK-NEXT: srli a3, a1, 31196; CHECK-NEXT: sub a5, a0, a11197; CHECK-NEXT: vslidedown.vx v0, v0, a31198; CHECK-NEXT: sltu a3, a0, a51199; CHECK-NEXT: addi a3, a3, -11200; CHECK-NEXT: and a5, a3, a51201; CHECK-NEXT: li a3, 10861202; CHECK-NEXT: vsetvli zero, a5, e64, m8, ta, ma1203; CHECK-NEXT: vfcvt.f.xu.v v16, v16, v0.t1204; CHECK-NEXT: fsrm a41205; CHECK-NEXT: vsrl.vx v16, v16, a2, v0.t1206; CHECK-NEXT: vrsub.vx v16, v16, a3, v0.t1207; CHECK-NEXT: li a4, 641208; CHECK-NEXT: vminu.vx v16, v16, a4, v0.t1209; CHECK-NEXT: bltu a0, a1, .LBB46_21210; CHECK-NEXT: # %bb.1:1211; CHECK-NEXT: mv a0, a11212; CHECK-NEXT: .LBB46_2:1213; CHECK-NEXT: fsrmi a1, 11214; CHECK-NEXT: vmv1r.v v0, v241215; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1216; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t1217; CHECK-NEXT: vsrl.vx v8, v8, a2, v0.t1218; CHECK-NEXT: vrsub.vx v8, v8, a3, v0.t1219; CHECK-NEXT: vminu.vx v8, v8, a4, v0.t1220; CHECK-NEXT: fsrm a11221; CHECK-NEXT: ret1222;1223; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i64:1224; CHECK-ZVBB: # %bb.0:1225; CHECK-ZVBB-NEXT: vsetvli a1, zero, e8, mf4, ta, ma1226; CHECK-ZVBB-NEXT: vmv1r.v v24, v01227; CHECK-ZVBB-NEXT: csrr a1, vlenb1228; CHECK-ZVBB-NEXT: srli a2, a1, 31229; CHECK-ZVBB-NEXT: sub a3, a0, a11230; CHECK-ZVBB-NEXT: vslidedown.vx v0, v0, a21231; CHECK-ZVBB-NEXT: sltu a2, a0, a31232; CHECK-ZVBB-NEXT: addi a2, a2, -11233; CHECK-ZVBB-NEXT: and a2, a2, a31234; CHECK-ZVBB-NEXT: vsetvli zero, a2, e64, m8, ta, ma1235; CHECK-ZVBB-NEXT: vclz.v v16, v16, v0.t1236; CHECK-ZVBB-NEXT: bltu a0, a1, .LBB46_21237; CHECK-ZVBB-NEXT: # %bb.1:1238; CHECK-ZVBB-NEXT: mv a0, a11239; CHECK-ZVBB-NEXT: .LBB46_2:1240; CHECK-ZVBB-NEXT: vmv1r.v v0, v241241; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1242; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1243; CHECK-ZVBB-NEXT: ret1244 %v = call <vscale x 16 x i64> @llvm.vp.ctlz.nxv16i64(<vscale x 16 x i64> %va, i1 false, <vscale x 16 x i1> %m, i32 %evl)1245 ret <vscale x 16 x i64> %v1246}1247 1248define <vscale x 16 x i64> @vp_ctlz_nxv16i64_unmasked(<vscale x 16 x i64> %va, i32 zeroext %evl) {1249; CHECK-LABEL: vp_ctlz_nxv16i64_unmasked:1250; CHECK: # %bb.0:1251; CHECK-NEXT: csrr a1, vlenb1252; CHECK-NEXT: fsrmi a4, 11253; CHECK-NEXT: li a2, 521254; CHECK-NEXT: sub a3, a0, a11255; CHECK-NEXT: sltu a5, a0, a31256; CHECK-NEXT: addi a5, a5, -11257; CHECK-NEXT: and a5, a5, a31258; CHECK-NEXT: li a3, 10861259; CHECK-NEXT: vsetvli zero, a5, e64, m8, ta, ma1260; CHECK-NEXT: vfcvt.f.xu.v v16, v161261; CHECK-NEXT: fsrm a41262; CHECK-NEXT: vsrl.vx v16, v16, a21263; CHECK-NEXT: vrsub.vx v16, v16, a31264; CHECK-NEXT: li a4, 641265; CHECK-NEXT: vminu.vx v16, v16, a41266; CHECK-NEXT: bltu a0, a1, .LBB47_21267; CHECK-NEXT: # %bb.1:1268; CHECK-NEXT: mv a0, a11269; CHECK-NEXT: .LBB47_2:1270; CHECK-NEXT: fsrmi a1, 11271; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1272; CHECK-NEXT: vfcvt.f.xu.v v8, v81273; CHECK-NEXT: vsrl.vx v8, v8, a21274; CHECK-NEXT: vrsub.vx v8, v8, a31275; CHECK-NEXT: vminu.vx v8, v8, a41276; CHECK-NEXT: fsrm a11277; CHECK-NEXT: ret1278;1279; CHECK-ZVBB-LABEL: vp_ctlz_nxv16i64_unmasked:1280; CHECK-ZVBB: # %bb.0:1281; CHECK-ZVBB-NEXT: csrr a1, vlenb1282; CHECK-ZVBB-NEXT: sub a2, a0, a11283; CHECK-ZVBB-NEXT: sltu a3, a0, a21284; CHECK-ZVBB-NEXT: addi a3, a3, -11285; CHECK-ZVBB-NEXT: and a2, a3, a21286; CHECK-ZVBB-NEXT: vsetvli zero, a2, e64, m8, ta, ma1287; CHECK-ZVBB-NEXT: vclz.v v16, v161288; CHECK-ZVBB-NEXT: bltu a0, a1, .LBB47_21289; CHECK-ZVBB-NEXT: # %bb.1:1290; CHECK-ZVBB-NEXT: mv a0, a11291; CHECK-ZVBB-NEXT: .LBB47_2:1292; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1293; CHECK-ZVBB-NEXT: vclz.v v8, v81294; CHECK-ZVBB-NEXT: ret1295 %v = call <vscale x 16 x i64> @llvm.vp.ctlz.nxv16i64(<vscale x 16 x i64> %va, i1 false, <vscale x 16 x i1> splat (i1 true), i32 %evl)1296 ret <vscale x 16 x i64> %v1297}1298 1299define <vscale x 1 x i8> @vp_ctlz_zero_undef_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1300; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i8:1301; CHECK: # %bb.0:1302; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1303; CHECK-NEXT: vzext.vf2 v9, v8, v0.t1304; CHECK-NEXT: li a0, 1341305; CHECK-NEXT: vfwcvt.f.xu.v v8, v9, v0.t1306; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1307; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t1308; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1309; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1310; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma1311; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1312; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1313; CHECK-NEXT: ret1314;1315; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i8:1316; CHECK-ZVBB: # %bb.0:1317; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf8, ta, ma1318; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1319; CHECK-ZVBB-NEXT: ret1320 %v = call <vscale x 1 x i8> @llvm.vp.ctlz.nxv1i8(<vscale x 1 x i8> %va, i1 true, <vscale x 1 x i1> %m, i32 %evl)1321 ret <vscale x 1 x i8> %v1322}1323 1324define <vscale x 1 x i8> @vp_ctlz_zero_undef_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {1325; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i8_unmasked:1326; CHECK: # %bb.0:1327; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1328; CHECK-NEXT: vzext.vf2 v9, v81329; CHECK-NEXT: vfwcvt.f.xu.v v8, v91330; CHECK-NEXT: vnsrl.wi v8, v8, 231331; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma1332; CHECK-NEXT: vnsrl.wi v8, v8, 01333; CHECK-NEXT: li a0, 1341334; CHECK-NEXT: vrsub.vx v8, v8, a01335; CHECK-NEXT: ret1336;1337; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i8_unmasked:1338; CHECK-ZVBB: # %bb.0:1339; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf8, ta, ma1340; CHECK-ZVBB-NEXT: vclz.v v8, v81341; CHECK-ZVBB-NEXT: ret1342 %v = call <vscale x 1 x i8> @llvm.vp.ctlz.nxv1i8(<vscale x 1 x i8> %va, i1 true, <vscale x 1 x i1> splat (i1 true), i32 %evl)1343 ret <vscale x 1 x i8> %v1344}1345 1346define <vscale x 2 x i8> @vp_ctlz_zero_undef_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1347; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i8:1348; CHECK: # %bb.0:1349; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1350; CHECK-NEXT: vzext.vf2 v9, v8, v0.t1351; CHECK-NEXT: li a0, 1341352; CHECK-NEXT: vfwcvt.f.xu.v v8, v9, v0.t1353; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma1354; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t1355; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1356; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1357; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma1358; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1359; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1360; CHECK-NEXT: ret1361;1362; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i8:1363; CHECK-ZVBB: # %bb.0:1364; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf4, ta, ma1365; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1366; CHECK-ZVBB-NEXT: ret1367 %v = call <vscale x 2 x i8> @llvm.vp.ctlz.nxv2i8(<vscale x 2 x i8> %va, i1 true, <vscale x 2 x i1> %m, i32 %evl)1368 ret <vscale x 2 x i8> %v1369}1370 1371define <vscale x 2 x i8> @vp_ctlz_zero_undef_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {1372; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i8_unmasked:1373; CHECK: # %bb.0:1374; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1375; CHECK-NEXT: vzext.vf2 v9, v81376; CHECK-NEXT: vfwcvt.f.xu.v v8, v91377; CHECK-NEXT: vnsrl.wi v8, v8, 231378; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma1379; CHECK-NEXT: vnsrl.wi v8, v8, 01380; CHECK-NEXT: li a0, 1341381; CHECK-NEXT: vrsub.vx v8, v8, a01382; CHECK-NEXT: ret1383;1384; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i8_unmasked:1385; CHECK-ZVBB: # %bb.0:1386; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf4, ta, ma1387; CHECK-ZVBB-NEXT: vclz.v v8, v81388; CHECK-ZVBB-NEXT: ret1389 %v = call <vscale x 2 x i8> @llvm.vp.ctlz.nxv2i8(<vscale x 2 x i8> %va, i1 true, <vscale x 2 x i1> splat (i1 true), i32 %evl)1390 ret <vscale x 2 x i8> %v1391}1392 1393define <vscale x 4 x i8> @vp_ctlz_zero_undef_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1394; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i8:1395; CHECK: # %bb.0:1396; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma1397; CHECK-NEXT: vzext.vf2 v10, v8, v0.t1398; CHECK-NEXT: li a0, 1341399; CHECK-NEXT: vfwcvt.f.xu.v v8, v10, v0.t1400; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma1401; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t1402; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma1403; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t1404; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma1405; CHECK-NEXT: vnsrl.wi v8, v10, 0, v0.t1406; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1407; CHECK-NEXT: ret1408;1409; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i8:1410; CHECK-ZVBB: # %bb.0:1411; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf2, ta, ma1412; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1413; CHECK-ZVBB-NEXT: ret1414 %v = call <vscale x 4 x i8> @llvm.vp.ctlz.nxv4i8(<vscale x 4 x i8> %va, i1 true, <vscale x 4 x i1> %m, i32 %evl)1415 ret <vscale x 4 x i8> %v1416}1417 1418define <vscale x 4 x i8> @vp_ctlz_zero_undef_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {1419; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i8_unmasked:1420; CHECK: # %bb.0:1421; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma1422; CHECK-NEXT: vzext.vf2 v10, v81423; CHECK-NEXT: vfwcvt.f.xu.v v8, v101424; CHECK-NEXT: vnsrl.wi v10, v8, 231425; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma1426; CHECK-NEXT: vnsrl.wi v8, v10, 01427; CHECK-NEXT: li a0, 1341428; CHECK-NEXT: vrsub.vx v8, v8, a01429; CHECK-NEXT: ret1430;1431; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i8_unmasked:1432; CHECK-ZVBB: # %bb.0:1433; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, mf2, ta, ma1434; CHECK-ZVBB-NEXT: vclz.v v8, v81435; CHECK-ZVBB-NEXT: ret1436 %v = call <vscale x 4 x i8> @llvm.vp.ctlz.nxv4i8(<vscale x 4 x i8> %va, i1 true, <vscale x 4 x i1> splat (i1 true), i32 %evl)1437 ret <vscale x 4 x i8> %v1438}1439 1440define <vscale x 8 x i8> @vp_ctlz_zero_undef_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1441; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i8:1442; CHECK: # %bb.0:1443; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma1444; CHECK-NEXT: vzext.vf2 v12, v8, v0.t1445; CHECK-NEXT: li a0, 1341446; CHECK-NEXT: vfwcvt.f.xu.v v8, v12, v0.t1447; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma1448; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t1449; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma1450; CHECK-NEXT: vnsrl.wi v12, v8, 0, v0.t1451; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma1452; CHECK-NEXT: vnsrl.wi v8, v12, 0, v0.t1453; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1454; CHECK-NEXT: ret1455;1456; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i8:1457; CHECK-ZVBB: # %bb.0:1458; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m1, ta, ma1459; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1460; CHECK-ZVBB-NEXT: ret1461 %v = call <vscale x 8 x i8> @llvm.vp.ctlz.nxv8i8(<vscale x 8 x i8> %va, i1 true, <vscale x 8 x i1> %m, i32 %evl)1462 ret <vscale x 8 x i8> %v1463}1464 1465define <vscale x 8 x i8> @vp_ctlz_zero_undef_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {1466; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i8_unmasked:1467; CHECK: # %bb.0:1468; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma1469; CHECK-NEXT: vzext.vf2 v12, v81470; CHECK-NEXT: vfwcvt.f.xu.v v8, v121471; CHECK-NEXT: vnsrl.wi v12, v8, 231472; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, ma1473; CHECK-NEXT: vnsrl.wi v8, v12, 01474; CHECK-NEXT: li a0, 1341475; CHECK-NEXT: vrsub.vx v8, v8, a01476; CHECK-NEXT: ret1477;1478; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i8_unmasked:1479; CHECK-ZVBB: # %bb.0:1480; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m1, ta, ma1481; CHECK-ZVBB-NEXT: vclz.v v8, v81482; CHECK-ZVBB-NEXT: ret1483 %v = call <vscale x 8 x i8> @llvm.vp.ctlz.nxv8i8(<vscale x 8 x i8> %va, i1 true, <vscale x 8 x i1> splat (i1 true), i32 %evl)1484 ret <vscale x 8 x i8> %v1485}1486 1487define <vscale x 16 x i8> @vp_ctlz_zero_undef_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1488; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i8:1489; CHECK: # %bb.0:1490; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma1491; CHECK-NEXT: vzext.vf2 v16, v8, v0.t1492; CHECK-NEXT: li a0, 1341493; CHECK-NEXT: vfwcvt.f.xu.v v8, v16, v0.t1494; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1495; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t1496; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1497; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t1498; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma1499; CHECK-NEXT: vnsrl.wi v8, v16, 0, v0.t1500; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1501; CHECK-NEXT: ret1502;1503; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i8:1504; CHECK-ZVBB: # %bb.0:1505; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m2, ta, ma1506; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1507; CHECK-ZVBB-NEXT: ret1508 %v = call <vscale x 16 x i8> @llvm.vp.ctlz.nxv16i8(<vscale x 16 x i8> %va, i1 true, <vscale x 16 x i1> %m, i32 %evl)1509 ret <vscale x 16 x i8> %v1510}1511 1512define <vscale x 16 x i8> @vp_ctlz_zero_undef_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {1513; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i8_unmasked:1514; CHECK: # %bb.0:1515; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma1516; CHECK-NEXT: vzext.vf2 v16, v81517; CHECK-NEXT: vfwcvt.f.xu.v v8, v161518; CHECK-NEXT: vnsrl.wi v16, v8, 231519; CHECK-NEXT: vsetvli zero, zero, e8, m2, ta, ma1520; CHECK-NEXT: vnsrl.wi v8, v16, 01521; CHECK-NEXT: li a0, 1341522; CHECK-NEXT: vrsub.vx v8, v8, a01523; CHECK-NEXT: ret1524;1525; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i8_unmasked:1526; CHECK-ZVBB: # %bb.0:1527; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m2, ta, ma1528; CHECK-ZVBB-NEXT: vclz.v v8, v81529; CHECK-ZVBB-NEXT: ret1530 %v = call <vscale x 16 x i8> @llvm.vp.ctlz.nxv16i8(<vscale x 16 x i8> %va, i1 true, <vscale x 16 x i1> splat (i1 true), i32 %evl)1531 ret <vscale x 16 x i8> %v1532}1533 1534define <vscale x 32 x i8> @vp_ctlz_zero_undef_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {1535; CHECK-LABEL: vp_ctlz_zero_undef_nxv32i8:1536; CHECK: # %bb.0:1537; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma1538; CHECK-NEXT: vsrl.vi v12, v8, 1, v0.t1539; CHECK-NEXT: li a0, 851540; CHECK-NEXT: vor.vv v8, v8, v12, v0.t1541; CHECK-NEXT: vsrl.vi v12, v8, 2, v0.t1542; CHECK-NEXT: vor.vv v8, v8, v12, v0.t1543; CHECK-NEXT: vsrl.vi v12, v8, 4, v0.t1544; CHECK-NEXT: vor.vv v8, v8, v12, v0.t1545; CHECK-NEXT: vnot.v v8, v8, v0.t1546; CHECK-NEXT: vsrl.vi v12, v8, 1, v0.t1547; CHECK-NEXT: vand.vx v12, v12, a0, v0.t1548; CHECK-NEXT: li a0, 511549; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t1550; CHECK-NEXT: vand.vx v12, v8, a0, v0.t1551; CHECK-NEXT: vsrl.vi v8, v8, 2, v0.t1552; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1553; CHECK-NEXT: vadd.vv v8, v12, v8, v0.t1554; CHECK-NEXT: vsrl.vi v12, v8, 4, v0.t1555; CHECK-NEXT: vadd.vv v8, v8, v12, v0.t1556; CHECK-NEXT: vand.vi v8, v8, 15, v0.t1557; CHECK-NEXT: ret1558;1559; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv32i8:1560; CHECK-ZVBB: # %bb.0:1561; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m4, ta, ma1562; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1563; CHECK-ZVBB-NEXT: ret1564 %v = call <vscale x 32 x i8> @llvm.vp.ctlz.nxv32i8(<vscale x 32 x i8> %va, i1 true, <vscale x 32 x i1> %m, i32 %evl)1565 ret <vscale x 32 x i8> %v1566}1567 1568define <vscale x 32 x i8> @vp_ctlz_zero_undef_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {1569; CHECK-LABEL: vp_ctlz_zero_undef_nxv32i8_unmasked:1570; CHECK: # %bb.0:1571; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma1572; CHECK-NEXT: vsrl.vi v12, v8, 11573; CHECK-NEXT: li a0, 851574; CHECK-NEXT: vor.vv v8, v8, v121575; CHECK-NEXT: vsrl.vi v12, v8, 21576; CHECK-NEXT: vor.vv v8, v8, v121577; CHECK-NEXT: vsrl.vi v12, v8, 41578; CHECK-NEXT: vor.vv v8, v8, v121579; CHECK-NEXT: vnot.v v8, v81580; CHECK-NEXT: vsrl.vi v12, v8, 11581; CHECK-NEXT: vand.vx v12, v12, a01582; CHECK-NEXT: li a0, 511583; CHECK-NEXT: vsub.vv v8, v8, v121584; CHECK-NEXT: vand.vx v12, v8, a01585; CHECK-NEXT: vsrl.vi v8, v8, 21586; CHECK-NEXT: vand.vx v8, v8, a01587; CHECK-NEXT: vadd.vv v8, v12, v81588; CHECK-NEXT: vsrl.vi v12, v8, 41589; CHECK-NEXT: vadd.vv v8, v8, v121590; CHECK-NEXT: vand.vi v8, v8, 151591; CHECK-NEXT: ret1592;1593; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv32i8_unmasked:1594; CHECK-ZVBB: # %bb.0:1595; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m4, ta, ma1596; CHECK-ZVBB-NEXT: vclz.v v8, v81597; CHECK-ZVBB-NEXT: ret1598 %v = call <vscale x 32 x i8> @llvm.vp.ctlz.nxv32i8(<vscale x 32 x i8> %va, i1 true, <vscale x 32 x i1> splat (i1 true), i32 %evl)1599 ret <vscale x 32 x i8> %v1600}1601 1602define <vscale x 64 x i8> @vp_ctlz_zero_undef_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {1603; CHECK-LABEL: vp_ctlz_zero_undef_nxv64i8:1604; CHECK: # %bb.0:1605; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma1606; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t1607; CHECK-NEXT: li a0, 851608; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1609; CHECK-NEXT: vsrl.vi v16, v8, 2, v0.t1610; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1611; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t1612; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1613; CHECK-NEXT: vnot.v v8, v8, v0.t1614; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t1615; CHECK-NEXT: vand.vx v16, v16, a0, v0.t1616; CHECK-NEXT: li a0, 511617; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t1618; CHECK-NEXT: vand.vx v16, v8, a0, v0.t1619; CHECK-NEXT: vsrl.vi v8, v8, 2, v0.t1620; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1621; CHECK-NEXT: vadd.vv v8, v16, v8, v0.t1622; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t1623; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t1624; CHECK-NEXT: vand.vi v8, v8, 15, v0.t1625; CHECK-NEXT: ret1626;1627; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv64i8:1628; CHECK-ZVBB: # %bb.0:1629; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m8, ta, ma1630; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1631; CHECK-ZVBB-NEXT: ret1632 %v = call <vscale x 64 x i8> @llvm.vp.ctlz.nxv64i8(<vscale x 64 x i8> %va, i1 true, <vscale x 64 x i1> %m, i32 %evl)1633 ret <vscale x 64 x i8> %v1634}1635 1636define <vscale x 64 x i8> @vp_ctlz_zero_undef_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {1637; CHECK-LABEL: vp_ctlz_zero_undef_nxv64i8_unmasked:1638; CHECK: # %bb.0:1639; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma1640; CHECK-NEXT: vsrl.vi v16, v8, 11641; CHECK-NEXT: li a0, 851642; CHECK-NEXT: vor.vv v8, v8, v161643; CHECK-NEXT: vsrl.vi v16, v8, 21644; CHECK-NEXT: vor.vv v8, v8, v161645; CHECK-NEXT: vsrl.vi v16, v8, 41646; CHECK-NEXT: vor.vv v8, v8, v161647; CHECK-NEXT: vnot.v v8, v81648; CHECK-NEXT: vsrl.vi v16, v8, 11649; CHECK-NEXT: vand.vx v16, v16, a01650; CHECK-NEXT: li a0, 511651; CHECK-NEXT: vsub.vv v8, v8, v161652; CHECK-NEXT: vand.vx v16, v8, a01653; CHECK-NEXT: vsrl.vi v8, v8, 21654; CHECK-NEXT: vand.vx v8, v8, a01655; CHECK-NEXT: vadd.vv v8, v16, v81656; CHECK-NEXT: vsrl.vi v16, v8, 41657; CHECK-NEXT: vadd.vv v8, v8, v161658; CHECK-NEXT: vand.vi v8, v8, 151659; CHECK-NEXT: ret1660;1661; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv64i8_unmasked:1662; CHECK-ZVBB: # %bb.0:1663; CHECK-ZVBB-NEXT: vsetvli zero, a0, e8, m8, ta, ma1664; CHECK-ZVBB-NEXT: vclz.v v8, v81665; CHECK-ZVBB-NEXT: ret1666 %v = call <vscale x 64 x i8> @llvm.vp.ctlz.nxv64i8(<vscale x 64 x i8> %va, i1 true, <vscale x 64 x i1> splat (i1 true), i32 %evl)1667 ret <vscale x 64 x i8> %v1668}1669 1670define <vscale x 1 x i16> @vp_ctlz_zero_undef_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1671; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i16:1672; CHECK: # %bb.0:1673; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1674; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t1675; CHECK-NEXT: li a0, 1421676; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1677; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t1678; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1679; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1680; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1681; CHECK-NEXT: ret1682;1683; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i16:1684; CHECK-ZVBB: # %bb.0:1685; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1686; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1687; CHECK-ZVBB-NEXT: ret1688 %v = call <vscale x 1 x i16> @llvm.vp.ctlz.nxv1i16(<vscale x 1 x i16> %va, i1 true, <vscale x 1 x i1> %m, i32 %evl)1689 ret <vscale x 1 x i16> %v1690}1691 1692define <vscale x 1 x i16> @vp_ctlz_zero_undef_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {1693; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i16_unmasked:1694; CHECK: # %bb.0:1695; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1696; CHECK-NEXT: vfwcvt.f.xu.v v9, v81697; CHECK-NEXT: vnsrl.wi v8, v9, 231698; CHECK-NEXT: li a0, 1421699; CHECK-NEXT: vrsub.vx v8, v8, a01700; CHECK-NEXT: ret1701;1702; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i16_unmasked:1703; CHECK-ZVBB: # %bb.0:1704; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1705; CHECK-ZVBB-NEXT: vclz.v v8, v81706; CHECK-ZVBB-NEXT: ret1707 %v = call <vscale x 1 x i16> @llvm.vp.ctlz.nxv1i16(<vscale x 1 x i16> %va, i1 true, <vscale x 1 x i1> splat (i1 true), i32 %evl)1708 ret <vscale x 1 x i16> %v1709}1710 1711define <vscale x 2 x i16> @vp_ctlz_zero_undef_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1712; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i16:1713; CHECK: # %bb.0:1714; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1715; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t1716; CHECK-NEXT: li a0, 1421717; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma1718; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t1719; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1720; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1721; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1722; CHECK-NEXT: ret1723;1724; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i16:1725; CHECK-ZVBB: # %bb.0:1726; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1727; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1728; CHECK-ZVBB-NEXT: ret1729 %v = call <vscale x 2 x i16> @llvm.vp.ctlz.nxv2i16(<vscale x 2 x i16> %va, i1 true, <vscale x 2 x i1> %m, i32 %evl)1730 ret <vscale x 2 x i16> %v1731}1732 1733define <vscale x 2 x i16> @vp_ctlz_zero_undef_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {1734; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i16_unmasked:1735; CHECK: # %bb.0:1736; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1737; CHECK-NEXT: vfwcvt.f.xu.v v9, v81738; CHECK-NEXT: vnsrl.wi v8, v9, 231739; CHECK-NEXT: li a0, 1421740; CHECK-NEXT: vrsub.vx v8, v8, a01741; CHECK-NEXT: ret1742;1743; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i16_unmasked:1744; CHECK-ZVBB: # %bb.0:1745; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1746; CHECK-ZVBB-NEXT: vclz.v v8, v81747; CHECK-ZVBB-NEXT: ret1748 %v = call <vscale x 2 x i16> @llvm.vp.ctlz.nxv2i16(<vscale x 2 x i16> %va, i1 true, <vscale x 2 x i1> splat (i1 true), i32 %evl)1749 ret <vscale x 2 x i16> %v1750}1751 1752define <vscale x 4 x i16> @vp_ctlz_zero_undef_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1753; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i16:1754; CHECK: # %bb.0:1755; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma1756; CHECK-NEXT: vfwcvt.f.xu.v v10, v8, v0.t1757; CHECK-NEXT: li a0, 1421758; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma1759; CHECK-NEXT: vsrl.vi v8, v10, 23, v0.t1760; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma1761; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t1762; CHECK-NEXT: vrsub.vx v8, v10, a0, v0.t1763; CHECK-NEXT: ret1764;1765; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i16:1766; CHECK-ZVBB: # %bb.0:1767; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m1, ta, ma1768; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1769; CHECK-ZVBB-NEXT: ret1770 %v = call <vscale x 4 x i16> @llvm.vp.ctlz.nxv4i16(<vscale x 4 x i16> %va, i1 true, <vscale x 4 x i1> %m, i32 %evl)1771 ret <vscale x 4 x i16> %v1772}1773 1774define <vscale x 4 x i16> @vp_ctlz_zero_undef_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {1775; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i16_unmasked:1776; CHECK: # %bb.0:1777; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma1778; CHECK-NEXT: vfwcvt.f.xu.v v10, v81779; CHECK-NEXT: vnsrl.wi v8, v10, 231780; CHECK-NEXT: li a0, 1421781; CHECK-NEXT: vrsub.vx v8, v8, a01782; CHECK-NEXT: ret1783;1784; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i16_unmasked:1785; CHECK-ZVBB: # %bb.0:1786; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m1, ta, ma1787; CHECK-ZVBB-NEXT: vclz.v v8, v81788; CHECK-ZVBB-NEXT: ret1789 %v = call <vscale x 4 x i16> @llvm.vp.ctlz.nxv4i16(<vscale x 4 x i16> %va, i1 true, <vscale x 4 x i1> splat (i1 true), i32 %evl)1790 ret <vscale x 4 x i16> %v1791}1792 1793define <vscale x 8 x i16> @vp_ctlz_zero_undef_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1794; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i16:1795; CHECK: # %bb.0:1796; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma1797; CHECK-NEXT: vfwcvt.f.xu.v v12, v8, v0.t1798; CHECK-NEXT: li a0, 1421799; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma1800; CHECK-NEXT: vsrl.vi v8, v12, 23, v0.t1801; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma1802; CHECK-NEXT: vnsrl.wi v12, v8, 0, v0.t1803; CHECK-NEXT: vrsub.vx v8, v12, a0, v0.t1804; CHECK-NEXT: ret1805;1806; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i16:1807; CHECK-ZVBB: # %bb.0:1808; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m2, ta, ma1809; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1810; CHECK-ZVBB-NEXT: ret1811 %v = call <vscale x 8 x i16> @llvm.vp.ctlz.nxv8i16(<vscale x 8 x i16> %va, i1 true, <vscale x 8 x i1> %m, i32 %evl)1812 ret <vscale x 8 x i16> %v1813}1814 1815define <vscale x 8 x i16> @vp_ctlz_zero_undef_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {1816; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i16_unmasked:1817; CHECK: # %bb.0:1818; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma1819; CHECK-NEXT: vfwcvt.f.xu.v v12, v81820; CHECK-NEXT: vnsrl.wi v8, v12, 231821; CHECK-NEXT: li a0, 1421822; CHECK-NEXT: vrsub.vx v8, v8, a01823; CHECK-NEXT: ret1824;1825; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i16_unmasked:1826; CHECK-ZVBB: # %bb.0:1827; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m2, ta, ma1828; CHECK-ZVBB-NEXT: vclz.v v8, v81829; CHECK-ZVBB-NEXT: ret1830 %v = call <vscale x 8 x i16> @llvm.vp.ctlz.nxv8i16(<vscale x 8 x i16> %va, i1 true, <vscale x 8 x i1> splat (i1 true), i32 %evl)1831 ret <vscale x 8 x i16> %v1832}1833 1834define <vscale x 16 x i16> @vp_ctlz_zero_undef_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1835; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i16:1836; CHECK: # %bb.0:1837; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma1838; CHECK-NEXT: vfwcvt.f.xu.v v16, v8, v0.t1839; CHECK-NEXT: li a0, 1421840; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1841; CHECK-NEXT: vsrl.vi v8, v16, 23, v0.t1842; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1843; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t1844; CHECK-NEXT: vrsub.vx v8, v16, a0, v0.t1845; CHECK-NEXT: ret1846;1847; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i16:1848; CHECK-ZVBB: # %bb.0:1849; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m4, ta, ma1850; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1851; CHECK-ZVBB-NEXT: ret1852 %v = call <vscale x 16 x i16> @llvm.vp.ctlz.nxv16i16(<vscale x 16 x i16> %va, i1 true, <vscale x 16 x i1> %m, i32 %evl)1853 ret <vscale x 16 x i16> %v1854}1855 1856define <vscale x 16 x i16> @vp_ctlz_zero_undef_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {1857; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i16_unmasked:1858; CHECK: # %bb.0:1859; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma1860; CHECK-NEXT: vfwcvt.f.xu.v v16, v81861; CHECK-NEXT: vnsrl.wi v8, v16, 231862; CHECK-NEXT: li a0, 1421863; CHECK-NEXT: vrsub.vx v8, v8, a01864; CHECK-NEXT: ret1865;1866; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i16_unmasked:1867; CHECK-ZVBB: # %bb.0:1868; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m4, ta, ma1869; CHECK-ZVBB-NEXT: vclz.v v8, v81870; CHECK-ZVBB-NEXT: ret1871 %v = call <vscale x 16 x i16> @llvm.vp.ctlz.nxv16i16(<vscale x 16 x i16> %va, i1 true, <vscale x 16 x i1> splat (i1 true), i32 %evl)1872 ret <vscale x 16 x i16> %v1873}1874 1875define <vscale x 32 x i16> @vp_ctlz_zero_undef_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {1876; CHECK-LABEL: vp_ctlz_zero_undef_nxv32i16:1877; CHECK: # %bb.0:1878; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma1879; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t1880; CHECK-NEXT: lui a0, 51881; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1882; CHECK-NEXT: addi a0, a0, 13651883; CHECK-NEXT: vsrl.vi v16, v8, 2, v0.t1884; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1885; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t1886; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1887; CHECK-NEXT: vsrl.vi v16, v8, 8, v0.t1888; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1889; CHECK-NEXT: vnot.v v8, v8, v0.t1890; CHECK-NEXT: vsrl.vi v16, v8, 1, v0.t1891; CHECK-NEXT: vand.vx v16, v16, a0, v0.t1892; CHECK-NEXT: lui a0, 31893; CHECK-NEXT: addi a0, a0, 8191894; CHECK-NEXT: vsub.vv v16, v8, v16, v0.t1895; CHECK-NEXT: vand.vx v8, v16, a0, v0.t1896; CHECK-NEXT: vsrl.vi v16, v16, 2, v0.t1897; CHECK-NEXT: vand.vx v16, v16, a0, v0.t1898; CHECK-NEXT: lui a0, 11899; CHECK-NEXT: addi a0, a0, -2411900; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t1901; CHECK-NEXT: vsrl.vi v16, v8, 4, v0.t1902; CHECK-NEXT: vadd.vv v8, v8, v16, v0.t1903; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1904; CHECK-NEXT: li a0, 2571905; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t1906; CHECK-NEXT: vsrl.vi v8, v8, 8, v0.t1907; CHECK-NEXT: ret1908;1909; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv32i16:1910; CHECK-ZVBB: # %bb.0:1911; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m8, ta, ma1912; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1913; CHECK-ZVBB-NEXT: ret1914 %v = call <vscale x 32 x i16> @llvm.vp.ctlz.nxv32i16(<vscale x 32 x i16> %va, i1 true, <vscale x 32 x i1> %m, i32 %evl)1915 ret <vscale x 32 x i16> %v1916}1917 1918define <vscale x 32 x i16> @vp_ctlz_zero_undef_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {1919; CHECK-LABEL: vp_ctlz_zero_undef_nxv32i16_unmasked:1920; CHECK: # %bb.0:1921; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma1922; CHECK-NEXT: vsrl.vi v16, v8, 11923; CHECK-NEXT: lui a0, 51924; CHECK-NEXT: vor.vv v8, v8, v161925; CHECK-NEXT: addi a0, a0, 13651926; CHECK-NEXT: vsrl.vi v16, v8, 21927; CHECK-NEXT: vor.vv v8, v8, v161928; CHECK-NEXT: vsrl.vi v16, v8, 41929; CHECK-NEXT: vor.vv v8, v8, v161930; CHECK-NEXT: vsrl.vi v16, v8, 81931; CHECK-NEXT: vor.vv v8, v8, v161932; CHECK-NEXT: vnot.v v8, v81933; CHECK-NEXT: vsrl.vi v16, v8, 11934; CHECK-NEXT: vand.vx v16, v16, a01935; CHECK-NEXT: lui a0, 31936; CHECK-NEXT: addi a0, a0, 8191937; CHECK-NEXT: vsub.vv v8, v8, v161938; CHECK-NEXT: vand.vx v16, v8, a01939; CHECK-NEXT: vsrl.vi v8, v8, 21940; CHECK-NEXT: vand.vx v8, v8, a01941; CHECK-NEXT: lui a0, 11942; CHECK-NEXT: addi a0, a0, -2411943; CHECK-NEXT: vadd.vv v8, v16, v81944; CHECK-NEXT: vsrl.vi v16, v8, 41945; CHECK-NEXT: vadd.vv v8, v8, v161946; CHECK-NEXT: vand.vx v8, v8, a01947; CHECK-NEXT: li a0, 2571948; CHECK-NEXT: vmul.vx v8, v8, a01949; CHECK-NEXT: vsrl.vi v8, v8, 81950; CHECK-NEXT: ret1951;1952; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv32i16_unmasked:1953; CHECK-ZVBB: # %bb.0:1954; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, m8, ta, ma1955; CHECK-ZVBB-NEXT: vclz.v v8, v81956; CHECK-ZVBB-NEXT: ret1957 %v = call <vscale x 32 x i16> @llvm.vp.ctlz.nxv32i16(<vscale x 32 x i16> %va, i1 true, <vscale x 32 x i1> splat (i1 true), i32 %evl)1958 ret <vscale x 32 x i16> %v1959}1960 1961define <vscale x 1 x i32> @vp_ctlz_zero_undef_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1962; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i32:1963; CHECK: # %bb.0:1964; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1965; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t1966; CHECK-NEXT: li a0, 521967; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma1968; CHECK-NEXT: vsrl.vx v8, v9, a0, v0.t1969; CHECK-NEXT: li a0, 10541970; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1971; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t1972; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t1973; CHECK-NEXT: ret1974;1975; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i32:1976; CHECK-ZVBB: # %bb.0:1977; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1978; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t1979; CHECK-ZVBB-NEXT: ret1980 %v = call <vscale x 1 x i32> @llvm.vp.ctlz.nxv1i32(<vscale x 1 x i32> %va, i1 true, <vscale x 1 x i1> %m, i32 %evl)1981 ret <vscale x 1 x i32> %v1982}1983 1984define <vscale x 1 x i32> @vp_ctlz_zero_undef_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {1985; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i32_unmasked:1986; CHECK: # %bb.0:1987; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1988; CHECK-NEXT: vfwcvt.f.xu.v v9, v81989; CHECK-NEXT: li a0, 521990; CHECK-NEXT: vnsrl.wx v8, v9, a01991; CHECK-NEXT: li a0, 10541992; CHECK-NEXT: vrsub.vx v8, v8, a01993; CHECK-NEXT: ret1994;1995; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i32_unmasked:1996; CHECK-ZVBB: # %bb.0:1997; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1998; CHECK-ZVBB-NEXT: vclz.v v8, v81999; CHECK-ZVBB-NEXT: ret2000 %v = call <vscale x 1 x i32> @llvm.vp.ctlz.nxv1i32(<vscale x 1 x i32> %va, i1 true, <vscale x 1 x i1> splat (i1 true), i32 %evl)2001 ret <vscale x 1 x i32> %v2002}2003 2004define <vscale x 2 x i32> @vp_ctlz_zero_undef_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {2005; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i32:2006; CHECK: # %bb.0:2007; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2008; CHECK-NEXT: vfwcvt.f.xu.v v10, v8, v0.t2009; CHECK-NEXT: li a0, 522010; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, ma2011; CHECK-NEXT: vsrl.vx v8, v10, a0, v0.t2012; CHECK-NEXT: li a0, 10542013; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma2014; CHECK-NEXT: vnsrl.wi v10, v8, 0, v0.t2015; CHECK-NEXT: vrsub.vx v8, v10, a0, v0.t2016; CHECK-NEXT: ret2017;2018; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i32:2019; CHECK-ZVBB: # %bb.0:2020; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m1, ta, ma2021; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2022; CHECK-ZVBB-NEXT: ret2023 %v = call <vscale x 2 x i32> @llvm.vp.ctlz.nxv2i32(<vscale x 2 x i32> %va, i1 true, <vscale x 2 x i1> %m, i32 %evl)2024 ret <vscale x 2 x i32> %v2025}2026 2027define <vscale x 2 x i32> @vp_ctlz_zero_undef_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {2028; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i32_unmasked:2029; CHECK: # %bb.0:2030; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2031; CHECK-NEXT: vfwcvt.f.xu.v v10, v82032; CHECK-NEXT: li a0, 522033; CHECK-NEXT: vnsrl.wx v8, v10, a02034; CHECK-NEXT: li a0, 10542035; CHECK-NEXT: vrsub.vx v8, v8, a02036; CHECK-NEXT: ret2037;2038; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i32_unmasked:2039; CHECK-ZVBB: # %bb.0:2040; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m1, ta, ma2041; CHECK-ZVBB-NEXT: vclz.v v8, v82042; CHECK-ZVBB-NEXT: ret2043 %v = call <vscale x 2 x i32> @llvm.vp.ctlz.nxv2i32(<vscale x 2 x i32> %va, i1 true, <vscale x 2 x i1> splat (i1 true), i32 %evl)2044 ret <vscale x 2 x i32> %v2045}2046 2047define <vscale x 4 x i32> @vp_ctlz_zero_undef_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {2048; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i32:2049; CHECK: # %bb.0:2050; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2051; CHECK-NEXT: vfwcvt.f.xu.v v12, v8, v0.t2052; CHECK-NEXT: li a0, 522053; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, ma2054; CHECK-NEXT: vsrl.vx v8, v12, a0, v0.t2055; CHECK-NEXT: li a0, 10542056; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma2057; CHECK-NEXT: vnsrl.wi v12, v8, 0, v0.t2058; CHECK-NEXT: vrsub.vx v8, v12, a0, v0.t2059; CHECK-NEXT: ret2060;2061; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i32:2062; CHECK-ZVBB: # %bb.0:2063; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m2, ta, ma2064; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2065; CHECK-ZVBB-NEXT: ret2066 %v = call <vscale x 4 x i32> @llvm.vp.ctlz.nxv4i32(<vscale x 4 x i32> %va, i1 true, <vscale x 4 x i1> %m, i32 %evl)2067 ret <vscale x 4 x i32> %v2068}2069 2070define <vscale x 4 x i32> @vp_ctlz_zero_undef_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {2071; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i32_unmasked:2072; CHECK: # %bb.0:2073; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2074; CHECK-NEXT: vfwcvt.f.xu.v v12, v82075; CHECK-NEXT: li a0, 522076; CHECK-NEXT: vnsrl.wx v8, v12, a02077; CHECK-NEXT: li a0, 10542078; CHECK-NEXT: vrsub.vx v8, v8, a02079; CHECK-NEXT: ret2080;2081; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i32_unmasked:2082; CHECK-ZVBB: # %bb.0:2083; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m2, ta, ma2084; CHECK-ZVBB-NEXT: vclz.v v8, v82085; CHECK-ZVBB-NEXT: ret2086 %v = call <vscale x 4 x i32> @llvm.vp.ctlz.nxv4i32(<vscale x 4 x i32> %va, i1 true, <vscale x 4 x i1> splat (i1 true), i32 %evl)2087 ret <vscale x 4 x i32> %v2088}2089 2090define <vscale x 8 x i32> @vp_ctlz_zero_undef_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2091; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i32:2092; CHECK: # %bb.0:2093; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2094; CHECK-NEXT: vfwcvt.f.xu.v v16, v8, v0.t2095; CHECK-NEXT: li a0, 522096; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma2097; CHECK-NEXT: vsrl.vx v8, v16, a0, v0.t2098; CHECK-NEXT: li a0, 10542099; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma2100; CHECK-NEXT: vnsrl.wi v16, v8, 0, v0.t2101; CHECK-NEXT: vrsub.vx v8, v16, a0, v0.t2102; CHECK-NEXT: ret2103;2104; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i32:2105; CHECK-ZVBB: # %bb.0:2106; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m4, ta, ma2107; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2108; CHECK-ZVBB-NEXT: ret2109 %v = call <vscale x 8 x i32> @llvm.vp.ctlz.nxv8i32(<vscale x 8 x i32> %va, i1 true, <vscale x 8 x i1> %m, i32 %evl)2110 ret <vscale x 8 x i32> %v2111}2112 2113define <vscale x 8 x i32> @vp_ctlz_zero_undef_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {2114; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i32_unmasked:2115; CHECK: # %bb.0:2116; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2117; CHECK-NEXT: vfwcvt.f.xu.v v16, v82118; CHECK-NEXT: li a0, 522119; CHECK-NEXT: vnsrl.wx v8, v16, a02120; CHECK-NEXT: li a0, 10542121; CHECK-NEXT: vrsub.vx v8, v8, a02122; CHECK-NEXT: ret2123;2124; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i32_unmasked:2125; CHECK-ZVBB: # %bb.0:2126; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m4, ta, ma2127; CHECK-ZVBB-NEXT: vclz.v v8, v82128; CHECK-ZVBB-NEXT: ret2129 %v = call <vscale x 8 x i32> @llvm.vp.ctlz.nxv8i32(<vscale x 8 x i32> %va, i1 true, <vscale x 8 x i1> splat (i1 true), i32 %evl)2130 ret <vscale x 8 x i32> %v2131}2132 2133define <vscale x 16 x i32> @vp_ctlz_zero_undef_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {2134; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i32:2135; CHECK: # %bb.0:2136; CHECK-NEXT: fsrmi a1, 12137; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma2138; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2139; CHECK-NEXT: li a0, 1582140; CHECK-NEXT: vsrl.vi v8, v8, 23, v0.t2141; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2142; CHECK-NEXT: fsrm a12143; CHECK-NEXT: ret2144;2145; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i32:2146; CHECK-ZVBB: # %bb.0:2147; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m8, ta, ma2148; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2149; CHECK-ZVBB-NEXT: ret2150 %v = call <vscale x 16 x i32> @llvm.vp.ctlz.nxv16i32(<vscale x 16 x i32> %va, i1 true, <vscale x 16 x i1> %m, i32 %evl)2151 ret <vscale x 16 x i32> %v2152}2153 2154define <vscale x 16 x i32> @vp_ctlz_zero_undef_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {2155; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i32_unmasked:2156; CHECK: # %bb.0:2157; CHECK-NEXT: fsrmi a1, 12158; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma2159; CHECK-NEXT: vfcvt.f.xu.v v8, v82160; CHECK-NEXT: vsrl.vi v8, v8, 232161; CHECK-NEXT: li a0, 1582162; CHECK-NEXT: vrsub.vx v8, v8, a02163; CHECK-NEXT: fsrm a12164; CHECK-NEXT: ret2165;2166; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i32_unmasked:2167; CHECK-ZVBB: # %bb.0:2168; CHECK-ZVBB-NEXT: vsetvli zero, a0, e32, m8, ta, ma2169; CHECK-ZVBB-NEXT: vclz.v v8, v82170; CHECK-ZVBB-NEXT: ret2171 %v = call <vscale x 16 x i32> @llvm.vp.ctlz.nxv16i32(<vscale x 16 x i32> %va, i1 true, <vscale x 16 x i1> splat (i1 true), i32 %evl)2172 ret <vscale x 16 x i32> %v2173}2174 2175define <vscale x 1 x i64> @vp_ctlz_zero_undef_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2176; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i64:2177; CHECK: # %bb.0:2178; CHECK-NEXT: fsrmi a1, 12179; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma2180; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2181; CHECK-NEXT: li a0, 522182; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t2183; CHECK-NEXT: li a0, 10862184; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2185; CHECK-NEXT: fsrm a12186; CHECK-NEXT: ret2187;2188; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i64:2189; CHECK-ZVBB: # %bb.0:2190; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m1, ta, ma2191; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2192; CHECK-ZVBB-NEXT: ret2193 %v = call <vscale x 1 x i64> @llvm.vp.ctlz.nxv1i64(<vscale x 1 x i64> %va, i1 true, <vscale x 1 x i1> %m, i32 %evl)2194 ret <vscale x 1 x i64> %v2195}2196 2197define <vscale x 1 x i64> @vp_ctlz_zero_undef_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {2198; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i64_unmasked:2199; CHECK: # %bb.0:2200; CHECK-NEXT: fsrmi a1, 12201; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma2202; CHECK-NEXT: vfcvt.f.xu.v v8, v82203; CHECK-NEXT: li a0, 522204; CHECK-NEXT: vsrl.vx v8, v8, a02205; CHECK-NEXT: li a0, 10862206; CHECK-NEXT: vrsub.vx v8, v8, a02207; CHECK-NEXT: fsrm a12208; CHECK-NEXT: ret2209;2210; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i64_unmasked:2211; CHECK-ZVBB: # %bb.0:2212; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m1, ta, ma2213; CHECK-ZVBB-NEXT: vclz.v v8, v82214; CHECK-ZVBB-NEXT: ret2215 %v = call <vscale x 1 x i64> @llvm.vp.ctlz.nxv1i64(<vscale x 1 x i64> %va, i1 true, <vscale x 1 x i1> splat (i1 true), i32 %evl)2216 ret <vscale x 1 x i64> %v2217}2218 2219define <vscale x 2 x i64> @vp_ctlz_zero_undef_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {2220; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i64:2221; CHECK: # %bb.0:2222; CHECK-NEXT: fsrmi a1, 12223; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma2224; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2225; CHECK-NEXT: li a0, 522226; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t2227; CHECK-NEXT: li a0, 10862228; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2229; CHECK-NEXT: fsrm a12230; CHECK-NEXT: ret2231;2232; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i64:2233; CHECK-ZVBB: # %bb.0:2234; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m2, ta, ma2235; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2236; CHECK-ZVBB-NEXT: ret2237 %v = call <vscale x 2 x i64> @llvm.vp.ctlz.nxv2i64(<vscale x 2 x i64> %va, i1 true, <vscale x 2 x i1> %m, i32 %evl)2238 ret <vscale x 2 x i64> %v2239}2240 2241define <vscale x 2 x i64> @vp_ctlz_zero_undef_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {2242; CHECK-LABEL: vp_ctlz_zero_undef_nxv2i64_unmasked:2243; CHECK: # %bb.0:2244; CHECK-NEXT: fsrmi a1, 12245; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma2246; CHECK-NEXT: vfcvt.f.xu.v v8, v82247; CHECK-NEXT: li a0, 522248; CHECK-NEXT: vsrl.vx v8, v8, a02249; CHECK-NEXT: li a0, 10862250; CHECK-NEXT: vrsub.vx v8, v8, a02251; CHECK-NEXT: fsrm a12252; CHECK-NEXT: ret2253;2254; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv2i64_unmasked:2255; CHECK-ZVBB: # %bb.0:2256; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m2, ta, ma2257; CHECK-ZVBB-NEXT: vclz.v v8, v82258; CHECK-ZVBB-NEXT: ret2259 %v = call <vscale x 2 x i64> @llvm.vp.ctlz.nxv2i64(<vscale x 2 x i64> %va, i1 true, <vscale x 2 x i1> splat (i1 true), i32 %evl)2260 ret <vscale x 2 x i64> %v2261}2262 2263define <vscale x 4 x i64> @vp_ctlz_zero_undef_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {2264; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i64:2265; CHECK: # %bb.0:2266; CHECK-NEXT: fsrmi a1, 12267; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma2268; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2269; CHECK-NEXT: li a0, 522270; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t2271; CHECK-NEXT: li a0, 10862272; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2273; CHECK-NEXT: fsrm a12274; CHECK-NEXT: ret2275;2276; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i64:2277; CHECK-ZVBB: # %bb.0:2278; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m4, ta, ma2279; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2280; CHECK-ZVBB-NEXT: ret2281 %v = call <vscale x 4 x i64> @llvm.vp.ctlz.nxv4i64(<vscale x 4 x i64> %va, i1 true, <vscale x 4 x i1> %m, i32 %evl)2282 ret <vscale x 4 x i64> %v2283}2284 2285define <vscale x 4 x i64> @vp_ctlz_zero_undef_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {2286; CHECK-LABEL: vp_ctlz_zero_undef_nxv4i64_unmasked:2287; CHECK: # %bb.0:2288; CHECK-NEXT: fsrmi a1, 12289; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma2290; CHECK-NEXT: vfcvt.f.xu.v v8, v82291; CHECK-NEXT: li a0, 522292; CHECK-NEXT: vsrl.vx v8, v8, a02293; CHECK-NEXT: li a0, 10862294; CHECK-NEXT: vrsub.vx v8, v8, a02295; CHECK-NEXT: fsrm a12296; CHECK-NEXT: ret2297;2298; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv4i64_unmasked:2299; CHECK-ZVBB: # %bb.0:2300; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m4, ta, ma2301; CHECK-ZVBB-NEXT: vclz.v v8, v82302; CHECK-ZVBB-NEXT: ret2303 %v = call <vscale x 4 x i64> @llvm.vp.ctlz.nxv4i64(<vscale x 4 x i64> %va, i1 true, <vscale x 4 x i1> splat (i1 true), i32 %evl)2304 ret <vscale x 4 x i64> %v2305}2306 2307define <vscale x 7 x i64> @vp_ctlz_zero_undef_nxv7i64(<vscale x 7 x i64> %va, <vscale x 7 x i1> %m, i32 zeroext %evl) {2308; CHECK-LABEL: vp_ctlz_zero_undef_nxv7i64:2309; CHECK: # %bb.0:2310; CHECK-NEXT: fsrmi a1, 12311; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma2312; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2313; CHECK-NEXT: li a0, 522314; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t2315; CHECK-NEXT: li a0, 10862316; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2317; CHECK-NEXT: fsrm a12318; CHECK-NEXT: ret2319;2320; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv7i64:2321; CHECK-ZVBB: # %bb.0:2322; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma2323; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2324; CHECK-ZVBB-NEXT: ret2325 %v = call <vscale x 7 x i64> @llvm.vp.ctlz.nxv7i64(<vscale x 7 x i64> %va, i1 true, <vscale x 7 x i1> %m, i32 %evl)2326 ret <vscale x 7 x i64> %v2327}2328 2329define <vscale x 7 x i64> @vp_ctlz_zero_undef_nxv7i64_unmasked(<vscale x 7 x i64> %va, i32 zeroext %evl) {2330; CHECK-LABEL: vp_ctlz_zero_undef_nxv7i64_unmasked:2331; CHECK: # %bb.0:2332; CHECK-NEXT: fsrmi a1, 12333; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma2334; CHECK-NEXT: vfcvt.f.xu.v v8, v82335; CHECK-NEXT: li a0, 522336; CHECK-NEXT: vsrl.vx v8, v8, a02337; CHECK-NEXT: li a0, 10862338; CHECK-NEXT: vrsub.vx v8, v8, a02339; CHECK-NEXT: fsrm a12340; CHECK-NEXT: ret2341;2342; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv7i64_unmasked:2343; CHECK-ZVBB: # %bb.0:2344; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma2345; CHECK-ZVBB-NEXT: vclz.v v8, v82346; CHECK-ZVBB-NEXT: ret2347 %v = call <vscale x 7 x i64> @llvm.vp.ctlz.nxv7i64(<vscale x 7 x i64> %va, i1 true, <vscale x 7 x i1> splat (i1 true), i32 %evl)2348 ret <vscale x 7 x i64> %v2349}2350 2351define <vscale x 8 x i64> @vp_ctlz_zero_undef_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2352; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i64:2353; CHECK: # %bb.0:2354; CHECK-NEXT: fsrmi a1, 12355; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma2356; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2357; CHECK-NEXT: li a0, 522358; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t2359; CHECK-NEXT: li a0, 10862360; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2361; CHECK-NEXT: fsrm a12362; CHECK-NEXT: ret2363;2364; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i64:2365; CHECK-ZVBB: # %bb.0:2366; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma2367; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2368; CHECK-ZVBB-NEXT: ret2369 %v = call <vscale x 8 x i64> @llvm.vp.ctlz.nxv8i64(<vscale x 8 x i64> %va, i1 true, <vscale x 8 x i1> %m, i32 %evl)2370 ret <vscale x 8 x i64> %v2371}2372 2373define <vscale x 8 x i64> @vp_ctlz_zero_undef_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {2374; CHECK-LABEL: vp_ctlz_zero_undef_nxv8i64_unmasked:2375; CHECK: # %bb.0:2376; CHECK-NEXT: fsrmi a1, 12377; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma2378; CHECK-NEXT: vfcvt.f.xu.v v8, v82379; CHECK-NEXT: li a0, 522380; CHECK-NEXT: vsrl.vx v8, v8, a02381; CHECK-NEXT: li a0, 10862382; CHECK-NEXT: vrsub.vx v8, v8, a02383; CHECK-NEXT: fsrm a12384; CHECK-NEXT: ret2385;2386; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv8i64_unmasked:2387; CHECK-ZVBB: # %bb.0:2388; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma2389; CHECK-ZVBB-NEXT: vclz.v v8, v82390; CHECK-ZVBB-NEXT: ret2391 %v = call <vscale x 8 x i64> @llvm.vp.ctlz.nxv8i64(<vscale x 8 x i64> %va, i1 true, <vscale x 8 x i1> splat (i1 true), i32 %evl)2392 ret <vscale x 8 x i64> %v2393}2394 2395define <vscale x 16 x i64> @vp_ctlz_zero_undef_nxv16i64(<vscale x 16 x i64> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {2396; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i64:2397; CHECK: # %bb.0:2398; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma2399; CHECK-NEXT: vmv1r.v v24, v02400; CHECK-NEXT: csrr a1, vlenb2401; CHECK-NEXT: fsrmi a3, 12402; CHECK-NEXT: srli a2, a1, 32403; CHECK-NEXT: sub a4, a0, a12404; CHECK-NEXT: vslidedown.vx v0, v0, a22405; CHECK-NEXT: sltu a2, a0, a42406; CHECK-NEXT: addi a2, a2, -12407; CHECK-NEXT: and a4, a2, a42408; CHECK-NEXT: li a2, 522409; CHECK-NEXT: vsetvli zero, a4, e64, m8, ta, ma2410; CHECK-NEXT: vfcvt.f.xu.v v16, v16, v0.t2411; CHECK-NEXT: fsrm a32412; CHECK-NEXT: vsrl.vx v16, v16, a2, v0.t2413; CHECK-NEXT: li a3, 10862414; CHECK-NEXT: vrsub.vx v16, v16, a3, v0.t2415; CHECK-NEXT: bltu a0, a1, .LBB94_22416; CHECK-NEXT: # %bb.1:2417; CHECK-NEXT: mv a0, a12418; CHECK-NEXT: .LBB94_2:2419; CHECK-NEXT: fsrmi a1, 12420; CHECK-NEXT: vmv1r.v v0, v242421; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma2422; CHECK-NEXT: vfcvt.f.xu.v v8, v8, v0.t2423; CHECK-NEXT: vsrl.vx v8, v8, a2, v0.t2424; CHECK-NEXT: vrsub.vx v8, v8, a3, v0.t2425; CHECK-NEXT: fsrm a12426; CHECK-NEXT: ret2427;2428; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i64:2429; CHECK-ZVBB: # %bb.0:2430; CHECK-ZVBB-NEXT: vsetvli a1, zero, e8, mf4, ta, ma2431; CHECK-ZVBB-NEXT: vmv1r.v v24, v02432; CHECK-ZVBB-NEXT: csrr a1, vlenb2433; CHECK-ZVBB-NEXT: srli a2, a1, 32434; CHECK-ZVBB-NEXT: sub a3, a0, a12435; CHECK-ZVBB-NEXT: vslidedown.vx v0, v0, a22436; CHECK-ZVBB-NEXT: sltu a2, a0, a32437; CHECK-ZVBB-NEXT: addi a2, a2, -12438; CHECK-ZVBB-NEXT: and a2, a2, a32439; CHECK-ZVBB-NEXT: vsetvli zero, a2, e64, m8, ta, ma2440; CHECK-ZVBB-NEXT: vclz.v v16, v16, v0.t2441; CHECK-ZVBB-NEXT: bltu a0, a1, .LBB94_22442; CHECK-ZVBB-NEXT: # %bb.1:2443; CHECK-ZVBB-NEXT: mv a0, a12444; CHECK-ZVBB-NEXT: .LBB94_2:2445; CHECK-ZVBB-NEXT: vmv1r.v v0, v242446; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma2447; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2448; CHECK-ZVBB-NEXT: ret2449 %v = call <vscale x 16 x i64> @llvm.vp.ctlz.nxv16i64(<vscale x 16 x i64> %va, i1 true, <vscale x 16 x i1> %m, i32 %evl)2450 ret <vscale x 16 x i64> %v2451}2452 2453define <vscale x 16 x i64> @vp_ctlz_zero_undef_nxv16i64_unmasked(<vscale x 16 x i64> %va, i32 zeroext %evl) {2454; CHECK-LABEL: vp_ctlz_zero_undef_nxv16i64_unmasked:2455; CHECK: # %bb.0:2456; CHECK-NEXT: csrr a1, vlenb2457; CHECK-NEXT: fsrmi a3, 12458; CHECK-NEXT: sub a2, a0, a12459; CHECK-NEXT: sltu a4, a0, a22460; CHECK-NEXT: addi a4, a4, -12461; CHECK-NEXT: and a4, a4, a22462; CHECK-NEXT: li a2, 522463; CHECK-NEXT: vsetvli zero, a4, e64, m8, ta, ma2464; CHECK-NEXT: vfcvt.f.xu.v v16, v162465; CHECK-NEXT: fsrm a32466; CHECK-NEXT: vsrl.vx v16, v16, a22467; CHECK-NEXT: li a3, 10862468; CHECK-NEXT: vrsub.vx v16, v16, a32469; CHECK-NEXT: bltu a0, a1, .LBB95_22470; CHECK-NEXT: # %bb.1:2471; CHECK-NEXT: mv a0, a12472; CHECK-NEXT: .LBB95_2:2473; CHECK-NEXT: fsrmi a1, 12474; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma2475; CHECK-NEXT: vfcvt.f.xu.v v8, v82476; CHECK-NEXT: vsrl.vx v8, v8, a22477; CHECK-NEXT: vrsub.vx v8, v8, a32478; CHECK-NEXT: fsrm a12479; CHECK-NEXT: ret2480;2481; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv16i64_unmasked:2482; CHECK-ZVBB: # %bb.0:2483; CHECK-ZVBB-NEXT: csrr a1, vlenb2484; CHECK-ZVBB-NEXT: sub a2, a0, a12485; CHECK-ZVBB-NEXT: sltu a3, a0, a22486; CHECK-ZVBB-NEXT: addi a3, a3, -12487; CHECK-ZVBB-NEXT: and a2, a3, a22488; CHECK-ZVBB-NEXT: vsetvli zero, a2, e64, m8, ta, ma2489; CHECK-ZVBB-NEXT: vclz.v v16, v162490; CHECK-ZVBB-NEXT: bltu a0, a1, .LBB95_22491; CHECK-ZVBB-NEXT: # %bb.1:2492; CHECK-ZVBB-NEXT: mv a0, a12493; CHECK-ZVBB-NEXT: .LBB95_2:2494; CHECK-ZVBB-NEXT: vsetvli zero, a0, e64, m8, ta, ma2495; CHECK-ZVBB-NEXT: vclz.v v8, v82496; CHECK-ZVBB-NEXT: ret2497 %v = call <vscale x 16 x i64> @llvm.vp.ctlz.nxv16i64(<vscale x 16 x i64> %va, i1 true, <vscale x 16 x i1> splat (i1 true), i32 %evl)2498 ret <vscale x 16 x i64> %v2499}2500 2501; Test promotion.2502define <vscale x 1 x i9> @vp_ctlz_nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2503; CHECK-LABEL: vp_ctlz_nxv1i9:2504; CHECK: # %bb.0:2505; CHECK-NEXT: li a1, 5112506; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2507; CHECK-NEXT: vand.vx v8, v8, a1, v0.t2508; CHECK-NEXT: li a0, 1422509; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t2510; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma2511; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t2512; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma2513; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t2514; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2515; CHECK-NEXT: li a0, 162516; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t2517; CHECK-NEXT: vadd.vi v8, v8, -7, v0.t2518; CHECK-NEXT: ret2519;2520; CHECK-ZVBB-LABEL: vp_ctlz_nxv1i9:2521; CHECK-ZVBB: # %bb.0:2522; CHECK-ZVBB-NEXT: li a1, 5112523; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2524; CHECK-ZVBB-NEXT: vand.vx v8, v8, a1, v0.t2525; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2526; CHECK-ZVBB-NEXT: vadd.vi v8, v8, -7, v0.t2527; CHECK-ZVBB-NEXT: ret2528 %v = call <vscale x 1 x i9> @llvm.vp.ctlz.nxv1i9(<vscale x 1 x i9> %va, i1 false, <vscale x 1 x i1> %m, i32 %evl)2529 ret <vscale x 1 x i9> %v2530}2531define <vscale x 1 x i9> @vp_ctlz_zero_undef_nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2532; CHECK-LABEL: vp_ctlz_zero_undef_nxv1i9:2533; CHECK: # %bb.0:2534; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2535; CHECK-NEXT: vsll.vi v8, v8, 7, v0.t2536; CHECK-NEXT: li a0, 1422537; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t2538; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma2539; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t2540; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma2541; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t2542; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2543; CHECK-NEXT: ret2544;2545; CHECK-ZVBB-LABEL: vp_ctlz_zero_undef_nxv1i9:2546; CHECK-ZVBB: # %bb.0:2547; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2548; CHECK-ZVBB-NEXT: vsll.vi v8, v8, 7, v0.t2549; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2550; CHECK-ZVBB-NEXT: ret2551 %v = call <vscale x 1 x i9> @llvm.vp.ctlz.nxv1i9(<vscale x 1 x i9> %va, i1 true, <vscale x 1 x i1> %m, i32 %evl)2552 ret <vscale x 1 x i9> %v2553}2554define <vscale x 1 x i9> @vp_ctlo_nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2555; CHECK-LABEL: vp_ctlo_nxv1i9:2556; CHECK: # %bb.0:2557; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2558; CHECK-NEXT: vsll.vi v8, v8, 7, v0.t2559; CHECK-NEXT: li a0, 1422560; CHECK-NEXT: vnot.v v8, v8, v0.t2561; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t2562; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma2563; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t2564; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma2565; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t2566; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2567; CHECK-NEXT: ret2568;2569; CHECK-ZVBB-LABEL: vp_ctlo_nxv1i9:2570; CHECK-ZVBB: # %bb.0:2571; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2572; CHECK-ZVBB-NEXT: vsll.vi v8, v8, 7, v0.t2573; CHECK-ZVBB-NEXT: vnot.v v8, v8, v0.t2574; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2575; CHECK-ZVBB-NEXT: ret2576 %va.not = xor <vscale x 1 x i9> %va, splat (i9 -1)2577 %v = call <vscale x 1 x i9> @llvm.vp.ctlz.nxv1i9(<vscale x 1 x i9> %va.not, i1 false, <vscale x 1 x i1> %m, i32 %evl)2578 ret <vscale x 1 x i9> %v2579}2580define <vscale x 1 x i9> @vp_ctlo_zero_undef_nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2581; CHECK-LABEL: vp_ctlo_zero_undef_nxv1i9:2582; CHECK: # %bb.0:2583; CHECK-NEXT: li a1, 5112584; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2585; CHECK-NEXT: vxor.vx v8, v8, a12586; CHECK-NEXT: vsll.vi v8, v8, 7, v0.t2587; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t2588; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma2589; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t2590; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma2591; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t2592; CHECK-NEXT: li a0, 1422593; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2594; CHECK-NEXT: ret2595;2596; CHECK-ZVBB-LABEL: vp_ctlo_zero_undef_nxv1i9:2597; CHECK-ZVBB: # %bb.0:2598; CHECK-ZVBB-NEXT: li a1, 5112599; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2600; CHECK-ZVBB-NEXT: vxor.vx v8, v8, a12601; CHECK-ZVBB-NEXT: vsll.vi v8, v8, 7, v0.t2602; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2603; CHECK-ZVBB-NEXT: ret2604 %va.not = xor <vscale x 1 x i9> %va, splat (i9 -1)2605 %v = call <vscale x 1 x i9> @llvm.vp.ctlz.nxv1i9(<vscale x 1 x i9> %va.not, i1 true, <vscale x 1 x i1> %m, i32 %evl)2606 ret <vscale x 1 x i9> %v2607}2608 2609define <vscale x 1 x i9> @vp_ctlo_nxv1i9_vp_xor(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2610; CHECK-LABEL: vp_ctlo_nxv1i9_vp_xor:2611; CHECK: # %bb.0:2612; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2613; CHECK-NEXT: vsll.vi v8, v8, 7, v0.t2614; CHECK-NEXT: li a0, 1422615; CHECK-NEXT: vnot.v v8, v8, v0.t2616; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t2617; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma2618; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t2619; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma2620; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t2621; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2622; CHECK-NEXT: ret2623;2624; CHECK-ZVBB-LABEL: vp_ctlo_nxv1i9_vp_xor:2625; CHECK-ZVBB: # %bb.0:2626; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2627; CHECK-ZVBB-NEXT: vsll.vi v8, v8, 7, v0.t2628; CHECK-ZVBB-NEXT: vnot.v v8, v8, v0.t2629; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2630; CHECK-ZVBB-NEXT: ret2631 %va.not = call <vscale x 1 x i9> @llvm.vp.xor.nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i9> splat (i9 -1), <vscale x 1 x i1> %m, i32 %evl)2632 %v = call <vscale x 1 x i9> @llvm.vp.ctlz.nxv1i9(<vscale x 1 x i9> %va.not, i1 false, <vscale x 1 x i1> %m, i32 %evl)2633 ret <vscale x 1 x i9> %v2634}2635 2636define <vscale x 1 x i9> @vp_ctlo_zero_undef_nxv1i9_vp_xor(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2637; CHECK-LABEL: vp_ctlo_zero_undef_nxv1i9_vp_xor:2638; CHECK: # %bb.0:2639; CHECK-NEXT: li a1, 5112640; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2641; CHECK-NEXT: vxor.vx v8, v8, a1, v0.t2642; CHECK-NEXT: vsll.vi v8, v8, 7, v0.t2643; CHECK-NEXT: vfwcvt.f.xu.v v9, v8, v0.t2644; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma2645; CHECK-NEXT: vsrl.vi v8, v9, 23, v0.t2646; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma2647; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t2648; CHECK-NEXT: li a0, 1422649; CHECK-NEXT: vrsub.vx v8, v8, a0, v0.t2650; CHECK-NEXT: ret2651;2652; CHECK-ZVBB-LABEL: vp_ctlo_zero_undef_nxv1i9_vp_xor:2653; CHECK-ZVBB: # %bb.0:2654; CHECK-ZVBB-NEXT: li a1, 5112655; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2656; CHECK-ZVBB-NEXT: vxor.vx v8, v8, a1, v0.t2657; CHECK-ZVBB-NEXT: vsll.vi v8, v8, 7, v0.t2658; CHECK-ZVBB-NEXT: vclz.v v8, v8, v0.t2659; CHECK-ZVBB-NEXT: ret2660 %va.not = call <vscale x 1 x i9> @llvm.vp.xor.nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i9> splat (i9 -1), <vscale x 1 x i1> %m, i32 %evl)2661 %v = call <vscale x 1 x i9> @llvm.vp.ctlz.nxv1i9(<vscale x 1 x i9> %va.not, i1 true, <vscale x 1 x i1> %m, i32 %evl)2662 ret <vscale x 1 x i9> %v2663}2664 2665define <vscale x 1 x i9> @vp_ctlo_zero_nxv1i9_unpredicated_ctlz_with_vp_xor(<vscale x 1 x i9> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2666; CHECK-LABEL: vp_ctlo_zero_nxv1i9_unpredicated_ctlz_with_vp_xor:2667; CHECK: # %bb.0:2668; CHECK-NEXT: li a1, 5112669; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2670; CHECK-NEXT: vxor.vx v8, v8, a1, v0.t2671; CHECK-NEXT: li a0, 1422672; CHECK-NEXT: vsetvli a2, zero, e16, mf4, ta, ma2673; CHECK-NEXT: vand.vx v8, v8, a12674; CHECK-NEXT: vfwcvt.f.xu.v v9, v82675; CHECK-NEXT: vnsrl.wi v8, v9, 232676; CHECK-NEXT: vrsub.vx v8, v8, a02677; CHECK-NEXT: li a0, 162678; CHECK-NEXT: vminu.vx v8, v8, a02679; CHECK-NEXT: vadd.vi v8, v8, -72680; CHECK-NEXT: ret2681;2682; CHECK-ZVBB-LABEL: vp_ctlo_zero_nxv1i9_unpredicated_ctlz_with_vp_xor:2683; CHECK-ZVBB: # %bb.0:2684; CHECK-ZVBB-NEXT: li a1, 5112685; CHECK-ZVBB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma2686; CHECK-ZVBB-NEXT: vxor.vx v8, v8, a1, v0.t2687; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, mf4, ta, ma2688; CHECK-ZVBB-NEXT: vand.vx v8, v8, a12689; CHECK-ZVBB-NEXT: vclz.v v8, v82690; CHECK-ZVBB-NEXT: vadd.vi v8, v8, -72691; CHECK-ZVBB-NEXT: ret2692 %va.not = call <vscale x 1 x i9> @llvm.vp.xor.nxv1i9(<vscale x 1 x i9> %va, <vscale x 1 x i9> splat (i9 -1), <vscale x 1 x i1> %m, i32 %evl)2693 %v = call <vscale x 1 x i9> @llvm.ctlz(<vscale x 1 x i9> %va.not, i1 false)2694 ret <vscale x 1 x i9> %v2695}2696 2697;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2698; RV32: {{.*}}2699; RV64: {{.*}}2700