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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644; RUN: llc -mtriple=riscv32 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVBB5; RUN: llc -mtriple=riscv64 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVBB6 7define <vscale x 1 x i8> @ctpop_nxv1i8(<vscale x 1 x i8> %va) {8; CHECK-LABEL: ctpop_nxv1i8:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma11; CHECK-NEXT: vsrl.vi v9, v8, 112; CHECK-NEXT: li a0, 8513; CHECK-NEXT: vand.vx v9, v9, a014; CHECK-NEXT: li a0, 5115; CHECK-NEXT: vsub.vv v8, v8, v916; CHECK-NEXT: vand.vx v9, v8, a017; CHECK-NEXT: vsrl.vi v8, v8, 218; CHECK-NEXT: vand.vx v8, v8, a019; CHECK-NEXT: vadd.vv v8, v9, v820; CHECK-NEXT: vsrl.vi v9, v8, 421; CHECK-NEXT: vadd.vv v8, v8, v922; CHECK-NEXT: vand.vi v8, v8, 1523; CHECK-NEXT: ret24;25; CHECK-ZVBB-LABEL: ctpop_nxv1i8:26; CHECK-ZVBB: # %bb.0:27; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, mf8, ta, ma28; CHECK-ZVBB-NEXT: vcpop.v v8, v829; CHECK-ZVBB-NEXT: ret30 %a = call <vscale x 1 x i8> @llvm.ctpop.nxv1i8(<vscale x 1 x i8> %va)31 ret <vscale x 1 x i8> %a32}33 34define <vscale x 2 x i8> @ctpop_nxv2i8(<vscale x 2 x i8> %va) {35; CHECK-LABEL: ctpop_nxv2i8:36; CHECK: # %bb.0:37; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma38; CHECK-NEXT: vsrl.vi v9, v8, 139; CHECK-NEXT: li a0, 8540; CHECK-NEXT: vand.vx v9, v9, a041; CHECK-NEXT: li a0, 5142; CHECK-NEXT: vsub.vv v8, v8, v943; CHECK-NEXT: vand.vx v9, v8, a044; CHECK-NEXT: vsrl.vi v8, v8, 245; CHECK-NEXT: vand.vx v8, v8, a046; CHECK-NEXT: vadd.vv v8, v9, v847; CHECK-NEXT: vsrl.vi v9, v8, 448; CHECK-NEXT: vadd.vv v8, v8, v949; CHECK-NEXT: vand.vi v8, v8, 1550; CHECK-NEXT: ret51;52; CHECK-ZVBB-LABEL: ctpop_nxv2i8:53; CHECK-ZVBB: # %bb.0:54; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, mf4, ta, ma55; CHECK-ZVBB-NEXT: vcpop.v v8, v856; CHECK-ZVBB-NEXT: ret57 %a = call <vscale x 2 x i8> @llvm.ctpop.nxv2i8(<vscale x 2 x i8> %va)58 ret <vscale x 2 x i8> %a59}60 61define <vscale x 4 x i8> @ctpop_nxv4i8(<vscale x 4 x i8> %va) {62; CHECK-LABEL: ctpop_nxv4i8:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma65; CHECK-NEXT: vsrl.vi v9, v8, 166; CHECK-NEXT: li a0, 8567; CHECK-NEXT: vand.vx v9, v9, a068; CHECK-NEXT: li a0, 5169; CHECK-NEXT: vsub.vv v8, v8, v970; CHECK-NEXT: vand.vx v9, v8, a071; CHECK-NEXT: vsrl.vi v8, v8, 272; CHECK-NEXT: vand.vx v8, v8, a073; CHECK-NEXT: vadd.vv v8, v9, v874; CHECK-NEXT: vsrl.vi v9, v8, 475; CHECK-NEXT: vadd.vv v8, v8, v976; CHECK-NEXT: vand.vi v8, v8, 1577; CHECK-NEXT: ret78;79; CHECK-ZVBB-LABEL: ctpop_nxv4i8:80; CHECK-ZVBB: # %bb.0:81; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, mf2, ta, ma82; CHECK-ZVBB-NEXT: vcpop.v v8, v883; CHECK-ZVBB-NEXT: ret84 %a = call <vscale x 4 x i8> @llvm.ctpop.nxv4i8(<vscale x 4 x i8> %va)85 ret <vscale x 4 x i8> %a86}87 88define <vscale x 8 x i8> @ctpop_nxv8i8(<vscale x 8 x i8> %va) {89; CHECK-LABEL: ctpop_nxv8i8:90; CHECK: # %bb.0:91; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma92; CHECK-NEXT: vsrl.vi v9, v8, 193; CHECK-NEXT: li a0, 8594; CHECK-NEXT: vand.vx v9, v9, a095; CHECK-NEXT: li a0, 5196; CHECK-NEXT: vsub.vv v8, v8, v997; CHECK-NEXT: vand.vx v9, v8, a098; CHECK-NEXT: vsrl.vi v8, v8, 299; CHECK-NEXT: vand.vx v8, v8, a0100; CHECK-NEXT: vadd.vv v8, v9, v8101; CHECK-NEXT: vsrl.vi v9, v8, 4102; CHECK-NEXT: vadd.vv v8, v8, v9103; CHECK-NEXT: vand.vi v8, v8, 15104; CHECK-NEXT: ret105;106; CHECK-ZVBB-LABEL: ctpop_nxv8i8:107; CHECK-ZVBB: # %bb.0:108; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, m1, ta, ma109; CHECK-ZVBB-NEXT: vcpop.v v8, v8110; CHECK-ZVBB-NEXT: ret111 %a = call <vscale x 8 x i8> @llvm.ctpop.nxv8i8(<vscale x 8 x i8> %va)112 ret <vscale x 8 x i8> %a113}114 115define <vscale x 16 x i8> @ctpop_nxv16i8(<vscale x 16 x i8> %va) {116; CHECK-LABEL: ctpop_nxv16i8:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma119; CHECK-NEXT: vsrl.vi v10, v8, 1120; CHECK-NEXT: li a0, 85121; CHECK-NEXT: vand.vx v10, v10, a0122; CHECK-NEXT: li a0, 51123; CHECK-NEXT: vsub.vv v8, v8, v10124; CHECK-NEXT: vand.vx v10, v8, a0125; CHECK-NEXT: vsrl.vi v8, v8, 2126; CHECK-NEXT: vand.vx v8, v8, a0127; CHECK-NEXT: vadd.vv v8, v10, v8128; CHECK-NEXT: vsrl.vi v10, v8, 4129; CHECK-NEXT: vadd.vv v8, v8, v10130; CHECK-NEXT: vand.vi v8, v8, 15131; CHECK-NEXT: ret132;133; CHECK-ZVBB-LABEL: ctpop_nxv16i8:134; CHECK-ZVBB: # %bb.0:135; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, m2, ta, ma136; CHECK-ZVBB-NEXT: vcpop.v v8, v8137; CHECK-ZVBB-NEXT: ret138 %a = call <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8> %va)139 ret <vscale x 16 x i8> %a140}141 142define <vscale x 32 x i8> @ctpop_nxv32i8(<vscale x 32 x i8> %va) {143; CHECK-LABEL: ctpop_nxv32i8:144; CHECK: # %bb.0:145; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma146; CHECK-NEXT: vsrl.vi v12, v8, 1147; CHECK-NEXT: li a0, 85148; CHECK-NEXT: vand.vx v12, v12, a0149; CHECK-NEXT: li a0, 51150; CHECK-NEXT: vsub.vv v8, v8, v12151; CHECK-NEXT: vand.vx v12, v8, a0152; CHECK-NEXT: vsrl.vi v8, v8, 2153; CHECK-NEXT: vand.vx v8, v8, a0154; CHECK-NEXT: vadd.vv v8, v12, v8155; CHECK-NEXT: vsrl.vi v12, v8, 4156; CHECK-NEXT: vadd.vv v8, v8, v12157; CHECK-NEXT: vand.vi v8, v8, 15158; CHECK-NEXT: ret159;160; CHECK-ZVBB-LABEL: ctpop_nxv32i8:161; CHECK-ZVBB: # %bb.0:162; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, m4, ta, ma163; CHECK-ZVBB-NEXT: vcpop.v v8, v8164; CHECK-ZVBB-NEXT: ret165 %a = call <vscale x 32 x i8> @llvm.ctpop.nxv32i8(<vscale x 32 x i8> %va)166 ret <vscale x 32 x i8> %a167}168 169define <vscale x 64 x i8> @ctpop_nxv64i8(<vscale x 64 x i8> %va) {170; CHECK-LABEL: ctpop_nxv64i8:171; CHECK: # %bb.0:172; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma173; CHECK-NEXT: vsrl.vi v16, v8, 1174; CHECK-NEXT: li a0, 85175; CHECK-NEXT: vand.vx v16, v16, a0176; CHECK-NEXT: li a0, 51177; CHECK-NEXT: vsub.vv v8, v8, v16178; CHECK-NEXT: vand.vx v16, v8, a0179; CHECK-NEXT: vsrl.vi v8, v8, 2180; CHECK-NEXT: vand.vx v8, v8, a0181; CHECK-NEXT: vadd.vv v8, v16, v8182; CHECK-NEXT: vsrl.vi v16, v8, 4183; CHECK-NEXT: vadd.vv v8, v8, v16184; CHECK-NEXT: vand.vi v8, v8, 15185; CHECK-NEXT: ret186;187; CHECK-ZVBB-LABEL: ctpop_nxv64i8:188; CHECK-ZVBB: # %bb.0:189; CHECK-ZVBB-NEXT: vsetvli a0, zero, e8, m8, ta, ma190; CHECK-ZVBB-NEXT: vcpop.v v8, v8191; CHECK-ZVBB-NEXT: ret192 %a = call <vscale x 64 x i8> @llvm.ctpop.nxv64i8(<vscale x 64 x i8> %va)193 ret <vscale x 64 x i8> %a194}195 196define <vscale x 1 x i16> @ctpop_nxv1i16(<vscale x 1 x i16> %va) {197; CHECK-LABEL: ctpop_nxv1i16:198; CHECK: # %bb.0:199; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma200; CHECK-NEXT: vsrl.vi v9, v8, 1201; CHECK-NEXT: lui a0, 5202; CHECK-NEXT: addi a0, a0, 1365203; CHECK-NEXT: vand.vx v9, v9, a0204; CHECK-NEXT: lui a0, 3205; CHECK-NEXT: addi a0, a0, 819206; CHECK-NEXT: vsub.vv v8, v8, v9207; CHECK-NEXT: vand.vx v9, v8, a0208; CHECK-NEXT: vsrl.vi v8, v8, 2209; CHECK-NEXT: vand.vx v8, v8, a0210; CHECK-NEXT: lui a0, 1211; CHECK-NEXT: addi a0, a0, -241212; CHECK-NEXT: vadd.vv v8, v9, v8213; CHECK-NEXT: vsrl.vi v9, v8, 4214; CHECK-NEXT: vadd.vv v8, v8, v9215; CHECK-NEXT: vand.vx v8, v8, a0216; CHECK-NEXT: li a0, 257217; CHECK-NEXT: vmul.vx v8, v8, a0218; CHECK-NEXT: vsrl.vi v8, v8, 8219; CHECK-NEXT: ret220;221; CHECK-ZVBB-LABEL: ctpop_nxv1i16:222; CHECK-ZVBB: # %bb.0:223; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, mf4, ta, ma224; CHECK-ZVBB-NEXT: vcpop.v v8, v8225; CHECK-ZVBB-NEXT: ret226 %a = call <vscale x 1 x i16> @llvm.ctpop.nxv1i16(<vscale x 1 x i16> %va)227 ret <vscale x 1 x i16> %a228}229 230define <vscale x 2 x i16> @ctpop_nxv2i16(<vscale x 2 x i16> %va) {231; CHECK-LABEL: ctpop_nxv2i16:232; CHECK: # %bb.0:233; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma234; CHECK-NEXT: vsrl.vi v9, v8, 1235; CHECK-NEXT: lui a0, 5236; CHECK-NEXT: addi a0, a0, 1365237; CHECK-NEXT: vand.vx v9, v9, a0238; CHECK-NEXT: lui a0, 3239; CHECK-NEXT: addi a0, a0, 819240; CHECK-NEXT: vsub.vv v8, v8, v9241; CHECK-NEXT: vand.vx v9, v8, a0242; CHECK-NEXT: vsrl.vi v8, v8, 2243; CHECK-NEXT: vand.vx v8, v8, a0244; CHECK-NEXT: lui a0, 1245; CHECK-NEXT: addi a0, a0, -241246; CHECK-NEXT: vadd.vv v8, v9, v8247; CHECK-NEXT: vsrl.vi v9, v8, 4248; CHECK-NEXT: vadd.vv v8, v8, v9249; CHECK-NEXT: vand.vx v8, v8, a0250; CHECK-NEXT: li a0, 257251; CHECK-NEXT: vmul.vx v8, v8, a0252; CHECK-NEXT: vsrl.vi v8, v8, 8253; CHECK-NEXT: ret254;255; CHECK-ZVBB-LABEL: ctpop_nxv2i16:256; CHECK-ZVBB: # %bb.0:257; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, mf2, ta, ma258; CHECK-ZVBB-NEXT: vcpop.v v8, v8259; CHECK-ZVBB-NEXT: ret260 %a = call <vscale x 2 x i16> @llvm.ctpop.nxv2i16(<vscale x 2 x i16> %va)261 ret <vscale x 2 x i16> %a262}263 264define <vscale x 4 x i16> @ctpop_nxv4i16(<vscale x 4 x i16> %va) {265; CHECK-LABEL: ctpop_nxv4i16:266; CHECK: # %bb.0:267; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma268; CHECK-NEXT: vsrl.vi v9, v8, 1269; CHECK-NEXT: lui a0, 5270; CHECK-NEXT: addi a0, a0, 1365271; CHECK-NEXT: vand.vx v9, v9, a0272; CHECK-NEXT: lui a0, 3273; CHECK-NEXT: addi a0, a0, 819274; CHECK-NEXT: vsub.vv v8, v8, v9275; CHECK-NEXT: vand.vx v9, v8, a0276; CHECK-NEXT: vsrl.vi v8, v8, 2277; CHECK-NEXT: vand.vx v8, v8, a0278; CHECK-NEXT: lui a0, 1279; CHECK-NEXT: addi a0, a0, -241280; CHECK-NEXT: vadd.vv v8, v9, v8281; CHECK-NEXT: vsrl.vi v9, v8, 4282; CHECK-NEXT: vadd.vv v8, v8, v9283; CHECK-NEXT: vand.vx v8, v8, a0284; CHECK-NEXT: li a0, 257285; CHECK-NEXT: vmul.vx v8, v8, a0286; CHECK-NEXT: vsrl.vi v8, v8, 8287; CHECK-NEXT: ret288;289; CHECK-ZVBB-LABEL: ctpop_nxv4i16:290; CHECK-ZVBB: # %bb.0:291; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, m1, ta, ma292; CHECK-ZVBB-NEXT: vcpop.v v8, v8293; CHECK-ZVBB-NEXT: ret294 %a = call <vscale x 4 x i16> @llvm.ctpop.nxv4i16(<vscale x 4 x i16> %va)295 ret <vscale x 4 x i16> %a296}297 298define <vscale x 8 x i16> @ctpop_nxv8i16(<vscale x 8 x i16> %va) {299; CHECK-LABEL: ctpop_nxv8i16:300; CHECK: # %bb.0:301; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma302; CHECK-NEXT: vsrl.vi v10, v8, 1303; CHECK-NEXT: lui a0, 5304; CHECK-NEXT: addi a0, a0, 1365305; CHECK-NEXT: vand.vx v10, v10, a0306; CHECK-NEXT: lui a0, 3307; CHECK-NEXT: addi a0, a0, 819308; CHECK-NEXT: vsub.vv v8, v8, v10309; CHECK-NEXT: vand.vx v10, v8, a0310; CHECK-NEXT: vsrl.vi v8, v8, 2311; CHECK-NEXT: vand.vx v8, v8, a0312; CHECK-NEXT: lui a0, 1313; CHECK-NEXT: addi a0, a0, -241314; CHECK-NEXT: vadd.vv v8, v10, v8315; CHECK-NEXT: vsrl.vi v10, v8, 4316; CHECK-NEXT: vadd.vv v8, v8, v10317; CHECK-NEXT: vand.vx v8, v8, a0318; CHECK-NEXT: li a0, 257319; CHECK-NEXT: vmul.vx v8, v8, a0320; CHECK-NEXT: vsrl.vi v8, v8, 8321; CHECK-NEXT: ret322;323; CHECK-ZVBB-LABEL: ctpop_nxv8i16:324; CHECK-ZVBB: # %bb.0:325; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, m2, ta, ma326; CHECK-ZVBB-NEXT: vcpop.v v8, v8327; CHECK-ZVBB-NEXT: ret328 %a = call <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16> %va)329 ret <vscale x 8 x i16> %a330}331 332define <vscale x 16 x i16> @ctpop_nxv16i16(<vscale x 16 x i16> %va) {333; CHECK-LABEL: ctpop_nxv16i16:334; CHECK: # %bb.0:335; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma336; CHECK-NEXT: vsrl.vi v12, v8, 1337; CHECK-NEXT: lui a0, 5338; CHECK-NEXT: addi a0, a0, 1365339; CHECK-NEXT: vand.vx v12, v12, a0340; CHECK-NEXT: lui a0, 3341; CHECK-NEXT: addi a0, a0, 819342; CHECK-NEXT: vsub.vv v8, v8, v12343; CHECK-NEXT: vand.vx v12, v8, a0344; CHECK-NEXT: vsrl.vi v8, v8, 2345; CHECK-NEXT: vand.vx v8, v8, a0346; CHECK-NEXT: lui a0, 1347; CHECK-NEXT: addi a0, a0, -241348; CHECK-NEXT: vadd.vv v8, v12, v8349; CHECK-NEXT: vsrl.vi v12, v8, 4350; CHECK-NEXT: vadd.vv v8, v8, v12351; CHECK-NEXT: vand.vx v8, v8, a0352; CHECK-NEXT: li a0, 257353; CHECK-NEXT: vmul.vx v8, v8, a0354; CHECK-NEXT: vsrl.vi v8, v8, 8355; CHECK-NEXT: ret356;357; CHECK-ZVBB-LABEL: ctpop_nxv16i16:358; CHECK-ZVBB: # %bb.0:359; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, m4, ta, ma360; CHECK-ZVBB-NEXT: vcpop.v v8, v8361; CHECK-ZVBB-NEXT: ret362 %a = call <vscale x 16 x i16> @llvm.ctpop.nxv16i16(<vscale x 16 x i16> %va)363 ret <vscale x 16 x i16> %a364}365 366define <vscale x 32 x i16> @ctpop_nxv32i16(<vscale x 32 x i16> %va) {367; CHECK-LABEL: ctpop_nxv32i16:368; CHECK: # %bb.0:369; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma370; CHECK-NEXT: vsrl.vi v16, v8, 1371; CHECK-NEXT: lui a0, 5372; CHECK-NEXT: addi a0, a0, 1365373; CHECK-NEXT: vand.vx v16, v16, a0374; CHECK-NEXT: lui a0, 3375; CHECK-NEXT: addi a0, a0, 819376; CHECK-NEXT: vsub.vv v8, v8, v16377; CHECK-NEXT: vand.vx v16, v8, a0378; CHECK-NEXT: vsrl.vi v8, v8, 2379; CHECK-NEXT: vand.vx v8, v8, a0380; CHECK-NEXT: lui a0, 1381; CHECK-NEXT: addi a0, a0, -241382; CHECK-NEXT: vadd.vv v8, v16, v8383; CHECK-NEXT: vsrl.vi v16, v8, 4384; CHECK-NEXT: vadd.vv v8, v8, v16385; CHECK-NEXT: vand.vx v8, v8, a0386; CHECK-NEXT: li a0, 257387; CHECK-NEXT: vmul.vx v8, v8, a0388; CHECK-NEXT: vsrl.vi v8, v8, 8389; CHECK-NEXT: ret390;391; CHECK-ZVBB-LABEL: ctpop_nxv32i16:392; CHECK-ZVBB: # %bb.0:393; CHECK-ZVBB-NEXT: vsetvli a0, zero, e16, m8, ta, ma394; CHECK-ZVBB-NEXT: vcpop.v v8, v8395; CHECK-ZVBB-NEXT: ret396 %a = call <vscale x 32 x i16> @llvm.ctpop.nxv32i16(<vscale x 32 x i16> %va)397 ret <vscale x 32 x i16> %a398}399 400define <vscale x 1 x i32> @ctpop_nxv1i32(<vscale x 1 x i32> %va) {401; CHECK-LABEL: ctpop_nxv1i32:402; CHECK: # %bb.0:403; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma404; CHECK-NEXT: vsrl.vi v9, v8, 1405; CHECK-NEXT: lui a0, 349525406; CHECK-NEXT: addi a0, a0, 1365407; CHECK-NEXT: vand.vx v9, v9, a0408; CHECK-NEXT: lui a0, 209715409; CHECK-NEXT: addi a0, a0, 819410; CHECK-NEXT: vsub.vv v8, v8, v9411; CHECK-NEXT: vand.vx v9, v8, a0412; CHECK-NEXT: vsrl.vi v8, v8, 2413; CHECK-NEXT: vand.vx v8, v8, a0414; CHECK-NEXT: lui a0, 61681415; CHECK-NEXT: addi a0, a0, -241416; CHECK-NEXT: vadd.vv v8, v9, v8417; CHECK-NEXT: vsrl.vi v9, v8, 4418; CHECK-NEXT: vadd.vv v8, v8, v9419; CHECK-NEXT: vand.vx v8, v8, a0420; CHECK-NEXT: lui a0, 4112421; CHECK-NEXT: addi a0, a0, 257422; CHECK-NEXT: vmul.vx v8, v8, a0423; CHECK-NEXT: vsrl.vi v8, v8, 24424; CHECK-NEXT: ret425;426; CHECK-ZVBB-LABEL: ctpop_nxv1i32:427; CHECK-ZVBB: # %bb.0:428; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, mf2, ta, ma429; CHECK-ZVBB-NEXT: vcpop.v v8, v8430; CHECK-ZVBB-NEXT: ret431 %a = call <vscale x 1 x i32> @llvm.ctpop.nxv1i32(<vscale x 1 x i32> %va)432 ret <vscale x 1 x i32> %a433}434 435define <vscale x 2 x i32> @ctpop_nxv2i32(<vscale x 2 x i32> %va) {436; CHECK-LABEL: ctpop_nxv2i32:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma439; CHECK-NEXT: vsrl.vi v9, v8, 1440; CHECK-NEXT: lui a0, 349525441; CHECK-NEXT: addi a0, a0, 1365442; CHECK-NEXT: vand.vx v9, v9, a0443; CHECK-NEXT: lui a0, 209715444; CHECK-NEXT: addi a0, a0, 819445; CHECK-NEXT: vsub.vv v8, v8, v9446; CHECK-NEXT: vand.vx v9, v8, a0447; CHECK-NEXT: vsrl.vi v8, v8, 2448; CHECK-NEXT: vand.vx v8, v8, a0449; CHECK-NEXT: lui a0, 61681450; CHECK-NEXT: addi a0, a0, -241451; CHECK-NEXT: vadd.vv v8, v9, v8452; CHECK-NEXT: vsrl.vi v9, v8, 4453; CHECK-NEXT: vadd.vv v8, v8, v9454; CHECK-NEXT: vand.vx v8, v8, a0455; CHECK-NEXT: lui a0, 4112456; CHECK-NEXT: addi a0, a0, 257457; CHECK-NEXT: vmul.vx v8, v8, a0458; CHECK-NEXT: vsrl.vi v8, v8, 24459; CHECK-NEXT: ret460;461; CHECK-ZVBB-LABEL: ctpop_nxv2i32:462; CHECK-ZVBB: # %bb.0:463; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m1, ta, ma464; CHECK-ZVBB-NEXT: vcpop.v v8, v8465; CHECK-ZVBB-NEXT: ret466 %a = call <vscale x 2 x i32> @llvm.ctpop.nxv2i32(<vscale x 2 x i32> %va)467 ret <vscale x 2 x i32> %a468}469 470define <vscale x 4 x i32> @ctpop_nxv4i32(<vscale x 4 x i32> %va) {471; CHECK-LABEL: ctpop_nxv4i32:472; CHECK: # %bb.0:473; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma474; CHECK-NEXT: vsrl.vi v10, v8, 1475; CHECK-NEXT: lui a0, 349525476; CHECK-NEXT: addi a0, a0, 1365477; CHECK-NEXT: vand.vx v10, v10, a0478; CHECK-NEXT: lui a0, 209715479; CHECK-NEXT: addi a0, a0, 819480; CHECK-NEXT: vsub.vv v8, v8, v10481; CHECK-NEXT: vand.vx v10, v8, a0482; CHECK-NEXT: vsrl.vi v8, v8, 2483; CHECK-NEXT: vand.vx v8, v8, a0484; CHECK-NEXT: lui a0, 61681485; CHECK-NEXT: addi a0, a0, -241486; CHECK-NEXT: vadd.vv v8, v10, v8487; CHECK-NEXT: vsrl.vi v10, v8, 4488; CHECK-NEXT: vadd.vv v8, v8, v10489; CHECK-NEXT: vand.vx v8, v8, a0490; CHECK-NEXT: lui a0, 4112491; CHECK-NEXT: addi a0, a0, 257492; CHECK-NEXT: vmul.vx v8, v8, a0493; CHECK-NEXT: vsrl.vi v8, v8, 24494; CHECK-NEXT: ret495;496; CHECK-ZVBB-LABEL: ctpop_nxv4i32:497; CHECK-ZVBB: # %bb.0:498; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m2, ta, ma499; CHECK-ZVBB-NEXT: vcpop.v v8, v8500; CHECK-ZVBB-NEXT: ret501 %a = call <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32> %va)502 ret <vscale x 4 x i32> %a503}504 505define <vscale x 8 x i32> @ctpop_nxv8i32(<vscale x 8 x i32> %va) {506; CHECK-LABEL: ctpop_nxv8i32:507; CHECK: # %bb.0:508; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma509; CHECK-NEXT: vsrl.vi v12, v8, 1510; CHECK-NEXT: lui a0, 349525511; CHECK-NEXT: addi a0, a0, 1365512; CHECK-NEXT: vand.vx v12, v12, a0513; CHECK-NEXT: lui a0, 209715514; CHECK-NEXT: addi a0, a0, 819515; CHECK-NEXT: vsub.vv v8, v8, v12516; CHECK-NEXT: vand.vx v12, v8, a0517; CHECK-NEXT: vsrl.vi v8, v8, 2518; CHECK-NEXT: vand.vx v8, v8, a0519; CHECK-NEXT: lui a0, 61681520; CHECK-NEXT: addi a0, a0, -241521; CHECK-NEXT: vadd.vv v8, v12, v8522; CHECK-NEXT: vsrl.vi v12, v8, 4523; CHECK-NEXT: vadd.vv v8, v8, v12524; CHECK-NEXT: vand.vx v8, v8, a0525; CHECK-NEXT: lui a0, 4112526; CHECK-NEXT: addi a0, a0, 257527; CHECK-NEXT: vmul.vx v8, v8, a0528; CHECK-NEXT: vsrl.vi v8, v8, 24529; CHECK-NEXT: ret530;531; CHECK-ZVBB-LABEL: ctpop_nxv8i32:532; CHECK-ZVBB: # %bb.0:533; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m4, ta, ma534; CHECK-ZVBB-NEXT: vcpop.v v8, v8535; CHECK-ZVBB-NEXT: ret536 %a = call <vscale x 8 x i32> @llvm.ctpop.nxv8i32(<vscale x 8 x i32> %va)537 ret <vscale x 8 x i32> %a538}539 540define <vscale x 16 x i32> @ctpop_nxv16i32(<vscale x 16 x i32> %va) {541; CHECK-LABEL: ctpop_nxv16i32:542; CHECK: # %bb.0:543; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma544; CHECK-NEXT: vsrl.vi v16, v8, 1545; CHECK-NEXT: lui a0, 349525546; CHECK-NEXT: addi a0, a0, 1365547; CHECK-NEXT: vand.vx v16, v16, a0548; CHECK-NEXT: lui a0, 209715549; CHECK-NEXT: addi a0, a0, 819550; CHECK-NEXT: vsub.vv v8, v8, v16551; CHECK-NEXT: vand.vx v16, v8, a0552; CHECK-NEXT: vsrl.vi v8, v8, 2553; CHECK-NEXT: vand.vx v8, v8, a0554; CHECK-NEXT: lui a0, 61681555; CHECK-NEXT: addi a0, a0, -241556; CHECK-NEXT: vadd.vv v8, v16, v8557; CHECK-NEXT: vsrl.vi v16, v8, 4558; CHECK-NEXT: vadd.vv v8, v8, v16559; CHECK-NEXT: vand.vx v8, v8, a0560; CHECK-NEXT: lui a0, 4112561; CHECK-NEXT: addi a0, a0, 257562; CHECK-NEXT: vmul.vx v8, v8, a0563; CHECK-NEXT: vsrl.vi v8, v8, 24564; CHECK-NEXT: ret565;566; CHECK-ZVBB-LABEL: ctpop_nxv16i32:567; CHECK-ZVBB: # %bb.0:568; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m8, ta, ma569; CHECK-ZVBB-NEXT: vcpop.v v8, v8570; CHECK-ZVBB-NEXT: ret571 %a = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> %va)572 ret <vscale x 16 x i32> %a573}574 575; We always emit vcpop.v for the scalable vector576define <vscale x 16 x i1> @ctpop_nxv16i32_ult_two(<vscale x 16 x i32> %va) {577; CHECK-LABEL: ctpop_nxv16i32_ult_two:578; CHECK: # %bb.0:579; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma580; CHECK-NEXT: vadd.vi v16, v8, -1581; CHECK-NEXT: vand.vv v8, v8, v16582; CHECK-NEXT: vmseq.vi v0, v8, 0583; CHECK-NEXT: ret584;585; CHECK-ZVBB-LABEL: ctpop_nxv16i32_ult_two:586; CHECK-ZVBB: # %bb.0:587; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m8, ta, ma588; CHECK-ZVBB-NEXT: vcpop.v v8, v8589; CHECK-ZVBB-NEXT: vmsleu.vi v0, v8, 1590; CHECK-ZVBB-NEXT: ret591 %a = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> %va)592 %cmp = icmp ult <vscale x 16 x i32> %a, splat (i32 2)593 ret <vscale x 16 x i1> %cmp594}595 596define <vscale x 16 x i1> @ctpop_nxv16i32_ugt_one(<vscale x 16 x i32> %va) {597; CHECK-LABEL: ctpop_nxv16i32_ugt_one:598; CHECK: # %bb.0:599; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma600; CHECK-NEXT: vadd.vi v16, v8, -1601; CHECK-NEXT: vand.vv v8, v8, v16602; CHECK-NEXT: vmsne.vi v0, v8, 0603; CHECK-NEXT: ret604;605; CHECK-ZVBB-LABEL: ctpop_nxv16i32_ugt_one:606; CHECK-ZVBB: # %bb.0:607; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m8, ta, ma608; CHECK-ZVBB-NEXT: vcpop.v v8, v8609; CHECK-ZVBB-NEXT: vmsgtu.vi v0, v8, 1610; CHECK-ZVBB-NEXT: ret611 %a = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> %va)612 %cmp = icmp ugt <vscale x 16 x i32> %a, splat (i32 1)613 ret <vscale x 16 x i1> %cmp614}615 616define <vscale x 16 x i1> @ctpop_nxv16i32_eq_one(<vscale x 16 x i32> %va) {617; CHECK-LABEL: ctpop_nxv16i32_eq_one:618; CHECK: # %bb.0:619; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma620; CHECK-NEXT: vadd.vi v16, v8, -1621; CHECK-NEXT: vxor.vv v8, v8, v16622; CHECK-NEXT: vmsltu.vv v0, v16, v8623; CHECK-NEXT: ret624;625; CHECK-ZVBB-LABEL: ctpop_nxv16i32_eq_one:626; CHECK-ZVBB: # %bb.0:627; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m8, ta, ma628; CHECK-ZVBB-NEXT: vcpop.v v8, v8629; CHECK-ZVBB-NEXT: vmseq.vi v0, v8, 1630; CHECK-ZVBB-NEXT: ret631 %a = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> %va)632 %cmp = icmp eq <vscale x 16 x i32> %a, splat (i32 1)633 ret <vscale x 16 x i1> %cmp634}635 636define <vscale x 16 x i1> @ctpop_nxv16i32_ne_one(<vscale x 16 x i32> %va) {637; CHECK-LABEL: ctpop_nxv16i32_ne_one:638; CHECK: # %bb.0:639; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma640; CHECK-NEXT: vadd.vi v16, v8, -1641; CHECK-NEXT: vxor.vv v8, v8, v16642; CHECK-NEXT: vmsleu.vv v0, v8, v16643; CHECK-NEXT: ret644;645; CHECK-ZVBB-LABEL: ctpop_nxv16i32_ne_one:646; CHECK-ZVBB: # %bb.0:647; CHECK-ZVBB-NEXT: vsetvli a0, zero, e32, m8, ta, ma648; CHECK-ZVBB-NEXT: vcpop.v v8, v8649; CHECK-ZVBB-NEXT: vmsne.vi v0, v8, 1650; CHECK-ZVBB-NEXT: ret651 %a = call <vscale x 16 x i32> @llvm.ctpop.nxv16i32(<vscale x 16 x i32> %va)652 %cmp = icmp ne <vscale x 16 x i32> %a, splat (i32 1)653 ret <vscale x 16 x i1> %cmp654}655 656define <vscale x 1 x i64> @ctpop_nxv1i64(<vscale x 1 x i64> %va) {657; RV32-LABEL: ctpop_nxv1i64:658; RV32: # %bb.0:659; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, ma660; RV32-NEXT: vsrl.vi v9, v8, 1661; RV32-NEXT: lui a0, 349525662; RV32-NEXT: addi a0, a0, 1365663; RV32-NEXT: vsetvli a1, zero, e32, m1, ta, ma664; RV32-NEXT: vmv.v.x v10, a0665; RV32-NEXT: lui a0, 209715666; RV32-NEXT: addi a0, a0, 819667; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma668; RV32-NEXT: vand.vv v9, v9, v10669; RV32-NEXT: vsetvli a1, zero, e32, m1, ta, ma670; RV32-NEXT: vmv.v.x v10, a0671; RV32-NEXT: lui a0, 61681672; RV32-NEXT: addi a0, a0, -241673; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma674; RV32-NEXT: vsub.vv v8, v8, v9675; RV32-NEXT: vand.vv v9, v8, v10676; RV32-NEXT: vsrl.vi v8, v8, 2677; RV32-NEXT: vand.vv v8, v8, v10678; RV32-NEXT: vsetvli a1, zero, e32, m1, ta, ma679; RV32-NEXT: vmv.v.x v10, a0680; RV32-NEXT: lui a0, 4112681; RV32-NEXT: addi a0, a0, 257682; RV32-NEXT: vsetvli a1, zero, e64, m1, ta, ma683; RV32-NEXT: vadd.vv v8, v9, v8684; RV32-NEXT: vsrl.vi v9, v8, 4685; RV32-NEXT: vadd.vv v8, v8, v9686; RV32-NEXT: vsetvli a1, zero, e32, m1, ta, ma687; RV32-NEXT: vmv.v.x v9, a0688; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, ma689; RV32-NEXT: vand.vv v8, v8, v10690; RV32-NEXT: vmul.vv v8, v8, v9691; RV32-NEXT: li a0, 56692; RV32-NEXT: vsrl.vx v8, v8, a0693; RV32-NEXT: ret694;695; RV64-LABEL: ctpop_nxv1i64:696; RV64: # %bb.0:697; RV64-NEXT: lui a0, 349525698; RV64-NEXT: lui a1, 209715699; RV64-NEXT: lui a2, 61681700; RV64-NEXT: lui a3, 4112701; RV64-NEXT: addi a0, a0, 1365702; RV64-NEXT: addi a1, a1, 819703; RV64-NEXT: addi a2, a2, -241704; RV64-NEXT: addi a3, a3, 257705; RV64-NEXT: slli a4, a0, 32706; RV64-NEXT: add a0, a0, a4707; RV64-NEXT: slli a4, a1, 32708; RV64-NEXT: add a1, a1, a4709; RV64-NEXT: slli a4, a2, 32710; RV64-NEXT: add a2, a2, a4711; RV64-NEXT: slli a4, a3, 32712; RV64-NEXT: add a3, a3, a4713; RV64-NEXT: vsetvli a4, zero, e64, m1, ta, ma714; RV64-NEXT: vsrl.vi v9, v8, 1715; RV64-NEXT: vand.vx v9, v9, a0716; RV64-NEXT: vsub.vv v8, v8, v9717; RV64-NEXT: vand.vx v9, v8, a1718; RV64-NEXT: vsrl.vi v8, v8, 2719; RV64-NEXT: vand.vx v8, v8, a1720; RV64-NEXT: vadd.vv v8, v9, v8721; RV64-NEXT: vsrl.vi v9, v8, 4722; RV64-NEXT: vadd.vv v8, v8, v9723; RV64-NEXT: vand.vx v8, v8, a2724; RV64-NEXT: vmul.vx v8, v8, a3725; RV64-NEXT: li a0, 56726; RV64-NEXT: vsrl.vx v8, v8, a0727; RV64-NEXT: ret728;729; CHECK-ZVBB-LABEL: ctpop_nxv1i64:730; CHECK-ZVBB: # %bb.0:731; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m1, ta, ma732; CHECK-ZVBB-NEXT: vcpop.v v8, v8733; CHECK-ZVBB-NEXT: ret734 %a = call <vscale x 1 x i64> @llvm.ctpop.nxv1i64(<vscale x 1 x i64> %va)735 ret <vscale x 1 x i64> %a736}737 738define <vscale x 2 x i64> @ctpop_nxv2i64(<vscale x 2 x i64> %va) {739; RV32-LABEL: ctpop_nxv2i64:740; RV32: # %bb.0:741; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, ma742; RV32-NEXT: vsrl.vi v10, v8, 1743; RV32-NEXT: lui a0, 349525744; RV32-NEXT: addi a0, a0, 1365745; RV32-NEXT: vsetvli a1, zero, e32, m2, ta, ma746; RV32-NEXT: vmv.v.x v12, a0747; RV32-NEXT: lui a0, 209715748; RV32-NEXT: addi a0, a0, 819749; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma750; RV32-NEXT: vand.vv v10, v10, v12751; RV32-NEXT: vsetvli a1, zero, e32, m2, ta, ma752; RV32-NEXT: vmv.v.x v12, a0753; RV32-NEXT: lui a0, 61681754; RV32-NEXT: addi a0, a0, -241755; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma756; RV32-NEXT: vsub.vv v8, v8, v10757; RV32-NEXT: vand.vv v10, v8, v12758; RV32-NEXT: vsrl.vi v8, v8, 2759; RV32-NEXT: vand.vv v8, v8, v12760; RV32-NEXT: vsetvli a1, zero, e32, m2, ta, ma761; RV32-NEXT: vmv.v.x v12, a0762; RV32-NEXT: lui a0, 4112763; RV32-NEXT: addi a0, a0, 257764; RV32-NEXT: vsetvli a1, zero, e64, m2, ta, ma765; RV32-NEXT: vadd.vv v8, v10, v8766; RV32-NEXT: vsrl.vi v10, v8, 4767; RV32-NEXT: vadd.vv v8, v8, v10768; RV32-NEXT: vsetvli a1, zero, e32, m2, ta, ma769; RV32-NEXT: vmv.v.x v10, a0770; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, ma771; RV32-NEXT: vand.vv v8, v8, v12772; RV32-NEXT: vmul.vv v8, v8, v10773; RV32-NEXT: li a0, 56774; RV32-NEXT: vsrl.vx v8, v8, a0775; RV32-NEXT: ret776;777; RV64-LABEL: ctpop_nxv2i64:778; RV64: # %bb.0:779; RV64-NEXT: lui a0, 349525780; RV64-NEXT: lui a1, 209715781; RV64-NEXT: lui a2, 61681782; RV64-NEXT: lui a3, 4112783; RV64-NEXT: addi a0, a0, 1365784; RV64-NEXT: addi a1, a1, 819785; RV64-NEXT: addi a2, a2, -241786; RV64-NEXT: addi a3, a3, 257787; RV64-NEXT: slli a4, a0, 32788; RV64-NEXT: add a0, a0, a4789; RV64-NEXT: slli a4, a1, 32790; RV64-NEXT: add a1, a1, a4791; RV64-NEXT: slli a4, a2, 32792; RV64-NEXT: add a2, a2, a4793; RV64-NEXT: slli a4, a3, 32794; RV64-NEXT: add a3, a3, a4795; RV64-NEXT: vsetvli a4, zero, e64, m2, ta, ma796; RV64-NEXT: vsrl.vi v10, v8, 1797; RV64-NEXT: vand.vx v10, v10, a0798; RV64-NEXT: vsub.vv v8, v8, v10799; RV64-NEXT: vand.vx v10, v8, a1800; RV64-NEXT: vsrl.vi v8, v8, 2801; RV64-NEXT: vand.vx v8, v8, a1802; RV64-NEXT: vadd.vv v8, v10, v8803; RV64-NEXT: vsrl.vi v10, v8, 4804; RV64-NEXT: vadd.vv v8, v8, v10805; RV64-NEXT: vand.vx v8, v8, a2806; RV64-NEXT: vmul.vx v8, v8, a3807; RV64-NEXT: li a0, 56808; RV64-NEXT: vsrl.vx v8, v8, a0809; RV64-NEXT: ret810;811; CHECK-ZVBB-LABEL: ctpop_nxv2i64:812; CHECK-ZVBB: # %bb.0:813; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m2, ta, ma814; CHECK-ZVBB-NEXT: vcpop.v v8, v8815; CHECK-ZVBB-NEXT: ret816 %a = call <vscale x 2 x i64> @llvm.ctpop.nxv2i64(<vscale x 2 x i64> %va)817 ret <vscale x 2 x i64> %a818}819 820define <vscale x 4 x i64> @ctpop_nxv4i64(<vscale x 4 x i64> %va) {821; RV32-LABEL: ctpop_nxv4i64:822; RV32: # %bb.0:823; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, ma824; RV32-NEXT: vsrl.vi v12, v8, 1825; RV32-NEXT: lui a0, 349525826; RV32-NEXT: addi a0, a0, 1365827; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, ma828; RV32-NEXT: vmv.v.x v16, a0829; RV32-NEXT: lui a0, 209715830; RV32-NEXT: addi a0, a0, 819831; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma832; RV32-NEXT: vand.vv v12, v12, v16833; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, ma834; RV32-NEXT: vmv.v.x v16, a0835; RV32-NEXT: lui a0, 61681836; RV32-NEXT: addi a0, a0, -241837; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma838; RV32-NEXT: vsub.vv v8, v8, v12839; RV32-NEXT: vand.vv v12, v8, v16840; RV32-NEXT: vsrl.vi v8, v8, 2841; RV32-NEXT: vand.vv v8, v8, v16842; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, ma843; RV32-NEXT: vmv.v.x v16, a0844; RV32-NEXT: lui a0, 4112845; RV32-NEXT: addi a0, a0, 257846; RV32-NEXT: vsetvli a1, zero, e64, m4, ta, ma847; RV32-NEXT: vadd.vv v8, v12, v8848; RV32-NEXT: vsrl.vi v12, v8, 4849; RV32-NEXT: vadd.vv v8, v8, v12850; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, ma851; RV32-NEXT: vmv.v.x v12, a0852; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, ma853; RV32-NEXT: vand.vv v8, v8, v16854; RV32-NEXT: vmul.vv v8, v8, v12855; RV32-NEXT: li a0, 56856; RV32-NEXT: vsrl.vx v8, v8, a0857; RV32-NEXT: ret858;859; RV64-LABEL: ctpop_nxv4i64:860; RV64: # %bb.0:861; RV64-NEXT: lui a0, 349525862; RV64-NEXT: lui a1, 209715863; RV64-NEXT: lui a2, 61681864; RV64-NEXT: lui a3, 4112865; RV64-NEXT: addi a0, a0, 1365866; RV64-NEXT: addi a1, a1, 819867; RV64-NEXT: addi a2, a2, -241868; RV64-NEXT: addi a3, a3, 257869; RV64-NEXT: slli a4, a0, 32870; RV64-NEXT: add a0, a0, a4871; RV64-NEXT: slli a4, a1, 32872; RV64-NEXT: add a1, a1, a4873; RV64-NEXT: slli a4, a2, 32874; RV64-NEXT: add a2, a2, a4875; RV64-NEXT: slli a4, a3, 32876; RV64-NEXT: add a3, a3, a4877; RV64-NEXT: vsetvli a4, zero, e64, m4, ta, ma878; RV64-NEXT: vsrl.vi v12, v8, 1879; RV64-NEXT: vand.vx v12, v12, a0880; RV64-NEXT: vsub.vv v8, v8, v12881; RV64-NEXT: vand.vx v12, v8, a1882; RV64-NEXT: vsrl.vi v8, v8, 2883; RV64-NEXT: vand.vx v8, v8, a1884; RV64-NEXT: vadd.vv v8, v12, v8885; RV64-NEXT: vsrl.vi v12, v8, 4886; RV64-NEXT: vadd.vv v8, v8, v12887; RV64-NEXT: vand.vx v8, v8, a2888; RV64-NEXT: vmul.vx v8, v8, a3889; RV64-NEXT: li a0, 56890; RV64-NEXT: vsrl.vx v8, v8, a0891; RV64-NEXT: ret892;893; CHECK-ZVBB-LABEL: ctpop_nxv4i64:894; CHECK-ZVBB: # %bb.0:895; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m4, ta, ma896; CHECK-ZVBB-NEXT: vcpop.v v8, v8897; CHECK-ZVBB-NEXT: ret898 %a = call <vscale x 4 x i64> @llvm.ctpop.nxv4i64(<vscale x 4 x i64> %va)899 ret <vscale x 4 x i64> %a900}901 902define <vscale x 8 x i64> @ctpop_nxv8i64(<vscale x 8 x i64> %va) {903; RV32-LABEL: ctpop_nxv8i64:904; RV32: # %bb.0:905; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, ma906; RV32-NEXT: vsrl.vi v16, v8, 1907; RV32-NEXT: lui a0, 349525908; RV32-NEXT: addi a0, a0, 1365909; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, ma910; RV32-NEXT: vmv.v.x v24, a0911; RV32-NEXT: lui a0, 209715912; RV32-NEXT: addi a0, a0, 819913; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma914; RV32-NEXT: vand.vv v24, v16, v24915; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, ma916; RV32-NEXT: vmv.v.x v16, a0917; RV32-NEXT: lui a0, 61681918; RV32-NEXT: addi a0, a0, -241919; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma920; RV32-NEXT: vsub.vv v8, v8, v24921; RV32-NEXT: vand.vv v24, v8, v16922; RV32-NEXT: vsrl.vi v8, v8, 2923; RV32-NEXT: vand.vv v8, v8, v16924; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, ma925; RV32-NEXT: vmv.v.x v16, a0926; RV32-NEXT: lui a0, 4112927; RV32-NEXT: addi a0, a0, 257928; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma929; RV32-NEXT: vadd.vv v8, v24, v8930; RV32-NEXT: vsrl.vi v24, v8, 4931; RV32-NEXT: vadd.vv v8, v8, v24932; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, ma933; RV32-NEXT: vmv.v.x v24, a0934; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, ma935; RV32-NEXT: vand.vv v8, v8, v16936; RV32-NEXT: vmul.vv v8, v8, v24937; RV32-NEXT: li a0, 56938; RV32-NEXT: vsrl.vx v8, v8, a0939; RV32-NEXT: ret940;941; RV64-LABEL: ctpop_nxv8i64:942; RV64: # %bb.0:943; RV64-NEXT: lui a0, 349525944; RV64-NEXT: lui a1, 209715945; RV64-NEXT: lui a2, 61681946; RV64-NEXT: lui a3, 4112947; RV64-NEXT: addi a0, a0, 1365948; RV64-NEXT: addi a1, a1, 819949; RV64-NEXT: addi a2, a2, -241950; RV64-NEXT: addi a3, a3, 257951; RV64-NEXT: slli a4, a0, 32952; RV64-NEXT: add a0, a0, a4953; RV64-NEXT: slli a4, a1, 32954; RV64-NEXT: add a1, a1, a4955; RV64-NEXT: slli a4, a2, 32956; RV64-NEXT: add a2, a2, a4957; RV64-NEXT: slli a4, a3, 32958; RV64-NEXT: add a3, a3, a4959; RV64-NEXT: vsetvli a4, zero, e64, m8, ta, ma960; RV64-NEXT: vsrl.vi v16, v8, 1961; RV64-NEXT: vand.vx v16, v16, a0962; RV64-NEXT: vsub.vv v8, v8, v16963; RV64-NEXT: vand.vx v16, v8, a1964; RV64-NEXT: vsrl.vi v8, v8, 2965; RV64-NEXT: vand.vx v8, v8, a1966; RV64-NEXT: vadd.vv v8, v16, v8967; RV64-NEXT: vsrl.vi v16, v8, 4968; RV64-NEXT: vadd.vv v8, v8, v16969; RV64-NEXT: vand.vx v8, v8, a2970; RV64-NEXT: vmul.vx v8, v8, a3971; RV64-NEXT: li a0, 56972; RV64-NEXT: vsrl.vx v8, v8, a0973; RV64-NEXT: ret974;975; CHECK-ZVBB-LABEL: ctpop_nxv8i64:976; CHECK-ZVBB: # %bb.0:977; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m8, ta, ma978; CHECK-ZVBB-NEXT: vcpop.v v8, v8979; CHECK-ZVBB-NEXT: ret980 %a = call <vscale x 8 x i64> @llvm.ctpop.nxv8i64(<vscale x 8 x i64> %va)981 ret <vscale x 8 x i64> %a982}983 984; We always emit vcpop.v for the scalable vector985define <vscale x 8 x i1> @ctpop_nxv8i64_ult_two(<vscale x 8 x i64> %va) {986; CHECK-LABEL: ctpop_nxv8i64_ult_two:987; CHECK: # %bb.0:988; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma989; CHECK-NEXT: vadd.vi v16, v8, -1990; CHECK-NEXT: vand.vv v8, v8, v16991; CHECK-NEXT: vmseq.vi v0, v8, 0992; CHECK-NEXT: ret993;994; CHECK-ZVBB-LABEL: ctpop_nxv8i64_ult_two:995; CHECK-ZVBB: # %bb.0:996; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m8, ta, ma997; CHECK-ZVBB-NEXT: vcpop.v v8, v8998; CHECK-ZVBB-NEXT: vmsleu.vi v0, v8, 1999; CHECK-ZVBB-NEXT: ret1000 %a = call <vscale x 8 x i64> @llvm.ctpop.nxv8i64(<vscale x 8 x i64> %va)1001 %cmp = icmp ult <vscale x 8 x i64> %a, splat (i64 2)1002 ret <vscale x 8 x i1> %cmp1003}1004 1005define <vscale x 8 x i1> @ctpop_nxv8i64_ugt_one(<vscale x 8 x i64> %va) {1006; CHECK-LABEL: ctpop_nxv8i64_ugt_one:1007; CHECK: # %bb.0:1008; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma1009; CHECK-NEXT: vadd.vi v16, v8, -11010; CHECK-NEXT: vand.vv v8, v8, v161011; CHECK-NEXT: vmsne.vi v0, v8, 01012; CHECK-NEXT: ret1013;1014; CHECK-ZVBB-LABEL: ctpop_nxv8i64_ugt_one:1015; CHECK-ZVBB: # %bb.0:1016; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m8, ta, ma1017; CHECK-ZVBB-NEXT: vcpop.v v8, v81018; CHECK-ZVBB-NEXT: vmsgtu.vi v0, v8, 11019; CHECK-ZVBB-NEXT: ret1020 %a = call <vscale x 8 x i64> @llvm.ctpop.nxv8i64(<vscale x 8 x i64> %va)1021 %cmp = icmp ugt <vscale x 8 x i64> %a, splat (i64 1)1022 ret <vscale x 8 x i1> %cmp1023}1024 1025define <vscale x 8 x i1> @ctpop_nxv8i64_eq_one(<vscale x 8 x i64> %va) {1026; CHECK-LABEL: ctpop_nxv8i64_eq_one:1027; CHECK: # %bb.0:1028; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma1029; CHECK-NEXT: vadd.vi v16, v8, -11030; CHECK-NEXT: vxor.vv v8, v8, v161031; CHECK-NEXT: vmsltu.vv v0, v16, v81032; CHECK-NEXT: ret1033;1034; CHECK-ZVBB-LABEL: ctpop_nxv8i64_eq_one:1035; CHECK-ZVBB: # %bb.0:1036; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m8, ta, ma1037; CHECK-ZVBB-NEXT: vcpop.v v8, v81038; CHECK-ZVBB-NEXT: vmseq.vi v0, v8, 11039; CHECK-ZVBB-NEXT: ret1040 %a = call <vscale x 8 x i64> @llvm.ctpop.nxv8i64(<vscale x 8 x i64> %va)1041 %cmp = icmp eq <vscale x 8 x i64> %a, splat (i64 1)1042 ret <vscale x 8 x i1> %cmp1043}1044 1045define <vscale x 8 x i1> @ctpop_nxv8i64_ne_one(<vscale x 8 x i64> %va) {1046; CHECK-LABEL: ctpop_nxv8i64_ne_one:1047; CHECK: # %bb.0:1048; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma1049; CHECK-NEXT: vadd.vi v16, v8, -11050; CHECK-NEXT: vxor.vv v8, v8, v161051; CHECK-NEXT: vmsleu.vv v0, v8, v161052; CHECK-NEXT: ret1053;1054; CHECK-ZVBB-LABEL: ctpop_nxv8i64_ne_one:1055; CHECK-ZVBB: # %bb.0:1056; CHECK-ZVBB-NEXT: vsetvli a0, zero, e64, m8, ta, ma1057; CHECK-ZVBB-NEXT: vcpop.v v8, v81058; CHECK-ZVBB-NEXT: vmsne.vi v0, v8, 11059; CHECK-ZVBB-NEXT: ret1060 %a = call <vscale x 8 x i64> @llvm.ctpop.nxv8i64(<vscale x 8 x i64> %va)1061 %cmp = icmp ne <vscale x 8 x i64> %a, splat (i64 1)1062 ret <vscale x 8 x i1> %cmp1063}1064 1065