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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -mtriple=riscv32 -mattr=+v,+d,+m,+zbb %s -o - \3; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV324; RUN: llc -verify-machineinstrs -mtriple=riscv64 -mattr=+v,+d,+m,+zbb %s -o - \5; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV646 7; Load + expand for i8 type8 9define <1 x i8> @test_expandload_v1i8(ptr %base, <1 x i1> %mask, <1 x i8> %passthru) {10; CHECK-LABEL: test_expandload_v1i8:11; CHECK: # %bb.0:12; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma13; CHECK-NEXT: vcpop.m a1, v014; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma15; CHECK-NEXT: vle8.v v9, (a0)16; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, mu17; CHECK-NEXT: viota.m v10, v018; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t19; CHECK-NEXT: ret20 %res = call <1 x i8> @llvm.masked.expandload.v1i8(ptr align 1 %base, <1 x i1> %mask, <1 x i8> %passthru)21 ret <1 x i8> %res22}23 24define <1 x i8> @test_expandload_v1i8_all_ones(ptr %base, <1 x i8> %passthru) {25; CHECK-LABEL: test_expandload_v1i8_all_ones:26; CHECK: # %bb.0:27; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma28; CHECK-NEXT: vle8.v v8, (a0)29; CHECK-NEXT: ret30 %res = call <1 x i8> @llvm.masked.expandload.v1i8(ptr align 1 %base, <1 x i1> splat (i1 true), <1 x i8> %passthru)31 ret <1 x i8> %res32}33 34define <2 x i8> @test_expandload_v2i8(ptr %base, <2 x i1> %mask, <2 x i8> %passthru) {35; CHECK-LABEL: test_expandload_v2i8:36; CHECK: # %bb.0:37; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma38; CHECK-NEXT: vcpop.m a1, v039; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma40; CHECK-NEXT: vle8.v v9, (a0)41; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu42; CHECK-NEXT: viota.m v10, v043; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t44; CHECK-NEXT: ret45 %res = call <2 x i8> @llvm.masked.expandload.v2i8(ptr align 1 %base, <2 x i1> %mask, <2 x i8> %passthru)46 ret <2 x i8> %res47}48 49define <2 x i8> @test_expandload_v2i8_all_ones(ptr %base, <2 x i8> %passthru) {50; CHECK-LABEL: test_expandload_v2i8_all_ones:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma53; CHECK-NEXT: vle8.v v8, (a0)54; CHECK-NEXT: ret55 %res = call <2 x i8> @llvm.masked.expandload.v2i8(ptr align 1 %base, <2 x i1> splat (i1 true), <2 x i8> %passthru)56 ret <2 x i8> %res57}58 59define <4 x i8> @test_expandload_v4i8(ptr %base, <4 x i1> %mask, <4 x i8> %passthru) {60; CHECK-LABEL: test_expandload_v4i8:61; CHECK: # %bb.0:62; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma63; CHECK-NEXT: vcpop.m a1, v064; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma65; CHECK-NEXT: vle8.v v9, (a0)66; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, mu67; CHECK-NEXT: viota.m v10, v068; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t69; CHECK-NEXT: ret70 %res = call <4 x i8> @llvm.masked.expandload.v4i8(ptr align 1 %base, <4 x i1> %mask, <4 x i8> %passthru)71 ret <4 x i8> %res72}73 74define <4 x i8> @test_expandload_v4i8_all_ones(ptr %base, <4 x i8> %passthru) {75; CHECK-LABEL: test_expandload_v4i8_all_ones:76; CHECK: # %bb.0:77; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma78; CHECK-NEXT: vle8.v v8, (a0)79; CHECK-NEXT: ret80 %res = call <4 x i8> @llvm.masked.expandload.v4i8(ptr align 1 %base, <4 x i1> splat (i1 true), <4 x i8> %passthru)81 ret <4 x i8> %res82}83 84define <8 x i8> @test_expandload_v8i8(ptr %base, <8 x i1> %mask, <8 x i8> %passthru) {85; CHECK-LABEL: test_expandload_v8i8:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma88; CHECK-NEXT: vcpop.m a1, v089; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma90; CHECK-NEXT: vle8.v v9, (a0)91; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu92; CHECK-NEXT: viota.m v10, v093; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t94; CHECK-NEXT: ret95 %res = call <8 x i8> @llvm.masked.expandload.v8i8(ptr align 1 %base, <8 x i1> %mask, <8 x i8> %passthru)96 ret <8 x i8> %res97}98 99define <8 x i8> @test_expandload_v8i8_all_ones(ptr %base, <8 x i8> %passthru) {100; CHECK-LABEL: test_expandload_v8i8_all_ones:101; CHECK: # %bb.0:102; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma103; CHECK-NEXT: vle8.v v8, (a0)104; CHECK-NEXT: ret105 %res = call <8 x i8> @llvm.masked.expandload.v8i8(ptr align 1 %base, <8 x i1> splat (i1 true), <8 x i8> %passthru)106 ret <8 x i8> %res107}108 109define <16 x i8> @test_expandload_v16i8(ptr %base, <16 x i1> %mask, <16 x i8> %passthru) {110; CHECK-LABEL: test_expandload_v16i8:111; CHECK: # %bb.0:112; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma113; CHECK-NEXT: vcpop.m a1, v0114; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma115; CHECK-NEXT: vle8.v v9, (a0)116; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu117; CHECK-NEXT: viota.m v10, v0118; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t119; CHECK-NEXT: ret120 %res = call <16 x i8> @llvm.masked.expandload.v16i8(ptr align 1 %base, <16 x i1> %mask, <16 x i8> %passthru)121 ret <16 x i8> %res122}123 124define <16 x i8> @test_expandload_v16i8_all_ones(ptr %base, <16 x i8> %passthru) {125; CHECK-LABEL: test_expandload_v16i8_all_ones:126; CHECK: # %bb.0:127; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma128; CHECK-NEXT: vle8.v v8, (a0)129; CHECK-NEXT: ret130 %res = call <16 x i8> @llvm.masked.expandload.v16i8(ptr align 1 %base, <16 x i1> splat (i1 true), <16 x i8> %passthru)131 ret <16 x i8> %res132}133 134define <32 x i8> @test_expandload_v32i8(ptr %base, <32 x i1> %mask, <32 x i8> %passthru) {135; CHECK-LABEL: test_expandload_v32i8:136; CHECK: # %bb.0:137; CHECK-NEXT: li a1, 32138; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma139; CHECK-NEXT: vcpop.m a2, v0140; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma141; CHECK-NEXT: vle8.v v10, (a0)142; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu143; CHECK-NEXT: viota.m v12, v0144; CHECK-NEXT: vrgather.vv v8, v10, v12, v0.t145; CHECK-NEXT: ret146 %res = call <32 x i8> @llvm.masked.expandload.v32i8(ptr align 1 %base, <32 x i1> %mask, <32 x i8> %passthru)147 ret <32 x i8> %res148}149 150define <32 x i8> @test_expandload_v32i8_all_ones(ptr %base, <32 x i8> %passthru) {151; CHECK-LABEL: test_expandload_v32i8_all_ones:152; CHECK: # %bb.0:153; CHECK-NEXT: li a1, 32154; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma155; CHECK-NEXT: vle8.v v8, (a0)156; CHECK-NEXT: ret157 %res = call <32 x i8> @llvm.masked.expandload.v32i8(ptr align 1 %base, <32 x i1> splat (i1 true), <32 x i8> %passthru)158 ret <32 x i8> %res159}160 161define <64 x i8> @test_expandload_v64i8(ptr %base, <64 x i1> %mask, <64 x i8> %passthru) {162; CHECK-LABEL: test_expandload_v64i8:163; CHECK: # %bb.0:164; CHECK-NEXT: li a1, 64165; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma166; CHECK-NEXT: vcpop.m a2, v0167; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma168; CHECK-NEXT: vle8.v v12, (a0)169; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, mu170; CHECK-NEXT: viota.m v16, v0171; CHECK-NEXT: vrgather.vv v8, v12, v16, v0.t172; CHECK-NEXT: ret173 %res = call <64 x i8> @llvm.masked.expandload.v64i8(ptr align 1 %base, <64 x i1> %mask, <64 x i8> %passthru)174 ret <64 x i8> %res175}176 177define <64 x i8> @test_expandload_v64i8_all_ones(ptr %base, <64 x i8> %passthru) {178; CHECK-LABEL: test_expandload_v64i8_all_ones:179; CHECK: # %bb.0:180; CHECK-NEXT: li a1, 64181; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma182; CHECK-NEXT: vle8.v v8, (a0)183; CHECK-NEXT: ret184 %res = call <64 x i8> @llvm.masked.expandload.v64i8(ptr align 1 %base, <64 x i1> splat (i1 true), <64 x i8> %passthru)185 ret <64 x i8> %res186}187 188define <128 x i8> @test_expandload_v128i8(ptr %base, <128 x i1> %mask, <128 x i8> %passthru) {189; CHECK-LABEL: test_expandload_v128i8:190; CHECK: # %bb.0:191; CHECK-NEXT: li a1, 128192; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma193; CHECK-NEXT: vcpop.m a2, v0194; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma195; CHECK-NEXT: vle8.v v16, (a0)196; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, mu197; CHECK-NEXT: viota.m v24, v0198; CHECK-NEXT: vrgather.vv v8, v16, v24, v0.t199; CHECK-NEXT: ret200 %res = call <128 x i8> @llvm.masked.expandload.v128i8(ptr align 1 %base, <128 x i1> %mask, <128 x i8> %passthru)201 ret <128 x i8> %res202}203 204define <128 x i8> @test_expandload_v128i8_all_ones(ptr %base, <128 x i8> %passthru) {205; CHECK-LABEL: test_expandload_v128i8_all_ones:206; CHECK: # %bb.0:207; CHECK-NEXT: li a1, 128208; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma209; CHECK-NEXT: vle8.v v8, (a0)210; CHECK-NEXT: ret211 %res = call <128 x i8> @llvm.masked.expandload.v128i8(ptr align 1 %base, <128 x i1> splat (i1 true), <128 x i8> %passthru)212 ret <128 x i8> %res213}214 215define <256 x i8> @test_expandload_v256i8(ptr %base, <256 x i1> %mask, <256 x i8> %passthru) {216; CHECK-RV32-LABEL: test_expandload_v256i8:217; CHECK-RV32: # %bb.0:218; CHECK-RV32-NEXT: addi sp, sp, -16219; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16220; CHECK-RV32-NEXT: csrr a2, vlenb221; CHECK-RV32-NEXT: slli a2, a2, 5222; CHECK-RV32-NEXT: sub sp, sp, a2223; CHECK-RV32-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb224; CHECK-RV32-NEXT: csrr a2, vlenb225; CHECK-RV32-NEXT: li a3, 24226; CHECK-RV32-NEXT: mul a2, a2, a3227; CHECK-RV32-NEXT: add a2, sp, a2228; CHECK-RV32-NEXT: addi a2, a2, 16229; CHECK-RV32-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill230; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma231; CHECK-RV32-NEXT: vmv1r.v v7, v8232; CHECK-RV32-NEXT: li a2, 128233; CHECK-RV32-NEXT: vslidedown.vi v8, v0, 1234; CHECK-RV32-NEXT: li a3, 32235; CHECK-RV32-NEXT: vmv.x.s a4, v0236; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, ta, ma237; CHECK-RV32-NEXT: vle8.v v16, (a1)238; CHECK-RV32-NEXT: csrr a1, vlenb239; CHECK-RV32-NEXT: slli a1, a1, 3240; CHECK-RV32-NEXT: add a1, sp, a1241; CHECK-RV32-NEXT: addi a1, a1, 16242; CHECK-RV32-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill243; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma244; CHECK-RV32-NEXT: vsrl.vx v9, v8, a3245; CHECK-RV32-NEXT: vsrl.vx v10, v0, a3246; CHECK-RV32-NEXT: vmv.x.s a1, v8247; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, ta, ma248; CHECK-RV32-NEXT: vcpop.m a3, v0249; CHECK-RV32-NEXT: cpop a4, a4250; CHECK-RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma251; CHECK-RV32-NEXT: vmv.x.s a5, v9252; CHECK-RV32-NEXT: vmv.x.s a6, v10253; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, ta, ma254; CHECK-RV32-NEXT: vle8.v v8, (a0)255; CHECK-RV32-NEXT: csrr a3, vlenb256; CHECK-RV32-NEXT: slli a3, a3, 4257; CHECK-RV32-NEXT: add a3, sp, a3258; CHECK-RV32-NEXT: addi a3, a3, 16259; CHECK-RV32-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill260; CHECK-RV32-NEXT: cpop a1, a1261; CHECK-RV32-NEXT: cpop a3, a6262; CHECK-RV32-NEXT: cpop a5, a5263; CHECK-RV32-NEXT: add a3, a4, a3264; CHECK-RV32-NEXT: add a1, a1, a5265; CHECK-RV32-NEXT: add a1, a3, a1266; CHECK-RV32-NEXT: add a0, a0, a1267; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, ta, ma268; CHECK-RV32-NEXT: vcpop.m a1, v7269; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma270; CHECK-RV32-NEXT: vle8.v v8, (a0)271; CHECK-RV32-NEXT: addi a0, sp, 16272; CHECK-RV32-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill273; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, ta, mu274; CHECK-RV32-NEXT: viota.m v24, v0275; CHECK-RV32-NEXT: csrr a0, vlenb276; CHECK-RV32-NEXT: slli a0, a0, 4277; CHECK-RV32-NEXT: add a0, sp, a0278; CHECK-RV32-NEXT: addi a0, a0, 16279; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload280; CHECK-RV32-NEXT: csrr a0, vlenb281; CHECK-RV32-NEXT: li a1, 24282; CHECK-RV32-NEXT: mul a0, a0, a1283; CHECK-RV32-NEXT: add a0, sp, a0284; CHECK-RV32-NEXT: addi a0, a0, 16285; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload286; CHECK-RV32-NEXT: vrgather.vv v8, v16, v24, v0.t287; CHECK-RV32-NEXT: csrr a0, vlenb288; CHECK-RV32-NEXT: li a1, 24289; CHECK-RV32-NEXT: mul a0, a0, a1290; CHECK-RV32-NEXT: add a0, sp, a0291; CHECK-RV32-NEXT: addi a0, a0, 16292; CHECK-RV32-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill293; CHECK-RV32-NEXT: viota.m v8, v7294; CHECK-RV32-NEXT: vmv1r.v v0, v7295; CHECK-RV32-NEXT: csrr a0, vlenb296; CHECK-RV32-NEXT: slli a0, a0, 3297; CHECK-RV32-NEXT: add a0, sp, a0298; CHECK-RV32-NEXT: addi a0, a0, 16299; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload300; CHECK-RV32-NEXT: addi a0, sp, 16301; CHECK-RV32-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload302; CHECK-RV32-NEXT: vrgather.vv v16, v24, v8, v0.t303; CHECK-RV32-NEXT: csrr a0, vlenb304; CHECK-RV32-NEXT: li a1, 24305; CHECK-RV32-NEXT: mul a0, a0, a1306; CHECK-RV32-NEXT: add a0, sp, a0307; CHECK-RV32-NEXT: addi a0, a0, 16308; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload309; CHECK-RV32-NEXT: csrr a0, vlenb310; CHECK-RV32-NEXT: slli a0, a0, 5311; CHECK-RV32-NEXT: add sp, sp, a0312; CHECK-RV32-NEXT: .cfi_def_cfa sp, 16313; CHECK-RV32-NEXT: addi sp, sp, 16314; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0315; CHECK-RV32-NEXT: ret316;317; CHECK-RV64-LABEL: test_expandload_v256i8:318; CHECK-RV64: # %bb.0:319; CHECK-RV64-NEXT: addi sp, sp, -16320; CHECK-RV64-NEXT: .cfi_def_cfa_offset 16321; CHECK-RV64-NEXT: csrr a2, vlenb322; CHECK-RV64-NEXT: slli a2, a2, 5323; CHECK-RV64-NEXT: sub sp, sp, a2324; CHECK-RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb325; CHECK-RV64-NEXT: csrr a2, vlenb326; CHECK-RV64-NEXT: li a3, 24327; CHECK-RV64-NEXT: mul a2, a2, a3328; CHECK-RV64-NEXT: add a2, sp, a2329; CHECK-RV64-NEXT: addi a2, a2, 16330; CHECK-RV64-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill331; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma332; CHECK-RV64-NEXT: vmv1r.v v7, v8333; CHECK-RV64-NEXT: li a2, 128334; CHECK-RV64-NEXT: vslidedown.vi v8, v0, 1335; CHECK-RV64-NEXT: vmv.x.s a3, v0336; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma337; CHECK-RV64-NEXT: vle8.v v16, (a1)338; CHECK-RV64-NEXT: csrr a1, vlenb339; CHECK-RV64-NEXT: slli a1, a1, 3340; CHECK-RV64-NEXT: add a1, sp, a1341; CHECK-RV64-NEXT: addi a1, a1, 16342; CHECK-RV64-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill343; CHECK-RV64-NEXT: vsetvli zero, a2, e64, m1, ta, ma344; CHECK-RV64-NEXT: vmv.x.s a1, v8345; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma346; CHECK-RV64-NEXT: vcpop.m a4, v0347; CHECK-RV64-NEXT: vsetvli zero, a4, e8, m8, ta, ma348; CHECK-RV64-NEXT: vle8.v v8, (a0)349; CHECK-RV64-NEXT: csrr a4, vlenb350; CHECK-RV64-NEXT: slli a4, a4, 4351; CHECK-RV64-NEXT: add a4, sp, a4352; CHECK-RV64-NEXT: addi a4, a4, 16353; CHECK-RV64-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill354; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, ta, ma355; CHECK-RV64-NEXT: vcpop.m a4, v7356; CHECK-RV64-NEXT: cpop a3, a3357; CHECK-RV64-NEXT: cpop a1, a1358; CHECK-RV64-NEXT: add a0, a0, a3359; CHECK-RV64-NEXT: add a0, a0, a1360; CHECK-RV64-NEXT: vsetvli zero, a4, e8, m8, ta, ma361; CHECK-RV64-NEXT: vle8.v v8, (a0)362; CHECK-RV64-NEXT: addi a0, sp, 16363; CHECK-RV64-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill364; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, ta, mu365; CHECK-RV64-NEXT: viota.m v16, v0366; CHECK-RV64-NEXT: csrr a0, vlenb367; CHECK-RV64-NEXT: slli a0, a0, 4368; CHECK-RV64-NEXT: add a0, sp, a0369; CHECK-RV64-NEXT: addi a0, a0, 16370; CHECK-RV64-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload371; CHECK-RV64-NEXT: csrr a0, vlenb372; CHECK-RV64-NEXT: li a1, 24373; CHECK-RV64-NEXT: mul a0, a0, a1374; CHECK-RV64-NEXT: add a0, sp, a0375; CHECK-RV64-NEXT: addi a0, a0, 16376; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload377; CHECK-RV64-NEXT: vrgather.vv v8, v24, v16, v0.t378; CHECK-RV64-NEXT: csrr a0, vlenb379; CHECK-RV64-NEXT: li a1, 24380; CHECK-RV64-NEXT: mul a0, a0, a1381; CHECK-RV64-NEXT: add a0, sp, a0382; CHECK-RV64-NEXT: addi a0, a0, 16383; CHECK-RV64-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill384; CHECK-RV64-NEXT: viota.m v8, v7385; CHECK-RV64-NEXT: vmv1r.v v0, v7386; CHECK-RV64-NEXT: csrr a0, vlenb387; CHECK-RV64-NEXT: slli a0, a0, 3388; CHECK-RV64-NEXT: add a0, sp, a0389; CHECK-RV64-NEXT: addi a0, a0, 16390; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload391; CHECK-RV64-NEXT: addi a0, sp, 16392; CHECK-RV64-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload393; CHECK-RV64-NEXT: vrgather.vv v16, v24, v8, v0.t394; CHECK-RV64-NEXT: csrr a0, vlenb395; CHECK-RV64-NEXT: li a1, 24396; CHECK-RV64-NEXT: mul a0, a0, a1397; CHECK-RV64-NEXT: add a0, sp, a0398; CHECK-RV64-NEXT: addi a0, a0, 16399; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload400; CHECK-RV64-NEXT: csrr a0, vlenb401; CHECK-RV64-NEXT: slli a0, a0, 5402; CHECK-RV64-NEXT: add sp, sp, a0403; CHECK-RV64-NEXT: .cfi_def_cfa sp, 16404; CHECK-RV64-NEXT: addi sp, sp, 16405; CHECK-RV64-NEXT: .cfi_def_cfa_offset 0406; CHECK-RV64-NEXT: ret407 %res = call <256 x i8> @llvm.masked.expandload.v256i8(ptr align 1 %base, <256 x i1> %mask, <256 x i8> %passthru)408 ret <256 x i8> %res409}410 411define <256 x i8> @test_expandload_v256i8_all_ones(ptr %base, <256 x i8> %passthru) {412; CHECK-RV32-LABEL: test_expandload_v256i8_all_ones:413; CHECK-RV32: # %bb.0:414; CHECK-RV32-NEXT: li a1, 128415; CHECK-RV32-NEXT: li a2, 32416; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma417; CHECK-RV32-NEXT: vmset.m v8418; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma419; CHECK-RV32-NEXT: vsrl.vx v9, v8, a2420; CHECK-RV32-NEXT: vmv.x.s a3, v8421; CHECK-RV32-NEXT: vslidedown.vi v8, v8, 1422; CHECK-RV32-NEXT: vmv.x.s a4, v9423; CHECK-RV32-NEXT: cpop a3, a3424; CHECK-RV32-NEXT: vsrl.vx v9, v8, a2425; CHECK-RV32-NEXT: vmv.x.s a2, v8426; CHECK-RV32-NEXT: cpop a4, a4427; CHECK-RV32-NEXT: add a3, a3, a4428; CHECK-RV32-NEXT: vmv.x.s a4, v9429; CHECK-RV32-NEXT: cpop a2, a2430; CHECK-RV32-NEXT: cpop a4, a4431; CHECK-RV32-NEXT: add a2, a2, a4432; CHECK-RV32-NEXT: add a3, a0, a3433; CHECK-RV32-NEXT: add a2, a3, a2434; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma435; CHECK-RV32-NEXT: vle8.v v16, (a2)436; CHECK-RV32-NEXT: vle8.v v8, (a0)437; CHECK-RV32-NEXT: ret438;439; CHECK-RV64-LABEL: test_expandload_v256i8_all_ones:440; CHECK-RV64: # %bb.0:441; CHECK-RV64-NEXT: li a1, 128442; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, ta, ma443; CHECK-RV64-NEXT: vle8.v v8, (a0)444; CHECK-RV64-NEXT: vmset.m v16445; CHECK-RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma446; CHECK-RV64-NEXT: vmv.x.s a2, v16447; CHECK-RV64-NEXT: vslidedown.vi v16, v16, 1448; CHECK-RV64-NEXT: cpop a2, a2449; CHECK-RV64-NEXT: vmv.x.s a3, v16450; CHECK-RV64-NEXT: cpop a3, a3451; CHECK-RV64-NEXT: add a0, a0, a2452; CHECK-RV64-NEXT: add a0, a0, a3453; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, ta, ma454; CHECK-RV64-NEXT: vle8.v v16, (a0)455; CHECK-RV64-NEXT: ret456 %res = call <256 x i8> @llvm.masked.expandload.v256i8(ptr align 1 %base, <256 x i1> splat (i1 true), <256 x i8> %passthru)457 ret <256 x i8> %res458}459 460; Load + expand for i16 type461 462define <1 x i16> @test_expandload_v1i16(ptr %base, <1 x i1> %mask, <1 x i16> %passthru) {463; CHECK-LABEL: test_expandload_v1i16:464; CHECK: # %bb.0:465; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma466; CHECK-NEXT: vcpop.m a1, v0467; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma468; CHECK-NEXT: vle16.v v9, (a0)469; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, mu470; CHECK-NEXT: viota.m v10, v0471; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t472; CHECK-NEXT: ret473 %res = call <1 x i16> @llvm.masked.expandload.v1i16(ptr align 2 %base, <1 x i1> %mask, <1 x i16> %passthru)474 ret <1 x i16> %res475}476 477define <1 x i16> @test_expandload_v1i16_all_ones(ptr %base, <1 x i16> %passthru) {478; CHECK-LABEL: test_expandload_v1i16_all_ones:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma481; CHECK-NEXT: vle16.v v8, (a0)482; CHECK-NEXT: ret483 %res = call <1 x i16> @llvm.masked.expandload.v1i16(ptr align 2 %base, <1 x i1> splat (i1 true), <1 x i16> %passthru)484 ret <1 x i16> %res485}486 487define <2 x i16> @test_expandload_v2i16(ptr %base, <2 x i1> %mask, <2 x i16> %passthru) {488; CHECK-LABEL: test_expandload_v2i16:489; CHECK: # %bb.0:490; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma491; CHECK-NEXT: vcpop.m a1, v0492; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma493; CHECK-NEXT: vle16.v v9, (a0)494; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu495; CHECK-NEXT: viota.m v10, v0496; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t497; CHECK-NEXT: ret498 %res = call <2 x i16> @llvm.masked.expandload.v2i16(ptr align 2 %base, <2 x i1> %mask, <2 x i16> %passthru)499 ret <2 x i16> %res500}501 502define <2 x i16> @test_expandload_v2i16_all_ones(ptr %base, <2 x i16> %passthru) {503; CHECK-LABEL: test_expandload_v2i16_all_ones:504; CHECK: # %bb.0:505; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma506; CHECK-NEXT: vle16.v v8, (a0)507; CHECK-NEXT: ret508 %res = call <2 x i16> @llvm.masked.expandload.v2i16(ptr align 2 %base, <2 x i1> splat (i1 true), <2 x i16> %passthru)509 ret <2 x i16> %res510}511 512define <4 x i16> @test_expandload_v4i16(ptr %base, <4 x i1> %mask, <4 x i16> %passthru) {513; CHECK-LABEL: test_expandload_v4i16:514; CHECK: # %bb.0:515; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma516; CHECK-NEXT: vcpop.m a1, v0517; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma518; CHECK-NEXT: vle16.v v9, (a0)519; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu520; CHECK-NEXT: viota.m v10, v0521; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t522; CHECK-NEXT: ret523 %res = call <4 x i16> @llvm.masked.expandload.v4i16(ptr align 2 %base, <4 x i1> %mask, <4 x i16> %passthru)524 ret <4 x i16> %res525}526 527define <4 x i16> @test_expandload_v4i16_all_ones(ptr %base, <4 x i16> %passthru) {528; CHECK-LABEL: test_expandload_v4i16_all_ones:529; CHECK: # %bb.0:530; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma531; CHECK-NEXT: vle16.v v8, (a0)532; CHECK-NEXT: ret533 %res = call <4 x i16> @llvm.masked.expandload.v4i16(ptr align 2 %base, <4 x i1> splat (i1 true), <4 x i16> %passthru)534 ret <4 x i16> %res535}536 537define <8 x i16> @test_expandload_v8i16(ptr %base, <8 x i1> %mask, <8 x i16> %passthru) {538; CHECK-LABEL: test_expandload_v8i16:539; CHECK: # %bb.0:540; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma541; CHECK-NEXT: vcpop.m a1, v0542; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma543; CHECK-NEXT: vle16.v v9, (a0)544; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu545; CHECK-NEXT: viota.m v10, v0546; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t547; CHECK-NEXT: ret548 %res = call <8 x i16> @llvm.masked.expandload.v8i16(ptr align 2 %base, <8 x i1> %mask, <8 x i16> %passthru)549 ret <8 x i16> %res550}551 552define <8 x i16> @test_expandload_v8i16_all_ones(ptr %base, <8 x i16> %passthru) {553; CHECK-LABEL: test_expandload_v8i16_all_ones:554; CHECK: # %bb.0:555; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma556; CHECK-NEXT: vle16.v v8, (a0)557; CHECK-NEXT: ret558 %res = call <8 x i16> @llvm.masked.expandload.v8i16(ptr align 2 %base, <8 x i1> splat (i1 true), <8 x i16> %passthru)559 ret <8 x i16> %res560}561 562define <16 x i16> @test_expandload_v16i16(ptr %base, <16 x i1> %mask, <16 x i16> %passthru) {563; CHECK-LABEL: test_expandload_v16i16:564; CHECK: # %bb.0:565; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma566; CHECK-NEXT: vcpop.m a1, v0567; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma568; CHECK-NEXT: vle16.v v10, (a0)569; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, mu570; CHECK-NEXT: viota.m v12, v0571; CHECK-NEXT: vrgather.vv v8, v10, v12, v0.t572; CHECK-NEXT: ret573 %res = call <16 x i16> @llvm.masked.expandload.v16i16(ptr align 2 %base, <16 x i1> %mask, <16 x i16> %passthru)574 ret <16 x i16> %res575}576 577define <16 x i16> @test_expandload_v16i16_all_ones(ptr %base, <16 x i16> %passthru) {578; CHECK-LABEL: test_expandload_v16i16_all_ones:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma581; CHECK-NEXT: vle16.v v8, (a0)582; CHECK-NEXT: ret583 %res = call <16 x i16> @llvm.masked.expandload.v16i16(ptr align 2 %base, <16 x i1> splat (i1 true), <16 x i16> %passthru)584 ret <16 x i16> %res585}586 587define <32 x i16> @test_expandload_v32i16(ptr %base, <32 x i1> %mask, <32 x i16> %passthru) {588; CHECK-LABEL: test_expandload_v32i16:589; CHECK: # %bb.0:590; CHECK-NEXT: li a1, 32591; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma592; CHECK-NEXT: vcpop.m a2, v0593; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma594; CHECK-NEXT: vle16.v v12, (a0)595; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu596; CHECK-NEXT: viota.m v16, v0597; CHECK-NEXT: vrgather.vv v8, v12, v16, v0.t598; CHECK-NEXT: ret599 %res = call <32 x i16> @llvm.masked.expandload.v32i16(ptr align 2 %base, <32 x i1> %mask, <32 x i16> %passthru)600 ret <32 x i16> %res601}602 603define <32 x i16> @test_expandload_v32i16_all_ones(ptr %base, <32 x i16> %passthru) {604; CHECK-LABEL: test_expandload_v32i16_all_ones:605; CHECK: # %bb.0:606; CHECK-NEXT: li a1, 32607; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma608; CHECK-NEXT: vle16.v v8, (a0)609; CHECK-NEXT: ret610 %res = call <32 x i16> @llvm.masked.expandload.v32i16(ptr align 2 %base, <32 x i1> splat (i1 true), <32 x i16> %passthru)611 ret <32 x i16> %res612}613 614define <64 x i16> @test_expandload_v64i16(ptr %base, <64 x i1> %mask, <64 x i16> %passthru) {615; CHECK-LABEL: test_expandload_v64i16:616; CHECK: # %bb.0:617; CHECK-NEXT: li a1, 64618; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma619; CHECK-NEXT: vcpop.m a2, v0620; CHECK-NEXT: vsetvli zero, a2, e16, m8, ta, ma621; CHECK-NEXT: vle16.v v16, (a0)622; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, mu623; CHECK-NEXT: viota.m v24, v0624; CHECK-NEXT: vrgather.vv v8, v16, v24, v0.t625; CHECK-NEXT: ret626 %res = call <64 x i16> @llvm.masked.expandload.v64i16(ptr align 2 %base, <64 x i1> %mask, <64 x i16> %passthru)627 ret <64 x i16> %res628}629 630define <64 x i16> @test_expandload_v64i16_all_ones(ptr %base, <64 x i16> %passthru) {631; CHECK-LABEL: test_expandload_v64i16_all_ones:632; CHECK: # %bb.0:633; CHECK-NEXT: li a1, 64634; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma635; CHECK-NEXT: vle16.v v8, (a0)636; CHECK-NEXT: ret637 %res = call <64 x i16> @llvm.masked.expandload.v64i16(ptr align 2 %base, <64 x i1> splat (i1 true), <64 x i16> %passthru)638 ret <64 x i16> %res639}640 641define <128 x i16> @test_expandload_v128i16(ptr %base, <128 x i1> %mask, <128 x i16> %passthru) {642; CHECK-RV32-LABEL: test_expandload_v128i16:643; CHECK-RV32: # %bb.0:644; CHECK-RV32-NEXT: addi sp, sp, -16645; CHECK-RV32-NEXT: .cfi_def_cfa_offset 16646; CHECK-RV32-NEXT: csrr a1, vlenb647; CHECK-RV32-NEXT: slli a1, a1, 5648; CHECK-RV32-NEXT: sub sp, sp, a1649; CHECK-RV32-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb650; CHECK-RV32-NEXT: csrr a1, vlenb651; CHECK-RV32-NEXT: li a2, 24652; CHECK-RV32-NEXT: mul a1, a1, a2653; CHECK-RV32-NEXT: add a1, sp, a1654; CHECK-RV32-NEXT: addi a1, a1, 16655; CHECK-RV32-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill656; CHECK-RV32-NEXT: li a1, 64657; CHECK-RV32-NEXT: vsetivli zero, 8, e8, m1, ta, ma658; CHECK-RV32-NEXT: vslidedown.vi v7, v0, 8659; CHECK-RV32-NEXT: li a2, 32660; CHECK-RV32-NEXT: vsetvli zero, zero, e64, m8, ta, ma661; CHECK-RV32-NEXT: vmv.x.s a3, v0662; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m4, ta, ma663; CHECK-RV32-NEXT: vcpop.m a4, v0664; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma665; CHECK-RV32-NEXT: vsrl.vx v16, v0, a2666; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m4, ta, ma667; CHECK-RV32-NEXT: vcpop.m a2, v7668; CHECK-RV32-NEXT: vsetvli zero, a4, e16, m8, ta, ma669; CHECK-RV32-NEXT: vle16.v v24, (a0)670; CHECK-RV32-NEXT: csrr a5, vlenb671; CHECK-RV32-NEXT: slli a5, a5, 4672; CHECK-RV32-NEXT: add a5, sp, a5673; CHECK-RV32-NEXT: addi a5, a5, 16674; CHECK-RV32-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill675; CHECK-RV32-NEXT: vsetvli zero, a4, e64, m1, ta, ma676; CHECK-RV32-NEXT: vmv.x.s a4, v16677; CHECK-RV32-NEXT: cpop a4, a4678; CHECK-RV32-NEXT: cpop a3, a3679; CHECK-RV32-NEXT: add a3, a3, a4680; CHECK-RV32-NEXT: slli a3, a3, 1681; CHECK-RV32-NEXT: add a0, a0, a3682; CHECK-RV32-NEXT: vsetvli zero, a2, e16, m8, ta, ma683; CHECK-RV32-NEXT: vle16.v v16, (a0)684; CHECK-RV32-NEXT: csrr a0, vlenb685; CHECK-RV32-NEXT: slli a0, a0, 3686; CHECK-RV32-NEXT: add a0, sp, a0687; CHECK-RV32-NEXT: addi a0, a0, 16688; CHECK-RV32-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill689; CHECK-RV32-NEXT: vsetvli zero, a1, e16, m8, ta, mu690; CHECK-RV32-NEXT: viota.m v24, v0691; CHECK-RV32-NEXT: csrr a0, vlenb692; CHECK-RV32-NEXT: slli a0, a0, 4693; CHECK-RV32-NEXT: add a0, sp, a0694; CHECK-RV32-NEXT: addi a0, a0, 16695; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload696; CHECK-RV32-NEXT: vrgather.vv v8, v16, v24, v0.t697; CHECK-RV32-NEXT: addi a0, sp, 16698; CHECK-RV32-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill699; CHECK-RV32-NEXT: viota.m v8, v7700; CHECK-RV32-NEXT: vmv1r.v v0, v7701; CHECK-RV32-NEXT: csrr a0, vlenb702; CHECK-RV32-NEXT: li a1, 24703; CHECK-RV32-NEXT: mul a0, a0, a1704; CHECK-RV32-NEXT: add a0, sp, a0705; CHECK-RV32-NEXT: addi a0, a0, 16706; CHECK-RV32-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload707; CHECK-RV32-NEXT: csrr a0, vlenb708; CHECK-RV32-NEXT: slli a0, a0, 3709; CHECK-RV32-NEXT: add a0, sp, a0710; CHECK-RV32-NEXT: addi a0, a0, 16711; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload712; CHECK-RV32-NEXT: vrgather.vv v24, v16, v8, v0.t713; CHECK-RV32-NEXT: addi a0, sp, 16714; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload715; CHECK-RV32-NEXT: vmv.v.v v16, v24716; CHECK-RV32-NEXT: csrr a0, vlenb717; CHECK-RV32-NEXT: slli a0, a0, 5718; CHECK-RV32-NEXT: add sp, sp, a0719; CHECK-RV32-NEXT: .cfi_def_cfa sp, 16720; CHECK-RV32-NEXT: addi sp, sp, 16721; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0722; CHECK-RV32-NEXT: ret723;724; CHECK-RV64-LABEL: test_expandload_v128i16:725; CHECK-RV64: # %bb.0:726; CHECK-RV64-NEXT: addi sp, sp, -16727; CHECK-RV64-NEXT: .cfi_def_cfa_offset 16728; CHECK-RV64-NEXT: csrr a1, vlenb729; CHECK-RV64-NEXT: slli a1, a1, 5730; CHECK-RV64-NEXT: sub sp, sp, a1731; CHECK-RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb732; CHECK-RV64-NEXT: csrr a1, vlenb733; CHECK-RV64-NEXT: slli a1, a1, 3734; CHECK-RV64-NEXT: add a1, sp, a1735; CHECK-RV64-NEXT: addi a1, a1, 16736; CHECK-RV64-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill737; CHECK-RV64-NEXT: li a1, 64738; CHECK-RV64-NEXT: vsetivli zero, 8, e8, m1, ta, ma739; CHECK-RV64-NEXT: vslidedown.vi v7, v0, 8740; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, ta, ma741; CHECK-RV64-NEXT: vcpop.m a2, v0742; CHECK-RV64-NEXT: vcpop.m a3, v7743; CHECK-RV64-NEXT: vsetvli zero, a2, e16, m8, ta, ma744; CHECK-RV64-NEXT: vle16.v v24, (a0)745; CHECK-RV64-NEXT: csrr a4, vlenb746; CHECK-RV64-NEXT: slli a4, a4, 4747; CHECK-RV64-NEXT: add a4, sp, a4748; CHECK-RV64-NEXT: addi a4, a4, 16749; CHECK-RV64-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill750; CHECK-RV64-NEXT: slli a2, a2, 1751; CHECK-RV64-NEXT: add a0, a0, a2752; CHECK-RV64-NEXT: vsetvli zero, a3, e16, m8, ta, ma753; CHECK-RV64-NEXT: vle16.v v24, (a0)754; CHECK-RV64-NEXT: csrr a0, vlenb755; CHECK-RV64-NEXT: li a2, 24756; CHECK-RV64-NEXT: mul a0, a0, a2757; CHECK-RV64-NEXT: add a0, sp, a0758; CHECK-RV64-NEXT: addi a0, a0, 16759; CHECK-RV64-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill760; CHECK-RV64-NEXT: vsetvli zero, a1, e16, m8, ta, mu761; CHECK-RV64-NEXT: viota.m v24, v0762; CHECK-RV64-NEXT: csrr a0, vlenb763; CHECK-RV64-NEXT: slli a0, a0, 4764; CHECK-RV64-NEXT: add a0, sp, a0765; CHECK-RV64-NEXT: addi a0, a0, 16766; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload767; CHECK-RV64-NEXT: vrgather.vv v8, v16, v24, v0.t768; CHECK-RV64-NEXT: addi a0, sp, 16769; CHECK-RV64-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill770; CHECK-RV64-NEXT: viota.m v16, v7771; CHECK-RV64-NEXT: csrr a0, vlenb772; CHECK-RV64-NEXT: slli a0, a0, 4773; CHECK-RV64-NEXT: add a0, sp, a0774; CHECK-RV64-NEXT: addi a0, a0, 16775; CHECK-RV64-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill776; CHECK-RV64-NEXT: vmv1r.v v0, v7777; CHECK-RV64-NEXT: csrr a0, vlenb778; CHECK-RV64-NEXT: li a1, 24779; CHECK-RV64-NEXT: mul a0, a0, a1780; CHECK-RV64-NEXT: add a0, sp, a0781; CHECK-RV64-NEXT: addi a0, a0, 16782; CHECK-RV64-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload783; CHECK-RV64-NEXT: csrr a0, vlenb784; CHECK-RV64-NEXT: slli a0, a0, 3785; CHECK-RV64-NEXT: add a0, sp, a0786; CHECK-RV64-NEXT: addi a0, a0, 16787; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload788; CHECK-RV64-NEXT: csrr a0, vlenb789; CHECK-RV64-NEXT: slli a0, a0, 4790; CHECK-RV64-NEXT: add a0, sp, a0791; CHECK-RV64-NEXT: addi a0, a0, 16792; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload793; CHECK-RV64-NEXT: vrgather.vv v16, v24, v8, v0.t794; CHECK-RV64-NEXT: addi a0, sp, 16795; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload796; CHECK-RV64-NEXT: csrr a0, vlenb797; CHECK-RV64-NEXT: slli a0, a0, 5798; CHECK-RV64-NEXT: add sp, sp, a0799; CHECK-RV64-NEXT: .cfi_def_cfa sp, 16800; CHECK-RV64-NEXT: addi sp, sp, 16801; CHECK-RV64-NEXT: .cfi_def_cfa_offset 0802; CHECK-RV64-NEXT: ret803 %res = call <128 x i16> @llvm.masked.expandload.v128i16(ptr align 2 %base, <128 x i1> %mask, <128 x i16> %passthru)804 ret <128 x i16> %res805}806 807define <128 x i16> @test_expandload_v128i16_all_ones(ptr %base, <128 x i16> %passthru) {808; CHECK-RV32-LABEL: test_expandload_v128i16_all_ones:809; CHECK-RV32: # %bb.0:810; CHECK-RV32-NEXT: li a1, 64811; CHECK-RV32-NEXT: li a2, 32812; CHECK-RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma813; CHECK-RV32-NEXT: vle16.v v8, (a0)814; CHECK-RV32-NEXT: vmset.m v16815; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma816; CHECK-RV32-NEXT: vsrl.vx v17, v16, a2817; CHECK-RV32-NEXT: vmv.x.s a2, v16818; CHECK-RV32-NEXT: vmv.x.s a3, v17819; CHECK-RV32-NEXT: cpop a3, a3820; CHECK-RV32-NEXT: cpop a2, a2821; CHECK-RV32-NEXT: add a2, a2, a3822; CHECK-RV32-NEXT: slli a2, a2, 1823; CHECK-RV32-NEXT: add a0, a0, a2824; CHECK-RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma825; CHECK-RV32-NEXT: vle16.v v16, (a0)826; CHECK-RV32-NEXT: ret827;828; CHECK-RV64-LABEL: test_expandload_v128i16_all_ones:829; CHECK-RV64: # %bb.0:830; CHECK-RV64-NEXT: li a1, 64831; CHECK-RV64-NEXT: vsetvli zero, a1, e16, m8, ta, ma832; CHECK-RV64-NEXT: vle16.v v8, (a0)833; CHECK-RV64-NEXT: vmset.m v16834; CHECK-RV64-NEXT: vcpop.m a1, v16835; CHECK-RV64-NEXT: slli a1, a1, 1836; CHECK-RV64-NEXT: add a0, a0, a1837; CHECK-RV64-NEXT: vle16.v v16, (a0)838; CHECK-RV64-NEXT: ret839 %res = call <128 x i16> @llvm.masked.expandload.v128i16(ptr align 2 %base, <128 x i1> splat (i1 true), <128 x i16> %passthru)840 ret <128 x i16> %res841}842 843; Load + expand for i32 type844 845define <1 x i32> @test_expandload_v1i32(ptr %base, <1 x i1> %mask, <1 x i32> %passthru) {846; CHECK-LABEL: test_expandload_v1i32:847; CHECK: # %bb.0:848; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma849; CHECK-NEXT: vcpop.m a1, v0850; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma851; CHECK-NEXT: vle32.v v9, (a0)852; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, mu853; CHECK-NEXT: viota.m v10, v0854; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t855; CHECK-NEXT: ret856 %res = call <1 x i32> @llvm.masked.expandload.v1i32(ptr align 4 %base, <1 x i1> %mask, <1 x i32> %passthru)857 ret <1 x i32> %res858}859 860define <1 x i32> @test_expandload_v1i32_all_ones(ptr %base, <1 x i32> %passthru) {861; CHECK-LABEL: test_expandload_v1i32_all_ones:862; CHECK: # %bb.0:863; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma864; CHECK-NEXT: vle32.v v8, (a0)865; CHECK-NEXT: ret866 %res = call <1 x i32> @llvm.masked.expandload.v1i32(ptr align 4 %base, <1 x i1> splat (i1 true), <1 x i32> %passthru)867 ret <1 x i32> %res868}869 870define <2 x i32> @test_expandload_v2i32(ptr %base, <2 x i1> %mask, <2 x i32> %passthru) {871; CHECK-LABEL: test_expandload_v2i32:872; CHECK: # %bb.0:873; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma874; CHECK-NEXT: vcpop.m a1, v0875; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma876; CHECK-NEXT: vle32.v v9, (a0)877; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu878; CHECK-NEXT: viota.m v10, v0879; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t880; CHECK-NEXT: ret881 %res = call <2 x i32> @llvm.masked.expandload.v2i32(ptr align 4 %base, <2 x i1> %mask, <2 x i32> %passthru)882 ret <2 x i32> %res883}884 885define <2 x i32> @test_expandload_v2i32_all_ones(ptr %base, <2 x i32> %passthru) {886; CHECK-LABEL: test_expandload_v2i32_all_ones:887; CHECK: # %bb.0:888; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma889; CHECK-NEXT: vle32.v v8, (a0)890; CHECK-NEXT: ret891 %res = call <2 x i32> @llvm.masked.expandload.v2i32(ptr align 4 %base, <2 x i1> splat (i1 true), <2 x i32> %passthru)892 ret <2 x i32> %res893}894 895define <4 x i32> @test_expandload_v4i32(ptr %base, <4 x i1> %mask, <4 x i32> %passthru) {896; CHECK-LABEL: test_expandload_v4i32:897; CHECK: # %bb.0:898; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma899; CHECK-NEXT: vcpop.m a1, v0900; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma901; CHECK-NEXT: vle32.v v9, (a0)902; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu903; CHECK-NEXT: viota.m v10, v0904; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t905; CHECK-NEXT: ret906 %res = call <4 x i32> @llvm.masked.expandload.v4i32(ptr align 4 %base, <4 x i1> %mask, <4 x i32> %passthru)907 ret <4 x i32> %res908}909 910define <4 x i32> @test_expandload_v4i32_all_ones(ptr %base, <4 x i32> %passthru) {911; CHECK-LABEL: test_expandload_v4i32_all_ones:912; CHECK: # %bb.0:913; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma914; CHECK-NEXT: vle32.v v8, (a0)915; CHECK-NEXT: ret916 %res = call <4 x i32> @llvm.masked.expandload.v4i32(ptr align 4 %base, <4 x i1> splat (i1 true), <4 x i32> %passthru)917 ret <4 x i32> %res918}919 920define <8 x i32> @test_expandload_v8i32(ptr %base, <8 x i1> %mask, <8 x i32> %passthru) {921; CHECK-LABEL: test_expandload_v8i32:922; CHECK: # %bb.0:923; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma924; CHECK-NEXT: vcpop.m a1, v0925; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma926; CHECK-NEXT: vle32.v v10, (a0)927; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, mu928; CHECK-NEXT: viota.m v12, v0929; CHECK-NEXT: vrgather.vv v8, v10, v12, v0.t930; CHECK-NEXT: ret931 %res = call <8 x i32> @llvm.masked.expandload.v8i32(ptr align 4 %base, <8 x i1> %mask, <8 x i32> %passthru)932 ret <8 x i32> %res933}934 935define <8 x i32> @test_expandload_v8i32_all_ones(ptr %base, <8 x i32> %passthru) {936; CHECK-LABEL: test_expandload_v8i32_all_ones:937; CHECK: # %bb.0:938; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma939; CHECK-NEXT: vle32.v v8, (a0)940; CHECK-NEXT: ret941 %res = call <8 x i32> @llvm.masked.expandload.v8i32(ptr align 4 %base, <8 x i1> splat (i1 true), <8 x i32> %passthru)942 ret <8 x i32> %res943}944 945define <16 x i32> @test_expandload_v16i32(ptr %base, <16 x i1> %mask, <16 x i32> %passthru) {946; CHECK-LABEL: test_expandload_v16i32:947; CHECK: # %bb.0:948; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma949; CHECK-NEXT: vcpop.m a1, v0950; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma951; CHECK-NEXT: vle32.v v12, (a0)952; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu953; CHECK-NEXT: viota.m v16, v0954; CHECK-NEXT: vrgather.vv v8, v12, v16, v0.t955; CHECK-NEXT: ret956 %res = call <16 x i32> @llvm.masked.expandload.v16i32(ptr align 4 %base, <16 x i1> %mask, <16 x i32> %passthru)957 ret <16 x i32> %res958}959 960define <16 x i32> @test_expandload_v16i32_all_ones(ptr %base, <16 x i32> %passthru) {961; CHECK-LABEL: test_expandload_v16i32_all_ones:962; CHECK: # %bb.0:963; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma964; CHECK-NEXT: vle32.v v8, (a0)965; CHECK-NEXT: ret966 %res = call <16 x i32> @llvm.masked.expandload.v16i32(ptr align 4 %base, <16 x i1> splat (i1 true), <16 x i32> %passthru)967 ret <16 x i32> %res968}969 970define <32 x i32> @test_expandload_v32i32(ptr %base, <32 x i1> %mask, <32 x i32> %passthru) {971; CHECK-LABEL: test_expandload_v32i32:972; CHECK: # %bb.0:973; CHECK-NEXT: li a1, 32974; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma975; CHECK-NEXT: vcpop.m a2, v0976; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma977; CHECK-NEXT: vle32.v v16, (a0)978; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, mu979; CHECK-NEXT: viota.m v24, v0980; CHECK-NEXT: vrgather.vv v8, v16, v24, v0.t981; CHECK-NEXT: ret982 %res = call <32 x i32> @llvm.masked.expandload.v32i32(ptr align 4 %base, <32 x i1> %mask, <32 x i32> %passthru)983 ret <32 x i32> %res984}985 986define <32 x i32> @test_expandload_v32i32_all_ones(ptr %base, <32 x i32> %passthru) {987; CHECK-LABEL: test_expandload_v32i32_all_ones:988; CHECK: # %bb.0:989; CHECK-NEXT: li a1, 32990; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma991; CHECK-NEXT: vle32.v v8, (a0)992; CHECK-NEXT: ret993 %res = call <32 x i32> @llvm.masked.expandload.v32i32(ptr align 4 %base, <32 x i1> splat (i1 true), <32 x i32> %passthru)994 ret <32 x i32> %res995}996 997define <64 x i32> @test_expandload_v64i32(ptr %base, <64 x i1> %mask, <64 x i32> %passthru) {998; CHECK-RV32-LABEL: test_expandload_v64i32:999; CHECK-RV32: # %bb.0:1000; CHECK-RV32-NEXT: addi sp, sp, -161001; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161002; CHECK-RV32-NEXT: csrr a1, vlenb1003; CHECK-RV32-NEXT: slli a1, a1, 51004; CHECK-RV32-NEXT: sub sp, sp, a11005; CHECK-RV32-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb1006; CHECK-RV32-NEXT: csrr a1, vlenb1007; CHECK-RV32-NEXT: slli a1, a1, 31008; CHECK-RV32-NEXT: add a1, sp, a11009; CHECK-RV32-NEXT: addi a1, a1, 161010; CHECK-RV32-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill1011; CHECK-RV32-NEXT: li a1, 321012; CHECK-RV32-NEXT: vsetivli zero, 4, e8, mf2, ta, ma1013; CHECK-RV32-NEXT: vslidedown.vi v7, v0, 41014; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m2, ta, ma1015; CHECK-RV32-NEXT: vcpop.m a2, v01016; CHECK-RV32-NEXT: vcpop.m a3, v71017; CHECK-RV32-NEXT: vsetvli zero, a2, e32, m8, ta, ma1018; CHECK-RV32-NEXT: vle32.v v24, (a0)1019; CHECK-RV32-NEXT: csrr a4, vlenb1020; CHECK-RV32-NEXT: slli a4, a4, 41021; CHECK-RV32-NEXT: add a4, sp, a41022; CHECK-RV32-NEXT: addi a4, a4, 161023; CHECK-RV32-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill1024; CHECK-RV32-NEXT: slli a2, a2, 21025; CHECK-RV32-NEXT: add a0, a0, a21026; CHECK-RV32-NEXT: vsetvli zero, a3, e32, m8, ta, ma1027; CHECK-RV32-NEXT: vle32.v v24, (a0)1028; CHECK-RV32-NEXT: csrr a0, vlenb1029; CHECK-RV32-NEXT: li a2, 241030; CHECK-RV32-NEXT: mul a0, a0, a21031; CHECK-RV32-NEXT: add a0, sp, a01032; CHECK-RV32-NEXT: addi a0, a0, 161033; CHECK-RV32-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill1034; CHECK-RV32-NEXT: vsetvli zero, a1, e32, m8, ta, mu1035; CHECK-RV32-NEXT: viota.m v24, v01036; CHECK-RV32-NEXT: csrr a0, vlenb1037; CHECK-RV32-NEXT: slli a0, a0, 41038; CHECK-RV32-NEXT: add a0, sp, a01039; CHECK-RV32-NEXT: addi a0, a0, 161040; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1041; CHECK-RV32-NEXT: vrgather.vv v8, v16, v24, v0.t1042; CHECK-RV32-NEXT: addi a0, sp, 161043; CHECK-RV32-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill1044; CHECK-RV32-NEXT: viota.m v16, v71045; CHECK-RV32-NEXT: csrr a0, vlenb1046; CHECK-RV32-NEXT: slli a0, a0, 41047; CHECK-RV32-NEXT: add a0, sp, a01048; CHECK-RV32-NEXT: addi a0, a0, 161049; CHECK-RV32-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1050; CHECK-RV32-NEXT: vmv1r.v v0, v71051; CHECK-RV32-NEXT: csrr a0, vlenb1052; CHECK-RV32-NEXT: li a1, 241053; CHECK-RV32-NEXT: mul a0, a0, a11054; CHECK-RV32-NEXT: add a0, sp, a01055; CHECK-RV32-NEXT: addi a0, a0, 161056; CHECK-RV32-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1057; CHECK-RV32-NEXT: csrr a0, vlenb1058; CHECK-RV32-NEXT: slli a0, a0, 31059; CHECK-RV32-NEXT: add a0, sp, a01060; CHECK-RV32-NEXT: addi a0, a0, 161061; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1062; CHECK-RV32-NEXT: csrr a0, vlenb1063; CHECK-RV32-NEXT: slli a0, a0, 41064; CHECK-RV32-NEXT: add a0, sp, a01065; CHECK-RV32-NEXT: addi a0, a0, 161066; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1067; CHECK-RV32-NEXT: vrgather.vv v16, v24, v8, v0.t1068; CHECK-RV32-NEXT: addi a0, sp, 161069; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1070; CHECK-RV32-NEXT: csrr a0, vlenb1071; CHECK-RV32-NEXT: slli a0, a0, 51072; CHECK-RV32-NEXT: add sp, sp, a01073; CHECK-RV32-NEXT: .cfi_def_cfa sp, 161074; CHECK-RV32-NEXT: addi sp, sp, 161075; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01076; CHECK-RV32-NEXT: ret1077;1078; CHECK-RV64-LABEL: test_expandload_v64i32:1079; CHECK-RV64: # %bb.0:1080; CHECK-RV64-NEXT: addi sp, sp, -161081; CHECK-RV64-NEXT: .cfi_def_cfa_offset 161082; CHECK-RV64-NEXT: csrr a1, vlenb1083; CHECK-RV64-NEXT: slli a1, a1, 51084; CHECK-RV64-NEXT: sub sp, sp, a11085; CHECK-RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb1086; CHECK-RV64-NEXT: csrr a1, vlenb1087; CHECK-RV64-NEXT: slli a1, a1, 41088; CHECK-RV64-NEXT: add a1, sp, a11089; CHECK-RV64-NEXT: addi a1, a1, 161090; CHECK-RV64-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill1091; CHECK-RV64-NEXT: li a1, 321092; CHECK-RV64-NEXT: vsetivli zero, 4, e8, mf2, ta, ma1093; CHECK-RV64-NEXT: vslidedown.vi v7, v0, 41094; CHECK-RV64-NEXT: vsetvli zero, zero, e32, m2, ta, ma1095; CHECK-RV64-NEXT: vmv.x.s a2, v01096; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m2, ta, ma1097; CHECK-RV64-NEXT: vcpop.m a3, v01098; CHECK-RV64-NEXT: vsetvli zero, a3, e32, m8, ta, ma1099; CHECK-RV64-NEXT: vle32.v v24, (a0)1100; CHECK-RV64-NEXT: csrr a3, vlenb1101; CHECK-RV64-NEXT: li a4, 241102; CHECK-RV64-NEXT: mul a3, a3, a41103; CHECK-RV64-NEXT: add a3, sp, a31104; CHECK-RV64-NEXT: addi a3, a3, 161105; CHECK-RV64-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill1106; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m2, ta, ma1107; CHECK-RV64-NEXT: vcpop.m a3, v71108; CHECK-RV64-NEXT: cpopw a2, a21109; CHECK-RV64-NEXT: slli a2, a2, 21110; CHECK-RV64-NEXT: add a0, a0, a21111; CHECK-RV64-NEXT: vsetvli zero, a3, e32, m8, ta, ma1112; CHECK-RV64-NEXT: vle32.v v16, (a0)1113; CHECK-RV64-NEXT: csrr a0, vlenb1114; CHECK-RV64-NEXT: slli a0, a0, 31115; CHECK-RV64-NEXT: add a0, sp, a01116; CHECK-RV64-NEXT: addi a0, a0, 161117; CHECK-RV64-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1118; CHECK-RV64-NEXT: vsetvli zero, a1, e32, m8, ta, mu1119; CHECK-RV64-NEXT: viota.m v24, v01120; CHECK-RV64-NEXT: csrr a0, vlenb1121; CHECK-RV64-NEXT: li a1, 241122; CHECK-RV64-NEXT: mul a0, a0, a11123; CHECK-RV64-NEXT: add a0, sp, a01124; CHECK-RV64-NEXT: addi a0, a0, 161125; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1126; CHECK-RV64-NEXT: vrgather.vv v8, v16, v24, v0.t1127; CHECK-RV64-NEXT: addi a0, sp, 161128; CHECK-RV64-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill1129; CHECK-RV64-NEXT: viota.m v16, v71130; CHECK-RV64-NEXT: csrr a0, vlenb1131; CHECK-RV64-NEXT: li a1, 241132; CHECK-RV64-NEXT: mul a0, a0, a11133; CHECK-RV64-NEXT: add a0, sp, a01134; CHECK-RV64-NEXT: addi a0, a0, 161135; CHECK-RV64-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1136; CHECK-RV64-NEXT: vmv1r.v v0, v71137; CHECK-RV64-NEXT: csrr a0, vlenb1138; CHECK-RV64-NEXT: slli a0, a0, 41139; CHECK-RV64-NEXT: add a0, sp, a01140; CHECK-RV64-NEXT: addi a0, a0, 161141; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1142; CHECK-RV64-NEXT: csrr a0, vlenb1143; CHECK-RV64-NEXT: slli a0, a0, 31144; CHECK-RV64-NEXT: add a0, sp, a01145; CHECK-RV64-NEXT: addi a0, a0, 161146; CHECK-RV64-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1147; CHECK-RV64-NEXT: csrr a0, vlenb1148; CHECK-RV64-NEXT: li a1, 241149; CHECK-RV64-NEXT: mul a0, a0, a11150; CHECK-RV64-NEXT: add a0, sp, a01151; CHECK-RV64-NEXT: addi a0, a0, 161152; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1153; CHECK-RV64-NEXT: vrgather.vv v16, v24, v8, v0.t1154; CHECK-RV64-NEXT: addi a0, sp, 161155; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1156; CHECK-RV64-NEXT: csrr a0, vlenb1157; CHECK-RV64-NEXT: slli a0, a0, 51158; CHECK-RV64-NEXT: add sp, sp, a01159; CHECK-RV64-NEXT: .cfi_def_cfa sp, 161160; CHECK-RV64-NEXT: addi sp, sp, 161161; CHECK-RV64-NEXT: .cfi_def_cfa_offset 01162; CHECK-RV64-NEXT: ret1163 %res = call <64 x i32> @llvm.masked.expandload.v64i32(ptr align 4 %base, <64 x i1> %mask, <64 x i32> %passthru)1164 ret <64 x i32> %res1165}1166 1167define <64 x i32> @test_expandload_v64i32_all_ones(ptr %base, <64 x i32> %passthru) {1168; CHECK-RV32-LABEL: test_expandload_v64i32_all_ones:1169; CHECK-RV32: # %bb.0:1170; CHECK-RV32-NEXT: li a1, 321171; CHECK-RV32-NEXT: vsetvli zero, a1, e32, m8, ta, ma1172; CHECK-RV32-NEXT: vle32.v v8, (a0)1173; CHECK-RV32-NEXT: vmset.m v161174; CHECK-RV32-NEXT: vcpop.m a1, v161175; CHECK-RV32-NEXT: slli a1, a1, 21176; CHECK-RV32-NEXT: add a0, a0, a11177; CHECK-RV32-NEXT: vle32.v v16, (a0)1178; CHECK-RV32-NEXT: ret1179;1180; CHECK-RV64-LABEL: test_expandload_v64i32_all_ones:1181; CHECK-RV64: # %bb.0:1182; CHECK-RV64-NEXT: li a1, 321183; CHECK-RV64-NEXT: vsetvli zero, a1, e32, m8, ta, ma1184; CHECK-RV64-NEXT: vle32.v v8, (a0)1185; CHECK-RV64-NEXT: addi a0, a0, 1281186; CHECK-RV64-NEXT: vle32.v v16, (a0)1187; CHECK-RV64-NEXT: ret1188 %res = call <64 x i32> @llvm.masked.expandload.v64i32(ptr align 4 %base, <64 x i1> splat (i1 true), <64 x i32> %passthru)1189 ret <64 x i32> %res1190}1191 1192; Load + expand for i64 type1193 1194define <1 x i64> @test_expandload_v1i64(ptr %base, <1 x i1> %mask, <1 x i64> %passthru) {1195; CHECK-LABEL: test_expandload_v1i64:1196; CHECK: # %bb.0:1197; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma1198; CHECK-NEXT: vcpop.m a1, v01199; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma1200; CHECK-NEXT: vle64.v v9, (a0)1201; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, mu1202; CHECK-NEXT: viota.m v10, v01203; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t1204; CHECK-NEXT: ret1205 %res = call <1 x i64> @llvm.masked.expandload.v1i64(ptr align 8 %base, <1 x i1> %mask, <1 x i64> %passthru)1206 ret <1 x i64> %res1207}1208 1209define <1 x i64> @test_expandload_v1i64_all_ones(ptr %base, <1 x i64> %passthru) {1210; CHECK-LABEL: test_expandload_v1i64_all_ones:1211; CHECK: # %bb.0:1212; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1213; CHECK-NEXT: vle64.v v8, (a0)1214; CHECK-NEXT: ret1215 %res = call <1 x i64> @llvm.masked.expandload.v1i64(ptr align 8 %base, <1 x i1> splat (i1 true), <1 x i64> %passthru)1216 ret <1 x i64> %res1217}1218 1219define <2 x i64> @test_expandload_v2i64(ptr %base, <2 x i1> %mask, <2 x i64> %passthru) {1220; CHECK-LABEL: test_expandload_v2i64:1221; CHECK: # %bb.0:1222; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma1223; CHECK-NEXT: vcpop.m a1, v01224; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma1225; CHECK-NEXT: vle64.v v9, (a0)1226; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu1227; CHECK-NEXT: viota.m v10, v01228; CHECK-NEXT: vrgather.vv v8, v9, v10, v0.t1229; CHECK-NEXT: ret1230 %res = call <2 x i64> @llvm.masked.expandload.v2i64(ptr align 8 %base, <2 x i1> %mask, <2 x i64> %passthru)1231 ret <2 x i64> %res1232}1233 1234define <2 x i64> @test_expandload_v2i64_all_ones(ptr %base, <2 x i64> %passthru) {1235; CHECK-LABEL: test_expandload_v2i64_all_ones:1236; CHECK: # %bb.0:1237; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma1238; CHECK-NEXT: vle64.v v8, (a0)1239; CHECK-NEXT: ret1240 %res = call <2 x i64> @llvm.masked.expandload.v2i64(ptr align 8 %base, <2 x i1> splat (i1 true), <2 x i64> %passthru)1241 ret <2 x i64> %res1242}1243 1244define <4 x i64> @test_expandload_v4i64(ptr %base, <4 x i1> %mask, <4 x i64> %passthru) {1245; CHECK-LABEL: test_expandload_v4i64:1246; CHECK: # %bb.0:1247; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma1248; CHECK-NEXT: vcpop.m a1, v01249; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma1250; CHECK-NEXT: vle64.v v10, (a0)1251; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, mu1252; CHECK-NEXT: viota.m v12, v01253; CHECK-NEXT: vrgather.vv v8, v10, v12, v0.t1254; CHECK-NEXT: ret1255 %res = call <4 x i64> @llvm.masked.expandload.v4i64(ptr align 8 %base, <4 x i1> %mask, <4 x i64> %passthru)1256 ret <4 x i64> %res1257}1258 1259define <4 x i64> @test_expandload_v4i64_all_ones(ptr %base, <4 x i64> %passthru) {1260; CHECK-LABEL: test_expandload_v4i64_all_ones:1261; CHECK: # %bb.0:1262; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma1263; CHECK-NEXT: vle64.v v8, (a0)1264; CHECK-NEXT: ret1265 %res = call <4 x i64> @llvm.masked.expandload.v4i64(ptr align 8 %base, <4 x i1> splat (i1 true), <4 x i64> %passthru)1266 ret <4 x i64> %res1267}1268 1269define <8 x i64> @test_expandload_v8i64(ptr %base, <8 x i1> %mask, <8 x i64> %passthru) {1270; CHECK-LABEL: test_expandload_v8i64:1271; CHECK: # %bb.0:1272; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1273; CHECK-NEXT: vcpop.m a1, v01274; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma1275; CHECK-NEXT: vle64.v v12, (a0)1276; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu1277; CHECK-NEXT: viota.m v16, v01278; CHECK-NEXT: vrgather.vv v8, v12, v16, v0.t1279; CHECK-NEXT: ret1280 %res = call <8 x i64> @llvm.masked.expandload.v8i64(ptr align 8 %base, <8 x i1> %mask, <8 x i64> %passthru)1281 ret <8 x i64> %res1282}1283 1284define <8 x i64> @test_expandload_v8i64_all_ones(ptr %base, <8 x i64> %passthru) {1285; CHECK-LABEL: test_expandload_v8i64_all_ones:1286; CHECK: # %bb.0:1287; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1288; CHECK-NEXT: vle64.v v8, (a0)1289; CHECK-NEXT: ret1290 %res = call <8 x i64> @llvm.masked.expandload.v8i64(ptr align 8 %base, <8 x i1> splat (i1 true), <8 x i64> %passthru)1291 ret <8 x i64> %res1292}1293 1294define <16 x i64> @test_expandload_v16i64(ptr %base, <16 x i1> %mask, <16 x i64> %passthru) {1295; CHECK-LABEL: test_expandload_v16i64:1296; CHECK: # %bb.0:1297; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma1298; CHECK-NEXT: vcpop.m a1, v01299; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma1300; CHECK-NEXT: vle64.v v16, (a0)1301; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, mu1302; CHECK-NEXT: viota.m v24, v01303; CHECK-NEXT: vrgather.vv v8, v16, v24, v0.t1304; CHECK-NEXT: ret1305 %res = call <16 x i64> @llvm.masked.expandload.v16i64(ptr align 8 %base, <16 x i1> %mask, <16 x i64> %passthru)1306 ret <16 x i64> %res1307}1308 1309define <16 x i64> @test_expandload_v16i64_all_ones(ptr %base, <16 x i64> %passthru) {1310; CHECK-LABEL: test_expandload_v16i64_all_ones:1311; CHECK: # %bb.0:1312; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma1313; CHECK-NEXT: vle64.v v8, (a0)1314; CHECK-NEXT: ret1315 %res = call <16 x i64> @llvm.masked.expandload.v16i64(ptr align 8 %base, <16 x i1> splat (i1 true), <16 x i64> %passthru)1316 ret <16 x i64> %res1317}1318 1319define <32 x i64> @test_expandload_v32i64(ptr %base, <32 x i1> %mask, <32 x i64> %passthru) {1320; CHECK-RV32-LABEL: test_expandload_v32i64:1321; CHECK-RV32: # %bb.0:1322; CHECK-RV32-NEXT: addi sp, sp, -161323; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161324; CHECK-RV32-NEXT: csrr a1, vlenb1325; CHECK-RV32-NEXT: slli a1, a1, 51326; CHECK-RV32-NEXT: sub sp, sp, a11327; CHECK-RV32-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb1328; CHECK-RV32-NEXT: csrr a1, vlenb1329; CHECK-RV32-NEXT: slli a1, a1, 41330; CHECK-RV32-NEXT: add a1, sp, a11331; CHECK-RV32-NEXT: addi a1, a1, 161332; CHECK-RV32-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill1333; CHECK-RV32-NEXT: vsetivli zero, 16, e8, m1, ta, ma1334; CHECK-RV32-NEXT: vcpop.m a1, v01335; CHECK-RV32-NEXT: vsetvli zero, a1, e16, m2, ta, ma1336; CHECK-RV32-NEXT: vle64.v v24, (a0)1337; CHECK-RV32-NEXT: csrr a1, vlenb1338; CHECK-RV32-NEXT: li a2, 241339; CHECK-RV32-NEXT: mul a1, a1, a21340; CHECK-RV32-NEXT: add a1, sp, a11341; CHECK-RV32-NEXT: addi a1, a1, 161342; CHECK-RV32-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill1343; CHECK-RV32-NEXT: vmv.x.s a1, v01344; CHECK-RV32-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1345; CHECK-RV32-NEXT: vslidedown.vi v7, v0, 21346; CHECK-RV32-NEXT: zext.h a1, a11347; CHECK-RV32-NEXT: cpop a1, a11348; CHECK-RV32-NEXT: slli a1, a1, 31349; CHECK-RV32-NEXT: add a0, a0, a11350; CHECK-RV32-NEXT: vsetivli zero, 16, e8, m1, ta, ma1351; CHECK-RV32-NEXT: vcpop.m a1, v71352; CHECK-RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1353; CHECK-RV32-NEXT: vle64.v v16, (a0)1354; CHECK-RV32-NEXT: csrr a0, vlenb1355; CHECK-RV32-NEXT: slli a0, a0, 31356; CHECK-RV32-NEXT: add a0, sp, a01357; CHECK-RV32-NEXT: addi a0, a0, 161358; CHECK-RV32-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1359; CHECK-RV32-NEXT: vsetivli zero, 16, e64, m8, ta, mu1360; CHECK-RV32-NEXT: viota.m v24, v01361; CHECK-RV32-NEXT: csrr a0, vlenb1362; CHECK-RV32-NEXT: li a1, 241363; CHECK-RV32-NEXT: mul a0, a0, a11364; CHECK-RV32-NEXT: add a0, sp, a01365; CHECK-RV32-NEXT: addi a0, a0, 161366; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1367; CHECK-RV32-NEXT: vrgather.vv v8, v16, v24, v0.t1368; CHECK-RV32-NEXT: addi a0, sp, 161369; CHECK-RV32-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill1370; CHECK-RV32-NEXT: viota.m v16, v71371; CHECK-RV32-NEXT: csrr a0, vlenb1372; CHECK-RV32-NEXT: li a1, 241373; CHECK-RV32-NEXT: mul a0, a0, a11374; CHECK-RV32-NEXT: add a0, sp, a01375; CHECK-RV32-NEXT: addi a0, a0, 161376; CHECK-RV32-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1377; CHECK-RV32-NEXT: vmv1r.v v0, v71378; CHECK-RV32-NEXT: csrr a0, vlenb1379; CHECK-RV32-NEXT: slli a0, a0, 41380; CHECK-RV32-NEXT: add a0, sp, a01381; CHECK-RV32-NEXT: addi a0, a0, 161382; CHECK-RV32-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1383; CHECK-RV32-NEXT: csrr a0, vlenb1384; CHECK-RV32-NEXT: slli a0, a0, 31385; CHECK-RV32-NEXT: add a0, sp, a01386; CHECK-RV32-NEXT: addi a0, a0, 161387; CHECK-RV32-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1388; CHECK-RV32-NEXT: csrr a0, vlenb1389; CHECK-RV32-NEXT: li a1, 241390; CHECK-RV32-NEXT: mul a0, a0, a11391; CHECK-RV32-NEXT: add a0, sp, a01392; CHECK-RV32-NEXT: addi a0, a0, 161393; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1394; CHECK-RV32-NEXT: vrgather.vv v16, v24, v8, v0.t1395; CHECK-RV32-NEXT: addi a0, sp, 161396; CHECK-RV32-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1397; CHECK-RV32-NEXT: csrr a0, vlenb1398; CHECK-RV32-NEXT: slli a0, a0, 51399; CHECK-RV32-NEXT: add sp, sp, a01400; CHECK-RV32-NEXT: .cfi_def_cfa sp, 161401; CHECK-RV32-NEXT: addi sp, sp, 161402; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01403; CHECK-RV32-NEXT: ret1404;1405; CHECK-RV64-LABEL: test_expandload_v32i64:1406; CHECK-RV64: # %bb.0:1407; CHECK-RV64-NEXT: addi sp, sp, -161408; CHECK-RV64-NEXT: .cfi_def_cfa_offset 161409; CHECK-RV64-NEXT: csrr a1, vlenb1410; CHECK-RV64-NEXT: slli a1, a1, 51411; CHECK-RV64-NEXT: sub sp, sp, a11412; CHECK-RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb1413; CHECK-RV64-NEXT: csrr a1, vlenb1414; CHECK-RV64-NEXT: slli a1, a1, 41415; CHECK-RV64-NEXT: add a1, sp, a11416; CHECK-RV64-NEXT: addi a1, a1, 161417; CHECK-RV64-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill1418; CHECK-RV64-NEXT: vsetivli zero, 16, e8, m1, ta, ma1419; CHECK-RV64-NEXT: vcpop.m a1, v01420; CHECK-RV64-NEXT: vsetvli zero, a1, e16, m2, ta, ma1421; CHECK-RV64-NEXT: vle64.v v24, (a0)1422; CHECK-RV64-NEXT: csrr a1, vlenb1423; CHECK-RV64-NEXT: li a2, 241424; CHECK-RV64-NEXT: mul a1, a1, a21425; CHECK-RV64-NEXT: add a1, sp, a11426; CHECK-RV64-NEXT: addi a1, a1, 161427; CHECK-RV64-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill1428; CHECK-RV64-NEXT: vmv.x.s a1, v01429; CHECK-RV64-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1430; CHECK-RV64-NEXT: vslidedown.vi v7, v0, 21431; CHECK-RV64-NEXT: zext.h a1, a11432; CHECK-RV64-NEXT: cpopw a1, a11433; CHECK-RV64-NEXT: slli a1, a1, 31434; CHECK-RV64-NEXT: add a0, a0, a11435; CHECK-RV64-NEXT: vsetivli zero, 16, e8, m1, ta, ma1436; CHECK-RV64-NEXT: vcpop.m a1, v71437; CHECK-RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1438; CHECK-RV64-NEXT: vle64.v v16, (a0)1439; CHECK-RV64-NEXT: csrr a0, vlenb1440; CHECK-RV64-NEXT: slli a0, a0, 31441; CHECK-RV64-NEXT: add a0, sp, a01442; CHECK-RV64-NEXT: addi a0, a0, 161443; CHECK-RV64-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1444; CHECK-RV64-NEXT: vsetivli zero, 16, e64, m8, ta, mu1445; CHECK-RV64-NEXT: viota.m v24, v01446; CHECK-RV64-NEXT: csrr a0, vlenb1447; CHECK-RV64-NEXT: li a1, 241448; CHECK-RV64-NEXT: mul a0, a0, a11449; CHECK-RV64-NEXT: add a0, sp, a01450; CHECK-RV64-NEXT: addi a0, a0, 161451; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1452; CHECK-RV64-NEXT: vrgather.vv v8, v16, v24, v0.t1453; CHECK-RV64-NEXT: addi a0, sp, 161454; CHECK-RV64-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill1455; CHECK-RV64-NEXT: viota.m v16, v71456; CHECK-RV64-NEXT: csrr a0, vlenb1457; CHECK-RV64-NEXT: li a1, 241458; CHECK-RV64-NEXT: mul a0, a0, a11459; CHECK-RV64-NEXT: add a0, sp, a01460; CHECK-RV64-NEXT: addi a0, a0, 161461; CHECK-RV64-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1462; CHECK-RV64-NEXT: vmv1r.v v0, v71463; CHECK-RV64-NEXT: csrr a0, vlenb1464; CHECK-RV64-NEXT: slli a0, a0, 41465; CHECK-RV64-NEXT: add a0, sp, a01466; CHECK-RV64-NEXT: addi a0, a0, 161467; CHECK-RV64-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1468; CHECK-RV64-NEXT: csrr a0, vlenb1469; CHECK-RV64-NEXT: slli a0, a0, 31470; CHECK-RV64-NEXT: add a0, sp, a01471; CHECK-RV64-NEXT: addi a0, a0, 161472; CHECK-RV64-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1473; CHECK-RV64-NEXT: csrr a0, vlenb1474; CHECK-RV64-NEXT: li a1, 241475; CHECK-RV64-NEXT: mul a0, a0, a11476; CHECK-RV64-NEXT: add a0, sp, a01477; CHECK-RV64-NEXT: addi a0, a0, 161478; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1479; CHECK-RV64-NEXT: vrgather.vv v16, v24, v8, v0.t1480; CHECK-RV64-NEXT: addi a0, sp, 161481; CHECK-RV64-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1482; CHECK-RV64-NEXT: csrr a0, vlenb1483; CHECK-RV64-NEXT: slli a0, a0, 51484; CHECK-RV64-NEXT: add sp, sp, a01485; CHECK-RV64-NEXT: .cfi_def_cfa sp, 161486; CHECK-RV64-NEXT: addi sp, sp, 161487; CHECK-RV64-NEXT: .cfi_def_cfa_offset 01488; CHECK-RV64-NEXT: ret1489 %res = call <32 x i64> @llvm.masked.expandload.v32i64(ptr align 8 %base, <32 x i1> %mask, <32 x i64> %passthru)1490 ret <32 x i64> %res1491}1492 1493define <32 x i64> @test_expandload_v32i64_all_ones(ptr %base, <32 x i64> %passthru) {1494; CHECK-LABEL: test_expandload_v32i64_all_ones:1495; CHECK: # %bb.0:1496; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma1497; CHECK-NEXT: vle64.v v8, (a0)1498; CHECK-NEXT: addi a0, a0, 1281499; CHECK-NEXT: vle64.v v16, (a0)1500; CHECK-NEXT: ret1501 %res = call <32 x i64> @llvm.masked.expandload.v32i64(ptr align 8 %base, <32 x i1> splat (i1 true), <32 x i64> %passthru)1502 ret <32 x i64> %res1503}1504 1505; Tests that will exceed the range of i8 index.1506 1507define <512 x i8> @test_expandload_v512i8(ptr %base, <512 x i1> %mask, <512 x i8> %passthru) vscale_range(16, 1024) {1508; CHECK-LABEL: test_expandload_v512i8:1509; CHECK: # %bb.0:1510; CHECK-NEXT: li a1, 5121511; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma1512; CHECK-NEXT: vcpop.m a2, v01513; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma1514; CHECK-NEXT: vle8.v v12, (a0)1515; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma1516; CHECK-NEXT: viota.m v16, v01517; CHECK-NEXT: vsetvli zero, zero, e8, m4, ta, mu1518; CHECK-NEXT: vrgatherei16.vv v8, v12, v16, v0.t1519; CHECK-NEXT: ret1520 %res = call <512 x i8> @llvm.masked.expandload.v512i8(ptr align 1 %base, <512 x i1> %mask, <512 x i8> %passthru)1521 ret <512 x i8> %res1522}1523 1524; FIXME: We can split it in lowering.1525define <512 x i8> @test_expandload_v512i8_vlen512(ptr %base, <512 x i1> %mask, <512 x i8> %passthru) vscale_range(8, 1024) {1526; CHECK-RV32-LABEL: test_expandload_v512i8_vlen512:1527; CHECK-RV32: # %bb.0:1528; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1529; CHECK-RV32-NEXT: vmv.x.s a3, v01530; CHECK-RV32-NEXT: andi a1, a3, 11531; CHECK-RV32-NEXT: beqz a1, .LBB61_11532; CHECK-RV32-NEXT: j .LBB61_5441533; CHECK-RV32-NEXT: .LBB61_1: # %else1534; CHECK-RV32-NEXT: andi a1, a3, 21535; CHECK-RV32-NEXT: beqz a1, .LBB61_21536; CHECK-RV32-NEXT: j .LBB61_5451537; CHECK-RV32-NEXT: .LBB61_2: # %else21538; CHECK-RV32-NEXT: andi a1, a3, 41539; CHECK-RV32-NEXT: beqz a1, .LBB61_31540; CHECK-RV32-NEXT: j .LBB61_5461541; CHECK-RV32-NEXT: .LBB61_3: # %else61542; CHECK-RV32-NEXT: andi a1, a3, 81543; CHECK-RV32-NEXT: beqz a1, .LBB61_41544; CHECK-RV32-NEXT: j .LBB61_5471545; CHECK-RV32-NEXT: .LBB61_4: # %else101546; CHECK-RV32-NEXT: andi a1, a3, 161547; CHECK-RV32-NEXT: beqz a1, .LBB61_51548; CHECK-RV32-NEXT: j .LBB61_5481549; CHECK-RV32-NEXT: .LBB61_5: # %else141550; CHECK-RV32-NEXT: andi a1, a3, 321551; CHECK-RV32-NEXT: beqz a1, .LBB61_61552; CHECK-RV32-NEXT: j .LBB61_5491553; CHECK-RV32-NEXT: .LBB61_6: # %else181554; CHECK-RV32-NEXT: andi a1, a3, 641555; CHECK-RV32-NEXT: beqz a1, .LBB61_71556; CHECK-RV32-NEXT: j .LBB61_5501557; CHECK-RV32-NEXT: .LBB61_7: # %else221558; CHECK-RV32-NEXT: andi a1, a3, 1281559; CHECK-RV32-NEXT: beqz a1, .LBB61_81560; CHECK-RV32-NEXT: j .LBB61_5511561; CHECK-RV32-NEXT: .LBB61_8: # %else261562; CHECK-RV32-NEXT: andi a1, a3, 2561563; CHECK-RV32-NEXT: beqz a1, .LBB61_91564; CHECK-RV32-NEXT: j .LBB61_5521565; CHECK-RV32-NEXT: .LBB61_9: # %else301566; CHECK-RV32-NEXT: andi a1, a3, 5121567; CHECK-RV32-NEXT: beqz a1, .LBB61_101568; CHECK-RV32-NEXT: j .LBB61_5531569; CHECK-RV32-NEXT: .LBB61_10: # %else341570; CHECK-RV32-NEXT: andi a1, a3, 10241571; CHECK-RV32-NEXT: beqz a1, .LBB61_111572; CHECK-RV32-NEXT: j .LBB61_5541573; CHECK-RV32-NEXT: .LBB61_11: # %else381574; CHECK-RV32-NEXT: slli a1, a3, 201575; CHECK-RV32-NEXT: bgez a1, .LBB61_121576; CHECK-RV32-NEXT: j .LBB61_5551577; CHECK-RV32-NEXT: .LBB61_12: # %else421578; CHECK-RV32-NEXT: slli a1, a3, 191579; CHECK-RV32-NEXT: bgez a1, .LBB61_131580; CHECK-RV32-NEXT: j .LBB61_5561581; CHECK-RV32-NEXT: .LBB61_13: # %else461582; CHECK-RV32-NEXT: slli a1, a3, 181583; CHECK-RV32-NEXT: bgez a1, .LBB61_141584; CHECK-RV32-NEXT: j .LBB61_5571585; CHECK-RV32-NEXT: .LBB61_14: # %else501586; CHECK-RV32-NEXT: slli a1, a3, 171587; CHECK-RV32-NEXT: bgez a1, .LBB61_151588; CHECK-RV32-NEXT: j .LBB61_5581589; CHECK-RV32-NEXT: .LBB61_15: # %else541590; CHECK-RV32-NEXT: slli a1, a3, 161591; CHECK-RV32-NEXT: bgez a1, .LBB61_161592; CHECK-RV32-NEXT: j .LBB61_5591593; CHECK-RV32-NEXT: .LBB61_16: # %else581594; CHECK-RV32-NEXT: slli a1, a3, 151595; CHECK-RV32-NEXT: bgez a1, .LBB61_171596; CHECK-RV32-NEXT: j .LBB61_5601597; CHECK-RV32-NEXT: .LBB61_17: # %else621598; CHECK-RV32-NEXT: slli a1, a3, 141599; CHECK-RV32-NEXT: bgez a1, .LBB61_181600; CHECK-RV32-NEXT: j .LBB61_5611601; CHECK-RV32-NEXT: .LBB61_18: # %else661602; CHECK-RV32-NEXT: slli a1, a3, 131603; CHECK-RV32-NEXT: bgez a1, .LBB61_191604; CHECK-RV32-NEXT: j .LBB61_5621605; CHECK-RV32-NEXT: .LBB61_19: # %else701606; CHECK-RV32-NEXT: slli a1, a3, 121607; CHECK-RV32-NEXT: bgez a1, .LBB61_201608; CHECK-RV32-NEXT: j .LBB61_5631609; CHECK-RV32-NEXT: .LBB61_20: # %else741610; CHECK-RV32-NEXT: slli a1, a3, 111611; CHECK-RV32-NEXT: bgez a1, .LBB61_211612; CHECK-RV32-NEXT: j .LBB61_5641613; CHECK-RV32-NEXT: .LBB61_21: # %else781614; CHECK-RV32-NEXT: slli a1, a3, 101615; CHECK-RV32-NEXT: bgez a1, .LBB61_221616; CHECK-RV32-NEXT: j .LBB61_5651617; CHECK-RV32-NEXT: .LBB61_22: # %else821618; CHECK-RV32-NEXT: slli a1, a3, 91619; CHECK-RV32-NEXT: bgez a1, .LBB61_231620; CHECK-RV32-NEXT: j .LBB61_5661621; CHECK-RV32-NEXT: .LBB61_23: # %else861622; CHECK-RV32-NEXT: slli a1, a3, 81623; CHECK-RV32-NEXT: bgez a1, .LBB61_241624; CHECK-RV32-NEXT: j .LBB61_5671625; CHECK-RV32-NEXT: .LBB61_24: # %else901626; CHECK-RV32-NEXT: slli a1, a3, 71627; CHECK-RV32-NEXT: bgez a1, .LBB61_251628; CHECK-RV32-NEXT: j .LBB61_5681629; CHECK-RV32-NEXT: .LBB61_25: # %else941630; CHECK-RV32-NEXT: slli a1, a3, 61631; CHECK-RV32-NEXT: bgez a1, .LBB61_261632; CHECK-RV32-NEXT: j .LBB61_5691633; CHECK-RV32-NEXT: .LBB61_26: # %else981634; CHECK-RV32-NEXT: slli a1, a3, 51635; CHECK-RV32-NEXT: bgez a1, .LBB61_271636; CHECK-RV32-NEXT: j .LBB61_5701637; CHECK-RV32-NEXT: .LBB61_27: # %else1021638; CHECK-RV32-NEXT: slli a1, a3, 41639; CHECK-RV32-NEXT: bgez a1, .LBB61_281640; CHECK-RV32-NEXT: j .LBB61_5711641; CHECK-RV32-NEXT: .LBB61_28: # %else1061642; CHECK-RV32-NEXT: slli a1, a3, 31643; CHECK-RV32-NEXT: bgez a1, .LBB61_301644; CHECK-RV32-NEXT: .LBB61_29: # %cond.load1091645; CHECK-RV32-NEXT: lbu a1, 0(a0)1646; CHECK-RV32-NEXT: vsetivli zero, 29, e8, m1, tu, ma1647; CHECK-RV32-NEXT: vmv8r.v v16, v81648; CHECK-RV32-NEXT: vmv.s.x v9, a11649; CHECK-RV32-NEXT: vslideup.vi v8, v9, 281650; CHECK-RV32-NEXT: addi a0, a0, 11651; CHECK-RV32-NEXT: vmv1r.v v16, v81652; CHECK-RV32-NEXT: vmv8r.v v8, v161653; CHECK-RV32-NEXT: .LBB61_30: # %else1101654; CHECK-RV32-NEXT: slli a2, a3, 21655; CHECK-RV32-NEXT: li a1, 321656; CHECK-RV32-NEXT: bgez a2, .LBB61_321657; CHECK-RV32-NEXT: # %bb.31: # %cond.load1131658; CHECK-RV32-NEXT: lbu a2, 0(a0)1659; CHECK-RV32-NEXT: vsetivli zero, 30, e8, m1, tu, ma1660; CHECK-RV32-NEXT: vmv8r.v v16, v81661; CHECK-RV32-NEXT: vmv.s.x v9, a21662; CHECK-RV32-NEXT: vslideup.vi v8, v9, 291663; CHECK-RV32-NEXT: addi a0, a0, 11664; CHECK-RV32-NEXT: vmv1r.v v16, v81665; CHECK-RV32-NEXT: vmv8r.v v8, v161666; CHECK-RV32-NEXT: .LBB61_32: # %else1141667; CHECK-RV32-NEXT: slli a2, a3, 11668; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1669; CHECK-RV32-NEXT: vsrl.vx v24, v0, a11670; CHECK-RV32-NEXT: bgez a2, .LBB61_341671; CHECK-RV32-NEXT: # %bb.33: # %cond.load1171672; CHECK-RV32-NEXT: lbu a2, 0(a0)1673; CHECK-RV32-NEXT: vmv8r.v v16, v81674; CHECK-RV32-NEXT: vmv.s.x v9, a21675; CHECK-RV32-NEXT: vsetivli zero, 31, e8, m1, tu, ma1676; CHECK-RV32-NEXT: vslideup.vi v8, v9, 301677; CHECK-RV32-NEXT: addi a0, a0, 11678; CHECK-RV32-NEXT: vmv1r.v v16, v81679; CHECK-RV32-NEXT: vmv8r.v v8, v161680; CHECK-RV32-NEXT: .LBB61_34: # %else1181681; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1682; CHECK-RV32-NEXT: vmv.x.s a2, v241683; CHECK-RV32-NEXT: bgez a3, .LBB61_351684; CHECK-RV32-NEXT: j .LBB61_5721685; CHECK-RV32-NEXT: .LBB61_35: # %else1221686; CHECK-RV32-NEXT: andi a3, a2, 11687; CHECK-RV32-NEXT: beqz a3, .LBB61_361688; CHECK-RV32-NEXT: j .LBB61_5731689; CHECK-RV32-NEXT: .LBB61_36: # %else1261690; CHECK-RV32-NEXT: andi a3, a2, 21691; CHECK-RV32-NEXT: beqz a3, .LBB61_371692; CHECK-RV32-NEXT: j .LBB61_5741693; CHECK-RV32-NEXT: .LBB61_37: # %else1301694; CHECK-RV32-NEXT: andi a3, a2, 41695; CHECK-RV32-NEXT: beqz a3, .LBB61_381696; CHECK-RV32-NEXT: j .LBB61_5751697; CHECK-RV32-NEXT: .LBB61_38: # %else1341698; CHECK-RV32-NEXT: andi a3, a2, 81699; CHECK-RV32-NEXT: beqz a3, .LBB61_391700; CHECK-RV32-NEXT: j .LBB61_5761701; CHECK-RV32-NEXT: .LBB61_39: # %else1381702; CHECK-RV32-NEXT: andi a3, a2, 161703; CHECK-RV32-NEXT: beqz a3, .LBB61_401704; CHECK-RV32-NEXT: j .LBB61_5771705; CHECK-RV32-NEXT: .LBB61_40: # %else1421706; CHECK-RV32-NEXT: andi a3, a2, 321707; CHECK-RV32-NEXT: beqz a3, .LBB61_411708; CHECK-RV32-NEXT: j .LBB61_5781709; CHECK-RV32-NEXT: .LBB61_41: # %else1461710; CHECK-RV32-NEXT: andi a3, a2, 641711; CHECK-RV32-NEXT: beqz a3, .LBB61_421712; CHECK-RV32-NEXT: j .LBB61_5791713; CHECK-RV32-NEXT: .LBB61_42: # %else1501714; CHECK-RV32-NEXT: andi a3, a2, 1281715; CHECK-RV32-NEXT: beqz a3, .LBB61_431716; CHECK-RV32-NEXT: j .LBB61_5801717; CHECK-RV32-NEXT: .LBB61_43: # %else1541718; CHECK-RV32-NEXT: andi a3, a2, 2561719; CHECK-RV32-NEXT: beqz a3, .LBB61_441720; CHECK-RV32-NEXT: j .LBB61_5811721; CHECK-RV32-NEXT: .LBB61_44: # %else1581722; CHECK-RV32-NEXT: andi a3, a2, 5121723; CHECK-RV32-NEXT: beqz a3, .LBB61_451724; CHECK-RV32-NEXT: j .LBB61_5821725; CHECK-RV32-NEXT: .LBB61_45: # %else1621726; CHECK-RV32-NEXT: andi a3, a2, 10241727; CHECK-RV32-NEXT: beqz a3, .LBB61_461728; CHECK-RV32-NEXT: j .LBB61_5831729; CHECK-RV32-NEXT: .LBB61_46: # %else1661730; CHECK-RV32-NEXT: slli a3, a2, 201731; CHECK-RV32-NEXT: bgez a3, .LBB61_471732; CHECK-RV32-NEXT: j .LBB61_5841733; CHECK-RV32-NEXT: .LBB61_47: # %else1701734; CHECK-RV32-NEXT: slli a3, a2, 191735; CHECK-RV32-NEXT: bgez a3, .LBB61_481736; CHECK-RV32-NEXT: j .LBB61_5851737; CHECK-RV32-NEXT: .LBB61_48: # %else1741738; CHECK-RV32-NEXT: slli a3, a2, 181739; CHECK-RV32-NEXT: bgez a3, .LBB61_491740; CHECK-RV32-NEXT: j .LBB61_5861741; CHECK-RV32-NEXT: .LBB61_49: # %else1781742; CHECK-RV32-NEXT: slli a3, a2, 171743; CHECK-RV32-NEXT: bgez a3, .LBB61_501744; CHECK-RV32-NEXT: j .LBB61_5871745; CHECK-RV32-NEXT: .LBB61_50: # %else1821746; CHECK-RV32-NEXT: slli a3, a2, 161747; CHECK-RV32-NEXT: bgez a3, .LBB61_511748; CHECK-RV32-NEXT: j .LBB61_5881749; CHECK-RV32-NEXT: .LBB61_51: # %else1861750; CHECK-RV32-NEXT: slli a3, a2, 151751; CHECK-RV32-NEXT: bgez a3, .LBB61_521752; CHECK-RV32-NEXT: j .LBB61_5891753; CHECK-RV32-NEXT: .LBB61_52: # %else1901754; CHECK-RV32-NEXT: slli a3, a2, 141755; CHECK-RV32-NEXT: bgez a3, .LBB61_531756; CHECK-RV32-NEXT: j .LBB61_5901757; CHECK-RV32-NEXT: .LBB61_53: # %else1941758; CHECK-RV32-NEXT: slli a3, a2, 131759; CHECK-RV32-NEXT: bgez a3, .LBB61_541760; CHECK-RV32-NEXT: j .LBB61_5911761; CHECK-RV32-NEXT: .LBB61_54: # %else1981762; CHECK-RV32-NEXT: slli a3, a2, 121763; CHECK-RV32-NEXT: bgez a3, .LBB61_551764; CHECK-RV32-NEXT: j .LBB61_5921765; CHECK-RV32-NEXT: .LBB61_55: # %else2021766; CHECK-RV32-NEXT: slli a3, a2, 111767; CHECK-RV32-NEXT: bgez a3, .LBB61_561768; CHECK-RV32-NEXT: j .LBB61_5931769; CHECK-RV32-NEXT: .LBB61_56: # %else2061770; CHECK-RV32-NEXT: slli a3, a2, 101771; CHECK-RV32-NEXT: bgez a3, .LBB61_571772; CHECK-RV32-NEXT: j .LBB61_5941773; CHECK-RV32-NEXT: .LBB61_57: # %else2101774; CHECK-RV32-NEXT: slli a3, a2, 91775; CHECK-RV32-NEXT: bgez a3, .LBB61_581776; CHECK-RV32-NEXT: j .LBB61_5951777; CHECK-RV32-NEXT: .LBB61_58: # %else2141778; CHECK-RV32-NEXT: slli a3, a2, 81779; CHECK-RV32-NEXT: bgez a3, .LBB61_591780; CHECK-RV32-NEXT: j .LBB61_5961781; CHECK-RV32-NEXT: .LBB61_59: # %else2181782; CHECK-RV32-NEXT: slli a3, a2, 71783; CHECK-RV32-NEXT: bgez a3, .LBB61_601784; CHECK-RV32-NEXT: j .LBB61_5971785; CHECK-RV32-NEXT: .LBB61_60: # %else2221786; CHECK-RV32-NEXT: slli a3, a2, 61787; CHECK-RV32-NEXT: bgez a3, .LBB61_611788; CHECK-RV32-NEXT: j .LBB61_5981789; CHECK-RV32-NEXT: .LBB61_61: # %else2261790; CHECK-RV32-NEXT: slli a3, a2, 51791; CHECK-RV32-NEXT: bgez a3, .LBB61_621792; CHECK-RV32-NEXT: j .LBB61_5991793; CHECK-RV32-NEXT: .LBB61_62: # %else2301794; CHECK-RV32-NEXT: slli a3, a2, 41795; CHECK-RV32-NEXT: bgez a3, .LBB61_631796; CHECK-RV32-NEXT: j .LBB61_6001797; CHECK-RV32-NEXT: .LBB61_63: # %else2341798; CHECK-RV32-NEXT: slli a3, a2, 31799; CHECK-RV32-NEXT: bgez a3, .LBB61_641800; CHECK-RV32-NEXT: j .LBB61_6011801; CHECK-RV32-NEXT: .LBB61_64: # %else2381802; CHECK-RV32-NEXT: slli a3, a2, 21803; CHECK-RV32-NEXT: bgez a3, .LBB61_661804; CHECK-RV32-NEXT: .LBB61_65: # %cond.load2411805; CHECK-RV32-NEXT: lbu a3, 0(a0)1806; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma1807; CHECK-RV32-NEXT: vmv8r.v v16, v81808; CHECK-RV32-NEXT: vmv.s.x v9, a31809; CHECK-RV32-NEXT: li a3, 621810; CHECK-RV32-NEXT: li a4, 611811; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma1812; CHECK-RV32-NEXT: vslideup.vx v8, v9, a41813; CHECK-RV32-NEXT: addi a0, a0, 11814; CHECK-RV32-NEXT: vmv1r.v v16, v81815; CHECK-RV32-NEXT: vmv8r.v v8, v161816; CHECK-RV32-NEXT: .LBB61_66: # %else2421817; CHECK-RV32-NEXT: slli a3, a2, 11818; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1819; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 11820; CHECK-RV32-NEXT: bgez a3, .LBB61_681821; CHECK-RV32-NEXT: # %bb.67: # %cond.load2451822; CHECK-RV32-NEXT: lbu a3, 0(a0)1823; CHECK-RV32-NEXT: vmv8r.v v16, v81824; CHECK-RV32-NEXT: vmv.s.x v9, a31825; CHECK-RV32-NEXT: li a3, 631826; CHECK-RV32-NEXT: li a4, 621827; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma1828; CHECK-RV32-NEXT: vslideup.vx v8, v9, a41829; CHECK-RV32-NEXT: addi a0, a0, 11830; CHECK-RV32-NEXT: vmv1r.v v16, v81831; CHECK-RV32-NEXT: vmv8r.v v8, v161832; CHECK-RV32-NEXT: .LBB61_68: # %else2461833; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1834; CHECK-RV32-NEXT: vmv.x.s a3, v241835; CHECK-RV32-NEXT: bgez a2, .LBB61_691836; CHECK-RV32-NEXT: j .LBB61_6021837; CHECK-RV32-NEXT: .LBB61_69: # %else2501838; CHECK-RV32-NEXT: andi a2, a3, 11839; CHECK-RV32-NEXT: beqz a2, .LBB61_701840; CHECK-RV32-NEXT: j .LBB61_6031841; CHECK-RV32-NEXT: .LBB61_70: # %else2541842; CHECK-RV32-NEXT: andi a2, a3, 21843; CHECK-RV32-NEXT: beqz a2, .LBB61_711844; CHECK-RV32-NEXT: j .LBB61_6041845; CHECK-RV32-NEXT: .LBB61_71: # %else2581846; CHECK-RV32-NEXT: andi a2, a3, 41847; CHECK-RV32-NEXT: beqz a2, .LBB61_721848; CHECK-RV32-NEXT: j .LBB61_6051849; CHECK-RV32-NEXT: .LBB61_72: # %else2621850; CHECK-RV32-NEXT: andi a2, a3, 81851; CHECK-RV32-NEXT: beqz a2, .LBB61_731852; CHECK-RV32-NEXT: j .LBB61_6061853; CHECK-RV32-NEXT: .LBB61_73: # %else2661854; CHECK-RV32-NEXT: andi a2, a3, 161855; CHECK-RV32-NEXT: beqz a2, .LBB61_741856; CHECK-RV32-NEXT: j .LBB61_6071857; CHECK-RV32-NEXT: .LBB61_74: # %else2701858; CHECK-RV32-NEXT: andi a2, a3, 321859; CHECK-RV32-NEXT: beqz a2, .LBB61_751860; CHECK-RV32-NEXT: j .LBB61_6081861; CHECK-RV32-NEXT: .LBB61_75: # %else2741862; CHECK-RV32-NEXT: andi a2, a3, 641863; CHECK-RV32-NEXT: beqz a2, .LBB61_761864; CHECK-RV32-NEXT: j .LBB61_6091865; CHECK-RV32-NEXT: .LBB61_76: # %else2781866; CHECK-RV32-NEXT: andi a2, a3, 1281867; CHECK-RV32-NEXT: beqz a2, .LBB61_771868; CHECK-RV32-NEXT: j .LBB61_6101869; CHECK-RV32-NEXT: .LBB61_77: # %else2821870; CHECK-RV32-NEXT: andi a2, a3, 2561871; CHECK-RV32-NEXT: beqz a2, .LBB61_781872; CHECK-RV32-NEXT: j .LBB61_6111873; CHECK-RV32-NEXT: .LBB61_78: # %else2861874; CHECK-RV32-NEXT: andi a2, a3, 5121875; CHECK-RV32-NEXT: beqz a2, .LBB61_791876; CHECK-RV32-NEXT: j .LBB61_6121877; CHECK-RV32-NEXT: .LBB61_79: # %else2901878; CHECK-RV32-NEXT: andi a2, a3, 10241879; CHECK-RV32-NEXT: beqz a2, .LBB61_801880; CHECK-RV32-NEXT: j .LBB61_6131881; CHECK-RV32-NEXT: .LBB61_80: # %else2941882; CHECK-RV32-NEXT: slli a2, a3, 201883; CHECK-RV32-NEXT: bgez a2, .LBB61_811884; CHECK-RV32-NEXT: j .LBB61_6141885; CHECK-RV32-NEXT: .LBB61_81: # %else2981886; CHECK-RV32-NEXT: slli a2, a3, 191887; CHECK-RV32-NEXT: bgez a2, .LBB61_821888; CHECK-RV32-NEXT: j .LBB61_6151889; CHECK-RV32-NEXT: .LBB61_82: # %else3021890; CHECK-RV32-NEXT: slli a2, a3, 181891; CHECK-RV32-NEXT: bgez a2, .LBB61_831892; CHECK-RV32-NEXT: j .LBB61_6161893; CHECK-RV32-NEXT: .LBB61_83: # %else3061894; CHECK-RV32-NEXT: slli a2, a3, 171895; CHECK-RV32-NEXT: bgez a2, .LBB61_841896; CHECK-RV32-NEXT: j .LBB61_6171897; CHECK-RV32-NEXT: .LBB61_84: # %else3101898; CHECK-RV32-NEXT: slli a2, a3, 161899; CHECK-RV32-NEXT: bgez a2, .LBB61_851900; CHECK-RV32-NEXT: j .LBB61_6181901; CHECK-RV32-NEXT: .LBB61_85: # %else3141902; CHECK-RV32-NEXT: slli a2, a3, 151903; CHECK-RV32-NEXT: bgez a2, .LBB61_861904; CHECK-RV32-NEXT: j .LBB61_6191905; CHECK-RV32-NEXT: .LBB61_86: # %else3181906; CHECK-RV32-NEXT: slli a2, a3, 141907; CHECK-RV32-NEXT: bgez a2, .LBB61_871908; CHECK-RV32-NEXT: j .LBB61_6201909; CHECK-RV32-NEXT: .LBB61_87: # %else3221910; CHECK-RV32-NEXT: slli a2, a3, 131911; CHECK-RV32-NEXT: bgez a2, .LBB61_881912; CHECK-RV32-NEXT: j .LBB61_6211913; CHECK-RV32-NEXT: .LBB61_88: # %else3261914; CHECK-RV32-NEXT: slli a2, a3, 121915; CHECK-RV32-NEXT: bgez a2, .LBB61_891916; CHECK-RV32-NEXT: j .LBB61_6221917; CHECK-RV32-NEXT: .LBB61_89: # %else3301918; CHECK-RV32-NEXT: slli a2, a3, 111919; CHECK-RV32-NEXT: bgez a2, .LBB61_901920; CHECK-RV32-NEXT: j .LBB61_6231921; CHECK-RV32-NEXT: .LBB61_90: # %else3341922; CHECK-RV32-NEXT: slli a2, a3, 101923; CHECK-RV32-NEXT: bgez a2, .LBB61_911924; CHECK-RV32-NEXT: j .LBB61_6241925; CHECK-RV32-NEXT: .LBB61_91: # %else3381926; CHECK-RV32-NEXT: slli a2, a3, 91927; CHECK-RV32-NEXT: bgez a2, .LBB61_921928; CHECK-RV32-NEXT: j .LBB61_6251929; CHECK-RV32-NEXT: .LBB61_92: # %else3421930; CHECK-RV32-NEXT: slli a2, a3, 81931; CHECK-RV32-NEXT: bgez a2, .LBB61_931932; CHECK-RV32-NEXT: j .LBB61_6261933; CHECK-RV32-NEXT: .LBB61_93: # %else3461934; CHECK-RV32-NEXT: slli a2, a3, 71935; CHECK-RV32-NEXT: bgez a2, .LBB61_941936; CHECK-RV32-NEXT: j .LBB61_6271937; CHECK-RV32-NEXT: .LBB61_94: # %else3501938; CHECK-RV32-NEXT: slli a2, a3, 61939; CHECK-RV32-NEXT: bgez a2, .LBB61_951940; CHECK-RV32-NEXT: j .LBB61_6281941; CHECK-RV32-NEXT: .LBB61_95: # %else3541942; CHECK-RV32-NEXT: slli a2, a3, 51943; CHECK-RV32-NEXT: bgez a2, .LBB61_961944; CHECK-RV32-NEXT: j .LBB61_6291945; CHECK-RV32-NEXT: .LBB61_96: # %else3581946; CHECK-RV32-NEXT: slli a2, a3, 41947; CHECK-RV32-NEXT: bgez a2, .LBB61_971948; CHECK-RV32-NEXT: j .LBB61_6301949; CHECK-RV32-NEXT: .LBB61_97: # %else3621950; CHECK-RV32-NEXT: slli a2, a3, 31951; CHECK-RV32-NEXT: bgez a2, .LBB61_981952; CHECK-RV32-NEXT: j .LBB61_6311953; CHECK-RV32-NEXT: .LBB61_98: # %else3661954; CHECK-RV32-NEXT: slli a2, a3, 21955; CHECK-RV32-NEXT: bgez a2, .LBB61_1001956; CHECK-RV32-NEXT: .LBB61_99: # %cond.load3691957; CHECK-RV32-NEXT: lbu a2, 0(a0)1958; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma1959; CHECK-RV32-NEXT: vmv8r.v v16, v81960; CHECK-RV32-NEXT: vmv.s.x v10, a21961; CHECK-RV32-NEXT: li a2, 941962; CHECK-RV32-NEXT: li a4, 931963; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma1964; CHECK-RV32-NEXT: vslideup.vx v8, v10, a41965; CHECK-RV32-NEXT: addi a0, a0, 11966; CHECK-RV32-NEXT: vmv2r.v v16, v81967; CHECK-RV32-NEXT: vmv8r.v v8, v161968; CHECK-RV32-NEXT: .LBB61_100: # %else3701969; CHECK-RV32-NEXT: slli a2, a3, 11970; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1971; CHECK-RV32-NEXT: vsrl.vx v24, v24, a11972; CHECK-RV32-NEXT: bgez a2, .LBB61_1021973; CHECK-RV32-NEXT: # %bb.101: # %cond.load3731974; CHECK-RV32-NEXT: lbu a2, 0(a0)1975; CHECK-RV32-NEXT: vmv8r.v v16, v81976; CHECK-RV32-NEXT: vmv.s.x v10, a21977; CHECK-RV32-NEXT: li a2, 951978; CHECK-RV32-NEXT: li a4, 941979; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma1980; CHECK-RV32-NEXT: vslideup.vx v8, v10, a41981; CHECK-RV32-NEXT: addi a0, a0, 11982; CHECK-RV32-NEXT: vmv2r.v v16, v81983; CHECK-RV32-NEXT: vmv8r.v v8, v161984; CHECK-RV32-NEXT: .LBB61_102: # %else3741985; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma1986; CHECK-RV32-NEXT: vmv.x.s a2, v241987; CHECK-RV32-NEXT: bgez a3, .LBB61_1031988; CHECK-RV32-NEXT: j .LBB61_6321989; CHECK-RV32-NEXT: .LBB61_103: # %else3781990; CHECK-RV32-NEXT: andi a3, a2, 11991; CHECK-RV32-NEXT: beqz a3, .LBB61_1041992; CHECK-RV32-NEXT: j .LBB61_6331993; CHECK-RV32-NEXT: .LBB61_104: # %else3821994; CHECK-RV32-NEXT: andi a3, a2, 21995; CHECK-RV32-NEXT: beqz a3, .LBB61_1051996; CHECK-RV32-NEXT: j .LBB61_6341997; CHECK-RV32-NEXT: .LBB61_105: # %else3861998; CHECK-RV32-NEXT: andi a3, a2, 41999; CHECK-RV32-NEXT: beqz a3, .LBB61_1062000; CHECK-RV32-NEXT: j .LBB61_6352001; CHECK-RV32-NEXT: .LBB61_106: # %else3902002; CHECK-RV32-NEXT: andi a3, a2, 82003; CHECK-RV32-NEXT: beqz a3, .LBB61_1072004; CHECK-RV32-NEXT: j .LBB61_6362005; CHECK-RV32-NEXT: .LBB61_107: # %else3942006; CHECK-RV32-NEXT: andi a3, a2, 162007; CHECK-RV32-NEXT: beqz a3, .LBB61_1082008; CHECK-RV32-NEXT: j .LBB61_6372009; CHECK-RV32-NEXT: .LBB61_108: # %else3982010; CHECK-RV32-NEXT: andi a3, a2, 322011; CHECK-RV32-NEXT: beqz a3, .LBB61_1092012; CHECK-RV32-NEXT: j .LBB61_6382013; CHECK-RV32-NEXT: .LBB61_109: # %else4022014; CHECK-RV32-NEXT: andi a3, a2, 642015; CHECK-RV32-NEXT: beqz a3, .LBB61_1102016; CHECK-RV32-NEXT: j .LBB61_6392017; CHECK-RV32-NEXT: .LBB61_110: # %else4062018; CHECK-RV32-NEXT: andi a3, a2, 1282019; CHECK-RV32-NEXT: beqz a3, .LBB61_1112020; CHECK-RV32-NEXT: j .LBB61_6402021; CHECK-RV32-NEXT: .LBB61_111: # %else4102022; CHECK-RV32-NEXT: andi a3, a2, 2562023; CHECK-RV32-NEXT: beqz a3, .LBB61_1122024; CHECK-RV32-NEXT: j .LBB61_6412025; CHECK-RV32-NEXT: .LBB61_112: # %else4142026; CHECK-RV32-NEXT: andi a3, a2, 5122027; CHECK-RV32-NEXT: beqz a3, .LBB61_1132028; CHECK-RV32-NEXT: j .LBB61_6422029; CHECK-RV32-NEXT: .LBB61_113: # %else4182030; CHECK-RV32-NEXT: andi a3, a2, 10242031; CHECK-RV32-NEXT: beqz a3, .LBB61_1142032; CHECK-RV32-NEXT: j .LBB61_6432033; CHECK-RV32-NEXT: .LBB61_114: # %else4222034; CHECK-RV32-NEXT: slli a3, a2, 202035; CHECK-RV32-NEXT: bgez a3, .LBB61_1152036; CHECK-RV32-NEXT: j .LBB61_6442037; CHECK-RV32-NEXT: .LBB61_115: # %else4262038; CHECK-RV32-NEXT: slli a3, a2, 192039; CHECK-RV32-NEXT: bgez a3, .LBB61_1162040; CHECK-RV32-NEXT: j .LBB61_6452041; CHECK-RV32-NEXT: .LBB61_116: # %else4302042; CHECK-RV32-NEXT: slli a3, a2, 182043; CHECK-RV32-NEXT: bgez a3, .LBB61_1172044; CHECK-RV32-NEXT: j .LBB61_6462045; CHECK-RV32-NEXT: .LBB61_117: # %else4342046; CHECK-RV32-NEXT: slli a3, a2, 172047; CHECK-RV32-NEXT: bgez a3, .LBB61_1182048; CHECK-RV32-NEXT: j .LBB61_6472049; CHECK-RV32-NEXT: .LBB61_118: # %else4382050; CHECK-RV32-NEXT: slli a3, a2, 162051; CHECK-RV32-NEXT: bgez a3, .LBB61_1192052; CHECK-RV32-NEXT: j .LBB61_6482053; CHECK-RV32-NEXT: .LBB61_119: # %else4422054; CHECK-RV32-NEXT: slli a3, a2, 152055; CHECK-RV32-NEXT: bgez a3, .LBB61_1202056; CHECK-RV32-NEXT: j .LBB61_6492057; CHECK-RV32-NEXT: .LBB61_120: # %else4462058; CHECK-RV32-NEXT: slli a3, a2, 142059; CHECK-RV32-NEXT: bgez a3, .LBB61_1212060; CHECK-RV32-NEXT: j .LBB61_6502061; CHECK-RV32-NEXT: .LBB61_121: # %else4502062; CHECK-RV32-NEXT: slli a3, a2, 132063; CHECK-RV32-NEXT: bgez a3, .LBB61_1222064; CHECK-RV32-NEXT: j .LBB61_6512065; CHECK-RV32-NEXT: .LBB61_122: # %else4542066; CHECK-RV32-NEXT: slli a3, a2, 122067; CHECK-RV32-NEXT: bgez a3, .LBB61_1232068; CHECK-RV32-NEXT: j .LBB61_6522069; CHECK-RV32-NEXT: .LBB61_123: # %else4582070; CHECK-RV32-NEXT: slli a3, a2, 112071; CHECK-RV32-NEXT: bgez a3, .LBB61_1242072; CHECK-RV32-NEXT: j .LBB61_6532073; CHECK-RV32-NEXT: .LBB61_124: # %else4622074; CHECK-RV32-NEXT: slli a3, a2, 102075; CHECK-RV32-NEXT: bgez a3, .LBB61_1252076; CHECK-RV32-NEXT: j .LBB61_6542077; CHECK-RV32-NEXT: .LBB61_125: # %else4662078; CHECK-RV32-NEXT: slli a3, a2, 92079; CHECK-RV32-NEXT: bgez a3, .LBB61_1262080; CHECK-RV32-NEXT: j .LBB61_6552081; CHECK-RV32-NEXT: .LBB61_126: # %else4702082; CHECK-RV32-NEXT: slli a3, a2, 82083; CHECK-RV32-NEXT: bgez a3, .LBB61_1272084; CHECK-RV32-NEXT: j .LBB61_6562085; CHECK-RV32-NEXT: .LBB61_127: # %else4742086; CHECK-RV32-NEXT: slli a3, a2, 72087; CHECK-RV32-NEXT: bgez a3, .LBB61_1282088; CHECK-RV32-NEXT: j .LBB61_6572089; CHECK-RV32-NEXT: .LBB61_128: # %else4782090; CHECK-RV32-NEXT: slli a3, a2, 62091; CHECK-RV32-NEXT: bgez a3, .LBB61_1292092; CHECK-RV32-NEXT: j .LBB61_6582093; CHECK-RV32-NEXT: .LBB61_129: # %else4822094; CHECK-RV32-NEXT: slli a3, a2, 52095; CHECK-RV32-NEXT: bgez a3, .LBB61_1302096; CHECK-RV32-NEXT: j .LBB61_6592097; CHECK-RV32-NEXT: .LBB61_130: # %else4862098; CHECK-RV32-NEXT: slli a3, a2, 42099; CHECK-RV32-NEXT: bgez a3, .LBB61_1312100; CHECK-RV32-NEXT: j .LBB61_6602101; CHECK-RV32-NEXT: .LBB61_131: # %else4902102; CHECK-RV32-NEXT: slli a3, a2, 32103; CHECK-RV32-NEXT: bgez a3, .LBB61_1322104; CHECK-RV32-NEXT: j .LBB61_6612105; CHECK-RV32-NEXT: .LBB61_132: # %else4942106; CHECK-RV32-NEXT: slli a3, a2, 22107; CHECK-RV32-NEXT: bgez a3, .LBB61_1342108; CHECK-RV32-NEXT: .LBB61_133: # %cond.load4972109; CHECK-RV32-NEXT: lbu a3, 0(a0)2110; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma2111; CHECK-RV32-NEXT: vmv8r.v v16, v82112; CHECK-RV32-NEXT: vmv.s.x v10, a32113; CHECK-RV32-NEXT: li a3, 1262114; CHECK-RV32-NEXT: li a4, 1252115; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma2116; CHECK-RV32-NEXT: vslideup.vx v8, v10, a42117; CHECK-RV32-NEXT: addi a0, a0, 12118; CHECK-RV32-NEXT: vmv2r.v v16, v82119; CHECK-RV32-NEXT: vmv8r.v v8, v162120; CHECK-RV32-NEXT: .LBB61_134: # %else4982121; CHECK-RV32-NEXT: slli a3, a2, 12122; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2123; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 22124; CHECK-RV32-NEXT: bgez a3, .LBB61_1362125; CHECK-RV32-NEXT: # %bb.135: # %cond.load5012126; CHECK-RV32-NEXT: lbu a3, 0(a0)2127; CHECK-RV32-NEXT: vmv8r.v v16, v82128; CHECK-RV32-NEXT: vmv.s.x v10, a32129; CHECK-RV32-NEXT: li a3, 1272130; CHECK-RV32-NEXT: li a4, 1262131; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma2132; CHECK-RV32-NEXT: vslideup.vx v8, v10, a42133; CHECK-RV32-NEXT: addi a0, a0, 12134; CHECK-RV32-NEXT: vmv2r.v v16, v82135; CHECK-RV32-NEXT: vmv8r.v v8, v162136; CHECK-RV32-NEXT: .LBB61_136: # %else5022137; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2138; CHECK-RV32-NEXT: vmv.x.s a3, v242139; CHECK-RV32-NEXT: bgez a2, .LBB61_1372140; CHECK-RV32-NEXT: j .LBB61_6622141; CHECK-RV32-NEXT: .LBB61_137: # %else5062142; CHECK-RV32-NEXT: andi a2, a3, 12143; CHECK-RV32-NEXT: beqz a2, .LBB61_1382144; CHECK-RV32-NEXT: j .LBB61_6632145; CHECK-RV32-NEXT: .LBB61_138: # %else5102146; CHECK-RV32-NEXT: andi a2, a3, 22147; CHECK-RV32-NEXT: beqz a2, .LBB61_1392148; CHECK-RV32-NEXT: j .LBB61_6642149; CHECK-RV32-NEXT: .LBB61_139: # %else5142150; CHECK-RV32-NEXT: andi a2, a3, 42151; CHECK-RV32-NEXT: beqz a2, .LBB61_1402152; CHECK-RV32-NEXT: j .LBB61_6652153; CHECK-RV32-NEXT: .LBB61_140: # %else5182154; CHECK-RV32-NEXT: andi a2, a3, 82155; CHECK-RV32-NEXT: beqz a2, .LBB61_1412156; CHECK-RV32-NEXT: j .LBB61_6662157; CHECK-RV32-NEXT: .LBB61_141: # %else5222158; CHECK-RV32-NEXT: andi a2, a3, 162159; CHECK-RV32-NEXT: beqz a2, .LBB61_1422160; CHECK-RV32-NEXT: j .LBB61_6672161; CHECK-RV32-NEXT: .LBB61_142: # %else5262162; CHECK-RV32-NEXT: andi a2, a3, 322163; CHECK-RV32-NEXT: beqz a2, .LBB61_1432164; CHECK-RV32-NEXT: j .LBB61_6682165; CHECK-RV32-NEXT: .LBB61_143: # %else5302166; CHECK-RV32-NEXT: andi a2, a3, 642167; CHECK-RV32-NEXT: beqz a2, .LBB61_1442168; CHECK-RV32-NEXT: j .LBB61_6692169; CHECK-RV32-NEXT: .LBB61_144: # %else5342170; CHECK-RV32-NEXT: andi a2, a3, 1282171; CHECK-RV32-NEXT: beqz a2, .LBB61_1452172; CHECK-RV32-NEXT: j .LBB61_6702173; CHECK-RV32-NEXT: .LBB61_145: # %else5382174; CHECK-RV32-NEXT: andi a2, a3, 2562175; CHECK-RV32-NEXT: beqz a2, .LBB61_1462176; CHECK-RV32-NEXT: j .LBB61_6712177; CHECK-RV32-NEXT: .LBB61_146: # %else5422178; CHECK-RV32-NEXT: andi a2, a3, 5122179; CHECK-RV32-NEXT: beqz a2, .LBB61_1472180; CHECK-RV32-NEXT: j .LBB61_6722181; CHECK-RV32-NEXT: .LBB61_147: # %else5462182; CHECK-RV32-NEXT: andi a2, a3, 10242183; CHECK-RV32-NEXT: beqz a2, .LBB61_1482184; CHECK-RV32-NEXT: j .LBB61_6732185; CHECK-RV32-NEXT: .LBB61_148: # %else5502186; CHECK-RV32-NEXT: slli a2, a3, 202187; CHECK-RV32-NEXT: bgez a2, .LBB61_1492188; CHECK-RV32-NEXT: j .LBB61_6742189; CHECK-RV32-NEXT: .LBB61_149: # %else5542190; CHECK-RV32-NEXT: slli a2, a3, 192191; CHECK-RV32-NEXT: bgez a2, .LBB61_1502192; CHECK-RV32-NEXT: j .LBB61_6752193; CHECK-RV32-NEXT: .LBB61_150: # %else5582194; CHECK-RV32-NEXT: slli a2, a3, 182195; CHECK-RV32-NEXT: bgez a2, .LBB61_1512196; CHECK-RV32-NEXT: j .LBB61_6762197; CHECK-RV32-NEXT: .LBB61_151: # %else5622198; CHECK-RV32-NEXT: slli a2, a3, 172199; CHECK-RV32-NEXT: bgez a2, .LBB61_1522200; CHECK-RV32-NEXT: j .LBB61_6772201; CHECK-RV32-NEXT: .LBB61_152: # %else5662202; CHECK-RV32-NEXT: slli a2, a3, 162203; CHECK-RV32-NEXT: bgez a2, .LBB61_1532204; CHECK-RV32-NEXT: j .LBB61_6782205; CHECK-RV32-NEXT: .LBB61_153: # %else5702206; CHECK-RV32-NEXT: slli a2, a3, 152207; CHECK-RV32-NEXT: bgez a2, .LBB61_1542208; CHECK-RV32-NEXT: j .LBB61_6792209; CHECK-RV32-NEXT: .LBB61_154: # %else5742210; CHECK-RV32-NEXT: slli a2, a3, 142211; CHECK-RV32-NEXT: bgez a2, .LBB61_1552212; CHECK-RV32-NEXT: j .LBB61_6802213; CHECK-RV32-NEXT: .LBB61_155: # %else5782214; CHECK-RV32-NEXT: slli a2, a3, 132215; CHECK-RV32-NEXT: bgez a2, .LBB61_1562216; CHECK-RV32-NEXT: j .LBB61_6812217; CHECK-RV32-NEXT: .LBB61_156: # %else5822218; CHECK-RV32-NEXT: slli a2, a3, 122219; CHECK-RV32-NEXT: bgez a2, .LBB61_1572220; CHECK-RV32-NEXT: j .LBB61_6822221; CHECK-RV32-NEXT: .LBB61_157: # %else5862222; CHECK-RV32-NEXT: slli a2, a3, 112223; CHECK-RV32-NEXT: bgez a2, .LBB61_1582224; CHECK-RV32-NEXT: j .LBB61_6832225; CHECK-RV32-NEXT: .LBB61_158: # %else5902226; CHECK-RV32-NEXT: slli a2, a3, 102227; CHECK-RV32-NEXT: bgez a2, .LBB61_1592228; CHECK-RV32-NEXT: j .LBB61_6842229; CHECK-RV32-NEXT: .LBB61_159: # %else5942230; CHECK-RV32-NEXT: slli a2, a3, 92231; CHECK-RV32-NEXT: bgez a2, .LBB61_1602232; CHECK-RV32-NEXT: j .LBB61_6852233; CHECK-RV32-NEXT: .LBB61_160: # %else5982234; CHECK-RV32-NEXT: slli a2, a3, 82235; CHECK-RV32-NEXT: bgez a2, .LBB61_1612236; CHECK-RV32-NEXT: j .LBB61_6862237; CHECK-RV32-NEXT: .LBB61_161: # %else6022238; CHECK-RV32-NEXT: slli a2, a3, 72239; CHECK-RV32-NEXT: bgez a2, .LBB61_1622240; CHECK-RV32-NEXT: j .LBB61_6872241; CHECK-RV32-NEXT: .LBB61_162: # %else6062242; CHECK-RV32-NEXT: slli a2, a3, 62243; CHECK-RV32-NEXT: bgez a2, .LBB61_1632244; CHECK-RV32-NEXT: j .LBB61_6882245; CHECK-RV32-NEXT: .LBB61_163: # %else6102246; CHECK-RV32-NEXT: slli a2, a3, 52247; CHECK-RV32-NEXT: bgez a2, .LBB61_1642248; CHECK-RV32-NEXT: j .LBB61_6892249; CHECK-RV32-NEXT: .LBB61_164: # %else6142250; CHECK-RV32-NEXT: slli a2, a3, 42251; CHECK-RV32-NEXT: bgez a2, .LBB61_1652252; CHECK-RV32-NEXT: j .LBB61_6902253; CHECK-RV32-NEXT: .LBB61_165: # %else6182254; CHECK-RV32-NEXT: slli a2, a3, 32255; CHECK-RV32-NEXT: bgez a2, .LBB61_1662256; CHECK-RV32-NEXT: j .LBB61_6912257; CHECK-RV32-NEXT: .LBB61_166: # %else6222258; CHECK-RV32-NEXT: slli a2, a3, 22259; CHECK-RV32-NEXT: bgez a2, .LBB61_1682260; CHECK-RV32-NEXT: .LBB61_167: # %cond.load6252261; CHECK-RV32-NEXT: lbu a2, 0(a0)2262; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma2263; CHECK-RV32-NEXT: vmv8r.v v16, v82264; CHECK-RV32-NEXT: vmv.s.x v12, a22265; CHECK-RV32-NEXT: li a2, 1582266; CHECK-RV32-NEXT: li a4, 1572267; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma2268; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42269; CHECK-RV32-NEXT: addi a0, a0, 12270; CHECK-RV32-NEXT: vmv4r.v v16, v82271; CHECK-RV32-NEXT: vmv8r.v v8, v162272; CHECK-RV32-NEXT: .LBB61_168: # %else6262273; CHECK-RV32-NEXT: slli a2, a3, 12274; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2275; CHECK-RV32-NEXT: vsrl.vx v24, v24, a12276; CHECK-RV32-NEXT: bgez a2, .LBB61_1702277; CHECK-RV32-NEXT: # %bb.169: # %cond.load6292278; CHECK-RV32-NEXT: lbu a2, 0(a0)2279; CHECK-RV32-NEXT: vmv8r.v v16, v82280; CHECK-RV32-NEXT: vmv.s.x v12, a22281; CHECK-RV32-NEXT: li a2, 1592282; CHECK-RV32-NEXT: li a4, 1582283; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma2284; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42285; CHECK-RV32-NEXT: addi a0, a0, 12286; CHECK-RV32-NEXT: vmv4r.v v16, v82287; CHECK-RV32-NEXT: vmv8r.v v8, v162288; CHECK-RV32-NEXT: .LBB61_170: # %else6302289; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2290; CHECK-RV32-NEXT: vmv.x.s a2, v242291; CHECK-RV32-NEXT: bgez a3, .LBB61_1712292; CHECK-RV32-NEXT: j .LBB61_6922293; CHECK-RV32-NEXT: .LBB61_171: # %else6342294; CHECK-RV32-NEXT: andi a3, a2, 12295; CHECK-RV32-NEXT: beqz a3, .LBB61_1722296; CHECK-RV32-NEXT: j .LBB61_6932297; CHECK-RV32-NEXT: .LBB61_172: # %else6382298; CHECK-RV32-NEXT: andi a3, a2, 22299; CHECK-RV32-NEXT: beqz a3, .LBB61_1732300; CHECK-RV32-NEXT: j .LBB61_6942301; CHECK-RV32-NEXT: .LBB61_173: # %else6422302; CHECK-RV32-NEXT: andi a3, a2, 42303; CHECK-RV32-NEXT: beqz a3, .LBB61_1742304; CHECK-RV32-NEXT: j .LBB61_6952305; CHECK-RV32-NEXT: .LBB61_174: # %else6462306; CHECK-RV32-NEXT: andi a3, a2, 82307; CHECK-RV32-NEXT: beqz a3, .LBB61_1752308; CHECK-RV32-NEXT: j .LBB61_6962309; CHECK-RV32-NEXT: .LBB61_175: # %else6502310; CHECK-RV32-NEXT: andi a3, a2, 162311; CHECK-RV32-NEXT: beqz a3, .LBB61_1762312; CHECK-RV32-NEXT: j .LBB61_6972313; CHECK-RV32-NEXT: .LBB61_176: # %else6542314; CHECK-RV32-NEXT: andi a3, a2, 322315; CHECK-RV32-NEXT: beqz a3, .LBB61_1772316; CHECK-RV32-NEXT: j .LBB61_6982317; CHECK-RV32-NEXT: .LBB61_177: # %else6582318; CHECK-RV32-NEXT: andi a3, a2, 642319; CHECK-RV32-NEXT: beqz a3, .LBB61_1782320; CHECK-RV32-NEXT: j .LBB61_6992321; CHECK-RV32-NEXT: .LBB61_178: # %else6622322; CHECK-RV32-NEXT: andi a3, a2, 1282323; CHECK-RV32-NEXT: beqz a3, .LBB61_1792324; CHECK-RV32-NEXT: j .LBB61_7002325; CHECK-RV32-NEXT: .LBB61_179: # %else6662326; CHECK-RV32-NEXT: andi a3, a2, 2562327; CHECK-RV32-NEXT: beqz a3, .LBB61_1802328; CHECK-RV32-NEXT: j .LBB61_7012329; CHECK-RV32-NEXT: .LBB61_180: # %else6702330; CHECK-RV32-NEXT: andi a3, a2, 5122331; CHECK-RV32-NEXT: beqz a3, .LBB61_1812332; CHECK-RV32-NEXT: j .LBB61_7022333; CHECK-RV32-NEXT: .LBB61_181: # %else6742334; CHECK-RV32-NEXT: andi a3, a2, 10242335; CHECK-RV32-NEXT: beqz a3, .LBB61_1822336; CHECK-RV32-NEXT: j .LBB61_7032337; CHECK-RV32-NEXT: .LBB61_182: # %else6782338; CHECK-RV32-NEXT: slli a3, a2, 202339; CHECK-RV32-NEXT: bgez a3, .LBB61_1832340; CHECK-RV32-NEXT: j .LBB61_7042341; CHECK-RV32-NEXT: .LBB61_183: # %else6822342; CHECK-RV32-NEXT: slli a3, a2, 192343; CHECK-RV32-NEXT: bgez a3, .LBB61_1842344; CHECK-RV32-NEXT: j .LBB61_7052345; CHECK-RV32-NEXT: .LBB61_184: # %else6862346; CHECK-RV32-NEXT: slli a3, a2, 182347; CHECK-RV32-NEXT: bgez a3, .LBB61_1852348; CHECK-RV32-NEXT: j .LBB61_7062349; CHECK-RV32-NEXT: .LBB61_185: # %else6902350; CHECK-RV32-NEXT: slli a3, a2, 172351; CHECK-RV32-NEXT: bgez a3, .LBB61_1862352; CHECK-RV32-NEXT: j .LBB61_7072353; CHECK-RV32-NEXT: .LBB61_186: # %else6942354; CHECK-RV32-NEXT: slli a3, a2, 162355; CHECK-RV32-NEXT: bgez a3, .LBB61_1872356; CHECK-RV32-NEXT: j .LBB61_7082357; CHECK-RV32-NEXT: .LBB61_187: # %else6982358; CHECK-RV32-NEXT: slli a3, a2, 152359; CHECK-RV32-NEXT: bgez a3, .LBB61_1882360; CHECK-RV32-NEXT: j .LBB61_7092361; CHECK-RV32-NEXT: .LBB61_188: # %else7022362; CHECK-RV32-NEXT: slli a3, a2, 142363; CHECK-RV32-NEXT: bgez a3, .LBB61_1892364; CHECK-RV32-NEXT: j .LBB61_7102365; CHECK-RV32-NEXT: .LBB61_189: # %else7062366; CHECK-RV32-NEXT: slli a3, a2, 132367; CHECK-RV32-NEXT: bgez a3, .LBB61_1902368; CHECK-RV32-NEXT: j .LBB61_7112369; CHECK-RV32-NEXT: .LBB61_190: # %else7102370; CHECK-RV32-NEXT: slli a3, a2, 122371; CHECK-RV32-NEXT: bgez a3, .LBB61_1912372; CHECK-RV32-NEXT: j .LBB61_7122373; CHECK-RV32-NEXT: .LBB61_191: # %else7142374; CHECK-RV32-NEXT: slli a3, a2, 112375; CHECK-RV32-NEXT: bgez a3, .LBB61_1922376; CHECK-RV32-NEXT: j .LBB61_7132377; CHECK-RV32-NEXT: .LBB61_192: # %else7182378; CHECK-RV32-NEXT: slli a3, a2, 102379; CHECK-RV32-NEXT: bgez a3, .LBB61_1932380; CHECK-RV32-NEXT: j .LBB61_7142381; CHECK-RV32-NEXT: .LBB61_193: # %else7222382; CHECK-RV32-NEXT: slli a3, a2, 92383; CHECK-RV32-NEXT: bgez a3, .LBB61_1942384; CHECK-RV32-NEXT: j .LBB61_7152385; CHECK-RV32-NEXT: .LBB61_194: # %else7262386; CHECK-RV32-NEXT: slli a3, a2, 82387; CHECK-RV32-NEXT: bgez a3, .LBB61_1952388; CHECK-RV32-NEXT: j .LBB61_7162389; CHECK-RV32-NEXT: .LBB61_195: # %else7302390; CHECK-RV32-NEXT: slli a3, a2, 72391; CHECK-RV32-NEXT: bgez a3, .LBB61_1962392; CHECK-RV32-NEXT: j .LBB61_7172393; CHECK-RV32-NEXT: .LBB61_196: # %else7342394; CHECK-RV32-NEXT: slli a3, a2, 62395; CHECK-RV32-NEXT: bgez a3, .LBB61_1972396; CHECK-RV32-NEXT: j .LBB61_7182397; CHECK-RV32-NEXT: .LBB61_197: # %else7382398; CHECK-RV32-NEXT: slli a3, a2, 52399; CHECK-RV32-NEXT: bgez a3, .LBB61_1982400; CHECK-RV32-NEXT: j .LBB61_7192401; CHECK-RV32-NEXT: .LBB61_198: # %else7422402; CHECK-RV32-NEXT: slli a3, a2, 42403; CHECK-RV32-NEXT: bgez a3, .LBB61_1992404; CHECK-RV32-NEXT: j .LBB61_7202405; CHECK-RV32-NEXT: .LBB61_199: # %else7462406; CHECK-RV32-NEXT: slli a3, a2, 32407; CHECK-RV32-NEXT: bgez a3, .LBB61_2002408; CHECK-RV32-NEXT: j .LBB61_7212409; CHECK-RV32-NEXT: .LBB61_200: # %else7502410; CHECK-RV32-NEXT: slli a3, a2, 22411; CHECK-RV32-NEXT: bgez a3, .LBB61_2022412; CHECK-RV32-NEXT: .LBB61_201: # %cond.load7532413; CHECK-RV32-NEXT: lbu a3, 0(a0)2414; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma2415; CHECK-RV32-NEXT: vmv8r.v v16, v82416; CHECK-RV32-NEXT: vmv.s.x v12, a32417; CHECK-RV32-NEXT: li a3, 1902418; CHECK-RV32-NEXT: li a4, 1892419; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma2420; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42421; CHECK-RV32-NEXT: addi a0, a0, 12422; CHECK-RV32-NEXT: vmv4r.v v16, v82423; CHECK-RV32-NEXT: vmv8r.v v8, v162424; CHECK-RV32-NEXT: .LBB61_202: # %else7542425; CHECK-RV32-NEXT: slli a3, a2, 12426; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2427; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 32428; CHECK-RV32-NEXT: bgez a3, .LBB61_2042429; CHECK-RV32-NEXT: # %bb.203: # %cond.load7572430; CHECK-RV32-NEXT: lbu a3, 0(a0)2431; CHECK-RV32-NEXT: vmv8r.v v16, v82432; CHECK-RV32-NEXT: vmv.s.x v12, a32433; CHECK-RV32-NEXT: li a3, 1912434; CHECK-RV32-NEXT: li a4, 1902435; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma2436; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42437; CHECK-RV32-NEXT: addi a0, a0, 12438; CHECK-RV32-NEXT: vmv4r.v v16, v82439; CHECK-RV32-NEXT: vmv8r.v v8, v162440; CHECK-RV32-NEXT: .LBB61_204: # %else7582441; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2442; CHECK-RV32-NEXT: vmv.x.s a3, v242443; CHECK-RV32-NEXT: bgez a2, .LBB61_2052444; CHECK-RV32-NEXT: j .LBB61_7222445; CHECK-RV32-NEXT: .LBB61_205: # %else7622446; CHECK-RV32-NEXT: andi a2, a3, 12447; CHECK-RV32-NEXT: beqz a2, .LBB61_2062448; CHECK-RV32-NEXT: j .LBB61_7232449; CHECK-RV32-NEXT: .LBB61_206: # %else7662450; CHECK-RV32-NEXT: andi a2, a3, 22451; CHECK-RV32-NEXT: beqz a2, .LBB61_2072452; CHECK-RV32-NEXT: j .LBB61_7242453; CHECK-RV32-NEXT: .LBB61_207: # %else7702454; CHECK-RV32-NEXT: andi a2, a3, 42455; CHECK-RV32-NEXT: beqz a2, .LBB61_2082456; CHECK-RV32-NEXT: j .LBB61_7252457; CHECK-RV32-NEXT: .LBB61_208: # %else7742458; CHECK-RV32-NEXT: andi a2, a3, 82459; CHECK-RV32-NEXT: beqz a2, .LBB61_2092460; CHECK-RV32-NEXT: j .LBB61_7262461; CHECK-RV32-NEXT: .LBB61_209: # %else7782462; CHECK-RV32-NEXT: andi a2, a3, 162463; CHECK-RV32-NEXT: beqz a2, .LBB61_2102464; CHECK-RV32-NEXT: j .LBB61_7272465; CHECK-RV32-NEXT: .LBB61_210: # %else7822466; CHECK-RV32-NEXT: andi a2, a3, 322467; CHECK-RV32-NEXT: beqz a2, .LBB61_2112468; CHECK-RV32-NEXT: j .LBB61_7282469; CHECK-RV32-NEXT: .LBB61_211: # %else7862470; CHECK-RV32-NEXT: andi a2, a3, 642471; CHECK-RV32-NEXT: beqz a2, .LBB61_2122472; CHECK-RV32-NEXT: j .LBB61_7292473; CHECK-RV32-NEXT: .LBB61_212: # %else7902474; CHECK-RV32-NEXT: andi a2, a3, 1282475; CHECK-RV32-NEXT: beqz a2, .LBB61_2132476; CHECK-RV32-NEXT: j .LBB61_7302477; CHECK-RV32-NEXT: .LBB61_213: # %else7942478; CHECK-RV32-NEXT: andi a2, a3, 2562479; CHECK-RV32-NEXT: beqz a2, .LBB61_2142480; CHECK-RV32-NEXT: j .LBB61_7312481; CHECK-RV32-NEXT: .LBB61_214: # %else7982482; CHECK-RV32-NEXT: andi a2, a3, 5122483; CHECK-RV32-NEXT: beqz a2, .LBB61_2152484; CHECK-RV32-NEXT: j .LBB61_7322485; CHECK-RV32-NEXT: .LBB61_215: # %else8022486; CHECK-RV32-NEXT: andi a2, a3, 10242487; CHECK-RV32-NEXT: beqz a2, .LBB61_2162488; CHECK-RV32-NEXT: j .LBB61_7332489; CHECK-RV32-NEXT: .LBB61_216: # %else8062490; CHECK-RV32-NEXT: slli a2, a3, 202491; CHECK-RV32-NEXT: bgez a2, .LBB61_2172492; CHECK-RV32-NEXT: j .LBB61_7342493; CHECK-RV32-NEXT: .LBB61_217: # %else8102494; CHECK-RV32-NEXT: slli a2, a3, 192495; CHECK-RV32-NEXT: bgez a2, .LBB61_2182496; CHECK-RV32-NEXT: j .LBB61_7352497; CHECK-RV32-NEXT: .LBB61_218: # %else8142498; CHECK-RV32-NEXT: slli a2, a3, 182499; CHECK-RV32-NEXT: bgez a2, .LBB61_2192500; CHECK-RV32-NEXT: j .LBB61_7362501; CHECK-RV32-NEXT: .LBB61_219: # %else8182502; CHECK-RV32-NEXT: slli a2, a3, 172503; CHECK-RV32-NEXT: bgez a2, .LBB61_2202504; CHECK-RV32-NEXT: j .LBB61_7372505; CHECK-RV32-NEXT: .LBB61_220: # %else8222506; CHECK-RV32-NEXT: slli a2, a3, 162507; CHECK-RV32-NEXT: bgez a2, .LBB61_2212508; CHECK-RV32-NEXT: j .LBB61_7382509; CHECK-RV32-NEXT: .LBB61_221: # %else8262510; CHECK-RV32-NEXT: slli a2, a3, 152511; CHECK-RV32-NEXT: bgez a2, .LBB61_2222512; CHECK-RV32-NEXT: j .LBB61_7392513; CHECK-RV32-NEXT: .LBB61_222: # %else8302514; CHECK-RV32-NEXT: slli a2, a3, 142515; CHECK-RV32-NEXT: bgez a2, .LBB61_2232516; CHECK-RV32-NEXT: j .LBB61_7402517; CHECK-RV32-NEXT: .LBB61_223: # %else8342518; CHECK-RV32-NEXT: slli a2, a3, 132519; CHECK-RV32-NEXT: bgez a2, .LBB61_2242520; CHECK-RV32-NEXT: j .LBB61_7412521; CHECK-RV32-NEXT: .LBB61_224: # %else8382522; CHECK-RV32-NEXT: slli a2, a3, 122523; CHECK-RV32-NEXT: bgez a2, .LBB61_2252524; CHECK-RV32-NEXT: j .LBB61_7422525; CHECK-RV32-NEXT: .LBB61_225: # %else8422526; CHECK-RV32-NEXT: slli a2, a3, 112527; CHECK-RV32-NEXT: bgez a2, .LBB61_2262528; CHECK-RV32-NEXT: j .LBB61_7432529; CHECK-RV32-NEXT: .LBB61_226: # %else8462530; CHECK-RV32-NEXT: slli a2, a3, 102531; CHECK-RV32-NEXT: bgez a2, .LBB61_2272532; CHECK-RV32-NEXT: j .LBB61_7442533; CHECK-RV32-NEXT: .LBB61_227: # %else8502534; CHECK-RV32-NEXT: slli a2, a3, 92535; CHECK-RV32-NEXT: bgez a2, .LBB61_2282536; CHECK-RV32-NEXT: j .LBB61_7452537; CHECK-RV32-NEXT: .LBB61_228: # %else8542538; CHECK-RV32-NEXT: slli a2, a3, 82539; CHECK-RV32-NEXT: bgez a2, .LBB61_2292540; CHECK-RV32-NEXT: j .LBB61_7462541; CHECK-RV32-NEXT: .LBB61_229: # %else8582542; CHECK-RV32-NEXT: slli a2, a3, 72543; CHECK-RV32-NEXT: bgez a2, .LBB61_2302544; CHECK-RV32-NEXT: j .LBB61_7472545; CHECK-RV32-NEXT: .LBB61_230: # %else8622546; CHECK-RV32-NEXT: slli a2, a3, 62547; CHECK-RV32-NEXT: bgez a2, .LBB61_2312548; CHECK-RV32-NEXT: j .LBB61_7482549; CHECK-RV32-NEXT: .LBB61_231: # %else8662550; CHECK-RV32-NEXT: slli a2, a3, 52551; CHECK-RV32-NEXT: bgez a2, .LBB61_2322552; CHECK-RV32-NEXT: j .LBB61_7492553; CHECK-RV32-NEXT: .LBB61_232: # %else8702554; CHECK-RV32-NEXT: slli a2, a3, 42555; CHECK-RV32-NEXT: bgez a2, .LBB61_2332556; CHECK-RV32-NEXT: j .LBB61_7502557; CHECK-RV32-NEXT: .LBB61_233: # %else8742558; CHECK-RV32-NEXT: slli a2, a3, 32559; CHECK-RV32-NEXT: bgez a2, .LBB61_2342560; CHECK-RV32-NEXT: j .LBB61_7512561; CHECK-RV32-NEXT: .LBB61_234: # %else8782562; CHECK-RV32-NEXT: slli a2, a3, 22563; CHECK-RV32-NEXT: bgez a2, .LBB61_2362564; CHECK-RV32-NEXT: .LBB61_235: # %cond.load8812565; CHECK-RV32-NEXT: lbu a2, 0(a0)2566; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma2567; CHECK-RV32-NEXT: vmv8r.v v16, v82568; CHECK-RV32-NEXT: vmv.s.x v12, a22569; CHECK-RV32-NEXT: li a2, 2222570; CHECK-RV32-NEXT: li a4, 2212571; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma2572; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42573; CHECK-RV32-NEXT: addi a0, a0, 12574; CHECK-RV32-NEXT: vmv4r.v v16, v82575; CHECK-RV32-NEXT: vmv8r.v v8, v162576; CHECK-RV32-NEXT: .LBB61_236: # %else8822577; CHECK-RV32-NEXT: slli a2, a3, 12578; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2579; CHECK-RV32-NEXT: vsrl.vx v24, v24, a12580; CHECK-RV32-NEXT: bgez a2, .LBB61_2382581; CHECK-RV32-NEXT: # %bb.237: # %cond.load8852582; CHECK-RV32-NEXT: lbu a2, 0(a0)2583; CHECK-RV32-NEXT: vmv8r.v v16, v82584; CHECK-RV32-NEXT: vmv.s.x v12, a22585; CHECK-RV32-NEXT: li a2, 2232586; CHECK-RV32-NEXT: li a4, 2222587; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma2588; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42589; CHECK-RV32-NEXT: addi a0, a0, 12590; CHECK-RV32-NEXT: vmv4r.v v16, v82591; CHECK-RV32-NEXT: vmv8r.v v8, v162592; CHECK-RV32-NEXT: .LBB61_238: # %else8862593; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2594; CHECK-RV32-NEXT: vmv.x.s a2, v242595; CHECK-RV32-NEXT: bgez a3, .LBB61_2392596; CHECK-RV32-NEXT: j .LBB61_7522597; CHECK-RV32-NEXT: .LBB61_239: # %else8902598; CHECK-RV32-NEXT: andi a3, a2, 12599; CHECK-RV32-NEXT: beqz a3, .LBB61_2402600; CHECK-RV32-NEXT: j .LBB61_7532601; CHECK-RV32-NEXT: .LBB61_240: # %else8942602; CHECK-RV32-NEXT: andi a3, a2, 22603; CHECK-RV32-NEXT: beqz a3, .LBB61_2412604; CHECK-RV32-NEXT: j .LBB61_7542605; CHECK-RV32-NEXT: .LBB61_241: # %else8982606; CHECK-RV32-NEXT: andi a3, a2, 42607; CHECK-RV32-NEXT: beqz a3, .LBB61_2422608; CHECK-RV32-NEXT: j .LBB61_7552609; CHECK-RV32-NEXT: .LBB61_242: # %else9022610; CHECK-RV32-NEXT: andi a3, a2, 82611; CHECK-RV32-NEXT: beqz a3, .LBB61_2432612; CHECK-RV32-NEXT: j .LBB61_7562613; CHECK-RV32-NEXT: .LBB61_243: # %else9062614; CHECK-RV32-NEXT: andi a3, a2, 162615; CHECK-RV32-NEXT: beqz a3, .LBB61_2442616; CHECK-RV32-NEXT: j .LBB61_7572617; CHECK-RV32-NEXT: .LBB61_244: # %else9102618; CHECK-RV32-NEXT: andi a3, a2, 322619; CHECK-RV32-NEXT: beqz a3, .LBB61_2452620; CHECK-RV32-NEXT: j .LBB61_7582621; CHECK-RV32-NEXT: .LBB61_245: # %else9142622; CHECK-RV32-NEXT: andi a3, a2, 642623; CHECK-RV32-NEXT: beqz a3, .LBB61_2462624; CHECK-RV32-NEXT: j .LBB61_7592625; CHECK-RV32-NEXT: .LBB61_246: # %else9182626; CHECK-RV32-NEXT: andi a3, a2, 1282627; CHECK-RV32-NEXT: beqz a3, .LBB61_2472628; CHECK-RV32-NEXT: j .LBB61_7602629; CHECK-RV32-NEXT: .LBB61_247: # %else9222630; CHECK-RV32-NEXT: andi a3, a2, 2562631; CHECK-RV32-NEXT: beqz a3, .LBB61_2482632; CHECK-RV32-NEXT: j .LBB61_7612633; CHECK-RV32-NEXT: .LBB61_248: # %else9262634; CHECK-RV32-NEXT: andi a3, a2, 5122635; CHECK-RV32-NEXT: beqz a3, .LBB61_2492636; CHECK-RV32-NEXT: j .LBB61_7622637; CHECK-RV32-NEXT: .LBB61_249: # %else9302638; CHECK-RV32-NEXT: andi a3, a2, 10242639; CHECK-RV32-NEXT: beqz a3, .LBB61_2502640; CHECK-RV32-NEXT: j .LBB61_7632641; CHECK-RV32-NEXT: .LBB61_250: # %else9342642; CHECK-RV32-NEXT: slli a3, a2, 202643; CHECK-RV32-NEXT: bgez a3, .LBB61_2512644; CHECK-RV32-NEXT: j .LBB61_7642645; CHECK-RV32-NEXT: .LBB61_251: # %else9382646; CHECK-RV32-NEXT: slli a3, a2, 192647; CHECK-RV32-NEXT: bgez a3, .LBB61_2522648; CHECK-RV32-NEXT: j .LBB61_7652649; CHECK-RV32-NEXT: .LBB61_252: # %else9422650; CHECK-RV32-NEXT: slli a3, a2, 182651; CHECK-RV32-NEXT: bgez a3, .LBB61_2532652; CHECK-RV32-NEXT: j .LBB61_7662653; CHECK-RV32-NEXT: .LBB61_253: # %else9462654; CHECK-RV32-NEXT: slli a3, a2, 172655; CHECK-RV32-NEXT: bgez a3, .LBB61_2542656; CHECK-RV32-NEXT: j .LBB61_7672657; CHECK-RV32-NEXT: .LBB61_254: # %else9502658; CHECK-RV32-NEXT: slli a3, a2, 162659; CHECK-RV32-NEXT: bgez a3, .LBB61_2552660; CHECK-RV32-NEXT: j .LBB61_7682661; CHECK-RV32-NEXT: .LBB61_255: # %else9542662; CHECK-RV32-NEXT: slli a3, a2, 152663; CHECK-RV32-NEXT: bgez a3, .LBB61_2562664; CHECK-RV32-NEXT: j .LBB61_7692665; CHECK-RV32-NEXT: .LBB61_256: # %else9582666; CHECK-RV32-NEXT: slli a3, a2, 142667; CHECK-RV32-NEXT: bgez a3, .LBB61_2572668; CHECK-RV32-NEXT: j .LBB61_7702669; CHECK-RV32-NEXT: .LBB61_257: # %else9622670; CHECK-RV32-NEXT: slli a3, a2, 132671; CHECK-RV32-NEXT: bgez a3, .LBB61_2582672; CHECK-RV32-NEXT: j .LBB61_7712673; CHECK-RV32-NEXT: .LBB61_258: # %else9662674; CHECK-RV32-NEXT: slli a3, a2, 122675; CHECK-RV32-NEXT: bgez a3, .LBB61_2592676; CHECK-RV32-NEXT: j .LBB61_7722677; CHECK-RV32-NEXT: .LBB61_259: # %else9702678; CHECK-RV32-NEXT: slli a3, a2, 112679; CHECK-RV32-NEXT: bgez a3, .LBB61_2602680; CHECK-RV32-NEXT: j .LBB61_7732681; CHECK-RV32-NEXT: .LBB61_260: # %else9742682; CHECK-RV32-NEXT: slli a3, a2, 102683; CHECK-RV32-NEXT: bgez a3, .LBB61_2612684; CHECK-RV32-NEXT: j .LBB61_7742685; CHECK-RV32-NEXT: .LBB61_261: # %else9782686; CHECK-RV32-NEXT: slli a3, a2, 92687; CHECK-RV32-NEXT: bgez a3, .LBB61_2622688; CHECK-RV32-NEXT: j .LBB61_7752689; CHECK-RV32-NEXT: .LBB61_262: # %else9822690; CHECK-RV32-NEXT: slli a3, a2, 82691; CHECK-RV32-NEXT: bgez a3, .LBB61_2632692; CHECK-RV32-NEXT: j .LBB61_7762693; CHECK-RV32-NEXT: .LBB61_263: # %else9862694; CHECK-RV32-NEXT: slli a3, a2, 72695; CHECK-RV32-NEXT: bgez a3, .LBB61_2642696; CHECK-RV32-NEXT: j .LBB61_7772697; CHECK-RV32-NEXT: .LBB61_264: # %else9902698; CHECK-RV32-NEXT: slli a3, a2, 62699; CHECK-RV32-NEXT: bgez a3, .LBB61_2652700; CHECK-RV32-NEXT: j .LBB61_7782701; CHECK-RV32-NEXT: .LBB61_265: # %else9942702; CHECK-RV32-NEXT: slli a3, a2, 52703; CHECK-RV32-NEXT: bgez a3, .LBB61_2662704; CHECK-RV32-NEXT: j .LBB61_7792705; CHECK-RV32-NEXT: .LBB61_266: # %else9982706; CHECK-RV32-NEXT: slli a3, a2, 42707; CHECK-RV32-NEXT: bgez a3, .LBB61_2672708; CHECK-RV32-NEXT: j .LBB61_7802709; CHECK-RV32-NEXT: .LBB61_267: # %else10022710; CHECK-RV32-NEXT: slli a3, a2, 32711; CHECK-RV32-NEXT: bgez a3, .LBB61_2682712; CHECK-RV32-NEXT: j .LBB61_7812713; CHECK-RV32-NEXT: .LBB61_268: # %else10062714; CHECK-RV32-NEXT: slli a3, a2, 22715; CHECK-RV32-NEXT: bgez a3, .LBB61_2702716; CHECK-RV32-NEXT: .LBB61_269: # %cond.load10092717; CHECK-RV32-NEXT: lbu a3, 0(a0)2718; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma2719; CHECK-RV32-NEXT: vmv8r.v v16, v82720; CHECK-RV32-NEXT: vmv.s.x v12, a32721; CHECK-RV32-NEXT: li a3, 2542722; CHECK-RV32-NEXT: li a4, 2532723; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma2724; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42725; CHECK-RV32-NEXT: addi a0, a0, 12726; CHECK-RV32-NEXT: vmv4r.v v16, v82727; CHECK-RV32-NEXT: vmv8r.v v8, v162728; CHECK-RV32-NEXT: .LBB61_270: # %else10102729; CHECK-RV32-NEXT: slli a3, a2, 12730; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2731; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 42732; CHECK-RV32-NEXT: bgez a3, .LBB61_2722733; CHECK-RV32-NEXT: # %bb.271: # %cond.load10132734; CHECK-RV32-NEXT: lbu a3, 0(a0)2735; CHECK-RV32-NEXT: vmv8r.v v16, v82736; CHECK-RV32-NEXT: vmv.s.x v12, a32737; CHECK-RV32-NEXT: li a3, 2552738; CHECK-RV32-NEXT: li a4, 2542739; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma2740; CHECK-RV32-NEXT: vslideup.vx v8, v12, a42741; CHECK-RV32-NEXT: addi a0, a0, 12742; CHECK-RV32-NEXT: vmv4r.v v16, v82743; CHECK-RV32-NEXT: vmv8r.v v8, v162744; CHECK-RV32-NEXT: .LBB61_272: # %else10142745; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2746; CHECK-RV32-NEXT: vmv.x.s a3, v242747; CHECK-RV32-NEXT: bgez a2, .LBB61_2732748; CHECK-RV32-NEXT: j .LBB61_7822749; CHECK-RV32-NEXT: .LBB61_273: # %else10182750; CHECK-RV32-NEXT: andi a2, a3, 12751; CHECK-RV32-NEXT: beqz a2, .LBB61_2742752; CHECK-RV32-NEXT: j .LBB61_7832753; CHECK-RV32-NEXT: .LBB61_274: # %else10222754; CHECK-RV32-NEXT: andi a2, a3, 22755; CHECK-RV32-NEXT: beqz a2, .LBB61_2752756; CHECK-RV32-NEXT: j .LBB61_7842757; CHECK-RV32-NEXT: .LBB61_275: # %else10262758; CHECK-RV32-NEXT: andi a2, a3, 42759; CHECK-RV32-NEXT: beqz a2, .LBB61_2762760; CHECK-RV32-NEXT: j .LBB61_7852761; CHECK-RV32-NEXT: .LBB61_276: # %else10302762; CHECK-RV32-NEXT: andi a2, a3, 82763; CHECK-RV32-NEXT: beqz a2, .LBB61_2772764; CHECK-RV32-NEXT: j .LBB61_7862765; CHECK-RV32-NEXT: .LBB61_277: # %else10342766; CHECK-RV32-NEXT: andi a2, a3, 162767; CHECK-RV32-NEXT: beqz a2, .LBB61_2782768; CHECK-RV32-NEXT: j .LBB61_7872769; CHECK-RV32-NEXT: .LBB61_278: # %else10382770; CHECK-RV32-NEXT: andi a2, a3, 322771; CHECK-RV32-NEXT: beqz a2, .LBB61_2792772; CHECK-RV32-NEXT: j .LBB61_7882773; CHECK-RV32-NEXT: .LBB61_279: # %else10422774; CHECK-RV32-NEXT: andi a2, a3, 642775; CHECK-RV32-NEXT: beqz a2, .LBB61_2802776; CHECK-RV32-NEXT: j .LBB61_7892777; CHECK-RV32-NEXT: .LBB61_280: # %else10462778; CHECK-RV32-NEXT: andi a2, a3, 1282779; CHECK-RV32-NEXT: beqz a2, .LBB61_2812780; CHECK-RV32-NEXT: j .LBB61_7902781; CHECK-RV32-NEXT: .LBB61_281: # %else10502782; CHECK-RV32-NEXT: andi a2, a3, 2562783; CHECK-RV32-NEXT: beqz a2, .LBB61_2822784; CHECK-RV32-NEXT: j .LBB61_7912785; CHECK-RV32-NEXT: .LBB61_282: # %else10542786; CHECK-RV32-NEXT: andi a2, a3, 5122787; CHECK-RV32-NEXT: beqz a2, .LBB61_2832788; CHECK-RV32-NEXT: j .LBB61_7922789; CHECK-RV32-NEXT: .LBB61_283: # %else10582790; CHECK-RV32-NEXT: andi a2, a3, 10242791; CHECK-RV32-NEXT: beqz a2, .LBB61_2842792; CHECK-RV32-NEXT: j .LBB61_7932793; CHECK-RV32-NEXT: .LBB61_284: # %else10622794; CHECK-RV32-NEXT: slli a2, a3, 202795; CHECK-RV32-NEXT: bgez a2, .LBB61_2852796; CHECK-RV32-NEXT: j .LBB61_7942797; CHECK-RV32-NEXT: .LBB61_285: # %else10662798; CHECK-RV32-NEXT: slli a2, a3, 192799; CHECK-RV32-NEXT: bgez a2, .LBB61_2862800; CHECK-RV32-NEXT: j .LBB61_7952801; CHECK-RV32-NEXT: .LBB61_286: # %else10702802; CHECK-RV32-NEXT: slli a2, a3, 182803; CHECK-RV32-NEXT: bgez a2, .LBB61_2872804; CHECK-RV32-NEXT: j .LBB61_7962805; CHECK-RV32-NEXT: .LBB61_287: # %else10742806; CHECK-RV32-NEXT: slli a2, a3, 172807; CHECK-RV32-NEXT: bgez a2, .LBB61_2882808; CHECK-RV32-NEXT: j .LBB61_7972809; CHECK-RV32-NEXT: .LBB61_288: # %else10782810; CHECK-RV32-NEXT: slli a2, a3, 162811; CHECK-RV32-NEXT: bgez a2, .LBB61_2892812; CHECK-RV32-NEXT: j .LBB61_7982813; CHECK-RV32-NEXT: .LBB61_289: # %else10822814; CHECK-RV32-NEXT: slli a2, a3, 152815; CHECK-RV32-NEXT: bgez a2, .LBB61_2902816; CHECK-RV32-NEXT: j .LBB61_7992817; CHECK-RV32-NEXT: .LBB61_290: # %else10862818; CHECK-RV32-NEXT: slli a2, a3, 142819; CHECK-RV32-NEXT: bgez a2, .LBB61_2912820; CHECK-RV32-NEXT: j .LBB61_8002821; CHECK-RV32-NEXT: .LBB61_291: # %else10902822; CHECK-RV32-NEXT: slli a2, a3, 132823; CHECK-RV32-NEXT: bgez a2, .LBB61_2922824; CHECK-RV32-NEXT: j .LBB61_8012825; CHECK-RV32-NEXT: .LBB61_292: # %else10942826; CHECK-RV32-NEXT: slli a2, a3, 122827; CHECK-RV32-NEXT: bgez a2, .LBB61_2932828; CHECK-RV32-NEXT: j .LBB61_8022829; CHECK-RV32-NEXT: .LBB61_293: # %else10982830; CHECK-RV32-NEXT: slli a2, a3, 112831; CHECK-RV32-NEXT: bgez a2, .LBB61_2942832; CHECK-RV32-NEXT: j .LBB61_8032833; CHECK-RV32-NEXT: .LBB61_294: # %else11022834; CHECK-RV32-NEXT: slli a2, a3, 102835; CHECK-RV32-NEXT: bgez a2, .LBB61_2952836; CHECK-RV32-NEXT: j .LBB61_8042837; CHECK-RV32-NEXT: .LBB61_295: # %else11062838; CHECK-RV32-NEXT: slli a2, a3, 92839; CHECK-RV32-NEXT: bgez a2, .LBB61_2962840; CHECK-RV32-NEXT: j .LBB61_8052841; CHECK-RV32-NEXT: .LBB61_296: # %else11102842; CHECK-RV32-NEXT: slli a2, a3, 82843; CHECK-RV32-NEXT: bgez a2, .LBB61_2972844; CHECK-RV32-NEXT: j .LBB61_8062845; CHECK-RV32-NEXT: .LBB61_297: # %else11142846; CHECK-RV32-NEXT: slli a2, a3, 72847; CHECK-RV32-NEXT: bgez a2, .LBB61_2982848; CHECK-RV32-NEXT: j .LBB61_8072849; CHECK-RV32-NEXT: .LBB61_298: # %else11182850; CHECK-RV32-NEXT: slli a2, a3, 62851; CHECK-RV32-NEXT: bgez a2, .LBB61_2992852; CHECK-RV32-NEXT: j .LBB61_8082853; CHECK-RV32-NEXT: .LBB61_299: # %else11222854; CHECK-RV32-NEXT: slli a2, a3, 52855; CHECK-RV32-NEXT: bgez a2, .LBB61_3002856; CHECK-RV32-NEXT: j .LBB61_8092857; CHECK-RV32-NEXT: .LBB61_300: # %else11262858; CHECK-RV32-NEXT: slli a2, a3, 42859; CHECK-RV32-NEXT: bgez a2, .LBB61_3012860; CHECK-RV32-NEXT: j .LBB61_8102861; CHECK-RV32-NEXT: .LBB61_301: # %else11302862; CHECK-RV32-NEXT: slli a2, a3, 32863; CHECK-RV32-NEXT: bgez a2, .LBB61_3022864; CHECK-RV32-NEXT: j .LBB61_8112865; CHECK-RV32-NEXT: .LBB61_302: # %else11342866; CHECK-RV32-NEXT: slli a2, a3, 22867; CHECK-RV32-NEXT: bgez a2, .LBB61_3042868; CHECK-RV32-NEXT: .LBB61_303: # %cond.load11372869; CHECK-RV32-NEXT: lbu a2, 0(a0)2870; CHECK-RV32-NEXT: li a4, 5122871; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma2872; CHECK-RV32-NEXT: vmv.s.x v16, a22873; CHECK-RV32-NEXT: li a2, 2862874; CHECK-RV32-NEXT: li a4, 2852875; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma2876; CHECK-RV32-NEXT: vslideup.vx v8, v16, a42877; CHECK-RV32-NEXT: addi a0, a0, 12878; CHECK-RV32-NEXT: .LBB61_304: # %else11382879; CHECK-RV32-NEXT: slli a2, a3, 12880; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2881; CHECK-RV32-NEXT: vsrl.vx v24, v24, a12882; CHECK-RV32-NEXT: bgez a2, .LBB61_3062883; CHECK-RV32-NEXT: # %bb.305: # %cond.load11412884; CHECK-RV32-NEXT: lbu a2, 0(a0)2885; CHECK-RV32-NEXT: vmv.s.x v16, a22886; CHECK-RV32-NEXT: li a2, 2872887; CHECK-RV32-NEXT: li a4, 2862888; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma2889; CHECK-RV32-NEXT: vslideup.vx v8, v16, a42890; CHECK-RV32-NEXT: addi a0, a0, 12891; CHECK-RV32-NEXT: .LBB61_306: # %else11422892; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma2893; CHECK-RV32-NEXT: vmv.x.s a2, v242894; CHECK-RV32-NEXT: bgez a3, .LBB61_3072895; CHECK-RV32-NEXT: j .LBB61_8122896; CHECK-RV32-NEXT: .LBB61_307: # %else11462897; CHECK-RV32-NEXT: andi a3, a2, 12898; CHECK-RV32-NEXT: beqz a3, .LBB61_3082899; CHECK-RV32-NEXT: j .LBB61_8132900; CHECK-RV32-NEXT: .LBB61_308: # %else11502901; CHECK-RV32-NEXT: andi a3, a2, 22902; CHECK-RV32-NEXT: beqz a3, .LBB61_3092903; CHECK-RV32-NEXT: j .LBB61_8142904; CHECK-RV32-NEXT: .LBB61_309: # %else11542905; CHECK-RV32-NEXT: andi a3, a2, 42906; CHECK-RV32-NEXT: beqz a3, .LBB61_3102907; CHECK-RV32-NEXT: j .LBB61_8152908; CHECK-RV32-NEXT: .LBB61_310: # %else11582909; CHECK-RV32-NEXT: andi a3, a2, 82910; CHECK-RV32-NEXT: beqz a3, .LBB61_3112911; CHECK-RV32-NEXT: j .LBB61_8162912; CHECK-RV32-NEXT: .LBB61_311: # %else11622913; CHECK-RV32-NEXT: andi a3, a2, 162914; CHECK-RV32-NEXT: beqz a3, .LBB61_3122915; CHECK-RV32-NEXT: j .LBB61_8172916; CHECK-RV32-NEXT: .LBB61_312: # %else11662917; CHECK-RV32-NEXT: andi a3, a2, 322918; CHECK-RV32-NEXT: beqz a3, .LBB61_3132919; CHECK-RV32-NEXT: j .LBB61_8182920; CHECK-RV32-NEXT: .LBB61_313: # %else11702921; CHECK-RV32-NEXT: andi a3, a2, 642922; CHECK-RV32-NEXT: beqz a3, .LBB61_3142923; CHECK-RV32-NEXT: j .LBB61_8192924; CHECK-RV32-NEXT: .LBB61_314: # %else11742925; CHECK-RV32-NEXT: andi a3, a2, 1282926; CHECK-RV32-NEXT: beqz a3, .LBB61_3152927; CHECK-RV32-NEXT: j .LBB61_8202928; CHECK-RV32-NEXT: .LBB61_315: # %else11782929; CHECK-RV32-NEXT: andi a3, a2, 2562930; CHECK-RV32-NEXT: beqz a3, .LBB61_3162931; CHECK-RV32-NEXT: j .LBB61_8212932; CHECK-RV32-NEXT: .LBB61_316: # %else11822933; CHECK-RV32-NEXT: andi a3, a2, 5122934; CHECK-RV32-NEXT: beqz a3, .LBB61_3172935; CHECK-RV32-NEXT: j .LBB61_8222936; CHECK-RV32-NEXT: .LBB61_317: # %else11862937; CHECK-RV32-NEXT: andi a3, a2, 10242938; CHECK-RV32-NEXT: beqz a3, .LBB61_3182939; CHECK-RV32-NEXT: j .LBB61_8232940; CHECK-RV32-NEXT: .LBB61_318: # %else11902941; CHECK-RV32-NEXT: slli a3, a2, 202942; CHECK-RV32-NEXT: bgez a3, .LBB61_3192943; CHECK-RV32-NEXT: j .LBB61_8242944; CHECK-RV32-NEXT: .LBB61_319: # %else11942945; CHECK-RV32-NEXT: slli a3, a2, 192946; CHECK-RV32-NEXT: bgez a3, .LBB61_3202947; CHECK-RV32-NEXT: j .LBB61_8252948; CHECK-RV32-NEXT: .LBB61_320: # %else11982949; CHECK-RV32-NEXT: slli a3, a2, 182950; CHECK-RV32-NEXT: bgez a3, .LBB61_3212951; CHECK-RV32-NEXT: j .LBB61_8262952; CHECK-RV32-NEXT: .LBB61_321: # %else12022953; CHECK-RV32-NEXT: slli a3, a2, 172954; CHECK-RV32-NEXT: bgez a3, .LBB61_3222955; CHECK-RV32-NEXT: j .LBB61_8272956; CHECK-RV32-NEXT: .LBB61_322: # %else12062957; CHECK-RV32-NEXT: slli a3, a2, 162958; CHECK-RV32-NEXT: bgez a3, .LBB61_3232959; CHECK-RV32-NEXT: j .LBB61_8282960; CHECK-RV32-NEXT: .LBB61_323: # %else12102961; CHECK-RV32-NEXT: slli a3, a2, 152962; CHECK-RV32-NEXT: bgez a3, .LBB61_3242963; CHECK-RV32-NEXT: j .LBB61_8292964; CHECK-RV32-NEXT: .LBB61_324: # %else12142965; CHECK-RV32-NEXT: slli a3, a2, 142966; CHECK-RV32-NEXT: bgez a3, .LBB61_3252967; CHECK-RV32-NEXT: j .LBB61_8302968; CHECK-RV32-NEXT: .LBB61_325: # %else12182969; CHECK-RV32-NEXT: slli a3, a2, 132970; CHECK-RV32-NEXT: bgez a3, .LBB61_3262971; CHECK-RV32-NEXT: j .LBB61_8312972; CHECK-RV32-NEXT: .LBB61_326: # %else12222973; CHECK-RV32-NEXT: slli a3, a2, 122974; CHECK-RV32-NEXT: bgez a3, .LBB61_3272975; CHECK-RV32-NEXT: j .LBB61_8322976; CHECK-RV32-NEXT: .LBB61_327: # %else12262977; CHECK-RV32-NEXT: slli a3, a2, 112978; CHECK-RV32-NEXT: bgez a3, .LBB61_3282979; CHECK-RV32-NEXT: j .LBB61_8332980; CHECK-RV32-NEXT: .LBB61_328: # %else12302981; CHECK-RV32-NEXT: slli a3, a2, 102982; CHECK-RV32-NEXT: bgez a3, .LBB61_3292983; CHECK-RV32-NEXT: j .LBB61_8342984; CHECK-RV32-NEXT: .LBB61_329: # %else12342985; CHECK-RV32-NEXT: slli a3, a2, 92986; CHECK-RV32-NEXT: bgez a3, .LBB61_3302987; CHECK-RV32-NEXT: j .LBB61_8352988; CHECK-RV32-NEXT: .LBB61_330: # %else12382989; CHECK-RV32-NEXT: slli a3, a2, 82990; CHECK-RV32-NEXT: bgez a3, .LBB61_3312991; CHECK-RV32-NEXT: j .LBB61_8362992; CHECK-RV32-NEXT: .LBB61_331: # %else12422993; CHECK-RV32-NEXT: slli a3, a2, 72994; CHECK-RV32-NEXT: bgez a3, .LBB61_3322995; CHECK-RV32-NEXT: j .LBB61_8372996; CHECK-RV32-NEXT: .LBB61_332: # %else12462997; CHECK-RV32-NEXT: slli a3, a2, 62998; CHECK-RV32-NEXT: bgez a3, .LBB61_3332999; CHECK-RV32-NEXT: j .LBB61_8383000; CHECK-RV32-NEXT: .LBB61_333: # %else12503001; CHECK-RV32-NEXT: slli a3, a2, 53002; CHECK-RV32-NEXT: bgez a3, .LBB61_3343003; CHECK-RV32-NEXT: j .LBB61_8393004; CHECK-RV32-NEXT: .LBB61_334: # %else12543005; CHECK-RV32-NEXT: slli a3, a2, 43006; CHECK-RV32-NEXT: bgez a3, .LBB61_3353007; CHECK-RV32-NEXT: j .LBB61_8403008; CHECK-RV32-NEXT: .LBB61_335: # %else12583009; CHECK-RV32-NEXT: slli a3, a2, 33010; CHECK-RV32-NEXT: bgez a3, .LBB61_3363011; CHECK-RV32-NEXT: j .LBB61_8413012; CHECK-RV32-NEXT: .LBB61_336: # %else12623013; CHECK-RV32-NEXT: slli a3, a2, 23014; CHECK-RV32-NEXT: bgez a3, .LBB61_3383015; CHECK-RV32-NEXT: .LBB61_337: # %cond.load12653016; CHECK-RV32-NEXT: lbu a3, 0(a0)3017; CHECK-RV32-NEXT: li a4, 5123018; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma3019; CHECK-RV32-NEXT: vmv.s.x v16, a33020; CHECK-RV32-NEXT: li a3, 3183021; CHECK-RV32-NEXT: li a4, 3173022; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma3023; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43024; CHECK-RV32-NEXT: addi a0, a0, 13025; CHECK-RV32-NEXT: .LBB61_338: # %else12663026; CHECK-RV32-NEXT: slli a3, a2, 13027; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3028; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 53029; CHECK-RV32-NEXT: bgez a3, .LBB61_3403030; CHECK-RV32-NEXT: # %bb.339: # %cond.load12693031; CHECK-RV32-NEXT: lbu a3, 0(a0)3032; CHECK-RV32-NEXT: vmv.s.x v16, a33033; CHECK-RV32-NEXT: li a3, 3193034; CHECK-RV32-NEXT: li a4, 3183035; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma3036; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43037; CHECK-RV32-NEXT: addi a0, a0, 13038; CHECK-RV32-NEXT: .LBB61_340: # %else12703039; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3040; CHECK-RV32-NEXT: vmv.x.s a3, v243041; CHECK-RV32-NEXT: bgez a2, .LBB61_3413042; CHECK-RV32-NEXT: j .LBB61_8423043; CHECK-RV32-NEXT: .LBB61_341: # %else12743044; CHECK-RV32-NEXT: andi a2, a3, 13045; CHECK-RV32-NEXT: beqz a2, .LBB61_3423046; CHECK-RV32-NEXT: j .LBB61_8433047; CHECK-RV32-NEXT: .LBB61_342: # %else12783048; CHECK-RV32-NEXT: andi a2, a3, 23049; CHECK-RV32-NEXT: beqz a2, .LBB61_3433050; CHECK-RV32-NEXT: j .LBB61_8443051; CHECK-RV32-NEXT: .LBB61_343: # %else12823052; CHECK-RV32-NEXT: andi a2, a3, 43053; CHECK-RV32-NEXT: beqz a2, .LBB61_3443054; CHECK-RV32-NEXT: j .LBB61_8453055; CHECK-RV32-NEXT: .LBB61_344: # %else12863056; CHECK-RV32-NEXT: andi a2, a3, 83057; CHECK-RV32-NEXT: beqz a2, .LBB61_3453058; CHECK-RV32-NEXT: j .LBB61_8463059; CHECK-RV32-NEXT: .LBB61_345: # %else12903060; CHECK-RV32-NEXT: andi a2, a3, 163061; CHECK-RV32-NEXT: beqz a2, .LBB61_3463062; CHECK-RV32-NEXT: j .LBB61_8473063; CHECK-RV32-NEXT: .LBB61_346: # %else12943064; CHECK-RV32-NEXT: andi a2, a3, 323065; CHECK-RV32-NEXT: beqz a2, .LBB61_3473066; CHECK-RV32-NEXT: j .LBB61_8483067; CHECK-RV32-NEXT: .LBB61_347: # %else12983068; CHECK-RV32-NEXT: andi a2, a3, 643069; CHECK-RV32-NEXT: beqz a2, .LBB61_3483070; CHECK-RV32-NEXT: j .LBB61_8493071; CHECK-RV32-NEXT: .LBB61_348: # %else13023072; CHECK-RV32-NEXT: andi a2, a3, 1283073; CHECK-RV32-NEXT: beqz a2, .LBB61_3493074; CHECK-RV32-NEXT: j .LBB61_8503075; CHECK-RV32-NEXT: .LBB61_349: # %else13063076; CHECK-RV32-NEXT: andi a2, a3, 2563077; CHECK-RV32-NEXT: beqz a2, .LBB61_3503078; CHECK-RV32-NEXT: j .LBB61_8513079; CHECK-RV32-NEXT: .LBB61_350: # %else13103080; CHECK-RV32-NEXT: andi a2, a3, 5123081; CHECK-RV32-NEXT: beqz a2, .LBB61_3513082; CHECK-RV32-NEXT: j .LBB61_8523083; CHECK-RV32-NEXT: .LBB61_351: # %else13143084; CHECK-RV32-NEXT: andi a2, a3, 10243085; CHECK-RV32-NEXT: beqz a2, .LBB61_3523086; CHECK-RV32-NEXT: j .LBB61_8533087; CHECK-RV32-NEXT: .LBB61_352: # %else13183088; CHECK-RV32-NEXT: slli a2, a3, 203089; CHECK-RV32-NEXT: bgez a2, .LBB61_3533090; CHECK-RV32-NEXT: j .LBB61_8543091; CHECK-RV32-NEXT: .LBB61_353: # %else13223092; CHECK-RV32-NEXT: slli a2, a3, 193093; CHECK-RV32-NEXT: bgez a2, .LBB61_3543094; CHECK-RV32-NEXT: j .LBB61_8553095; CHECK-RV32-NEXT: .LBB61_354: # %else13263096; CHECK-RV32-NEXT: slli a2, a3, 183097; CHECK-RV32-NEXT: bgez a2, .LBB61_3553098; CHECK-RV32-NEXT: j .LBB61_8563099; CHECK-RV32-NEXT: .LBB61_355: # %else13303100; CHECK-RV32-NEXT: slli a2, a3, 173101; CHECK-RV32-NEXT: bgez a2, .LBB61_3563102; CHECK-RV32-NEXT: j .LBB61_8573103; CHECK-RV32-NEXT: .LBB61_356: # %else13343104; CHECK-RV32-NEXT: slli a2, a3, 163105; CHECK-RV32-NEXT: bgez a2, .LBB61_3573106; CHECK-RV32-NEXT: j .LBB61_8583107; CHECK-RV32-NEXT: .LBB61_357: # %else13383108; CHECK-RV32-NEXT: slli a2, a3, 153109; CHECK-RV32-NEXT: bgez a2, .LBB61_3583110; CHECK-RV32-NEXT: j .LBB61_8593111; CHECK-RV32-NEXT: .LBB61_358: # %else13423112; CHECK-RV32-NEXT: slli a2, a3, 143113; CHECK-RV32-NEXT: bgez a2, .LBB61_3593114; CHECK-RV32-NEXT: j .LBB61_8603115; CHECK-RV32-NEXT: .LBB61_359: # %else13463116; CHECK-RV32-NEXT: slli a2, a3, 133117; CHECK-RV32-NEXT: bgez a2, .LBB61_3603118; CHECK-RV32-NEXT: j .LBB61_8613119; CHECK-RV32-NEXT: .LBB61_360: # %else13503120; CHECK-RV32-NEXT: slli a2, a3, 123121; CHECK-RV32-NEXT: bgez a2, .LBB61_3613122; CHECK-RV32-NEXT: j .LBB61_8623123; CHECK-RV32-NEXT: .LBB61_361: # %else13543124; CHECK-RV32-NEXT: slli a2, a3, 113125; CHECK-RV32-NEXT: bgez a2, .LBB61_3623126; CHECK-RV32-NEXT: j .LBB61_8633127; CHECK-RV32-NEXT: .LBB61_362: # %else13583128; CHECK-RV32-NEXT: slli a2, a3, 103129; CHECK-RV32-NEXT: bgez a2, .LBB61_3633130; CHECK-RV32-NEXT: j .LBB61_8643131; CHECK-RV32-NEXT: .LBB61_363: # %else13623132; CHECK-RV32-NEXT: slli a2, a3, 93133; CHECK-RV32-NEXT: bgez a2, .LBB61_3643134; CHECK-RV32-NEXT: j .LBB61_8653135; CHECK-RV32-NEXT: .LBB61_364: # %else13663136; CHECK-RV32-NEXT: slli a2, a3, 83137; CHECK-RV32-NEXT: bgez a2, .LBB61_3653138; CHECK-RV32-NEXT: j .LBB61_8663139; CHECK-RV32-NEXT: .LBB61_365: # %else13703140; CHECK-RV32-NEXT: slli a2, a3, 73141; CHECK-RV32-NEXT: bgez a2, .LBB61_3663142; CHECK-RV32-NEXT: j .LBB61_8673143; CHECK-RV32-NEXT: .LBB61_366: # %else13743144; CHECK-RV32-NEXT: slli a2, a3, 63145; CHECK-RV32-NEXT: bgez a2, .LBB61_3673146; CHECK-RV32-NEXT: j .LBB61_8683147; CHECK-RV32-NEXT: .LBB61_367: # %else13783148; CHECK-RV32-NEXT: slli a2, a3, 53149; CHECK-RV32-NEXT: bgez a2, .LBB61_3683150; CHECK-RV32-NEXT: j .LBB61_8693151; CHECK-RV32-NEXT: .LBB61_368: # %else13823152; CHECK-RV32-NEXT: slli a2, a3, 43153; CHECK-RV32-NEXT: bgez a2, .LBB61_3693154; CHECK-RV32-NEXT: j .LBB61_8703155; CHECK-RV32-NEXT: .LBB61_369: # %else13863156; CHECK-RV32-NEXT: slli a2, a3, 33157; CHECK-RV32-NEXT: bgez a2, .LBB61_3703158; CHECK-RV32-NEXT: j .LBB61_8713159; CHECK-RV32-NEXT: .LBB61_370: # %else13903160; CHECK-RV32-NEXT: slli a2, a3, 23161; CHECK-RV32-NEXT: bgez a2, .LBB61_3723162; CHECK-RV32-NEXT: .LBB61_371: # %cond.load13933163; CHECK-RV32-NEXT: lbu a2, 0(a0)3164; CHECK-RV32-NEXT: li a4, 5123165; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma3166; CHECK-RV32-NEXT: vmv.s.x v16, a23167; CHECK-RV32-NEXT: li a2, 3503168; CHECK-RV32-NEXT: li a4, 3493169; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma3170; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43171; CHECK-RV32-NEXT: addi a0, a0, 13172; CHECK-RV32-NEXT: .LBB61_372: # %else13943173; CHECK-RV32-NEXT: slli a2, a3, 13174; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3175; CHECK-RV32-NEXT: vsrl.vx v24, v24, a13176; CHECK-RV32-NEXT: bgez a2, .LBB61_3743177; CHECK-RV32-NEXT: # %bb.373: # %cond.load13973178; CHECK-RV32-NEXT: lbu a2, 0(a0)3179; CHECK-RV32-NEXT: vmv.s.x v16, a23180; CHECK-RV32-NEXT: li a2, 3513181; CHECK-RV32-NEXT: li a4, 3503182; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma3183; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43184; CHECK-RV32-NEXT: addi a0, a0, 13185; CHECK-RV32-NEXT: .LBB61_374: # %else13983186; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3187; CHECK-RV32-NEXT: vmv.x.s a2, v243188; CHECK-RV32-NEXT: bgez a3, .LBB61_3753189; CHECK-RV32-NEXT: j .LBB61_8723190; CHECK-RV32-NEXT: .LBB61_375: # %else14023191; CHECK-RV32-NEXT: andi a3, a2, 13192; CHECK-RV32-NEXT: beqz a3, .LBB61_3763193; CHECK-RV32-NEXT: j .LBB61_8733194; CHECK-RV32-NEXT: .LBB61_376: # %else14063195; CHECK-RV32-NEXT: andi a3, a2, 23196; CHECK-RV32-NEXT: beqz a3, .LBB61_3773197; CHECK-RV32-NEXT: j .LBB61_8743198; CHECK-RV32-NEXT: .LBB61_377: # %else14103199; CHECK-RV32-NEXT: andi a3, a2, 43200; CHECK-RV32-NEXT: beqz a3, .LBB61_3783201; CHECK-RV32-NEXT: j .LBB61_8753202; CHECK-RV32-NEXT: .LBB61_378: # %else14143203; CHECK-RV32-NEXT: andi a3, a2, 83204; CHECK-RV32-NEXT: beqz a3, .LBB61_3793205; CHECK-RV32-NEXT: j .LBB61_8763206; CHECK-RV32-NEXT: .LBB61_379: # %else14183207; CHECK-RV32-NEXT: andi a3, a2, 163208; CHECK-RV32-NEXT: beqz a3, .LBB61_3803209; CHECK-RV32-NEXT: j .LBB61_8773210; CHECK-RV32-NEXT: .LBB61_380: # %else14223211; CHECK-RV32-NEXT: andi a3, a2, 323212; CHECK-RV32-NEXT: beqz a3, .LBB61_3813213; CHECK-RV32-NEXT: j .LBB61_8783214; CHECK-RV32-NEXT: .LBB61_381: # %else14263215; CHECK-RV32-NEXT: andi a3, a2, 643216; CHECK-RV32-NEXT: beqz a3, .LBB61_3823217; CHECK-RV32-NEXT: j .LBB61_8793218; CHECK-RV32-NEXT: .LBB61_382: # %else14303219; CHECK-RV32-NEXT: andi a3, a2, 1283220; CHECK-RV32-NEXT: beqz a3, .LBB61_3833221; CHECK-RV32-NEXT: j .LBB61_8803222; CHECK-RV32-NEXT: .LBB61_383: # %else14343223; CHECK-RV32-NEXT: andi a3, a2, 2563224; CHECK-RV32-NEXT: beqz a3, .LBB61_3843225; CHECK-RV32-NEXT: j .LBB61_8813226; CHECK-RV32-NEXT: .LBB61_384: # %else14383227; CHECK-RV32-NEXT: andi a3, a2, 5123228; CHECK-RV32-NEXT: beqz a3, .LBB61_3853229; CHECK-RV32-NEXT: j .LBB61_8823230; CHECK-RV32-NEXT: .LBB61_385: # %else14423231; CHECK-RV32-NEXT: andi a3, a2, 10243232; CHECK-RV32-NEXT: beqz a3, .LBB61_3863233; CHECK-RV32-NEXT: j .LBB61_8833234; CHECK-RV32-NEXT: .LBB61_386: # %else14463235; CHECK-RV32-NEXT: slli a3, a2, 203236; CHECK-RV32-NEXT: bgez a3, .LBB61_3873237; CHECK-RV32-NEXT: j .LBB61_8843238; CHECK-RV32-NEXT: .LBB61_387: # %else14503239; CHECK-RV32-NEXT: slli a3, a2, 193240; CHECK-RV32-NEXT: bgez a3, .LBB61_3883241; CHECK-RV32-NEXT: j .LBB61_8853242; CHECK-RV32-NEXT: .LBB61_388: # %else14543243; CHECK-RV32-NEXT: slli a3, a2, 183244; CHECK-RV32-NEXT: bgez a3, .LBB61_3893245; CHECK-RV32-NEXT: j .LBB61_8863246; CHECK-RV32-NEXT: .LBB61_389: # %else14583247; CHECK-RV32-NEXT: slli a3, a2, 173248; CHECK-RV32-NEXT: bgez a3, .LBB61_3903249; CHECK-RV32-NEXT: j .LBB61_8873250; CHECK-RV32-NEXT: .LBB61_390: # %else14623251; CHECK-RV32-NEXT: slli a3, a2, 163252; CHECK-RV32-NEXT: bgez a3, .LBB61_3913253; CHECK-RV32-NEXT: j .LBB61_8883254; CHECK-RV32-NEXT: .LBB61_391: # %else14663255; CHECK-RV32-NEXT: slli a3, a2, 153256; CHECK-RV32-NEXT: bgez a3, .LBB61_3923257; CHECK-RV32-NEXT: j .LBB61_8893258; CHECK-RV32-NEXT: .LBB61_392: # %else14703259; CHECK-RV32-NEXT: slli a3, a2, 143260; CHECK-RV32-NEXT: bgez a3, .LBB61_3933261; CHECK-RV32-NEXT: j .LBB61_8903262; CHECK-RV32-NEXT: .LBB61_393: # %else14743263; CHECK-RV32-NEXT: slli a3, a2, 133264; CHECK-RV32-NEXT: bgez a3, .LBB61_3943265; CHECK-RV32-NEXT: j .LBB61_8913266; CHECK-RV32-NEXT: .LBB61_394: # %else14783267; CHECK-RV32-NEXT: slli a3, a2, 123268; CHECK-RV32-NEXT: bgez a3, .LBB61_3953269; CHECK-RV32-NEXT: j .LBB61_8923270; CHECK-RV32-NEXT: .LBB61_395: # %else14823271; CHECK-RV32-NEXT: slli a3, a2, 113272; CHECK-RV32-NEXT: bgez a3, .LBB61_3963273; CHECK-RV32-NEXT: j .LBB61_8933274; CHECK-RV32-NEXT: .LBB61_396: # %else14863275; CHECK-RV32-NEXT: slli a3, a2, 103276; CHECK-RV32-NEXT: bgez a3, .LBB61_3973277; CHECK-RV32-NEXT: j .LBB61_8943278; CHECK-RV32-NEXT: .LBB61_397: # %else14903279; CHECK-RV32-NEXT: slli a3, a2, 93280; CHECK-RV32-NEXT: bgez a3, .LBB61_3983281; CHECK-RV32-NEXT: j .LBB61_8953282; CHECK-RV32-NEXT: .LBB61_398: # %else14943283; CHECK-RV32-NEXT: slli a3, a2, 83284; CHECK-RV32-NEXT: bgez a3, .LBB61_3993285; CHECK-RV32-NEXT: j .LBB61_8963286; CHECK-RV32-NEXT: .LBB61_399: # %else14983287; CHECK-RV32-NEXT: slli a3, a2, 73288; CHECK-RV32-NEXT: bgez a3, .LBB61_4003289; CHECK-RV32-NEXT: j .LBB61_8973290; CHECK-RV32-NEXT: .LBB61_400: # %else15023291; CHECK-RV32-NEXT: slli a3, a2, 63292; CHECK-RV32-NEXT: bgez a3, .LBB61_4013293; CHECK-RV32-NEXT: j .LBB61_8983294; CHECK-RV32-NEXT: .LBB61_401: # %else15063295; CHECK-RV32-NEXT: slli a3, a2, 53296; CHECK-RV32-NEXT: bgez a3, .LBB61_4023297; CHECK-RV32-NEXT: j .LBB61_8993298; CHECK-RV32-NEXT: .LBB61_402: # %else15103299; CHECK-RV32-NEXT: slli a3, a2, 43300; CHECK-RV32-NEXT: bgez a3, .LBB61_4033301; CHECK-RV32-NEXT: j .LBB61_9003302; CHECK-RV32-NEXT: .LBB61_403: # %else15143303; CHECK-RV32-NEXT: slli a3, a2, 33304; CHECK-RV32-NEXT: bgez a3, .LBB61_4043305; CHECK-RV32-NEXT: j .LBB61_9013306; CHECK-RV32-NEXT: .LBB61_404: # %else15183307; CHECK-RV32-NEXT: slli a3, a2, 23308; CHECK-RV32-NEXT: bgez a3, .LBB61_4063309; CHECK-RV32-NEXT: .LBB61_405: # %cond.load15213310; CHECK-RV32-NEXT: lbu a3, 0(a0)3311; CHECK-RV32-NEXT: li a4, 5123312; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma3313; CHECK-RV32-NEXT: vmv.s.x v16, a33314; CHECK-RV32-NEXT: li a3, 3823315; CHECK-RV32-NEXT: li a4, 3813316; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma3317; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43318; CHECK-RV32-NEXT: addi a0, a0, 13319; CHECK-RV32-NEXT: .LBB61_406: # %else15223320; CHECK-RV32-NEXT: slli a3, a2, 13321; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3322; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 63323; CHECK-RV32-NEXT: bgez a3, .LBB61_4083324; CHECK-RV32-NEXT: # %bb.407: # %cond.load15253325; CHECK-RV32-NEXT: lbu a3, 0(a0)3326; CHECK-RV32-NEXT: vmv.s.x v16, a33327; CHECK-RV32-NEXT: li a3, 3833328; CHECK-RV32-NEXT: li a4, 3823329; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma3330; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43331; CHECK-RV32-NEXT: addi a0, a0, 13332; CHECK-RV32-NEXT: .LBB61_408: # %else15263333; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3334; CHECK-RV32-NEXT: vmv.x.s a3, v243335; CHECK-RV32-NEXT: bgez a2, .LBB61_4093336; CHECK-RV32-NEXT: j .LBB61_9023337; CHECK-RV32-NEXT: .LBB61_409: # %else15303338; CHECK-RV32-NEXT: andi a2, a3, 13339; CHECK-RV32-NEXT: beqz a2, .LBB61_4103340; CHECK-RV32-NEXT: j .LBB61_9033341; CHECK-RV32-NEXT: .LBB61_410: # %else15343342; CHECK-RV32-NEXT: andi a2, a3, 23343; CHECK-RV32-NEXT: beqz a2, .LBB61_4113344; CHECK-RV32-NEXT: j .LBB61_9043345; CHECK-RV32-NEXT: .LBB61_411: # %else15383346; CHECK-RV32-NEXT: andi a2, a3, 43347; CHECK-RV32-NEXT: beqz a2, .LBB61_4123348; CHECK-RV32-NEXT: j .LBB61_9053349; CHECK-RV32-NEXT: .LBB61_412: # %else15423350; CHECK-RV32-NEXT: andi a2, a3, 83351; CHECK-RV32-NEXT: beqz a2, .LBB61_4133352; CHECK-RV32-NEXT: j .LBB61_9063353; CHECK-RV32-NEXT: .LBB61_413: # %else15463354; CHECK-RV32-NEXT: andi a2, a3, 163355; CHECK-RV32-NEXT: beqz a2, .LBB61_4143356; CHECK-RV32-NEXT: j .LBB61_9073357; CHECK-RV32-NEXT: .LBB61_414: # %else15503358; CHECK-RV32-NEXT: andi a2, a3, 323359; CHECK-RV32-NEXT: beqz a2, .LBB61_4153360; CHECK-RV32-NEXT: j .LBB61_9083361; CHECK-RV32-NEXT: .LBB61_415: # %else15543362; CHECK-RV32-NEXT: andi a2, a3, 643363; CHECK-RV32-NEXT: beqz a2, .LBB61_4163364; CHECK-RV32-NEXT: j .LBB61_9093365; CHECK-RV32-NEXT: .LBB61_416: # %else15583366; CHECK-RV32-NEXT: andi a2, a3, 1283367; CHECK-RV32-NEXT: beqz a2, .LBB61_4173368; CHECK-RV32-NEXT: j .LBB61_9103369; CHECK-RV32-NEXT: .LBB61_417: # %else15623370; CHECK-RV32-NEXT: andi a2, a3, 2563371; CHECK-RV32-NEXT: beqz a2, .LBB61_4183372; CHECK-RV32-NEXT: j .LBB61_9113373; CHECK-RV32-NEXT: .LBB61_418: # %else15663374; CHECK-RV32-NEXT: andi a2, a3, 5123375; CHECK-RV32-NEXT: beqz a2, .LBB61_4193376; CHECK-RV32-NEXT: j .LBB61_9123377; CHECK-RV32-NEXT: .LBB61_419: # %else15703378; CHECK-RV32-NEXT: andi a2, a3, 10243379; CHECK-RV32-NEXT: beqz a2, .LBB61_4203380; CHECK-RV32-NEXT: j .LBB61_9133381; CHECK-RV32-NEXT: .LBB61_420: # %else15743382; CHECK-RV32-NEXT: slli a2, a3, 203383; CHECK-RV32-NEXT: bgez a2, .LBB61_4213384; CHECK-RV32-NEXT: j .LBB61_9143385; CHECK-RV32-NEXT: .LBB61_421: # %else15783386; CHECK-RV32-NEXT: slli a2, a3, 193387; CHECK-RV32-NEXT: bgez a2, .LBB61_4223388; CHECK-RV32-NEXT: j .LBB61_9153389; CHECK-RV32-NEXT: .LBB61_422: # %else15823390; CHECK-RV32-NEXT: slli a2, a3, 183391; CHECK-RV32-NEXT: bgez a2, .LBB61_4233392; CHECK-RV32-NEXT: j .LBB61_9163393; CHECK-RV32-NEXT: .LBB61_423: # %else15863394; CHECK-RV32-NEXT: slli a2, a3, 173395; CHECK-RV32-NEXT: bgez a2, .LBB61_4243396; CHECK-RV32-NEXT: j .LBB61_9173397; CHECK-RV32-NEXT: .LBB61_424: # %else15903398; CHECK-RV32-NEXT: slli a2, a3, 163399; CHECK-RV32-NEXT: bgez a2, .LBB61_4253400; CHECK-RV32-NEXT: j .LBB61_9183401; CHECK-RV32-NEXT: .LBB61_425: # %else15943402; CHECK-RV32-NEXT: slli a2, a3, 153403; CHECK-RV32-NEXT: bgez a2, .LBB61_4263404; CHECK-RV32-NEXT: j .LBB61_9193405; CHECK-RV32-NEXT: .LBB61_426: # %else15983406; CHECK-RV32-NEXT: slli a2, a3, 143407; CHECK-RV32-NEXT: bgez a2, .LBB61_4273408; CHECK-RV32-NEXT: j .LBB61_9203409; CHECK-RV32-NEXT: .LBB61_427: # %else16023410; CHECK-RV32-NEXT: slli a2, a3, 133411; CHECK-RV32-NEXT: bgez a2, .LBB61_4283412; CHECK-RV32-NEXT: j .LBB61_9213413; CHECK-RV32-NEXT: .LBB61_428: # %else16063414; CHECK-RV32-NEXT: slli a2, a3, 123415; CHECK-RV32-NEXT: bgez a2, .LBB61_4293416; CHECK-RV32-NEXT: j .LBB61_9223417; CHECK-RV32-NEXT: .LBB61_429: # %else16103418; CHECK-RV32-NEXT: slli a2, a3, 113419; CHECK-RV32-NEXT: bgez a2, .LBB61_4303420; CHECK-RV32-NEXT: j .LBB61_9233421; CHECK-RV32-NEXT: .LBB61_430: # %else16143422; CHECK-RV32-NEXT: slli a2, a3, 103423; CHECK-RV32-NEXT: bgez a2, .LBB61_4313424; CHECK-RV32-NEXT: j .LBB61_9243425; CHECK-RV32-NEXT: .LBB61_431: # %else16183426; CHECK-RV32-NEXT: slli a2, a3, 93427; CHECK-RV32-NEXT: bgez a2, .LBB61_4323428; CHECK-RV32-NEXT: j .LBB61_9253429; CHECK-RV32-NEXT: .LBB61_432: # %else16223430; CHECK-RV32-NEXT: slli a2, a3, 83431; CHECK-RV32-NEXT: bgez a2, .LBB61_4333432; CHECK-RV32-NEXT: j .LBB61_9263433; CHECK-RV32-NEXT: .LBB61_433: # %else16263434; CHECK-RV32-NEXT: slli a2, a3, 73435; CHECK-RV32-NEXT: bgez a2, .LBB61_4343436; CHECK-RV32-NEXT: j .LBB61_9273437; CHECK-RV32-NEXT: .LBB61_434: # %else16303438; CHECK-RV32-NEXT: slli a2, a3, 63439; CHECK-RV32-NEXT: bgez a2, .LBB61_4353440; CHECK-RV32-NEXT: j .LBB61_9283441; CHECK-RV32-NEXT: .LBB61_435: # %else16343442; CHECK-RV32-NEXT: slli a2, a3, 53443; CHECK-RV32-NEXT: bgez a2, .LBB61_4363444; CHECK-RV32-NEXT: j .LBB61_9293445; CHECK-RV32-NEXT: .LBB61_436: # %else16383446; CHECK-RV32-NEXT: slli a2, a3, 43447; CHECK-RV32-NEXT: bgez a2, .LBB61_4373448; CHECK-RV32-NEXT: j .LBB61_9303449; CHECK-RV32-NEXT: .LBB61_437: # %else16423450; CHECK-RV32-NEXT: slli a2, a3, 33451; CHECK-RV32-NEXT: bgez a2, .LBB61_4383452; CHECK-RV32-NEXT: j .LBB61_9313453; CHECK-RV32-NEXT: .LBB61_438: # %else16463454; CHECK-RV32-NEXT: slli a2, a3, 23455; CHECK-RV32-NEXT: bgez a2, .LBB61_4403456; CHECK-RV32-NEXT: .LBB61_439: # %cond.load16493457; CHECK-RV32-NEXT: lbu a2, 0(a0)3458; CHECK-RV32-NEXT: li a4, 5123459; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma3460; CHECK-RV32-NEXT: vmv.s.x v16, a23461; CHECK-RV32-NEXT: li a2, 4143462; CHECK-RV32-NEXT: li a4, 4133463; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma3464; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43465; CHECK-RV32-NEXT: addi a0, a0, 13466; CHECK-RV32-NEXT: .LBB61_440: # %else16503467; CHECK-RV32-NEXT: slli a2, a3, 13468; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3469; CHECK-RV32-NEXT: vsrl.vx v24, v24, a13470; CHECK-RV32-NEXT: bgez a2, .LBB61_4423471; CHECK-RV32-NEXT: # %bb.441: # %cond.load16533472; CHECK-RV32-NEXT: lbu a2, 0(a0)3473; CHECK-RV32-NEXT: vmv.s.x v16, a23474; CHECK-RV32-NEXT: li a2, 4153475; CHECK-RV32-NEXT: li a4, 4143476; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma3477; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43478; CHECK-RV32-NEXT: addi a0, a0, 13479; CHECK-RV32-NEXT: .LBB61_442: # %else16543480; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3481; CHECK-RV32-NEXT: vmv.x.s a2, v243482; CHECK-RV32-NEXT: bgez a3, .LBB61_4433483; CHECK-RV32-NEXT: j .LBB61_9323484; CHECK-RV32-NEXT: .LBB61_443: # %else16583485; CHECK-RV32-NEXT: andi a3, a2, 13486; CHECK-RV32-NEXT: beqz a3, .LBB61_4443487; CHECK-RV32-NEXT: j .LBB61_9333488; CHECK-RV32-NEXT: .LBB61_444: # %else16623489; CHECK-RV32-NEXT: andi a3, a2, 23490; CHECK-RV32-NEXT: beqz a3, .LBB61_4453491; CHECK-RV32-NEXT: j .LBB61_9343492; CHECK-RV32-NEXT: .LBB61_445: # %else16663493; CHECK-RV32-NEXT: andi a3, a2, 43494; CHECK-RV32-NEXT: beqz a3, .LBB61_4463495; CHECK-RV32-NEXT: j .LBB61_9353496; CHECK-RV32-NEXT: .LBB61_446: # %else16703497; CHECK-RV32-NEXT: andi a3, a2, 83498; CHECK-RV32-NEXT: beqz a3, .LBB61_4473499; CHECK-RV32-NEXT: j .LBB61_9363500; CHECK-RV32-NEXT: .LBB61_447: # %else16743501; CHECK-RV32-NEXT: andi a3, a2, 163502; CHECK-RV32-NEXT: beqz a3, .LBB61_4483503; CHECK-RV32-NEXT: j .LBB61_9373504; CHECK-RV32-NEXT: .LBB61_448: # %else16783505; CHECK-RV32-NEXT: andi a3, a2, 323506; CHECK-RV32-NEXT: beqz a3, .LBB61_4493507; CHECK-RV32-NEXT: j .LBB61_9383508; CHECK-RV32-NEXT: .LBB61_449: # %else16823509; CHECK-RV32-NEXT: andi a3, a2, 643510; CHECK-RV32-NEXT: beqz a3, .LBB61_4503511; CHECK-RV32-NEXT: j .LBB61_9393512; CHECK-RV32-NEXT: .LBB61_450: # %else16863513; CHECK-RV32-NEXT: andi a3, a2, 1283514; CHECK-RV32-NEXT: beqz a3, .LBB61_4513515; CHECK-RV32-NEXT: j .LBB61_9403516; CHECK-RV32-NEXT: .LBB61_451: # %else16903517; CHECK-RV32-NEXT: andi a3, a2, 2563518; CHECK-RV32-NEXT: beqz a3, .LBB61_4523519; CHECK-RV32-NEXT: j .LBB61_9413520; CHECK-RV32-NEXT: .LBB61_452: # %else16943521; CHECK-RV32-NEXT: andi a3, a2, 5123522; CHECK-RV32-NEXT: beqz a3, .LBB61_4533523; CHECK-RV32-NEXT: j .LBB61_9423524; CHECK-RV32-NEXT: .LBB61_453: # %else16983525; CHECK-RV32-NEXT: andi a3, a2, 10243526; CHECK-RV32-NEXT: beqz a3, .LBB61_4543527; CHECK-RV32-NEXT: j .LBB61_9433528; CHECK-RV32-NEXT: .LBB61_454: # %else17023529; CHECK-RV32-NEXT: slli a3, a2, 203530; CHECK-RV32-NEXT: bgez a3, .LBB61_4553531; CHECK-RV32-NEXT: j .LBB61_9443532; CHECK-RV32-NEXT: .LBB61_455: # %else17063533; CHECK-RV32-NEXT: slli a3, a2, 193534; CHECK-RV32-NEXT: bgez a3, .LBB61_4563535; CHECK-RV32-NEXT: j .LBB61_9453536; CHECK-RV32-NEXT: .LBB61_456: # %else17103537; CHECK-RV32-NEXT: slli a3, a2, 183538; CHECK-RV32-NEXT: bgez a3, .LBB61_4573539; CHECK-RV32-NEXT: j .LBB61_9463540; CHECK-RV32-NEXT: .LBB61_457: # %else17143541; CHECK-RV32-NEXT: slli a3, a2, 173542; CHECK-RV32-NEXT: bgez a3, .LBB61_4583543; CHECK-RV32-NEXT: j .LBB61_9473544; CHECK-RV32-NEXT: .LBB61_458: # %else17183545; CHECK-RV32-NEXT: slli a3, a2, 163546; CHECK-RV32-NEXT: bgez a3, .LBB61_4593547; CHECK-RV32-NEXT: j .LBB61_9483548; CHECK-RV32-NEXT: .LBB61_459: # %else17223549; CHECK-RV32-NEXT: slli a3, a2, 153550; CHECK-RV32-NEXT: bgez a3, .LBB61_4603551; CHECK-RV32-NEXT: j .LBB61_9493552; CHECK-RV32-NEXT: .LBB61_460: # %else17263553; CHECK-RV32-NEXT: slli a3, a2, 143554; CHECK-RV32-NEXT: bgez a3, .LBB61_4613555; CHECK-RV32-NEXT: j .LBB61_9503556; CHECK-RV32-NEXT: .LBB61_461: # %else17303557; CHECK-RV32-NEXT: slli a3, a2, 133558; CHECK-RV32-NEXT: bgez a3, .LBB61_4623559; CHECK-RV32-NEXT: j .LBB61_9513560; CHECK-RV32-NEXT: .LBB61_462: # %else17343561; CHECK-RV32-NEXT: slli a3, a2, 123562; CHECK-RV32-NEXT: bgez a3, .LBB61_4633563; CHECK-RV32-NEXT: j .LBB61_9523564; CHECK-RV32-NEXT: .LBB61_463: # %else17383565; CHECK-RV32-NEXT: slli a3, a2, 113566; CHECK-RV32-NEXT: bgez a3, .LBB61_4643567; CHECK-RV32-NEXT: j .LBB61_9533568; CHECK-RV32-NEXT: .LBB61_464: # %else17423569; CHECK-RV32-NEXT: slli a3, a2, 103570; CHECK-RV32-NEXT: bgez a3, .LBB61_4653571; CHECK-RV32-NEXT: j .LBB61_9543572; CHECK-RV32-NEXT: .LBB61_465: # %else17463573; CHECK-RV32-NEXT: slli a3, a2, 93574; CHECK-RV32-NEXT: bgez a3, .LBB61_4663575; CHECK-RV32-NEXT: j .LBB61_9553576; CHECK-RV32-NEXT: .LBB61_466: # %else17503577; CHECK-RV32-NEXT: slli a3, a2, 83578; CHECK-RV32-NEXT: bgez a3, .LBB61_4673579; CHECK-RV32-NEXT: j .LBB61_9563580; CHECK-RV32-NEXT: .LBB61_467: # %else17543581; CHECK-RV32-NEXT: slli a3, a2, 73582; CHECK-RV32-NEXT: bgez a3, .LBB61_4683583; CHECK-RV32-NEXT: j .LBB61_9573584; CHECK-RV32-NEXT: .LBB61_468: # %else17583585; CHECK-RV32-NEXT: slli a3, a2, 63586; CHECK-RV32-NEXT: bgez a3, .LBB61_4693587; CHECK-RV32-NEXT: j .LBB61_9583588; CHECK-RV32-NEXT: .LBB61_469: # %else17623589; CHECK-RV32-NEXT: slli a3, a2, 53590; CHECK-RV32-NEXT: bgez a3, .LBB61_4703591; CHECK-RV32-NEXT: j .LBB61_9593592; CHECK-RV32-NEXT: .LBB61_470: # %else17663593; CHECK-RV32-NEXT: slli a3, a2, 43594; CHECK-RV32-NEXT: bgez a3, .LBB61_4713595; CHECK-RV32-NEXT: j .LBB61_9603596; CHECK-RV32-NEXT: .LBB61_471: # %else17703597; CHECK-RV32-NEXT: slli a3, a2, 33598; CHECK-RV32-NEXT: bgez a3, .LBB61_4723599; CHECK-RV32-NEXT: j .LBB61_9613600; CHECK-RV32-NEXT: .LBB61_472: # %else17743601; CHECK-RV32-NEXT: slli a3, a2, 23602; CHECK-RV32-NEXT: bgez a3, .LBB61_4743603; CHECK-RV32-NEXT: .LBB61_473: # %cond.load17773604; CHECK-RV32-NEXT: lbu a3, 0(a0)3605; CHECK-RV32-NEXT: li a4, 5123606; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma3607; CHECK-RV32-NEXT: vmv.s.x v16, a33608; CHECK-RV32-NEXT: li a3, 4463609; CHECK-RV32-NEXT: li a4, 4453610; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma3611; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43612; CHECK-RV32-NEXT: addi a0, a0, 13613; CHECK-RV32-NEXT: .LBB61_474: # %else17783614; CHECK-RV32-NEXT: slli a3, a2, 13615; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3616; CHECK-RV32-NEXT: vslidedown.vi v24, v0, 73617; CHECK-RV32-NEXT: bgez a3, .LBB61_4763618; CHECK-RV32-NEXT: # %bb.475: # %cond.load17813619; CHECK-RV32-NEXT: lbu a3, 0(a0)3620; CHECK-RV32-NEXT: vmv.s.x v16, a33621; CHECK-RV32-NEXT: li a3, 4473622; CHECK-RV32-NEXT: li a4, 4463623; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma3624; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43625; CHECK-RV32-NEXT: addi a0, a0, 13626; CHECK-RV32-NEXT: .LBB61_476: # %else17823627; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3628; CHECK-RV32-NEXT: vmv.x.s a3, v243629; CHECK-RV32-NEXT: bgez a2, .LBB61_4773630; CHECK-RV32-NEXT: j .LBB61_9623631; CHECK-RV32-NEXT: .LBB61_477: # %else17863632; CHECK-RV32-NEXT: andi a2, a3, 13633; CHECK-RV32-NEXT: beqz a2, .LBB61_4783634; CHECK-RV32-NEXT: j .LBB61_9633635; CHECK-RV32-NEXT: .LBB61_478: # %else17903636; CHECK-RV32-NEXT: andi a2, a3, 23637; CHECK-RV32-NEXT: beqz a2, .LBB61_4793638; CHECK-RV32-NEXT: j .LBB61_9643639; CHECK-RV32-NEXT: .LBB61_479: # %else17943640; CHECK-RV32-NEXT: andi a2, a3, 43641; CHECK-RV32-NEXT: beqz a2, .LBB61_4803642; CHECK-RV32-NEXT: j .LBB61_9653643; CHECK-RV32-NEXT: .LBB61_480: # %else17983644; CHECK-RV32-NEXT: andi a2, a3, 83645; CHECK-RV32-NEXT: beqz a2, .LBB61_4813646; CHECK-RV32-NEXT: j .LBB61_9663647; CHECK-RV32-NEXT: .LBB61_481: # %else18023648; CHECK-RV32-NEXT: andi a2, a3, 163649; CHECK-RV32-NEXT: beqz a2, .LBB61_4823650; CHECK-RV32-NEXT: j .LBB61_9673651; CHECK-RV32-NEXT: .LBB61_482: # %else18063652; CHECK-RV32-NEXT: andi a2, a3, 323653; CHECK-RV32-NEXT: beqz a2, .LBB61_4833654; CHECK-RV32-NEXT: j .LBB61_9683655; CHECK-RV32-NEXT: .LBB61_483: # %else18103656; CHECK-RV32-NEXT: andi a2, a3, 643657; CHECK-RV32-NEXT: beqz a2, .LBB61_4843658; CHECK-RV32-NEXT: j .LBB61_9693659; CHECK-RV32-NEXT: .LBB61_484: # %else18143660; CHECK-RV32-NEXT: andi a2, a3, 1283661; CHECK-RV32-NEXT: beqz a2, .LBB61_4853662; CHECK-RV32-NEXT: j .LBB61_9703663; CHECK-RV32-NEXT: .LBB61_485: # %else18183664; CHECK-RV32-NEXT: andi a2, a3, 2563665; CHECK-RV32-NEXT: beqz a2, .LBB61_4863666; CHECK-RV32-NEXT: j .LBB61_9713667; CHECK-RV32-NEXT: .LBB61_486: # %else18223668; CHECK-RV32-NEXT: andi a2, a3, 5123669; CHECK-RV32-NEXT: beqz a2, .LBB61_4873670; CHECK-RV32-NEXT: j .LBB61_9723671; CHECK-RV32-NEXT: .LBB61_487: # %else18263672; CHECK-RV32-NEXT: andi a2, a3, 10243673; CHECK-RV32-NEXT: beqz a2, .LBB61_4883674; CHECK-RV32-NEXT: j .LBB61_9733675; CHECK-RV32-NEXT: .LBB61_488: # %else18303676; CHECK-RV32-NEXT: slli a2, a3, 203677; CHECK-RV32-NEXT: bgez a2, .LBB61_4893678; CHECK-RV32-NEXT: j .LBB61_9743679; CHECK-RV32-NEXT: .LBB61_489: # %else18343680; CHECK-RV32-NEXT: slli a2, a3, 193681; CHECK-RV32-NEXT: bgez a2, .LBB61_4903682; CHECK-RV32-NEXT: j .LBB61_9753683; CHECK-RV32-NEXT: .LBB61_490: # %else18383684; CHECK-RV32-NEXT: slli a2, a3, 183685; CHECK-RV32-NEXT: bgez a2, .LBB61_4913686; CHECK-RV32-NEXT: j .LBB61_9763687; CHECK-RV32-NEXT: .LBB61_491: # %else18423688; CHECK-RV32-NEXT: slli a2, a3, 173689; CHECK-RV32-NEXT: bgez a2, .LBB61_4923690; CHECK-RV32-NEXT: j .LBB61_9773691; CHECK-RV32-NEXT: .LBB61_492: # %else18463692; CHECK-RV32-NEXT: slli a2, a3, 163693; CHECK-RV32-NEXT: bgez a2, .LBB61_4933694; CHECK-RV32-NEXT: j .LBB61_9783695; CHECK-RV32-NEXT: .LBB61_493: # %else18503696; CHECK-RV32-NEXT: slli a2, a3, 153697; CHECK-RV32-NEXT: bgez a2, .LBB61_4943698; CHECK-RV32-NEXT: j .LBB61_9793699; CHECK-RV32-NEXT: .LBB61_494: # %else18543700; CHECK-RV32-NEXT: slli a2, a3, 143701; CHECK-RV32-NEXT: bgez a2, .LBB61_4953702; CHECK-RV32-NEXT: j .LBB61_9803703; CHECK-RV32-NEXT: .LBB61_495: # %else18583704; CHECK-RV32-NEXT: slli a2, a3, 133705; CHECK-RV32-NEXT: bgez a2, .LBB61_4963706; CHECK-RV32-NEXT: j .LBB61_9813707; CHECK-RV32-NEXT: .LBB61_496: # %else18623708; CHECK-RV32-NEXT: slli a2, a3, 123709; CHECK-RV32-NEXT: bgez a2, .LBB61_4973710; CHECK-RV32-NEXT: j .LBB61_9823711; CHECK-RV32-NEXT: .LBB61_497: # %else18663712; CHECK-RV32-NEXT: slli a2, a3, 113713; CHECK-RV32-NEXT: bgez a2, .LBB61_4983714; CHECK-RV32-NEXT: j .LBB61_9833715; CHECK-RV32-NEXT: .LBB61_498: # %else18703716; CHECK-RV32-NEXT: slli a2, a3, 103717; CHECK-RV32-NEXT: bgez a2, .LBB61_4993718; CHECK-RV32-NEXT: j .LBB61_9843719; CHECK-RV32-NEXT: .LBB61_499: # %else18743720; CHECK-RV32-NEXT: slli a2, a3, 93721; CHECK-RV32-NEXT: bgez a2, .LBB61_5003722; CHECK-RV32-NEXT: j .LBB61_9853723; CHECK-RV32-NEXT: .LBB61_500: # %else18783724; CHECK-RV32-NEXT: slli a2, a3, 83725; CHECK-RV32-NEXT: bgez a2, .LBB61_5013726; CHECK-RV32-NEXT: j .LBB61_9863727; CHECK-RV32-NEXT: .LBB61_501: # %else18823728; CHECK-RV32-NEXT: slli a2, a3, 73729; CHECK-RV32-NEXT: bgez a2, .LBB61_5023730; CHECK-RV32-NEXT: j .LBB61_9873731; CHECK-RV32-NEXT: .LBB61_502: # %else18863732; CHECK-RV32-NEXT: slli a2, a3, 63733; CHECK-RV32-NEXT: bgez a2, .LBB61_5033734; CHECK-RV32-NEXT: j .LBB61_9883735; CHECK-RV32-NEXT: .LBB61_503: # %else18903736; CHECK-RV32-NEXT: slli a2, a3, 53737; CHECK-RV32-NEXT: bgez a2, .LBB61_5043738; CHECK-RV32-NEXT: j .LBB61_9893739; CHECK-RV32-NEXT: .LBB61_504: # %else18943740; CHECK-RV32-NEXT: slli a2, a3, 43741; CHECK-RV32-NEXT: bgez a2, .LBB61_5053742; CHECK-RV32-NEXT: j .LBB61_9903743; CHECK-RV32-NEXT: .LBB61_505: # %else18983744; CHECK-RV32-NEXT: slli a2, a3, 33745; CHECK-RV32-NEXT: bgez a2, .LBB61_5063746; CHECK-RV32-NEXT: j .LBB61_9913747; CHECK-RV32-NEXT: .LBB61_506: # %else19023748; CHECK-RV32-NEXT: slli a2, a3, 23749; CHECK-RV32-NEXT: bgez a2, .LBB61_5083750; CHECK-RV32-NEXT: .LBB61_507: # %cond.load19053751; CHECK-RV32-NEXT: lbu a2, 0(a0)3752; CHECK-RV32-NEXT: li a4, 5123753; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma3754; CHECK-RV32-NEXT: vmv.s.x v16, a23755; CHECK-RV32-NEXT: li a2, 4783756; CHECK-RV32-NEXT: li a4, 4773757; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma3758; CHECK-RV32-NEXT: vslideup.vx v8, v16, a43759; CHECK-RV32-NEXT: addi a0, a0, 13760; CHECK-RV32-NEXT: .LBB61_508: # %else19063761; CHECK-RV32-NEXT: slli a2, a3, 13762; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3763; CHECK-RV32-NEXT: vsrl.vx v24, v24, a13764; CHECK-RV32-NEXT: bgez a2, .LBB61_5103765; CHECK-RV32-NEXT: # %bb.509: # %cond.load19093766; CHECK-RV32-NEXT: lbu a1, 0(a0)3767; CHECK-RV32-NEXT: vmv.s.x v16, a13768; CHECK-RV32-NEXT: li a1, 4793769; CHECK-RV32-NEXT: li a2, 4783770; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m8, tu, ma3771; CHECK-RV32-NEXT: vslideup.vx v8, v16, a23772; CHECK-RV32-NEXT: addi a0, a0, 13773; CHECK-RV32-NEXT: .LBB61_510: # %else19103774; CHECK-RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma3775; CHECK-RV32-NEXT: vmv.x.s a1, v243776; CHECK-RV32-NEXT: bgez a3, .LBB61_5113777; CHECK-RV32-NEXT: j .LBB61_9923778; CHECK-RV32-NEXT: .LBB61_511: # %else19143779; CHECK-RV32-NEXT: andi a2, a1, 13780; CHECK-RV32-NEXT: beqz a2, .LBB61_5123781; CHECK-RV32-NEXT: j .LBB61_9933782; CHECK-RV32-NEXT: .LBB61_512: # %else19183783; CHECK-RV32-NEXT: andi a2, a1, 23784; CHECK-RV32-NEXT: beqz a2, .LBB61_5133785; CHECK-RV32-NEXT: j .LBB61_9943786; CHECK-RV32-NEXT: .LBB61_513: # %else19223787; CHECK-RV32-NEXT: andi a2, a1, 43788; CHECK-RV32-NEXT: beqz a2, .LBB61_5143789; CHECK-RV32-NEXT: j .LBB61_9953790; CHECK-RV32-NEXT: .LBB61_514: # %else19263791; CHECK-RV32-NEXT: andi a2, a1, 83792; CHECK-RV32-NEXT: beqz a2, .LBB61_5153793; CHECK-RV32-NEXT: j .LBB61_9963794; CHECK-RV32-NEXT: .LBB61_515: # %else19303795; CHECK-RV32-NEXT: andi a2, a1, 163796; CHECK-RV32-NEXT: beqz a2, .LBB61_5163797; CHECK-RV32-NEXT: j .LBB61_9973798; CHECK-RV32-NEXT: .LBB61_516: # %else19343799; CHECK-RV32-NEXT: andi a2, a1, 323800; CHECK-RV32-NEXT: beqz a2, .LBB61_5173801; CHECK-RV32-NEXT: j .LBB61_9983802; CHECK-RV32-NEXT: .LBB61_517: # %else19383803; CHECK-RV32-NEXT: andi a2, a1, 643804; CHECK-RV32-NEXT: beqz a2, .LBB61_5183805; CHECK-RV32-NEXT: j .LBB61_9993806; CHECK-RV32-NEXT: .LBB61_518: # %else19423807; CHECK-RV32-NEXT: andi a2, a1, 1283808; CHECK-RV32-NEXT: beqz a2, .LBB61_5193809; CHECK-RV32-NEXT: j .LBB61_10003810; CHECK-RV32-NEXT: .LBB61_519: # %else19463811; CHECK-RV32-NEXT: andi a2, a1, 2563812; CHECK-RV32-NEXT: beqz a2, .LBB61_5203813; CHECK-RV32-NEXT: j .LBB61_10013814; CHECK-RV32-NEXT: .LBB61_520: # %else19503815; CHECK-RV32-NEXT: andi a2, a1, 5123816; CHECK-RV32-NEXT: beqz a2, .LBB61_5213817; CHECK-RV32-NEXT: j .LBB61_10023818; CHECK-RV32-NEXT: .LBB61_521: # %else19543819; CHECK-RV32-NEXT: andi a2, a1, 10243820; CHECK-RV32-NEXT: beqz a2, .LBB61_5223821; CHECK-RV32-NEXT: j .LBB61_10033822; CHECK-RV32-NEXT: .LBB61_522: # %else19583823; CHECK-RV32-NEXT: slli a2, a1, 203824; CHECK-RV32-NEXT: bgez a2, .LBB61_5233825; CHECK-RV32-NEXT: j .LBB61_10043826; CHECK-RV32-NEXT: .LBB61_523: # %else19623827; CHECK-RV32-NEXT: slli a2, a1, 193828; CHECK-RV32-NEXT: bgez a2, .LBB61_5243829; CHECK-RV32-NEXT: j .LBB61_10053830; CHECK-RV32-NEXT: .LBB61_524: # %else19663831; CHECK-RV32-NEXT: slli a2, a1, 183832; CHECK-RV32-NEXT: bgez a2, .LBB61_5253833; CHECK-RV32-NEXT: j .LBB61_10063834; CHECK-RV32-NEXT: .LBB61_525: # %else19703835; CHECK-RV32-NEXT: slli a2, a1, 173836; CHECK-RV32-NEXT: bgez a2, .LBB61_5263837; CHECK-RV32-NEXT: j .LBB61_10073838; CHECK-RV32-NEXT: .LBB61_526: # %else19743839; CHECK-RV32-NEXT: slli a2, a1, 163840; CHECK-RV32-NEXT: bgez a2, .LBB61_5273841; CHECK-RV32-NEXT: j .LBB61_10083842; CHECK-RV32-NEXT: .LBB61_527: # %else19783843; CHECK-RV32-NEXT: slli a2, a1, 153844; CHECK-RV32-NEXT: bgez a2, .LBB61_5283845; CHECK-RV32-NEXT: j .LBB61_10093846; CHECK-RV32-NEXT: .LBB61_528: # %else19823847; CHECK-RV32-NEXT: slli a2, a1, 143848; CHECK-RV32-NEXT: bgez a2, .LBB61_5293849; CHECK-RV32-NEXT: j .LBB61_10103850; CHECK-RV32-NEXT: .LBB61_529: # %else19863851; CHECK-RV32-NEXT: slli a2, a1, 133852; CHECK-RV32-NEXT: bgez a2, .LBB61_5303853; CHECK-RV32-NEXT: j .LBB61_10113854; CHECK-RV32-NEXT: .LBB61_530: # %else19903855; CHECK-RV32-NEXT: slli a2, a1, 123856; CHECK-RV32-NEXT: bgez a2, .LBB61_5313857; CHECK-RV32-NEXT: j .LBB61_10123858; CHECK-RV32-NEXT: .LBB61_531: # %else19943859; CHECK-RV32-NEXT: slli a2, a1, 113860; CHECK-RV32-NEXT: bgez a2, .LBB61_5323861; CHECK-RV32-NEXT: j .LBB61_10133862; CHECK-RV32-NEXT: .LBB61_532: # %else19983863; CHECK-RV32-NEXT: slli a2, a1, 103864; CHECK-RV32-NEXT: bgez a2, .LBB61_5333865; CHECK-RV32-NEXT: j .LBB61_10143866; CHECK-RV32-NEXT: .LBB61_533: # %else20023867; CHECK-RV32-NEXT: slli a2, a1, 93868; CHECK-RV32-NEXT: bgez a2, .LBB61_5343869; CHECK-RV32-NEXT: j .LBB61_10153870; CHECK-RV32-NEXT: .LBB61_534: # %else20063871; CHECK-RV32-NEXT: slli a2, a1, 83872; CHECK-RV32-NEXT: bgez a2, .LBB61_5353873; CHECK-RV32-NEXT: j .LBB61_10163874; CHECK-RV32-NEXT: .LBB61_535: # %else20103875; CHECK-RV32-NEXT: slli a2, a1, 73876; CHECK-RV32-NEXT: bgez a2, .LBB61_5363877; CHECK-RV32-NEXT: j .LBB61_10173878; CHECK-RV32-NEXT: .LBB61_536: # %else20143879; CHECK-RV32-NEXT: slli a2, a1, 63880; CHECK-RV32-NEXT: bgez a2, .LBB61_5373881; CHECK-RV32-NEXT: j .LBB61_10183882; CHECK-RV32-NEXT: .LBB61_537: # %else20183883; CHECK-RV32-NEXT: slli a2, a1, 53884; CHECK-RV32-NEXT: bgez a2, .LBB61_5383885; CHECK-RV32-NEXT: j .LBB61_10193886; CHECK-RV32-NEXT: .LBB61_538: # %else20223887; CHECK-RV32-NEXT: slli a2, a1, 43888; CHECK-RV32-NEXT: bgez a2, .LBB61_5393889; CHECK-RV32-NEXT: j .LBB61_10203890; CHECK-RV32-NEXT: .LBB61_539: # %else20263891; CHECK-RV32-NEXT: slli a2, a1, 33892; CHECK-RV32-NEXT: bgez a2, .LBB61_5403893; CHECK-RV32-NEXT: j .LBB61_10213894; CHECK-RV32-NEXT: .LBB61_540: # %else20303895; CHECK-RV32-NEXT: slli a2, a1, 23896; CHECK-RV32-NEXT: bgez a2, .LBB61_5413897; CHECK-RV32-NEXT: j .LBB61_10223898; CHECK-RV32-NEXT: .LBB61_541: # %else20343899; CHECK-RV32-NEXT: slli a2, a1, 13900; CHECK-RV32-NEXT: bgez a2, .LBB61_5423901; CHECK-RV32-NEXT: j .LBB61_10233902; CHECK-RV32-NEXT: .LBB61_542: # %else20383903; CHECK-RV32-NEXT: bgez a1, .LBB61_5433904; CHECK-RV32-NEXT: j .LBB61_10243905; CHECK-RV32-NEXT: .LBB61_543: # %else20423906; CHECK-RV32-NEXT: ret3907; CHECK-RV32-NEXT: .LBB61_544: # %cond.load3908; CHECK-RV32-NEXT: lbu a1, 0(a0)3909; CHECK-RV32-NEXT: vmv8r.v v16, v83910; CHECK-RV32-NEXT: vsetvli zero, zero, e8, mf8, tu, ma3911; CHECK-RV32-NEXT: vmv.s.x v8, a13912; CHECK-RV32-NEXT: addi a0, a0, 13913; CHECK-RV32-NEXT: vmv1r.v v16, v83914; CHECK-RV32-NEXT: vmv8r.v v8, v163915; CHECK-RV32-NEXT: andi a1, a3, 23916; CHECK-RV32-NEXT: bnez a1, .LBB61_5453917; CHECK-RV32-NEXT: j .LBB61_23918; CHECK-RV32-NEXT: .LBB61_545: # %cond.load13919; CHECK-RV32-NEXT: lbu a1, 0(a0)3920; CHECK-RV32-NEXT: vsetivli zero, 2, e8, m1, tu, ma3921; CHECK-RV32-NEXT: vmv8r.v v16, v83922; CHECK-RV32-NEXT: vmv.s.x v9, a13923; CHECK-RV32-NEXT: vslideup.vi v8, v9, 13924; CHECK-RV32-NEXT: addi a0, a0, 13925; CHECK-RV32-NEXT: vmv1r.v v16, v83926; CHECK-RV32-NEXT: vmv8r.v v8, v163927; CHECK-RV32-NEXT: andi a1, a3, 43928; CHECK-RV32-NEXT: bnez a1, .LBB61_5463929; CHECK-RV32-NEXT: j .LBB61_33930; CHECK-RV32-NEXT: .LBB61_546: # %cond.load53931; CHECK-RV32-NEXT: lbu a1, 0(a0)3932; CHECK-RV32-NEXT: vsetivli zero, 3, e8, m1, tu, ma3933; CHECK-RV32-NEXT: vmv8r.v v16, v83934; CHECK-RV32-NEXT: vmv.s.x v9, a13935; CHECK-RV32-NEXT: vslideup.vi v8, v9, 23936; CHECK-RV32-NEXT: addi a0, a0, 13937; CHECK-RV32-NEXT: vmv1r.v v16, v83938; CHECK-RV32-NEXT: vmv8r.v v8, v163939; CHECK-RV32-NEXT: andi a1, a3, 83940; CHECK-RV32-NEXT: bnez a1, .LBB61_5473941; CHECK-RV32-NEXT: j .LBB61_43942; CHECK-RV32-NEXT: .LBB61_547: # %cond.load93943; CHECK-RV32-NEXT: lbu a1, 0(a0)3944; CHECK-RV32-NEXT: vsetivli zero, 4, e8, m1, tu, ma3945; CHECK-RV32-NEXT: vmv8r.v v16, v83946; CHECK-RV32-NEXT: vmv.s.x v9, a13947; CHECK-RV32-NEXT: vslideup.vi v8, v9, 33948; CHECK-RV32-NEXT: addi a0, a0, 13949; CHECK-RV32-NEXT: vmv1r.v v16, v83950; CHECK-RV32-NEXT: vmv8r.v v8, v163951; CHECK-RV32-NEXT: andi a1, a3, 163952; CHECK-RV32-NEXT: bnez a1, .LBB61_5483953; CHECK-RV32-NEXT: j .LBB61_53954; CHECK-RV32-NEXT: .LBB61_548: # %cond.load133955; CHECK-RV32-NEXT: lbu a1, 0(a0)3956; CHECK-RV32-NEXT: vsetivli zero, 5, e8, m1, tu, ma3957; CHECK-RV32-NEXT: vmv8r.v v16, v83958; CHECK-RV32-NEXT: vmv.s.x v9, a13959; CHECK-RV32-NEXT: vslideup.vi v8, v9, 43960; CHECK-RV32-NEXT: addi a0, a0, 13961; CHECK-RV32-NEXT: vmv1r.v v16, v83962; CHECK-RV32-NEXT: vmv8r.v v8, v163963; CHECK-RV32-NEXT: andi a1, a3, 323964; CHECK-RV32-NEXT: bnez a1, .LBB61_5493965; CHECK-RV32-NEXT: j .LBB61_63966; CHECK-RV32-NEXT: .LBB61_549: # %cond.load173967; CHECK-RV32-NEXT: lbu a1, 0(a0)3968; CHECK-RV32-NEXT: vsetivli zero, 6, e8, m1, tu, ma3969; CHECK-RV32-NEXT: vmv8r.v v16, v83970; CHECK-RV32-NEXT: vmv.s.x v9, a13971; CHECK-RV32-NEXT: vslideup.vi v8, v9, 53972; CHECK-RV32-NEXT: addi a0, a0, 13973; CHECK-RV32-NEXT: vmv1r.v v16, v83974; CHECK-RV32-NEXT: vmv8r.v v8, v163975; CHECK-RV32-NEXT: andi a1, a3, 643976; CHECK-RV32-NEXT: bnez a1, .LBB61_5503977; CHECK-RV32-NEXT: j .LBB61_73978; CHECK-RV32-NEXT: .LBB61_550: # %cond.load213979; CHECK-RV32-NEXT: lbu a1, 0(a0)3980; CHECK-RV32-NEXT: vsetivli zero, 7, e8, m1, tu, ma3981; CHECK-RV32-NEXT: vmv8r.v v16, v83982; CHECK-RV32-NEXT: vmv.s.x v9, a13983; CHECK-RV32-NEXT: vslideup.vi v8, v9, 63984; CHECK-RV32-NEXT: addi a0, a0, 13985; CHECK-RV32-NEXT: vmv1r.v v16, v83986; CHECK-RV32-NEXT: vmv8r.v v8, v163987; CHECK-RV32-NEXT: andi a1, a3, 1283988; CHECK-RV32-NEXT: bnez a1, .LBB61_5513989; CHECK-RV32-NEXT: j .LBB61_83990; CHECK-RV32-NEXT: .LBB61_551: # %cond.load253991; CHECK-RV32-NEXT: lbu a1, 0(a0)3992; CHECK-RV32-NEXT: vsetivli zero, 8, e8, m1, tu, ma3993; CHECK-RV32-NEXT: vmv8r.v v16, v83994; CHECK-RV32-NEXT: vmv.s.x v9, a13995; CHECK-RV32-NEXT: vslideup.vi v8, v9, 73996; CHECK-RV32-NEXT: addi a0, a0, 13997; CHECK-RV32-NEXT: vmv1r.v v16, v83998; CHECK-RV32-NEXT: vmv8r.v v8, v163999; CHECK-RV32-NEXT: andi a1, a3, 2564000; CHECK-RV32-NEXT: bnez a1, .LBB61_5524001; CHECK-RV32-NEXT: j .LBB61_94002; CHECK-RV32-NEXT: .LBB61_552: # %cond.load294003; CHECK-RV32-NEXT: lbu a1, 0(a0)4004; CHECK-RV32-NEXT: vsetivli zero, 9, e8, m1, tu, ma4005; CHECK-RV32-NEXT: vmv8r.v v16, v84006; CHECK-RV32-NEXT: vmv.s.x v9, a14007; CHECK-RV32-NEXT: vslideup.vi v8, v9, 84008; CHECK-RV32-NEXT: addi a0, a0, 14009; CHECK-RV32-NEXT: vmv1r.v v16, v84010; CHECK-RV32-NEXT: vmv8r.v v8, v164011; CHECK-RV32-NEXT: andi a1, a3, 5124012; CHECK-RV32-NEXT: bnez a1, .LBB61_5534013; CHECK-RV32-NEXT: j .LBB61_104014; CHECK-RV32-NEXT: .LBB61_553: # %cond.load334015; CHECK-RV32-NEXT: lbu a1, 0(a0)4016; CHECK-RV32-NEXT: vsetivli zero, 10, e8, m1, tu, ma4017; CHECK-RV32-NEXT: vmv8r.v v16, v84018; CHECK-RV32-NEXT: vmv.s.x v9, a14019; CHECK-RV32-NEXT: vslideup.vi v8, v9, 94020; CHECK-RV32-NEXT: addi a0, a0, 14021; CHECK-RV32-NEXT: vmv1r.v v16, v84022; CHECK-RV32-NEXT: vmv8r.v v8, v164023; CHECK-RV32-NEXT: andi a1, a3, 10244024; CHECK-RV32-NEXT: bnez a1, .LBB61_5544025; CHECK-RV32-NEXT: j .LBB61_114026; CHECK-RV32-NEXT: .LBB61_554: # %cond.load374027; CHECK-RV32-NEXT: lbu a1, 0(a0)4028; CHECK-RV32-NEXT: vsetivli zero, 11, e8, m1, tu, ma4029; CHECK-RV32-NEXT: vmv8r.v v16, v84030; CHECK-RV32-NEXT: vmv.s.x v9, a14031; CHECK-RV32-NEXT: vslideup.vi v8, v9, 104032; CHECK-RV32-NEXT: addi a0, a0, 14033; CHECK-RV32-NEXT: vmv1r.v v16, v84034; CHECK-RV32-NEXT: vmv8r.v v8, v164035; CHECK-RV32-NEXT: slli a1, a3, 204036; CHECK-RV32-NEXT: bltz a1, .LBB61_5554037; CHECK-RV32-NEXT: j .LBB61_124038; CHECK-RV32-NEXT: .LBB61_555: # %cond.load414039; CHECK-RV32-NEXT: lbu a1, 0(a0)4040; CHECK-RV32-NEXT: vsetivli zero, 12, e8, m1, tu, ma4041; CHECK-RV32-NEXT: vmv8r.v v16, v84042; CHECK-RV32-NEXT: vmv.s.x v9, a14043; CHECK-RV32-NEXT: vslideup.vi v8, v9, 114044; CHECK-RV32-NEXT: addi a0, a0, 14045; CHECK-RV32-NEXT: vmv1r.v v16, v84046; CHECK-RV32-NEXT: vmv8r.v v8, v164047; CHECK-RV32-NEXT: slli a1, a3, 194048; CHECK-RV32-NEXT: bltz a1, .LBB61_5564049; CHECK-RV32-NEXT: j .LBB61_134050; CHECK-RV32-NEXT: .LBB61_556: # %cond.load454051; CHECK-RV32-NEXT: lbu a1, 0(a0)4052; CHECK-RV32-NEXT: vsetivli zero, 13, e8, m1, tu, ma4053; CHECK-RV32-NEXT: vmv8r.v v16, v84054; CHECK-RV32-NEXT: vmv.s.x v9, a14055; CHECK-RV32-NEXT: vslideup.vi v8, v9, 124056; CHECK-RV32-NEXT: addi a0, a0, 14057; CHECK-RV32-NEXT: vmv1r.v v16, v84058; CHECK-RV32-NEXT: vmv8r.v v8, v164059; CHECK-RV32-NEXT: slli a1, a3, 184060; CHECK-RV32-NEXT: bltz a1, .LBB61_5574061; CHECK-RV32-NEXT: j .LBB61_144062; CHECK-RV32-NEXT: .LBB61_557: # %cond.load494063; CHECK-RV32-NEXT: lbu a1, 0(a0)4064; CHECK-RV32-NEXT: vsetivli zero, 14, e8, m1, tu, ma4065; CHECK-RV32-NEXT: vmv8r.v v16, v84066; CHECK-RV32-NEXT: vmv.s.x v9, a14067; CHECK-RV32-NEXT: vslideup.vi v8, v9, 134068; CHECK-RV32-NEXT: addi a0, a0, 14069; CHECK-RV32-NEXT: vmv1r.v v16, v84070; CHECK-RV32-NEXT: vmv8r.v v8, v164071; CHECK-RV32-NEXT: slli a1, a3, 174072; CHECK-RV32-NEXT: bltz a1, .LBB61_5584073; CHECK-RV32-NEXT: j .LBB61_154074; CHECK-RV32-NEXT: .LBB61_558: # %cond.load534075; CHECK-RV32-NEXT: lbu a1, 0(a0)4076; CHECK-RV32-NEXT: vsetivli zero, 15, e8, m1, tu, ma4077; CHECK-RV32-NEXT: vmv8r.v v16, v84078; CHECK-RV32-NEXT: vmv.s.x v9, a14079; CHECK-RV32-NEXT: vslideup.vi v8, v9, 144080; CHECK-RV32-NEXT: addi a0, a0, 14081; CHECK-RV32-NEXT: vmv1r.v v16, v84082; CHECK-RV32-NEXT: vmv8r.v v8, v164083; CHECK-RV32-NEXT: slli a1, a3, 164084; CHECK-RV32-NEXT: bltz a1, .LBB61_5594085; CHECK-RV32-NEXT: j .LBB61_164086; CHECK-RV32-NEXT: .LBB61_559: # %cond.load574087; CHECK-RV32-NEXT: lbu a1, 0(a0)4088; CHECK-RV32-NEXT: vsetivli zero, 16, e8, m1, tu, ma4089; CHECK-RV32-NEXT: vmv8r.v v16, v84090; CHECK-RV32-NEXT: vmv.s.x v9, a14091; CHECK-RV32-NEXT: vslideup.vi v8, v9, 154092; CHECK-RV32-NEXT: addi a0, a0, 14093; CHECK-RV32-NEXT: vmv1r.v v16, v84094; CHECK-RV32-NEXT: vmv8r.v v8, v164095; CHECK-RV32-NEXT: slli a1, a3, 154096; CHECK-RV32-NEXT: bltz a1, .LBB61_5604097; CHECK-RV32-NEXT: j .LBB61_174098; CHECK-RV32-NEXT: .LBB61_560: # %cond.load614099; CHECK-RV32-NEXT: lbu a1, 0(a0)4100; CHECK-RV32-NEXT: vsetivli zero, 17, e8, m1, tu, ma4101; CHECK-RV32-NEXT: vmv8r.v v16, v84102; CHECK-RV32-NEXT: vmv.s.x v9, a14103; CHECK-RV32-NEXT: vslideup.vi v8, v9, 164104; CHECK-RV32-NEXT: addi a0, a0, 14105; CHECK-RV32-NEXT: vmv1r.v v16, v84106; CHECK-RV32-NEXT: vmv8r.v v8, v164107; CHECK-RV32-NEXT: slli a1, a3, 144108; CHECK-RV32-NEXT: bltz a1, .LBB61_5614109; CHECK-RV32-NEXT: j .LBB61_184110; CHECK-RV32-NEXT: .LBB61_561: # %cond.load654111; CHECK-RV32-NEXT: lbu a1, 0(a0)4112; CHECK-RV32-NEXT: vsetivli zero, 18, e8, m1, tu, ma4113; CHECK-RV32-NEXT: vmv8r.v v16, v84114; CHECK-RV32-NEXT: vmv.s.x v9, a14115; CHECK-RV32-NEXT: vslideup.vi v8, v9, 174116; CHECK-RV32-NEXT: addi a0, a0, 14117; CHECK-RV32-NEXT: vmv1r.v v16, v84118; CHECK-RV32-NEXT: vmv8r.v v8, v164119; CHECK-RV32-NEXT: slli a1, a3, 134120; CHECK-RV32-NEXT: bltz a1, .LBB61_5624121; CHECK-RV32-NEXT: j .LBB61_194122; CHECK-RV32-NEXT: .LBB61_562: # %cond.load694123; CHECK-RV32-NEXT: lbu a1, 0(a0)4124; CHECK-RV32-NEXT: vsetivli zero, 19, e8, m1, tu, ma4125; CHECK-RV32-NEXT: vmv8r.v v16, v84126; CHECK-RV32-NEXT: vmv.s.x v9, a14127; CHECK-RV32-NEXT: vslideup.vi v8, v9, 184128; CHECK-RV32-NEXT: addi a0, a0, 14129; CHECK-RV32-NEXT: vmv1r.v v16, v84130; CHECK-RV32-NEXT: vmv8r.v v8, v164131; CHECK-RV32-NEXT: slli a1, a3, 124132; CHECK-RV32-NEXT: bltz a1, .LBB61_5634133; CHECK-RV32-NEXT: j .LBB61_204134; CHECK-RV32-NEXT: .LBB61_563: # %cond.load734135; CHECK-RV32-NEXT: lbu a1, 0(a0)4136; CHECK-RV32-NEXT: vsetivli zero, 20, e8, m1, tu, ma4137; CHECK-RV32-NEXT: vmv8r.v v16, v84138; CHECK-RV32-NEXT: vmv.s.x v9, a14139; CHECK-RV32-NEXT: vslideup.vi v8, v9, 194140; CHECK-RV32-NEXT: addi a0, a0, 14141; CHECK-RV32-NEXT: vmv1r.v v16, v84142; CHECK-RV32-NEXT: vmv8r.v v8, v164143; CHECK-RV32-NEXT: slli a1, a3, 114144; CHECK-RV32-NEXT: bltz a1, .LBB61_5644145; CHECK-RV32-NEXT: j .LBB61_214146; CHECK-RV32-NEXT: .LBB61_564: # %cond.load774147; CHECK-RV32-NEXT: lbu a1, 0(a0)4148; CHECK-RV32-NEXT: vsetivli zero, 21, e8, m1, tu, ma4149; CHECK-RV32-NEXT: vmv8r.v v16, v84150; CHECK-RV32-NEXT: vmv.s.x v9, a14151; CHECK-RV32-NEXT: vslideup.vi v8, v9, 204152; CHECK-RV32-NEXT: addi a0, a0, 14153; CHECK-RV32-NEXT: vmv1r.v v16, v84154; CHECK-RV32-NEXT: vmv8r.v v8, v164155; CHECK-RV32-NEXT: slli a1, a3, 104156; CHECK-RV32-NEXT: bltz a1, .LBB61_5654157; CHECK-RV32-NEXT: j .LBB61_224158; CHECK-RV32-NEXT: .LBB61_565: # %cond.load814159; CHECK-RV32-NEXT: lbu a1, 0(a0)4160; CHECK-RV32-NEXT: vsetivli zero, 22, e8, m1, tu, ma4161; CHECK-RV32-NEXT: vmv8r.v v16, v84162; CHECK-RV32-NEXT: vmv.s.x v9, a14163; CHECK-RV32-NEXT: vslideup.vi v8, v9, 214164; CHECK-RV32-NEXT: addi a0, a0, 14165; CHECK-RV32-NEXT: vmv1r.v v16, v84166; CHECK-RV32-NEXT: vmv8r.v v8, v164167; CHECK-RV32-NEXT: slli a1, a3, 94168; CHECK-RV32-NEXT: bltz a1, .LBB61_5664169; CHECK-RV32-NEXT: j .LBB61_234170; CHECK-RV32-NEXT: .LBB61_566: # %cond.load854171; CHECK-RV32-NEXT: lbu a1, 0(a0)4172; CHECK-RV32-NEXT: vsetivli zero, 23, e8, m1, tu, ma4173; CHECK-RV32-NEXT: vmv8r.v v16, v84174; CHECK-RV32-NEXT: vmv.s.x v9, a14175; CHECK-RV32-NEXT: vslideup.vi v8, v9, 224176; CHECK-RV32-NEXT: addi a0, a0, 14177; CHECK-RV32-NEXT: vmv1r.v v16, v84178; CHECK-RV32-NEXT: vmv8r.v v8, v164179; CHECK-RV32-NEXT: slli a1, a3, 84180; CHECK-RV32-NEXT: bltz a1, .LBB61_5674181; CHECK-RV32-NEXT: j .LBB61_244182; CHECK-RV32-NEXT: .LBB61_567: # %cond.load894183; CHECK-RV32-NEXT: lbu a1, 0(a0)4184; CHECK-RV32-NEXT: vsetivli zero, 24, e8, m1, tu, ma4185; CHECK-RV32-NEXT: vmv8r.v v16, v84186; CHECK-RV32-NEXT: vmv.s.x v9, a14187; CHECK-RV32-NEXT: vslideup.vi v8, v9, 234188; CHECK-RV32-NEXT: addi a0, a0, 14189; CHECK-RV32-NEXT: vmv1r.v v16, v84190; CHECK-RV32-NEXT: vmv8r.v v8, v164191; CHECK-RV32-NEXT: slli a1, a3, 74192; CHECK-RV32-NEXT: bltz a1, .LBB61_5684193; CHECK-RV32-NEXT: j .LBB61_254194; CHECK-RV32-NEXT: .LBB61_568: # %cond.load934195; CHECK-RV32-NEXT: lbu a1, 0(a0)4196; CHECK-RV32-NEXT: vsetivli zero, 25, e8, m1, tu, ma4197; CHECK-RV32-NEXT: vmv8r.v v16, v84198; CHECK-RV32-NEXT: vmv.s.x v9, a14199; CHECK-RV32-NEXT: vslideup.vi v8, v9, 244200; CHECK-RV32-NEXT: addi a0, a0, 14201; CHECK-RV32-NEXT: vmv1r.v v16, v84202; CHECK-RV32-NEXT: vmv8r.v v8, v164203; CHECK-RV32-NEXT: slli a1, a3, 64204; CHECK-RV32-NEXT: bltz a1, .LBB61_5694205; CHECK-RV32-NEXT: j .LBB61_264206; CHECK-RV32-NEXT: .LBB61_569: # %cond.load974207; CHECK-RV32-NEXT: lbu a1, 0(a0)4208; CHECK-RV32-NEXT: vsetivli zero, 26, e8, m1, tu, ma4209; CHECK-RV32-NEXT: vmv8r.v v16, v84210; CHECK-RV32-NEXT: vmv.s.x v9, a14211; CHECK-RV32-NEXT: vslideup.vi v8, v9, 254212; CHECK-RV32-NEXT: addi a0, a0, 14213; CHECK-RV32-NEXT: vmv1r.v v16, v84214; CHECK-RV32-NEXT: vmv8r.v v8, v164215; CHECK-RV32-NEXT: slli a1, a3, 54216; CHECK-RV32-NEXT: bltz a1, .LBB61_5704217; CHECK-RV32-NEXT: j .LBB61_274218; CHECK-RV32-NEXT: .LBB61_570: # %cond.load1014219; CHECK-RV32-NEXT: lbu a1, 0(a0)4220; CHECK-RV32-NEXT: vsetivli zero, 27, e8, m1, tu, ma4221; CHECK-RV32-NEXT: vmv8r.v v16, v84222; CHECK-RV32-NEXT: vmv.s.x v9, a14223; CHECK-RV32-NEXT: vslideup.vi v8, v9, 264224; CHECK-RV32-NEXT: addi a0, a0, 14225; CHECK-RV32-NEXT: vmv1r.v v16, v84226; CHECK-RV32-NEXT: vmv8r.v v8, v164227; CHECK-RV32-NEXT: slli a1, a3, 44228; CHECK-RV32-NEXT: bltz a1, .LBB61_5714229; CHECK-RV32-NEXT: j .LBB61_284230; CHECK-RV32-NEXT: .LBB61_571: # %cond.load1054231; CHECK-RV32-NEXT: lbu a1, 0(a0)4232; CHECK-RV32-NEXT: vsetivli zero, 28, e8, m1, tu, ma4233; CHECK-RV32-NEXT: vmv8r.v v16, v84234; CHECK-RV32-NEXT: vmv.s.x v9, a14235; CHECK-RV32-NEXT: vslideup.vi v8, v9, 274236; CHECK-RV32-NEXT: addi a0, a0, 14237; CHECK-RV32-NEXT: vmv1r.v v16, v84238; CHECK-RV32-NEXT: vmv8r.v v8, v164239; CHECK-RV32-NEXT: slli a1, a3, 34240; CHECK-RV32-NEXT: bgez a1, .LBB61_10254241; CHECK-RV32-NEXT: j .LBB61_294242; CHECK-RV32-NEXT: .LBB61_1025: # %cond.load1054243; CHECK-RV32-NEXT: j .LBB61_304244; CHECK-RV32-NEXT: .LBB61_572: # %cond.load1214245; CHECK-RV32-NEXT: lbu a3, 0(a0)4246; CHECK-RV32-NEXT: vmv8r.v v16, v84247; CHECK-RV32-NEXT: vmv.s.x v9, a34248; CHECK-RV32-NEXT: li a3, 324249; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4250; CHECK-RV32-NEXT: vslideup.vi v8, v9, 314251; CHECK-RV32-NEXT: addi a0, a0, 14252; CHECK-RV32-NEXT: vmv1r.v v16, v84253; CHECK-RV32-NEXT: vmv8r.v v8, v164254; CHECK-RV32-NEXT: andi a3, a2, 14255; CHECK-RV32-NEXT: bnez a3, .LBB61_5734256; CHECK-RV32-NEXT: j .LBB61_364257; CHECK-RV32-NEXT: .LBB61_573: # %cond.load1254258; CHECK-RV32-NEXT: lbu a3, 0(a0)4259; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4260; CHECK-RV32-NEXT: vmv8r.v v16, v84261; CHECK-RV32-NEXT: vmv.s.x v9, a34262; CHECK-RV32-NEXT: li a3, 334263; CHECK-RV32-NEXT: li a4, 324264; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4265; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44266; CHECK-RV32-NEXT: addi a0, a0, 14267; CHECK-RV32-NEXT: vmv1r.v v16, v84268; CHECK-RV32-NEXT: vmv8r.v v8, v164269; CHECK-RV32-NEXT: andi a3, a2, 24270; CHECK-RV32-NEXT: bnez a3, .LBB61_5744271; CHECK-RV32-NEXT: j .LBB61_374272; CHECK-RV32-NEXT: .LBB61_574: # %cond.load1294273; CHECK-RV32-NEXT: lbu a3, 0(a0)4274; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4275; CHECK-RV32-NEXT: vmv8r.v v16, v84276; CHECK-RV32-NEXT: vmv.s.x v9, a34277; CHECK-RV32-NEXT: li a3, 344278; CHECK-RV32-NEXT: li a4, 334279; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4280; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44281; CHECK-RV32-NEXT: addi a0, a0, 14282; CHECK-RV32-NEXT: vmv1r.v v16, v84283; CHECK-RV32-NEXT: vmv8r.v v8, v164284; CHECK-RV32-NEXT: andi a3, a2, 44285; CHECK-RV32-NEXT: bnez a3, .LBB61_5754286; CHECK-RV32-NEXT: j .LBB61_384287; CHECK-RV32-NEXT: .LBB61_575: # %cond.load1334288; CHECK-RV32-NEXT: lbu a3, 0(a0)4289; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4290; CHECK-RV32-NEXT: vmv8r.v v16, v84291; CHECK-RV32-NEXT: vmv.s.x v9, a34292; CHECK-RV32-NEXT: li a3, 354293; CHECK-RV32-NEXT: li a4, 344294; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4295; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44296; CHECK-RV32-NEXT: addi a0, a0, 14297; CHECK-RV32-NEXT: vmv1r.v v16, v84298; CHECK-RV32-NEXT: vmv8r.v v8, v164299; CHECK-RV32-NEXT: andi a3, a2, 84300; CHECK-RV32-NEXT: bnez a3, .LBB61_5764301; CHECK-RV32-NEXT: j .LBB61_394302; CHECK-RV32-NEXT: .LBB61_576: # %cond.load1374303; CHECK-RV32-NEXT: lbu a3, 0(a0)4304; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4305; CHECK-RV32-NEXT: vmv8r.v v16, v84306; CHECK-RV32-NEXT: vmv.s.x v9, a34307; CHECK-RV32-NEXT: li a3, 364308; CHECK-RV32-NEXT: li a4, 354309; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4310; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44311; CHECK-RV32-NEXT: addi a0, a0, 14312; CHECK-RV32-NEXT: vmv1r.v v16, v84313; CHECK-RV32-NEXT: vmv8r.v v8, v164314; CHECK-RV32-NEXT: andi a3, a2, 164315; CHECK-RV32-NEXT: bnez a3, .LBB61_5774316; CHECK-RV32-NEXT: j .LBB61_404317; CHECK-RV32-NEXT: .LBB61_577: # %cond.load1414318; CHECK-RV32-NEXT: lbu a3, 0(a0)4319; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4320; CHECK-RV32-NEXT: vmv8r.v v16, v84321; CHECK-RV32-NEXT: vmv.s.x v9, a34322; CHECK-RV32-NEXT: li a3, 374323; CHECK-RV32-NEXT: li a4, 364324; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4325; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44326; CHECK-RV32-NEXT: addi a0, a0, 14327; CHECK-RV32-NEXT: vmv1r.v v16, v84328; CHECK-RV32-NEXT: vmv8r.v v8, v164329; CHECK-RV32-NEXT: andi a3, a2, 324330; CHECK-RV32-NEXT: bnez a3, .LBB61_5784331; CHECK-RV32-NEXT: j .LBB61_414332; CHECK-RV32-NEXT: .LBB61_578: # %cond.load1454333; CHECK-RV32-NEXT: lbu a3, 0(a0)4334; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4335; CHECK-RV32-NEXT: vmv8r.v v16, v84336; CHECK-RV32-NEXT: vmv.s.x v9, a34337; CHECK-RV32-NEXT: li a3, 384338; CHECK-RV32-NEXT: li a4, 374339; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4340; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44341; CHECK-RV32-NEXT: addi a0, a0, 14342; CHECK-RV32-NEXT: vmv1r.v v16, v84343; CHECK-RV32-NEXT: vmv8r.v v8, v164344; CHECK-RV32-NEXT: andi a3, a2, 644345; CHECK-RV32-NEXT: bnez a3, .LBB61_5794346; CHECK-RV32-NEXT: j .LBB61_424347; CHECK-RV32-NEXT: .LBB61_579: # %cond.load1494348; CHECK-RV32-NEXT: lbu a3, 0(a0)4349; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4350; CHECK-RV32-NEXT: vmv8r.v v16, v84351; CHECK-RV32-NEXT: vmv.s.x v9, a34352; CHECK-RV32-NEXT: li a3, 394353; CHECK-RV32-NEXT: li a4, 384354; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4355; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44356; CHECK-RV32-NEXT: addi a0, a0, 14357; CHECK-RV32-NEXT: vmv1r.v v16, v84358; CHECK-RV32-NEXT: vmv8r.v v8, v164359; CHECK-RV32-NEXT: andi a3, a2, 1284360; CHECK-RV32-NEXT: bnez a3, .LBB61_5804361; CHECK-RV32-NEXT: j .LBB61_434362; CHECK-RV32-NEXT: .LBB61_580: # %cond.load1534363; CHECK-RV32-NEXT: lbu a3, 0(a0)4364; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4365; CHECK-RV32-NEXT: vmv8r.v v16, v84366; CHECK-RV32-NEXT: vmv.s.x v9, a34367; CHECK-RV32-NEXT: li a3, 404368; CHECK-RV32-NEXT: li a4, 394369; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4370; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44371; CHECK-RV32-NEXT: addi a0, a0, 14372; CHECK-RV32-NEXT: vmv1r.v v16, v84373; CHECK-RV32-NEXT: vmv8r.v v8, v164374; CHECK-RV32-NEXT: andi a3, a2, 2564375; CHECK-RV32-NEXT: bnez a3, .LBB61_5814376; CHECK-RV32-NEXT: j .LBB61_444377; CHECK-RV32-NEXT: .LBB61_581: # %cond.load1574378; CHECK-RV32-NEXT: lbu a3, 0(a0)4379; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4380; CHECK-RV32-NEXT: vmv8r.v v16, v84381; CHECK-RV32-NEXT: vmv.s.x v9, a34382; CHECK-RV32-NEXT: li a3, 414383; CHECK-RV32-NEXT: li a4, 404384; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4385; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44386; CHECK-RV32-NEXT: addi a0, a0, 14387; CHECK-RV32-NEXT: vmv1r.v v16, v84388; CHECK-RV32-NEXT: vmv8r.v v8, v164389; CHECK-RV32-NEXT: andi a3, a2, 5124390; CHECK-RV32-NEXT: bnez a3, .LBB61_5824391; CHECK-RV32-NEXT: j .LBB61_454392; CHECK-RV32-NEXT: .LBB61_582: # %cond.load1614393; CHECK-RV32-NEXT: lbu a3, 0(a0)4394; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4395; CHECK-RV32-NEXT: vmv8r.v v16, v84396; CHECK-RV32-NEXT: vmv.s.x v9, a34397; CHECK-RV32-NEXT: li a3, 424398; CHECK-RV32-NEXT: li a4, 414399; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4400; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44401; CHECK-RV32-NEXT: addi a0, a0, 14402; CHECK-RV32-NEXT: vmv1r.v v16, v84403; CHECK-RV32-NEXT: vmv8r.v v8, v164404; CHECK-RV32-NEXT: andi a3, a2, 10244405; CHECK-RV32-NEXT: bnez a3, .LBB61_5834406; CHECK-RV32-NEXT: j .LBB61_464407; CHECK-RV32-NEXT: .LBB61_583: # %cond.load1654408; CHECK-RV32-NEXT: lbu a3, 0(a0)4409; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4410; CHECK-RV32-NEXT: vmv8r.v v16, v84411; CHECK-RV32-NEXT: vmv.s.x v9, a34412; CHECK-RV32-NEXT: li a3, 434413; CHECK-RV32-NEXT: li a4, 424414; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4415; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44416; CHECK-RV32-NEXT: addi a0, a0, 14417; CHECK-RV32-NEXT: vmv1r.v v16, v84418; CHECK-RV32-NEXT: vmv8r.v v8, v164419; CHECK-RV32-NEXT: slli a3, a2, 204420; CHECK-RV32-NEXT: bltz a3, .LBB61_5844421; CHECK-RV32-NEXT: j .LBB61_474422; CHECK-RV32-NEXT: .LBB61_584: # %cond.load1694423; CHECK-RV32-NEXT: lbu a3, 0(a0)4424; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4425; CHECK-RV32-NEXT: vmv8r.v v16, v84426; CHECK-RV32-NEXT: vmv.s.x v9, a34427; CHECK-RV32-NEXT: li a3, 444428; CHECK-RV32-NEXT: li a4, 434429; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4430; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44431; CHECK-RV32-NEXT: addi a0, a0, 14432; CHECK-RV32-NEXT: vmv1r.v v16, v84433; CHECK-RV32-NEXT: vmv8r.v v8, v164434; CHECK-RV32-NEXT: slli a3, a2, 194435; CHECK-RV32-NEXT: bltz a3, .LBB61_5854436; CHECK-RV32-NEXT: j .LBB61_484437; CHECK-RV32-NEXT: .LBB61_585: # %cond.load1734438; CHECK-RV32-NEXT: lbu a3, 0(a0)4439; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4440; CHECK-RV32-NEXT: vmv8r.v v16, v84441; CHECK-RV32-NEXT: vmv.s.x v9, a34442; CHECK-RV32-NEXT: li a3, 454443; CHECK-RV32-NEXT: li a4, 444444; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4445; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44446; CHECK-RV32-NEXT: addi a0, a0, 14447; CHECK-RV32-NEXT: vmv1r.v v16, v84448; CHECK-RV32-NEXT: vmv8r.v v8, v164449; CHECK-RV32-NEXT: slli a3, a2, 184450; CHECK-RV32-NEXT: bltz a3, .LBB61_5864451; CHECK-RV32-NEXT: j .LBB61_494452; CHECK-RV32-NEXT: .LBB61_586: # %cond.load1774453; CHECK-RV32-NEXT: lbu a3, 0(a0)4454; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4455; CHECK-RV32-NEXT: vmv8r.v v16, v84456; CHECK-RV32-NEXT: vmv.s.x v9, a34457; CHECK-RV32-NEXT: li a3, 464458; CHECK-RV32-NEXT: li a4, 454459; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4460; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44461; CHECK-RV32-NEXT: addi a0, a0, 14462; CHECK-RV32-NEXT: vmv1r.v v16, v84463; CHECK-RV32-NEXT: vmv8r.v v8, v164464; CHECK-RV32-NEXT: slli a3, a2, 174465; CHECK-RV32-NEXT: bltz a3, .LBB61_5874466; CHECK-RV32-NEXT: j .LBB61_504467; CHECK-RV32-NEXT: .LBB61_587: # %cond.load1814468; CHECK-RV32-NEXT: lbu a3, 0(a0)4469; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4470; CHECK-RV32-NEXT: vmv8r.v v16, v84471; CHECK-RV32-NEXT: vmv.s.x v9, a34472; CHECK-RV32-NEXT: li a3, 474473; CHECK-RV32-NEXT: li a4, 464474; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4475; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44476; CHECK-RV32-NEXT: addi a0, a0, 14477; CHECK-RV32-NEXT: vmv1r.v v16, v84478; CHECK-RV32-NEXT: vmv8r.v v8, v164479; CHECK-RV32-NEXT: slli a3, a2, 164480; CHECK-RV32-NEXT: bltz a3, .LBB61_5884481; CHECK-RV32-NEXT: j .LBB61_514482; CHECK-RV32-NEXT: .LBB61_588: # %cond.load1854483; CHECK-RV32-NEXT: lbu a3, 0(a0)4484; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4485; CHECK-RV32-NEXT: vmv8r.v v16, v84486; CHECK-RV32-NEXT: vmv.s.x v9, a34487; CHECK-RV32-NEXT: li a3, 484488; CHECK-RV32-NEXT: li a4, 474489; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4490; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44491; CHECK-RV32-NEXT: addi a0, a0, 14492; CHECK-RV32-NEXT: vmv1r.v v16, v84493; CHECK-RV32-NEXT: vmv8r.v v8, v164494; CHECK-RV32-NEXT: slli a3, a2, 154495; CHECK-RV32-NEXT: bltz a3, .LBB61_5894496; CHECK-RV32-NEXT: j .LBB61_524497; CHECK-RV32-NEXT: .LBB61_589: # %cond.load1894498; CHECK-RV32-NEXT: lbu a3, 0(a0)4499; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4500; CHECK-RV32-NEXT: vmv8r.v v16, v84501; CHECK-RV32-NEXT: vmv.s.x v9, a34502; CHECK-RV32-NEXT: li a3, 494503; CHECK-RV32-NEXT: li a4, 484504; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4505; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44506; CHECK-RV32-NEXT: addi a0, a0, 14507; CHECK-RV32-NEXT: vmv1r.v v16, v84508; CHECK-RV32-NEXT: vmv8r.v v8, v164509; CHECK-RV32-NEXT: slli a3, a2, 144510; CHECK-RV32-NEXT: bltz a3, .LBB61_5904511; CHECK-RV32-NEXT: j .LBB61_534512; CHECK-RV32-NEXT: .LBB61_590: # %cond.load1934513; CHECK-RV32-NEXT: lbu a3, 0(a0)4514; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4515; CHECK-RV32-NEXT: vmv8r.v v16, v84516; CHECK-RV32-NEXT: vmv.s.x v9, a34517; CHECK-RV32-NEXT: li a3, 504518; CHECK-RV32-NEXT: li a4, 494519; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4520; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44521; CHECK-RV32-NEXT: addi a0, a0, 14522; CHECK-RV32-NEXT: vmv1r.v v16, v84523; CHECK-RV32-NEXT: vmv8r.v v8, v164524; CHECK-RV32-NEXT: slli a3, a2, 134525; CHECK-RV32-NEXT: bltz a3, .LBB61_5914526; CHECK-RV32-NEXT: j .LBB61_544527; CHECK-RV32-NEXT: .LBB61_591: # %cond.load1974528; CHECK-RV32-NEXT: lbu a3, 0(a0)4529; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4530; CHECK-RV32-NEXT: vmv8r.v v16, v84531; CHECK-RV32-NEXT: vmv.s.x v9, a34532; CHECK-RV32-NEXT: li a3, 514533; CHECK-RV32-NEXT: li a4, 504534; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4535; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44536; CHECK-RV32-NEXT: addi a0, a0, 14537; CHECK-RV32-NEXT: vmv1r.v v16, v84538; CHECK-RV32-NEXT: vmv8r.v v8, v164539; CHECK-RV32-NEXT: slli a3, a2, 124540; CHECK-RV32-NEXT: bltz a3, .LBB61_5924541; CHECK-RV32-NEXT: j .LBB61_554542; CHECK-RV32-NEXT: .LBB61_592: # %cond.load2014543; CHECK-RV32-NEXT: lbu a3, 0(a0)4544; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4545; CHECK-RV32-NEXT: vmv8r.v v16, v84546; CHECK-RV32-NEXT: vmv.s.x v9, a34547; CHECK-RV32-NEXT: li a3, 524548; CHECK-RV32-NEXT: li a4, 514549; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4550; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44551; CHECK-RV32-NEXT: addi a0, a0, 14552; CHECK-RV32-NEXT: vmv1r.v v16, v84553; CHECK-RV32-NEXT: vmv8r.v v8, v164554; CHECK-RV32-NEXT: slli a3, a2, 114555; CHECK-RV32-NEXT: bltz a3, .LBB61_5934556; CHECK-RV32-NEXT: j .LBB61_564557; CHECK-RV32-NEXT: .LBB61_593: # %cond.load2054558; CHECK-RV32-NEXT: lbu a3, 0(a0)4559; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4560; CHECK-RV32-NEXT: vmv8r.v v16, v84561; CHECK-RV32-NEXT: vmv.s.x v9, a34562; CHECK-RV32-NEXT: li a3, 534563; CHECK-RV32-NEXT: li a4, 524564; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4565; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44566; CHECK-RV32-NEXT: addi a0, a0, 14567; CHECK-RV32-NEXT: vmv1r.v v16, v84568; CHECK-RV32-NEXT: vmv8r.v v8, v164569; CHECK-RV32-NEXT: slli a3, a2, 104570; CHECK-RV32-NEXT: bltz a3, .LBB61_5944571; CHECK-RV32-NEXT: j .LBB61_574572; CHECK-RV32-NEXT: .LBB61_594: # %cond.load2094573; CHECK-RV32-NEXT: lbu a3, 0(a0)4574; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4575; CHECK-RV32-NEXT: vmv8r.v v16, v84576; CHECK-RV32-NEXT: vmv.s.x v9, a34577; CHECK-RV32-NEXT: li a3, 544578; CHECK-RV32-NEXT: li a4, 534579; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4580; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44581; CHECK-RV32-NEXT: addi a0, a0, 14582; CHECK-RV32-NEXT: vmv1r.v v16, v84583; CHECK-RV32-NEXT: vmv8r.v v8, v164584; CHECK-RV32-NEXT: slli a3, a2, 94585; CHECK-RV32-NEXT: bltz a3, .LBB61_5954586; CHECK-RV32-NEXT: j .LBB61_584587; CHECK-RV32-NEXT: .LBB61_595: # %cond.load2134588; CHECK-RV32-NEXT: lbu a3, 0(a0)4589; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4590; CHECK-RV32-NEXT: vmv8r.v v16, v84591; CHECK-RV32-NEXT: vmv.s.x v9, a34592; CHECK-RV32-NEXT: li a3, 554593; CHECK-RV32-NEXT: li a4, 544594; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4595; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44596; CHECK-RV32-NEXT: addi a0, a0, 14597; CHECK-RV32-NEXT: vmv1r.v v16, v84598; CHECK-RV32-NEXT: vmv8r.v v8, v164599; CHECK-RV32-NEXT: slli a3, a2, 84600; CHECK-RV32-NEXT: bltz a3, .LBB61_5964601; CHECK-RV32-NEXT: j .LBB61_594602; CHECK-RV32-NEXT: .LBB61_596: # %cond.load2174603; CHECK-RV32-NEXT: lbu a3, 0(a0)4604; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4605; CHECK-RV32-NEXT: vmv8r.v v16, v84606; CHECK-RV32-NEXT: vmv.s.x v9, a34607; CHECK-RV32-NEXT: li a3, 564608; CHECK-RV32-NEXT: li a4, 554609; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4610; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44611; CHECK-RV32-NEXT: addi a0, a0, 14612; CHECK-RV32-NEXT: vmv1r.v v16, v84613; CHECK-RV32-NEXT: vmv8r.v v8, v164614; CHECK-RV32-NEXT: slli a3, a2, 74615; CHECK-RV32-NEXT: bltz a3, .LBB61_5974616; CHECK-RV32-NEXT: j .LBB61_604617; CHECK-RV32-NEXT: .LBB61_597: # %cond.load2214618; CHECK-RV32-NEXT: lbu a3, 0(a0)4619; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4620; CHECK-RV32-NEXT: vmv8r.v v16, v84621; CHECK-RV32-NEXT: vmv.s.x v9, a34622; CHECK-RV32-NEXT: li a3, 574623; CHECK-RV32-NEXT: li a4, 564624; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4625; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44626; CHECK-RV32-NEXT: addi a0, a0, 14627; CHECK-RV32-NEXT: vmv1r.v v16, v84628; CHECK-RV32-NEXT: vmv8r.v v8, v164629; CHECK-RV32-NEXT: slli a3, a2, 64630; CHECK-RV32-NEXT: bltz a3, .LBB61_5984631; CHECK-RV32-NEXT: j .LBB61_614632; CHECK-RV32-NEXT: .LBB61_598: # %cond.load2254633; CHECK-RV32-NEXT: lbu a3, 0(a0)4634; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4635; CHECK-RV32-NEXT: vmv8r.v v16, v84636; CHECK-RV32-NEXT: vmv.s.x v9, a34637; CHECK-RV32-NEXT: li a3, 584638; CHECK-RV32-NEXT: li a4, 574639; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4640; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44641; CHECK-RV32-NEXT: addi a0, a0, 14642; CHECK-RV32-NEXT: vmv1r.v v16, v84643; CHECK-RV32-NEXT: vmv8r.v v8, v164644; CHECK-RV32-NEXT: slli a3, a2, 54645; CHECK-RV32-NEXT: bltz a3, .LBB61_5994646; CHECK-RV32-NEXT: j .LBB61_624647; CHECK-RV32-NEXT: .LBB61_599: # %cond.load2294648; CHECK-RV32-NEXT: lbu a3, 0(a0)4649; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4650; CHECK-RV32-NEXT: vmv8r.v v16, v84651; CHECK-RV32-NEXT: vmv.s.x v9, a34652; CHECK-RV32-NEXT: li a3, 594653; CHECK-RV32-NEXT: li a4, 584654; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4655; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44656; CHECK-RV32-NEXT: addi a0, a0, 14657; CHECK-RV32-NEXT: vmv1r.v v16, v84658; CHECK-RV32-NEXT: vmv8r.v v8, v164659; CHECK-RV32-NEXT: slli a3, a2, 44660; CHECK-RV32-NEXT: bltz a3, .LBB61_6004661; CHECK-RV32-NEXT: j .LBB61_634662; CHECK-RV32-NEXT: .LBB61_600: # %cond.load2334663; CHECK-RV32-NEXT: lbu a3, 0(a0)4664; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4665; CHECK-RV32-NEXT: vmv8r.v v16, v84666; CHECK-RV32-NEXT: vmv.s.x v9, a34667; CHECK-RV32-NEXT: li a3, 604668; CHECK-RV32-NEXT: li a4, 594669; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4670; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44671; CHECK-RV32-NEXT: addi a0, a0, 14672; CHECK-RV32-NEXT: vmv1r.v v16, v84673; CHECK-RV32-NEXT: vmv8r.v v8, v164674; CHECK-RV32-NEXT: slli a3, a2, 34675; CHECK-RV32-NEXT: bltz a3, .LBB61_6014676; CHECK-RV32-NEXT: j .LBB61_644677; CHECK-RV32-NEXT: .LBB61_601: # %cond.load2374678; CHECK-RV32-NEXT: lbu a3, 0(a0)4679; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4680; CHECK-RV32-NEXT: vmv8r.v v16, v84681; CHECK-RV32-NEXT: vmv.s.x v9, a34682; CHECK-RV32-NEXT: li a3, 614683; CHECK-RV32-NEXT: li a4, 604684; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, tu, ma4685; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44686; CHECK-RV32-NEXT: addi a0, a0, 14687; CHECK-RV32-NEXT: vmv1r.v v16, v84688; CHECK-RV32-NEXT: vmv8r.v v8, v164689; CHECK-RV32-NEXT: slli a3, a2, 24690; CHECK-RV32-NEXT: bgez a3, .LBB61_10264691; CHECK-RV32-NEXT: j .LBB61_654692; CHECK-RV32-NEXT: .LBB61_1026: # %cond.load2374693; CHECK-RV32-NEXT: j .LBB61_664694; CHECK-RV32-NEXT: .LBB61_602: # %cond.load2494695; CHECK-RV32-NEXT: lbu a2, 0(a0)4696; CHECK-RV32-NEXT: vmv8r.v v16, v84697; CHECK-RV32-NEXT: vmv.s.x v9, a24698; CHECK-RV32-NEXT: li a2, 644699; CHECK-RV32-NEXT: li a4, 634700; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m1, tu, ma4701; CHECK-RV32-NEXT: vslideup.vx v8, v9, a44702; CHECK-RV32-NEXT: addi a0, a0, 14703; CHECK-RV32-NEXT: vmv1r.v v16, v84704; CHECK-RV32-NEXT: vmv8r.v v8, v164705; CHECK-RV32-NEXT: andi a2, a3, 14706; CHECK-RV32-NEXT: bnez a2, .LBB61_6034707; CHECK-RV32-NEXT: j .LBB61_704708; CHECK-RV32-NEXT: .LBB61_603: # %cond.load2534709; CHECK-RV32-NEXT: lbu a2, 0(a0)4710; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4711; CHECK-RV32-NEXT: vmv8r.v v16, v84712; CHECK-RV32-NEXT: vmv.s.x v10, a24713; CHECK-RV32-NEXT: li a2, 654714; CHECK-RV32-NEXT: li a4, 644715; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4716; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44717; CHECK-RV32-NEXT: addi a0, a0, 14718; CHECK-RV32-NEXT: vmv2r.v v16, v84719; CHECK-RV32-NEXT: vmv8r.v v8, v164720; CHECK-RV32-NEXT: andi a2, a3, 24721; CHECK-RV32-NEXT: bnez a2, .LBB61_6044722; CHECK-RV32-NEXT: j .LBB61_714723; CHECK-RV32-NEXT: .LBB61_604: # %cond.load2574724; CHECK-RV32-NEXT: lbu a2, 0(a0)4725; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4726; CHECK-RV32-NEXT: vmv8r.v v16, v84727; CHECK-RV32-NEXT: vmv.s.x v10, a24728; CHECK-RV32-NEXT: li a2, 664729; CHECK-RV32-NEXT: li a4, 654730; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4731; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44732; CHECK-RV32-NEXT: addi a0, a0, 14733; CHECK-RV32-NEXT: vmv2r.v v16, v84734; CHECK-RV32-NEXT: vmv8r.v v8, v164735; CHECK-RV32-NEXT: andi a2, a3, 44736; CHECK-RV32-NEXT: bnez a2, .LBB61_6054737; CHECK-RV32-NEXT: j .LBB61_724738; CHECK-RV32-NEXT: .LBB61_605: # %cond.load2614739; CHECK-RV32-NEXT: lbu a2, 0(a0)4740; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4741; CHECK-RV32-NEXT: vmv8r.v v16, v84742; CHECK-RV32-NEXT: vmv.s.x v10, a24743; CHECK-RV32-NEXT: li a2, 674744; CHECK-RV32-NEXT: li a4, 664745; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4746; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44747; CHECK-RV32-NEXT: addi a0, a0, 14748; CHECK-RV32-NEXT: vmv2r.v v16, v84749; CHECK-RV32-NEXT: vmv8r.v v8, v164750; CHECK-RV32-NEXT: andi a2, a3, 84751; CHECK-RV32-NEXT: bnez a2, .LBB61_6064752; CHECK-RV32-NEXT: j .LBB61_734753; CHECK-RV32-NEXT: .LBB61_606: # %cond.load2654754; CHECK-RV32-NEXT: lbu a2, 0(a0)4755; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4756; CHECK-RV32-NEXT: vmv8r.v v16, v84757; CHECK-RV32-NEXT: vmv.s.x v10, a24758; CHECK-RV32-NEXT: li a2, 684759; CHECK-RV32-NEXT: li a4, 674760; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4761; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44762; CHECK-RV32-NEXT: addi a0, a0, 14763; CHECK-RV32-NEXT: vmv2r.v v16, v84764; CHECK-RV32-NEXT: vmv8r.v v8, v164765; CHECK-RV32-NEXT: andi a2, a3, 164766; CHECK-RV32-NEXT: bnez a2, .LBB61_6074767; CHECK-RV32-NEXT: j .LBB61_744768; CHECK-RV32-NEXT: .LBB61_607: # %cond.load2694769; CHECK-RV32-NEXT: lbu a2, 0(a0)4770; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4771; CHECK-RV32-NEXT: vmv8r.v v16, v84772; CHECK-RV32-NEXT: vmv.s.x v10, a24773; CHECK-RV32-NEXT: li a2, 694774; CHECK-RV32-NEXT: li a4, 684775; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4776; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44777; CHECK-RV32-NEXT: addi a0, a0, 14778; CHECK-RV32-NEXT: vmv2r.v v16, v84779; CHECK-RV32-NEXT: vmv8r.v v8, v164780; CHECK-RV32-NEXT: andi a2, a3, 324781; CHECK-RV32-NEXT: bnez a2, .LBB61_6084782; CHECK-RV32-NEXT: j .LBB61_754783; CHECK-RV32-NEXT: .LBB61_608: # %cond.load2734784; CHECK-RV32-NEXT: lbu a2, 0(a0)4785; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4786; CHECK-RV32-NEXT: vmv8r.v v16, v84787; CHECK-RV32-NEXT: vmv.s.x v10, a24788; CHECK-RV32-NEXT: li a2, 704789; CHECK-RV32-NEXT: li a4, 694790; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4791; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44792; CHECK-RV32-NEXT: addi a0, a0, 14793; CHECK-RV32-NEXT: vmv2r.v v16, v84794; CHECK-RV32-NEXT: vmv8r.v v8, v164795; CHECK-RV32-NEXT: andi a2, a3, 644796; CHECK-RV32-NEXT: bnez a2, .LBB61_6094797; CHECK-RV32-NEXT: j .LBB61_764798; CHECK-RV32-NEXT: .LBB61_609: # %cond.load2774799; CHECK-RV32-NEXT: lbu a2, 0(a0)4800; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4801; CHECK-RV32-NEXT: vmv8r.v v16, v84802; CHECK-RV32-NEXT: vmv.s.x v10, a24803; CHECK-RV32-NEXT: li a2, 714804; CHECK-RV32-NEXT: li a4, 704805; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4806; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44807; CHECK-RV32-NEXT: addi a0, a0, 14808; CHECK-RV32-NEXT: vmv2r.v v16, v84809; CHECK-RV32-NEXT: vmv8r.v v8, v164810; CHECK-RV32-NEXT: andi a2, a3, 1284811; CHECK-RV32-NEXT: bnez a2, .LBB61_6104812; CHECK-RV32-NEXT: j .LBB61_774813; CHECK-RV32-NEXT: .LBB61_610: # %cond.load2814814; CHECK-RV32-NEXT: lbu a2, 0(a0)4815; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4816; CHECK-RV32-NEXT: vmv8r.v v16, v84817; CHECK-RV32-NEXT: vmv.s.x v10, a24818; CHECK-RV32-NEXT: li a2, 724819; CHECK-RV32-NEXT: li a4, 714820; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4821; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44822; CHECK-RV32-NEXT: addi a0, a0, 14823; CHECK-RV32-NEXT: vmv2r.v v16, v84824; CHECK-RV32-NEXT: vmv8r.v v8, v164825; CHECK-RV32-NEXT: andi a2, a3, 2564826; CHECK-RV32-NEXT: bnez a2, .LBB61_6114827; CHECK-RV32-NEXT: j .LBB61_784828; CHECK-RV32-NEXT: .LBB61_611: # %cond.load2854829; CHECK-RV32-NEXT: lbu a2, 0(a0)4830; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4831; CHECK-RV32-NEXT: vmv8r.v v16, v84832; CHECK-RV32-NEXT: vmv.s.x v10, a24833; CHECK-RV32-NEXT: li a2, 734834; CHECK-RV32-NEXT: li a4, 724835; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4836; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44837; CHECK-RV32-NEXT: addi a0, a0, 14838; CHECK-RV32-NEXT: vmv2r.v v16, v84839; CHECK-RV32-NEXT: vmv8r.v v8, v164840; CHECK-RV32-NEXT: andi a2, a3, 5124841; CHECK-RV32-NEXT: bnez a2, .LBB61_6124842; CHECK-RV32-NEXT: j .LBB61_794843; CHECK-RV32-NEXT: .LBB61_612: # %cond.load2894844; CHECK-RV32-NEXT: lbu a2, 0(a0)4845; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4846; CHECK-RV32-NEXT: vmv8r.v v16, v84847; CHECK-RV32-NEXT: vmv.s.x v10, a24848; CHECK-RV32-NEXT: li a2, 744849; CHECK-RV32-NEXT: li a4, 734850; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4851; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44852; CHECK-RV32-NEXT: addi a0, a0, 14853; CHECK-RV32-NEXT: vmv2r.v v16, v84854; CHECK-RV32-NEXT: vmv8r.v v8, v164855; CHECK-RV32-NEXT: andi a2, a3, 10244856; CHECK-RV32-NEXT: bnez a2, .LBB61_6134857; CHECK-RV32-NEXT: j .LBB61_804858; CHECK-RV32-NEXT: .LBB61_613: # %cond.load2934859; CHECK-RV32-NEXT: lbu a2, 0(a0)4860; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4861; CHECK-RV32-NEXT: vmv8r.v v16, v84862; CHECK-RV32-NEXT: vmv.s.x v10, a24863; CHECK-RV32-NEXT: li a2, 754864; CHECK-RV32-NEXT: li a4, 744865; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4866; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44867; CHECK-RV32-NEXT: addi a0, a0, 14868; CHECK-RV32-NEXT: vmv2r.v v16, v84869; CHECK-RV32-NEXT: vmv8r.v v8, v164870; CHECK-RV32-NEXT: slli a2, a3, 204871; CHECK-RV32-NEXT: bltz a2, .LBB61_6144872; CHECK-RV32-NEXT: j .LBB61_814873; CHECK-RV32-NEXT: .LBB61_614: # %cond.load2974874; CHECK-RV32-NEXT: lbu a2, 0(a0)4875; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4876; CHECK-RV32-NEXT: vmv8r.v v16, v84877; CHECK-RV32-NEXT: vmv.s.x v10, a24878; CHECK-RV32-NEXT: li a2, 764879; CHECK-RV32-NEXT: li a4, 754880; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4881; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44882; CHECK-RV32-NEXT: addi a0, a0, 14883; CHECK-RV32-NEXT: vmv2r.v v16, v84884; CHECK-RV32-NEXT: vmv8r.v v8, v164885; CHECK-RV32-NEXT: slli a2, a3, 194886; CHECK-RV32-NEXT: bltz a2, .LBB61_6154887; CHECK-RV32-NEXT: j .LBB61_824888; CHECK-RV32-NEXT: .LBB61_615: # %cond.load3014889; CHECK-RV32-NEXT: lbu a2, 0(a0)4890; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4891; CHECK-RV32-NEXT: vmv8r.v v16, v84892; CHECK-RV32-NEXT: vmv.s.x v10, a24893; CHECK-RV32-NEXT: li a2, 774894; CHECK-RV32-NEXT: li a4, 764895; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4896; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44897; CHECK-RV32-NEXT: addi a0, a0, 14898; CHECK-RV32-NEXT: vmv2r.v v16, v84899; CHECK-RV32-NEXT: vmv8r.v v8, v164900; CHECK-RV32-NEXT: slli a2, a3, 184901; CHECK-RV32-NEXT: bltz a2, .LBB61_6164902; CHECK-RV32-NEXT: j .LBB61_834903; CHECK-RV32-NEXT: .LBB61_616: # %cond.load3054904; CHECK-RV32-NEXT: lbu a2, 0(a0)4905; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4906; CHECK-RV32-NEXT: vmv8r.v v16, v84907; CHECK-RV32-NEXT: vmv.s.x v10, a24908; CHECK-RV32-NEXT: li a2, 784909; CHECK-RV32-NEXT: li a4, 774910; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4911; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44912; CHECK-RV32-NEXT: addi a0, a0, 14913; CHECK-RV32-NEXT: vmv2r.v v16, v84914; CHECK-RV32-NEXT: vmv8r.v v8, v164915; CHECK-RV32-NEXT: slli a2, a3, 174916; CHECK-RV32-NEXT: bltz a2, .LBB61_6174917; CHECK-RV32-NEXT: j .LBB61_844918; CHECK-RV32-NEXT: .LBB61_617: # %cond.load3094919; CHECK-RV32-NEXT: lbu a2, 0(a0)4920; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4921; CHECK-RV32-NEXT: vmv8r.v v16, v84922; CHECK-RV32-NEXT: vmv.s.x v10, a24923; CHECK-RV32-NEXT: li a2, 794924; CHECK-RV32-NEXT: li a4, 784925; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4926; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44927; CHECK-RV32-NEXT: addi a0, a0, 14928; CHECK-RV32-NEXT: vmv2r.v v16, v84929; CHECK-RV32-NEXT: vmv8r.v v8, v164930; CHECK-RV32-NEXT: slli a2, a3, 164931; CHECK-RV32-NEXT: bltz a2, .LBB61_6184932; CHECK-RV32-NEXT: j .LBB61_854933; CHECK-RV32-NEXT: .LBB61_618: # %cond.load3134934; CHECK-RV32-NEXT: lbu a2, 0(a0)4935; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4936; CHECK-RV32-NEXT: vmv8r.v v16, v84937; CHECK-RV32-NEXT: vmv.s.x v10, a24938; CHECK-RV32-NEXT: li a2, 804939; CHECK-RV32-NEXT: li a4, 794940; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4941; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44942; CHECK-RV32-NEXT: addi a0, a0, 14943; CHECK-RV32-NEXT: vmv2r.v v16, v84944; CHECK-RV32-NEXT: vmv8r.v v8, v164945; CHECK-RV32-NEXT: slli a2, a3, 154946; CHECK-RV32-NEXT: bltz a2, .LBB61_6194947; CHECK-RV32-NEXT: j .LBB61_864948; CHECK-RV32-NEXT: .LBB61_619: # %cond.load3174949; CHECK-RV32-NEXT: lbu a2, 0(a0)4950; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4951; CHECK-RV32-NEXT: vmv8r.v v16, v84952; CHECK-RV32-NEXT: vmv.s.x v10, a24953; CHECK-RV32-NEXT: li a2, 814954; CHECK-RV32-NEXT: li a4, 804955; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4956; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44957; CHECK-RV32-NEXT: addi a0, a0, 14958; CHECK-RV32-NEXT: vmv2r.v v16, v84959; CHECK-RV32-NEXT: vmv8r.v v8, v164960; CHECK-RV32-NEXT: slli a2, a3, 144961; CHECK-RV32-NEXT: bltz a2, .LBB61_6204962; CHECK-RV32-NEXT: j .LBB61_874963; CHECK-RV32-NEXT: .LBB61_620: # %cond.load3214964; CHECK-RV32-NEXT: lbu a2, 0(a0)4965; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4966; CHECK-RV32-NEXT: vmv8r.v v16, v84967; CHECK-RV32-NEXT: vmv.s.x v10, a24968; CHECK-RV32-NEXT: li a2, 824969; CHECK-RV32-NEXT: li a4, 814970; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4971; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44972; CHECK-RV32-NEXT: addi a0, a0, 14973; CHECK-RV32-NEXT: vmv2r.v v16, v84974; CHECK-RV32-NEXT: vmv8r.v v8, v164975; CHECK-RV32-NEXT: slli a2, a3, 134976; CHECK-RV32-NEXT: bltz a2, .LBB61_6214977; CHECK-RV32-NEXT: j .LBB61_884978; CHECK-RV32-NEXT: .LBB61_621: # %cond.load3254979; CHECK-RV32-NEXT: lbu a2, 0(a0)4980; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4981; CHECK-RV32-NEXT: vmv8r.v v16, v84982; CHECK-RV32-NEXT: vmv.s.x v10, a24983; CHECK-RV32-NEXT: li a2, 834984; CHECK-RV32-NEXT: li a4, 824985; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma4986; CHECK-RV32-NEXT: vslideup.vx v8, v10, a44987; CHECK-RV32-NEXT: addi a0, a0, 14988; CHECK-RV32-NEXT: vmv2r.v v16, v84989; CHECK-RV32-NEXT: vmv8r.v v8, v164990; CHECK-RV32-NEXT: slli a2, a3, 124991; CHECK-RV32-NEXT: bltz a2, .LBB61_6224992; CHECK-RV32-NEXT: j .LBB61_894993; CHECK-RV32-NEXT: .LBB61_622: # %cond.load3294994; CHECK-RV32-NEXT: lbu a2, 0(a0)4995; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma4996; CHECK-RV32-NEXT: vmv8r.v v16, v84997; CHECK-RV32-NEXT: vmv.s.x v10, a24998; CHECK-RV32-NEXT: li a2, 844999; CHECK-RV32-NEXT: li a4, 835000; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5001; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45002; CHECK-RV32-NEXT: addi a0, a0, 15003; CHECK-RV32-NEXT: vmv2r.v v16, v85004; CHECK-RV32-NEXT: vmv8r.v v8, v165005; CHECK-RV32-NEXT: slli a2, a3, 115006; CHECK-RV32-NEXT: bltz a2, .LBB61_6235007; CHECK-RV32-NEXT: j .LBB61_905008; CHECK-RV32-NEXT: .LBB61_623: # %cond.load3335009; CHECK-RV32-NEXT: lbu a2, 0(a0)5010; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5011; CHECK-RV32-NEXT: vmv8r.v v16, v85012; CHECK-RV32-NEXT: vmv.s.x v10, a25013; CHECK-RV32-NEXT: li a2, 855014; CHECK-RV32-NEXT: li a4, 845015; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5016; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45017; CHECK-RV32-NEXT: addi a0, a0, 15018; CHECK-RV32-NEXT: vmv2r.v v16, v85019; CHECK-RV32-NEXT: vmv8r.v v8, v165020; CHECK-RV32-NEXT: slli a2, a3, 105021; CHECK-RV32-NEXT: bltz a2, .LBB61_6245022; CHECK-RV32-NEXT: j .LBB61_915023; CHECK-RV32-NEXT: .LBB61_624: # %cond.load3375024; CHECK-RV32-NEXT: lbu a2, 0(a0)5025; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5026; CHECK-RV32-NEXT: vmv8r.v v16, v85027; CHECK-RV32-NEXT: vmv.s.x v10, a25028; CHECK-RV32-NEXT: li a2, 865029; CHECK-RV32-NEXT: li a4, 855030; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5031; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45032; CHECK-RV32-NEXT: addi a0, a0, 15033; CHECK-RV32-NEXT: vmv2r.v v16, v85034; CHECK-RV32-NEXT: vmv8r.v v8, v165035; CHECK-RV32-NEXT: slli a2, a3, 95036; CHECK-RV32-NEXT: bltz a2, .LBB61_6255037; CHECK-RV32-NEXT: j .LBB61_925038; CHECK-RV32-NEXT: .LBB61_625: # %cond.load3415039; CHECK-RV32-NEXT: lbu a2, 0(a0)5040; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5041; CHECK-RV32-NEXT: vmv8r.v v16, v85042; CHECK-RV32-NEXT: vmv.s.x v10, a25043; CHECK-RV32-NEXT: li a2, 875044; CHECK-RV32-NEXT: li a4, 865045; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5046; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45047; CHECK-RV32-NEXT: addi a0, a0, 15048; CHECK-RV32-NEXT: vmv2r.v v16, v85049; CHECK-RV32-NEXT: vmv8r.v v8, v165050; CHECK-RV32-NEXT: slli a2, a3, 85051; CHECK-RV32-NEXT: bltz a2, .LBB61_6265052; CHECK-RV32-NEXT: j .LBB61_935053; CHECK-RV32-NEXT: .LBB61_626: # %cond.load3455054; CHECK-RV32-NEXT: lbu a2, 0(a0)5055; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5056; CHECK-RV32-NEXT: vmv8r.v v16, v85057; CHECK-RV32-NEXT: vmv.s.x v10, a25058; CHECK-RV32-NEXT: li a2, 885059; CHECK-RV32-NEXT: li a4, 875060; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5061; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45062; CHECK-RV32-NEXT: addi a0, a0, 15063; CHECK-RV32-NEXT: vmv2r.v v16, v85064; CHECK-RV32-NEXT: vmv8r.v v8, v165065; CHECK-RV32-NEXT: slli a2, a3, 75066; CHECK-RV32-NEXT: bltz a2, .LBB61_6275067; CHECK-RV32-NEXT: j .LBB61_945068; CHECK-RV32-NEXT: .LBB61_627: # %cond.load3495069; CHECK-RV32-NEXT: lbu a2, 0(a0)5070; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5071; CHECK-RV32-NEXT: vmv8r.v v16, v85072; CHECK-RV32-NEXT: vmv.s.x v10, a25073; CHECK-RV32-NEXT: li a2, 895074; CHECK-RV32-NEXT: li a4, 885075; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5076; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45077; CHECK-RV32-NEXT: addi a0, a0, 15078; CHECK-RV32-NEXT: vmv2r.v v16, v85079; CHECK-RV32-NEXT: vmv8r.v v8, v165080; CHECK-RV32-NEXT: slli a2, a3, 65081; CHECK-RV32-NEXT: bltz a2, .LBB61_6285082; CHECK-RV32-NEXT: j .LBB61_955083; CHECK-RV32-NEXT: .LBB61_628: # %cond.load3535084; CHECK-RV32-NEXT: lbu a2, 0(a0)5085; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5086; CHECK-RV32-NEXT: vmv8r.v v16, v85087; CHECK-RV32-NEXT: vmv.s.x v10, a25088; CHECK-RV32-NEXT: li a2, 905089; CHECK-RV32-NEXT: li a4, 895090; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5091; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45092; CHECK-RV32-NEXT: addi a0, a0, 15093; CHECK-RV32-NEXT: vmv2r.v v16, v85094; CHECK-RV32-NEXT: vmv8r.v v8, v165095; CHECK-RV32-NEXT: slli a2, a3, 55096; CHECK-RV32-NEXT: bltz a2, .LBB61_6295097; CHECK-RV32-NEXT: j .LBB61_965098; CHECK-RV32-NEXT: .LBB61_629: # %cond.load3575099; CHECK-RV32-NEXT: lbu a2, 0(a0)5100; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5101; CHECK-RV32-NEXT: vmv8r.v v16, v85102; CHECK-RV32-NEXT: vmv.s.x v10, a25103; CHECK-RV32-NEXT: li a2, 915104; CHECK-RV32-NEXT: li a4, 905105; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5106; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45107; CHECK-RV32-NEXT: addi a0, a0, 15108; CHECK-RV32-NEXT: vmv2r.v v16, v85109; CHECK-RV32-NEXT: vmv8r.v v8, v165110; CHECK-RV32-NEXT: slli a2, a3, 45111; CHECK-RV32-NEXT: bltz a2, .LBB61_6305112; CHECK-RV32-NEXT: j .LBB61_975113; CHECK-RV32-NEXT: .LBB61_630: # %cond.load3615114; CHECK-RV32-NEXT: lbu a2, 0(a0)5115; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5116; CHECK-RV32-NEXT: vmv8r.v v16, v85117; CHECK-RV32-NEXT: vmv.s.x v10, a25118; CHECK-RV32-NEXT: li a2, 925119; CHECK-RV32-NEXT: li a4, 915120; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5121; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45122; CHECK-RV32-NEXT: addi a0, a0, 15123; CHECK-RV32-NEXT: vmv2r.v v16, v85124; CHECK-RV32-NEXT: vmv8r.v v8, v165125; CHECK-RV32-NEXT: slli a2, a3, 35126; CHECK-RV32-NEXT: bltz a2, .LBB61_6315127; CHECK-RV32-NEXT: j .LBB61_985128; CHECK-RV32-NEXT: .LBB61_631: # %cond.load3655129; CHECK-RV32-NEXT: lbu a2, 0(a0)5130; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5131; CHECK-RV32-NEXT: vmv8r.v v16, v85132; CHECK-RV32-NEXT: vmv.s.x v10, a25133; CHECK-RV32-NEXT: li a2, 935134; CHECK-RV32-NEXT: li a4, 925135; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5136; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45137; CHECK-RV32-NEXT: addi a0, a0, 15138; CHECK-RV32-NEXT: vmv2r.v v16, v85139; CHECK-RV32-NEXT: vmv8r.v v8, v165140; CHECK-RV32-NEXT: slli a2, a3, 25141; CHECK-RV32-NEXT: bgez a2, .LBB61_10275142; CHECK-RV32-NEXT: j .LBB61_995143; CHECK-RV32-NEXT: .LBB61_1027: # %cond.load3655144; CHECK-RV32-NEXT: j .LBB61_1005145; CHECK-RV32-NEXT: .LBB61_632: # %cond.load3775146; CHECK-RV32-NEXT: lbu a3, 0(a0)5147; CHECK-RV32-NEXT: vmv8r.v v16, v85148; CHECK-RV32-NEXT: vmv.s.x v10, a35149; CHECK-RV32-NEXT: li a3, 965150; CHECK-RV32-NEXT: li a4, 955151; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5152; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45153; CHECK-RV32-NEXT: addi a0, a0, 15154; CHECK-RV32-NEXT: vmv2r.v v16, v85155; CHECK-RV32-NEXT: vmv8r.v v8, v165156; CHECK-RV32-NEXT: andi a3, a2, 15157; CHECK-RV32-NEXT: bnez a3, .LBB61_6335158; CHECK-RV32-NEXT: j .LBB61_1045159; CHECK-RV32-NEXT: .LBB61_633: # %cond.load3815160; CHECK-RV32-NEXT: lbu a3, 0(a0)5161; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5162; CHECK-RV32-NEXT: vmv8r.v v16, v85163; CHECK-RV32-NEXT: vmv.s.x v10, a35164; CHECK-RV32-NEXT: li a3, 975165; CHECK-RV32-NEXT: li a4, 965166; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5167; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45168; CHECK-RV32-NEXT: addi a0, a0, 15169; CHECK-RV32-NEXT: vmv2r.v v16, v85170; CHECK-RV32-NEXT: vmv8r.v v8, v165171; CHECK-RV32-NEXT: andi a3, a2, 25172; CHECK-RV32-NEXT: bnez a3, .LBB61_6345173; CHECK-RV32-NEXT: j .LBB61_1055174; CHECK-RV32-NEXT: .LBB61_634: # %cond.load3855175; CHECK-RV32-NEXT: lbu a3, 0(a0)5176; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5177; CHECK-RV32-NEXT: vmv8r.v v16, v85178; CHECK-RV32-NEXT: vmv.s.x v10, a35179; CHECK-RV32-NEXT: li a3, 985180; CHECK-RV32-NEXT: li a4, 975181; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5182; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45183; CHECK-RV32-NEXT: addi a0, a0, 15184; CHECK-RV32-NEXT: vmv2r.v v16, v85185; CHECK-RV32-NEXT: vmv8r.v v8, v165186; CHECK-RV32-NEXT: andi a3, a2, 45187; CHECK-RV32-NEXT: bnez a3, .LBB61_6355188; CHECK-RV32-NEXT: j .LBB61_1065189; CHECK-RV32-NEXT: .LBB61_635: # %cond.load3895190; CHECK-RV32-NEXT: lbu a3, 0(a0)5191; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5192; CHECK-RV32-NEXT: vmv8r.v v16, v85193; CHECK-RV32-NEXT: vmv.s.x v10, a35194; CHECK-RV32-NEXT: li a3, 995195; CHECK-RV32-NEXT: li a4, 985196; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5197; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45198; CHECK-RV32-NEXT: addi a0, a0, 15199; CHECK-RV32-NEXT: vmv2r.v v16, v85200; CHECK-RV32-NEXT: vmv8r.v v8, v165201; CHECK-RV32-NEXT: andi a3, a2, 85202; CHECK-RV32-NEXT: bnez a3, .LBB61_6365203; CHECK-RV32-NEXT: j .LBB61_1075204; CHECK-RV32-NEXT: .LBB61_636: # %cond.load3935205; CHECK-RV32-NEXT: lbu a3, 0(a0)5206; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5207; CHECK-RV32-NEXT: vmv8r.v v16, v85208; CHECK-RV32-NEXT: vmv.s.x v10, a35209; CHECK-RV32-NEXT: li a3, 1005210; CHECK-RV32-NEXT: li a4, 995211; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5212; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45213; CHECK-RV32-NEXT: addi a0, a0, 15214; CHECK-RV32-NEXT: vmv2r.v v16, v85215; CHECK-RV32-NEXT: vmv8r.v v8, v165216; CHECK-RV32-NEXT: andi a3, a2, 165217; CHECK-RV32-NEXT: bnez a3, .LBB61_6375218; CHECK-RV32-NEXT: j .LBB61_1085219; CHECK-RV32-NEXT: .LBB61_637: # %cond.load3975220; CHECK-RV32-NEXT: lbu a3, 0(a0)5221; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5222; CHECK-RV32-NEXT: vmv8r.v v16, v85223; CHECK-RV32-NEXT: vmv.s.x v10, a35224; CHECK-RV32-NEXT: li a3, 1015225; CHECK-RV32-NEXT: li a4, 1005226; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5227; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45228; CHECK-RV32-NEXT: addi a0, a0, 15229; CHECK-RV32-NEXT: vmv2r.v v16, v85230; CHECK-RV32-NEXT: vmv8r.v v8, v165231; CHECK-RV32-NEXT: andi a3, a2, 325232; CHECK-RV32-NEXT: bnez a3, .LBB61_6385233; CHECK-RV32-NEXT: j .LBB61_1095234; CHECK-RV32-NEXT: .LBB61_638: # %cond.load4015235; CHECK-RV32-NEXT: lbu a3, 0(a0)5236; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5237; CHECK-RV32-NEXT: vmv8r.v v16, v85238; CHECK-RV32-NEXT: vmv.s.x v10, a35239; CHECK-RV32-NEXT: li a3, 1025240; CHECK-RV32-NEXT: li a4, 1015241; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5242; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45243; CHECK-RV32-NEXT: addi a0, a0, 15244; CHECK-RV32-NEXT: vmv2r.v v16, v85245; CHECK-RV32-NEXT: vmv8r.v v8, v165246; CHECK-RV32-NEXT: andi a3, a2, 645247; CHECK-RV32-NEXT: bnez a3, .LBB61_6395248; CHECK-RV32-NEXT: j .LBB61_1105249; CHECK-RV32-NEXT: .LBB61_639: # %cond.load4055250; CHECK-RV32-NEXT: lbu a3, 0(a0)5251; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5252; CHECK-RV32-NEXT: vmv8r.v v16, v85253; CHECK-RV32-NEXT: vmv.s.x v10, a35254; CHECK-RV32-NEXT: li a3, 1035255; CHECK-RV32-NEXT: li a4, 1025256; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5257; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45258; CHECK-RV32-NEXT: addi a0, a0, 15259; CHECK-RV32-NEXT: vmv2r.v v16, v85260; CHECK-RV32-NEXT: vmv8r.v v8, v165261; CHECK-RV32-NEXT: andi a3, a2, 1285262; CHECK-RV32-NEXT: bnez a3, .LBB61_6405263; CHECK-RV32-NEXT: j .LBB61_1115264; CHECK-RV32-NEXT: .LBB61_640: # %cond.load4095265; CHECK-RV32-NEXT: lbu a3, 0(a0)5266; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5267; CHECK-RV32-NEXT: vmv8r.v v16, v85268; CHECK-RV32-NEXT: vmv.s.x v10, a35269; CHECK-RV32-NEXT: li a3, 1045270; CHECK-RV32-NEXT: li a4, 1035271; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5272; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45273; CHECK-RV32-NEXT: addi a0, a0, 15274; CHECK-RV32-NEXT: vmv2r.v v16, v85275; CHECK-RV32-NEXT: vmv8r.v v8, v165276; CHECK-RV32-NEXT: andi a3, a2, 2565277; CHECK-RV32-NEXT: bnez a3, .LBB61_6415278; CHECK-RV32-NEXT: j .LBB61_1125279; CHECK-RV32-NEXT: .LBB61_641: # %cond.load4135280; CHECK-RV32-NEXT: lbu a3, 0(a0)5281; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5282; CHECK-RV32-NEXT: vmv8r.v v16, v85283; CHECK-RV32-NEXT: vmv.s.x v10, a35284; CHECK-RV32-NEXT: li a3, 1055285; CHECK-RV32-NEXT: li a4, 1045286; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5287; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45288; CHECK-RV32-NEXT: addi a0, a0, 15289; CHECK-RV32-NEXT: vmv2r.v v16, v85290; CHECK-RV32-NEXT: vmv8r.v v8, v165291; CHECK-RV32-NEXT: andi a3, a2, 5125292; CHECK-RV32-NEXT: bnez a3, .LBB61_6425293; CHECK-RV32-NEXT: j .LBB61_1135294; CHECK-RV32-NEXT: .LBB61_642: # %cond.load4175295; CHECK-RV32-NEXT: lbu a3, 0(a0)5296; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5297; CHECK-RV32-NEXT: vmv8r.v v16, v85298; CHECK-RV32-NEXT: vmv.s.x v10, a35299; CHECK-RV32-NEXT: li a3, 1065300; CHECK-RV32-NEXT: li a4, 1055301; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5302; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45303; CHECK-RV32-NEXT: addi a0, a0, 15304; CHECK-RV32-NEXT: vmv2r.v v16, v85305; CHECK-RV32-NEXT: vmv8r.v v8, v165306; CHECK-RV32-NEXT: andi a3, a2, 10245307; CHECK-RV32-NEXT: bnez a3, .LBB61_6435308; CHECK-RV32-NEXT: j .LBB61_1145309; CHECK-RV32-NEXT: .LBB61_643: # %cond.load4215310; CHECK-RV32-NEXT: lbu a3, 0(a0)5311; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5312; CHECK-RV32-NEXT: vmv8r.v v16, v85313; CHECK-RV32-NEXT: vmv.s.x v10, a35314; CHECK-RV32-NEXT: li a3, 1075315; CHECK-RV32-NEXT: li a4, 1065316; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5317; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45318; CHECK-RV32-NEXT: addi a0, a0, 15319; CHECK-RV32-NEXT: vmv2r.v v16, v85320; CHECK-RV32-NEXT: vmv8r.v v8, v165321; CHECK-RV32-NEXT: slli a3, a2, 205322; CHECK-RV32-NEXT: bltz a3, .LBB61_6445323; CHECK-RV32-NEXT: j .LBB61_1155324; CHECK-RV32-NEXT: .LBB61_644: # %cond.load4255325; CHECK-RV32-NEXT: lbu a3, 0(a0)5326; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5327; CHECK-RV32-NEXT: vmv8r.v v16, v85328; CHECK-RV32-NEXT: vmv.s.x v10, a35329; CHECK-RV32-NEXT: li a3, 1085330; CHECK-RV32-NEXT: li a4, 1075331; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5332; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45333; CHECK-RV32-NEXT: addi a0, a0, 15334; CHECK-RV32-NEXT: vmv2r.v v16, v85335; CHECK-RV32-NEXT: vmv8r.v v8, v165336; CHECK-RV32-NEXT: slli a3, a2, 195337; CHECK-RV32-NEXT: bltz a3, .LBB61_6455338; CHECK-RV32-NEXT: j .LBB61_1165339; CHECK-RV32-NEXT: .LBB61_645: # %cond.load4295340; CHECK-RV32-NEXT: lbu a3, 0(a0)5341; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5342; CHECK-RV32-NEXT: vmv8r.v v16, v85343; CHECK-RV32-NEXT: vmv.s.x v10, a35344; CHECK-RV32-NEXT: li a3, 1095345; CHECK-RV32-NEXT: li a4, 1085346; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5347; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45348; CHECK-RV32-NEXT: addi a0, a0, 15349; CHECK-RV32-NEXT: vmv2r.v v16, v85350; CHECK-RV32-NEXT: vmv8r.v v8, v165351; CHECK-RV32-NEXT: slli a3, a2, 185352; CHECK-RV32-NEXT: bltz a3, .LBB61_6465353; CHECK-RV32-NEXT: j .LBB61_1175354; CHECK-RV32-NEXT: .LBB61_646: # %cond.load4335355; CHECK-RV32-NEXT: lbu a3, 0(a0)5356; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5357; CHECK-RV32-NEXT: vmv8r.v v16, v85358; CHECK-RV32-NEXT: vmv.s.x v10, a35359; CHECK-RV32-NEXT: li a3, 1105360; CHECK-RV32-NEXT: li a4, 1095361; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5362; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45363; CHECK-RV32-NEXT: addi a0, a0, 15364; CHECK-RV32-NEXT: vmv2r.v v16, v85365; CHECK-RV32-NEXT: vmv8r.v v8, v165366; CHECK-RV32-NEXT: slli a3, a2, 175367; CHECK-RV32-NEXT: bltz a3, .LBB61_6475368; CHECK-RV32-NEXT: j .LBB61_1185369; CHECK-RV32-NEXT: .LBB61_647: # %cond.load4375370; CHECK-RV32-NEXT: lbu a3, 0(a0)5371; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5372; CHECK-RV32-NEXT: vmv8r.v v16, v85373; CHECK-RV32-NEXT: vmv.s.x v10, a35374; CHECK-RV32-NEXT: li a3, 1115375; CHECK-RV32-NEXT: li a4, 1105376; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5377; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45378; CHECK-RV32-NEXT: addi a0, a0, 15379; CHECK-RV32-NEXT: vmv2r.v v16, v85380; CHECK-RV32-NEXT: vmv8r.v v8, v165381; CHECK-RV32-NEXT: slli a3, a2, 165382; CHECK-RV32-NEXT: bltz a3, .LBB61_6485383; CHECK-RV32-NEXT: j .LBB61_1195384; CHECK-RV32-NEXT: .LBB61_648: # %cond.load4415385; CHECK-RV32-NEXT: lbu a3, 0(a0)5386; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5387; CHECK-RV32-NEXT: vmv8r.v v16, v85388; CHECK-RV32-NEXT: vmv.s.x v10, a35389; CHECK-RV32-NEXT: li a3, 1125390; CHECK-RV32-NEXT: li a4, 1115391; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5392; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45393; CHECK-RV32-NEXT: addi a0, a0, 15394; CHECK-RV32-NEXT: vmv2r.v v16, v85395; CHECK-RV32-NEXT: vmv8r.v v8, v165396; CHECK-RV32-NEXT: slli a3, a2, 155397; CHECK-RV32-NEXT: bltz a3, .LBB61_6495398; CHECK-RV32-NEXT: j .LBB61_1205399; CHECK-RV32-NEXT: .LBB61_649: # %cond.load4455400; CHECK-RV32-NEXT: lbu a3, 0(a0)5401; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5402; CHECK-RV32-NEXT: vmv8r.v v16, v85403; CHECK-RV32-NEXT: vmv.s.x v10, a35404; CHECK-RV32-NEXT: li a3, 1135405; CHECK-RV32-NEXT: li a4, 1125406; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5407; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45408; CHECK-RV32-NEXT: addi a0, a0, 15409; CHECK-RV32-NEXT: vmv2r.v v16, v85410; CHECK-RV32-NEXT: vmv8r.v v8, v165411; CHECK-RV32-NEXT: slli a3, a2, 145412; CHECK-RV32-NEXT: bltz a3, .LBB61_6505413; CHECK-RV32-NEXT: j .LBB61_1215414; CHECK-RV32-NEXT: .LBB61_650: # %cond.load4495415; CHECK-RV32-NEXT: lbu a3, 0(a0)5416; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5417; CHECK-RV32-NEXT: vmv8r.v v16, v85418; CHECK-RV32-NEXT: vmv.s.x v10, a35419; CHECK-RV32-NEXT: li a3, 1145420; CHECK-RV32-NEXT: li a4, 1135421; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5422; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45423; CHECK-RV32-NEXT: addi a0, a0, 15424; CHECK-RV32-NEXT: vmv2r.v v16, v85425; CHECK-RV32-NEXT: vmv8r.v v8, v165426; CHECK-RV32-NEXT: slli a3, a2, 135427; CHECK-RV32-NEXT: bltz a3, .LBB61_6515428; CHECK-RV32-NEXT: j .LBB61_1225429; CHECK-RV32-NEXT: .LBB61_651: # %cond.load4535430; CHECK-RV32-NEXT: lbu a3, 0(a0)5431; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5432; CHECK-RV32-NEXT: vmv8r.v v16, v85433; CHECK-RV32-NEXT: vmv.s.x v10, a35434; CHECK-RV32-NEXT: li a3, 1155435; CHECK-RV32-NEXT: li a4, 1145436; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5437; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45438; CHECK-RV32-NEXT: addi a0, a0, 15439; CHECK-RV32-NEXT: vmv2r.v v16, v85440; CHECK-RV32-NEXT: vmv8r.v v8, v165441; CHECK-RV32-NEXT: slli a3, a2, 125442; CHECK-RV32-NEXT: bltz a3, .LBB61_6525443; CHECK-RV32-NEXT: j .LBB61_1235444; CHECK-RV32-NEXT: .LBB61_652: # %cond.load4575445; CHECK-RV32-NEXT: lbu a3, 0(a0)5446; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5447; CHECK-RV32-NEXT: vmv8r.v v16, v85448; CHECK-RV32-NEXT: vmv.s.x v10, a35449; CHECK-RV32-NEXT: li a3, 1165450; CHECK-RV32-NEXT: li a4, 1155451; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5452; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45453; CHECK-RV32-NEXT: addi a0, a0, 15454; CHECK-RV32-NEXT: vmv2r.v v16, v85455; CHECK-RV32-NEXT: vmv8r.v v8, v165456; CHECK-RV32-NEXT: slli a3, a2, 115457; CHECK-RV32-NEXT: bltz a3, .LBB61_6535458; CHECK-RV32-NEXT: j .LBB61_1245459; CHECK-RV32-NEXT: .LBB61_653: # %cond.load4615460; CHECK-RV32-NEXT: lbu a3, 0(a0)5461; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5462; CHECK-RV32-NEXT: vmv8r.v v16, v85463; CHECK-RV32-NEXT: vmv.s.x v10, a35464; CHECK-RV32-NEXT: li a3, 1175465; CHECK-RV32-NEXT: li a4, 1165466; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5467; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45468; CHECK-RV32-NEXT: addi a0, a0, 15469; CHECK-RV32-NEXT: vmv2r.v v16, v85470; CHECK-RV32-NEXT: vmv8r.v v8, v165471; CHECK-RV32-NEXT: slli a3, a2, 105472; CHECK-RV32-NEXT: bltz a3, .LBB61_6545473; CHECK-RV32-NEXT: j .LBB61_1255474; CHECK-RV32-NEXT: .LBB61_654: # %cond.load4655475; CHECK-RV32-NEXT: lbu a3, 0(a0)5476; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5477; CHECK-RV32-NEXT: vmv8r.v v16, v85478; CHECK-RV32-NEXT: vmv.s.x v10, a35479; CHECK-RV32-NEXT: li a3, 1185480; CHECK-RV32-NEXT: li a4, 1175481; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5482; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45483; CHECK-RV32-NEXT: addi a0, a0, 15484; CHECK-RV32-NEXT: vmv2r.v v16, v85485; CHECK-RV32-NEXT: vmv8r.v v8, v165486; CHECK-RV32-NEXT: slli a3, a2, 95487; CHECK-RV32-NEXT: bltz a3, .LBB61_6555488; CHECK-RV32-NEXT: j .LBB61_1265489; CHECK-RV32-NEXT: .LBB61_655: # %cond.load4695490; CHECK-RV32-NEXT: lbu a3, 0(a0)5491; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5492; CHECK-RV32-NEXT: vmv8r.v v16, v85493; CHECK-RV32-NEXT: vmv.s.x v10, a35494; CHECK-RV32-NEXT: li a3, 1195495; CHECK-RV32-NEXT: li a4, 1185496; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5497; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45498; CHECK-RV32-NEXT: addi a0, a0, 15499; CHECK-RV32-NEXT: vmv2r.v v16, v85500; CHECK-RV32-NEXT: vmv8r.v v8, v165501; CHECK-RV32-NEXT: slli a3, a2, 85502; CHECK-RV32-NEXT: bltz a3, .LBB61_6565503; CHECK-RV32-NEXT: j .LBB61_1275504; CHECK-RV32-NEXT: .LBB61_656: # %cond.load4735505; CHECK-RV32-NEXT: lbu a3, 0(a0)5506; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5507; CHECK-RV32-NEXT: vmv8r.v v16, v85508; CHECK-RV32-NEXT: vmv.s.x v10, a35509; CHECK-RV32-NEXT: li a3, 1205510; CHECK-RV32-NEXT: li a4, 1195511; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5512; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45513; CHECK-RV32-NEXT: addi a0, a0, 15514; CHECK-RV32-NEXT: vmv2r.v v16, v85515; CHECK-RV32-NEXT: vmv8r.v v8, v165516; CHECK-RV32-NEXT: slli a3, a2, 75517; CHECK-RV32-NEXT: bltz a3, .LBB61_6575518; CHECK-RV32-NEXT: j .LBB61_1285519; CHECK-RV32-NEXT: .LBB61_657: # %cond.load4775520; CHECK-RV32-NEXT: lbu a3, 0(a0)5521; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5522; CHECK-RV32-NEXT: vmv8r.v v16, v85523; CHECK-RV32-NEXT: vmv.s.x v10, a35524; CHECK-RV32-NEXT: li a3, 1215525; CHECK-RV32-NEXT: li a4, 1205526; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5527; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45528; CHECK-RV32-NEXT: addi a0, a0, 15529; CHECK-RV32-NEXT: vmv2r.v v16, v85530; CHECK-RV32-NEXT: vmv8r.v v8, v165531; CHECK-RV32-NEXT: slli a3, a2, 65532; CHECK-RV32-NEXT: bltz a3, .LBB61_6585533; CHECK-RV32-NEXT: j .LBB61_1295534; CHECK-RV32-NEXT: .LBB61_658: # %cond.load4815535; CHECK-RV32-NEXT: lbu a3, 0(a0)5536; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5537; CHECK-RV32-NEXT: vmv8r.v v16, v85538; CHECK-RV32-NEXT: vmv.s.x v10, a35539; CHECK-RV32-NEXT: li a3, 1225540; CHECK-RV32-NEXT: li a4, 1215541; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5542; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45543; CHECK-RV32-NEXT: addi a0, a0, 15544; CHECK-RV32-NEXT: vmv2r.v v16, v85545; CHECK-RV32-NEXT: vmv8r.v v8, v165546; CHECK-RV32-NEXT: slli a3, a2, 55547; CHECK-RV32-NEXT: bltz a3, .LBB61_6595548; CHECK-RV32-NEXT: j .LBB61_1305549; CHECK-RV32-NEXT: .LBB61_659: # %cond.load4855550; CHECK-RV32-NEXT: lbu a3, 0(a0)5551; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5552; CHECK-RV32-NEXT: vmv8r.v v16, v85553; CHECK-RV32-NEXT: vmv.s.x v10, a35554; CHECK-RV32-NEXT: li a3, 1235555; CHECK-RV32-NEXT: li a4, 1225556; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5557; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45558; CHECK-RV32-NEXT: addi a0, a0, 15559; CHECK-RV32-NEXT: vmv2r.v v16, v85560; CHECK-RV32-NEXT: vmv8r.v v8, v165561; CHECK-RV32-NEXT: slli a3, a2, 45562; CHECK-RV32-NEXT: bltz a3, .LBB61_6605563; CHECK-RV32-NEXT: j .LBB61_1315564; CHECK-RV32-NEXT: .LBB61_660: # %cond.load4895565; CHECK-RV32-NEXT: lbu a3, 0(a0)5566; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5567; CHECK-RV32-NEXT: vmv8r.v v16, v85568; CHECK-RV32-NEXT: vmv.s.x v10, a35569; CHECK-RV32-NEXT: li a3, 1245570; CHECK-RV32-NEXT: li a4, 1235571; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5572; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45573; CHECK-RV32-NEXT: addi a0, a0, 15574; CHECK-RV32-NEXT: vmv2r.v v16, v85575; CHECK-RV32-NEXT: vmv8r.v v8, v165576; CHECK-RV32-NEXT: slli a3, a2, 35577; CHECK-RV32-NEXT: bltz a3, .LBB61_6615578; CHECK-RV32-NEXT: j .LBB61_1325579; CHECK-RV32-NEXT: .LBB61_661: # %cond.load4935580; CHECK-RV32-NEXT: lbu a3, 0(a0)5581; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5582; CHECK-RV32-NEXT: vmv8r.v v16, v85583; CHECK-RV32-NEXT: vmv.s.x v10, a35584; CHECK-RV32-NEXT: li a3, 1255585; CHECK-RV32-NEXT: li a4, 1245586; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m2, tu, ma5587; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45588; CHECK-RV32-NEXT: addi a0, a0, 15589; CHECK-RV32-NEXT: vmv2r.v v16, v85590; CHECK-RV32-NEXT: vmv8r.v v8, v165591; CHECK-RV32-NEXT: slli a3, a2, 25592; CHECK-RV32-NEXT: bgez a3, .LBB61_10285593; CHECK-RV32-NEXT: j .LBB61_1335594; CHECK-RV32-NEXT: .LBB61_1028: # %cond.load4935595; CHECK-RV32-NEXT: j .LBB61_1345596; CHECK-RV32-NEXT: .LBB61_662: # %cond.load5055597; CHECK-RV32-NEXT: lbu a2, 0(a0)5598; CHECK-RV32-NEXT: vmv8r.v v16, v85599; CHECK-RV32-NEXT: vmv.s.x v10, a25600; CHECK-RV32-NEXT: li a2, 1285601; CHECK-RV32-NEXT: li a4, 1275602; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m2, tu, ma5603; CHECK-RV32-NEXT: vslideup.vx v8, v10, a45604; CHECK-RV32-NEXT: addi a0, a0, 15605; CHECK-RV32-NEXT: vmv2r.v v16, v85606; CHECK-RV32-NEXT: vmv8r.v v8, v165607; CHECK-RV32-NEXT: andi a2, a3, 15608; CHECK-RV32-NEXT: bnez a2, .LBB61_6635609; CHECK-RV32-NEXT: j .LBB61_1385610; CHECK-RV32-NEXT: .LBB61_663: # %cond.load5095611; CHECK-RV32-NEXT: lbu a2, 0(a0)5612; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5613; CHECK-RV32-NEXT: vmv8r.v v16, v85614; CHECK-RV32-NEXT: vmv.s.x v12, a25615; CHECK-RV32-NEXT: li a2, 1295616; CHECK-RV32-NEXT: li a4, 1285617; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5618; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45619; CHECK-RV32-NEXT: addi a0, a0, 15620; CHECK-RV32-NEXT: vmv4r.v v16, v85621; CHECK-RV32-NEXT: vmv8r.v v8, v165622; CHECK-RV32-NEXT: andi a2, a3, 25623; CHECK-RV32-NEXT: bnez a2, .LBB61_6645624; CHECK-RV32-NEXT: j .LBB61_1395625; CHECK-RV32-NEXT: .LBB61_664: # %cond.load5135626; CHECK-RV32-NEXT: lbu a2, 0(a0)5627; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5628; CHECK-RV32-NEXT: vmv8r.v v16, v85629; CHECK-RV32-NEXT: vmv.s.x v12, a25630; CHECK-RV32-NEXT: li a2, 1305631; CHECK-RV32-NEXT: li a4, 1295632; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5633; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45634; CHECK-RV32-NEXT: addi a0, a0, 15635; CHECK-RV32-NEXT: vmv4r.v v16, v85636; CHECK-RV32-NEXT: vmv8r.v v8, v165637; CHECK-RV32-NEXT: andi a2, a3, 45638; CHECK-RV32-NEXT: bnez a2, .LBB61_6655639; CHECK-RV32-NEXT: j .LBB61_1405640; CHECK-RV32-NEXT: .LBB61_665: # %cond.load5175641; CHECK-RV32-NEXT: lbu a2, 0(a0)5642; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5643; CHECK-RV32-NEXT: vmv8r.v v16, v85644; CHECK-RV32-NEXT: vmv.s.x v12, a25645; CHECK-RV32-NEXT: li a2, 1315646; CHECK-RV32-NEXT: li a4, 1305647; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5648; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45649; CHECK-RV32-NEXT: addi a0, a0, 15650; CHECK-RV32-NEXT: vmv4r.v v16, v85651; CHECK-RV32-NEXT: vmv8r.v v8, v165652; CHECK-RV32-NEXT: andi a2, a3, 85653; CHECK-RV32-NEXT: bnez a2, .LBB61_6665654; CHECK-RV32-NEXT: j .LBB61_1415655; CHECK-RV32-NEXT: .LBB61_666: # %cond.load5215656; CHECK-RV32-NEXT: lbu a2, 0(a0)5657; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5658; CHECK-RV32-NEXT: vmv8r.v v16, v85659; CHECK-RV32-NEXT: vmv.s.x v12, a25660; CHECK-RV32-NEXT: li a2, 1325661; CHECK-RV32-NEXT: li a4, 1315662; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5663; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45664; CHECK-RV32-NEXT: addi a0, a0, 15665; CHECK-RV32-NEXT: vmv4r.v v16, v85666; CHECK-RV32-NEXT: vmv8r.v v8, v165667; CHECK-RV32-NEXT: andi a2, a3, 165668; CHECK-RV32-NEXT: bnez a2, .LBB61_6675669; CHECK-RV32-NEXT: j .LBB61_1425670; CHECK-RV32-NEXT: .LBB61_667: # %cond.load5255671; CHECK-RV32-NEXT: lbu a2, 0(a0)5672; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5673; CHECK-RV32-NEXT: vmv8r.v v16, v85674; CHECK-RV32-NEXT: vmv.s.x v12, a25675; CHECK-RV32-NEXT: li a2, 1335676; CHECK-RV32-NEXT: li a4, 1325677; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5678; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45679; CHECK-RV32-NEXT: addi a0, a0, 15680; CHECK-RV32-NEXT: vmv4r.v v16, v85681; CHECK-RV32-NEXT: vmv8r.v v8, v165682; CHECK-RV32-NEXT: andi a2, a3, 325683; CHECK-RV32-NEXT: bnez a2, .LBB61_6685684; CHECK-RV32-NEXT: j .LBB61_1435685; CHECK-RV32-NEXT: .LBB61_668: # %cond.load5295686; CHECK-RV32-NEXT: lbu a2, 0(a0)5687; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5688; CHECK-RV32-NEXT: vmv8r.v v16, v85689; CHECK-RV32-NEXT: vmv.s.x v12, a25690; CHECK-RV32-NEXT: li a2, 1345691; CHECK-RV32-NEXT: li a4, 1335692; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5693; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45694; CHECK-RV32-NEXT: addi a0, a0, 15695; CHECK-RV32-NEXT: vmv4r.v v16, v85696; CHECK-RV32-NEXT: vmv8r.v v8, v165697; CHECK-RV32-NEXT: andi a2, a3, 645698; CHECK-RV32-NEXT: bnez a2, .LBB61_6695699; CHECK-RV32-NEXT: j .LBB61_1445700; CHECK-RV32-NEXT: .LBB61_669: # %cond.load5335701; CHECK-RV32-NEXT: lbu a2, 0(a0)5702; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5703; CHECK-RV32-NEXT: vmv8r.v v16, v85704; CHECK-RV32-NEXT: vmv.s.x v12, a25705; CHECK-RV32-NEXT: li a2, 1355706; CHECK-RV32-NEXT: li a4, 1345707; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5708; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45709; CHECK-RV32-NEXT: addi a0, a0, 15710; CHECK-RV32-NEXT: vmv4r.v v16, v85711; CHECK-RV32-NEXT: vmv8r.v v8, v165712; CHECK-RV32-NEXT: andi a2, a3, 1285713; CHECK-RV32-NEXT: bnez a2, .LBB61_6705714; CHECK-RV32-NEXT: j .LBB61_1455715; CHECK-RV32-NEXT: .LBB61_670: # %cond.load5375716; CHECK-RV32-NEXT: lbu a2, 0(a0)5717; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5718; CHECK-RV32-NEXT: vmv8r.v v16, v85719; CHECK-RV32-NEXT: vmv.s.x v12, a25720; CHECK-RV32-NEXT: li a2, 1365721; CHECK-RV32-NEXT: li a4, 1355722; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5723; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45724; CHECK-RV32-NEXT: addi a0, a0, 15725; CHECK-RV32-NEXT: vmv4r.v v16, v85726; CHECK-RV32-NEXT: vmv8r.v v8, v165727; CHECK-RV32-NEXT: andi a2, a3, 2565728; CHECK-RV32-NEXT: bnez a2, .LBB61_6715729; CHECK-RV32-NEXT: j .LBB61_1465730; CHECK-RV32-NEXT: .LBB61_671: # %cond.load5415731; CHECK-RV32-NEXT: lbu a2, 0(a0)5732; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5733; CHECK-RV32-NEXT: vmv8r.v v16, v85734; CHECK-RV32-NEXT: vmv.s.x v12, a25735; CHECK-RV32-NEXT: li a2, 1375736; CHECK-RV32-NEXT: li a4, 1365737; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5738; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45739; CHECK-RV32-NEXT: addi a0, a0, 15740; CHECK-RV32-NEXT: vmv4r.v v16, v85741; CHECK-RV32-NEXT: vmv8r.v v8, v165742; CHECK-RV32-NEXT: andi a2, a3, 5125743; CHECK-RV32-NEXT: bnez a2, .LBB61_6725744; CHECK-RV32-NEXT: j .LBB61_1475745; CHECK-RV32-NEXT: .LBB61_672: # %cond.load5455746; CHECK-RV32-NEXT: lbu a2, 0(a0)5747; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5748; CHECK-RV32-NEXT: vmv8r.v v16, v85749; CHECK-RV32-NEXT: vmv.s.x v12, a25750; CHECK-RV32-NEXT: li a2, 1385751; CHECK-RV32-NEXT: li a4, 1375752; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5753; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45754; CHECK-RV32-NEXT: addi a0, a0, 15755; CHECK-RV32-NEXT: vmv4r.v v16, v85756; CHECK-RV32-NEXT: vmv8r.v v8, v165757; CHECK-RV32-NEXT: andi a2, a3, 10245758; CHECK-RV32-NEXT: bnez a2, .LBB61_6735759; CHECK-RV32-NEXT: j .LBB61_1485760; CHECK-RV32-NEXT: .LBB61_673: # %cond.load5495761; CHECK-RV32-NEXT: lbu a2, 0(a0)5762; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5763; CHECK-RV32-NEXT: vmv8r.v v16, v85764; CHECK-RV32-NEXT: vmv.s.x v12, a25765; CHECK-RV32-NEXT: li a2, 1395766; CHECK-RV32-NEXT: li a4, 1385767; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5768; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45769; CHECK-RV32-NEXT: addi a0, a0, 15770; CHECK-RV32-NEXT: vmv4r.v v16, v85771; CHECK-RV32-NEXT: vmv8r.v v8, v165772; CHECK-RV32-NEXT: slli a2, a3, 205773; CHECK-RV32-NEXT: bltz a2, .LBB61_6745774; CHECK-RV32-NEXT: j .LBB61_1495775; CHECK-RV32-NEXT: .LBB61_674: # %cond.load5535776; CHECK-RV32-NEXT: lbu a2, 0(a0)5777; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5778; CHECK-RV32-NEXT: vmv8r.v v16, v85779; CHECK-RV32-NEXT: vmv.s.x v12, a25780; CHECK-RV32-NEXT: li a2, 1405781; CHECK-RV32-NEXT: li a4, 1395782; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5783; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45784; CHECK-RV32-NEXT: addi a0, a0, 15785; CHECK-RV32-NEXT: vmv4r.v v16, v85786; CHECK-RV32-NEXT: vmv8r.v v8, v165787; CHECK-RV32-NEXT: slli a2, a3, 195788; CHECK-RV32-NEXT: bltz a2, .LBB61_6755789; CHECK-RV32-NEXT: j .LBB61_1505790; CHECK-RV32-NEXT: .LBB61_675: # %cond.load5575791; CHECK-RV32-NEXT: lbu a2, 0(a0)5792; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5793; CHECK-RV32-NEXT: vmv8r.v v16, v85794; CHECK-RV32-NEXT: vmv.s.x v12, a25795; CHECK-RV32-NEXT: li a2, 1415796; CHECK-RV32-NEXT: li a4, 1405797; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5798; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45799; CHECK-RV32-NEXT: addi a0, a0, 15800; CHECK-RV32-NEXT: vmv4r.v v16, v85801; CHECK-RV32-NEXT: vmv8r.v v8, v165802; CHECK-RV32-NEXT: slli a2, a3, 185803; CHECK-RV32-NEXT: bltz a2, .LBB61_6765804; CHECK-RV32-NEXT: j .LBB61_1515805; CHECK-RV32-NEXT: .LBB61_676: # %cond.load5615806; CHECK-RV32-NEXT: lbu a2, 0(a0)5807; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5808; CHECK-RV32-NEXT: vmv8r.v v16, v85809; CHECK-RV32-NEXT: vmv.s.x v12, a25810; CHECK-RV32-NEXT: li a2, 1425811; CHECK-RV32-NEXT: li a4, 1415812; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5813; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45814; CHECK-RV32-NEXT: addi a0, a0, 15815; CHECK-RV32-NEXT: vmv4r.v v16, v85816; CHECK-RV32-NEXT: vmv8r.v v8, v165817; CHECK-RV32-NEXT: slli a2, a3, 175818; CHECK-RV32-NEXT: bltz a2, .LBB61_6775819; CHECK-RV32-NEXT: j .LBB61_1525820; CHECK-RV32-NEXT: .LBB61_677: # %cond.load5655821; CHECK-RV32-NEXT: lbu a2, 0(a0)5822; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5823; CHECK-RV32-NEXT: vmv8r.v v16, v85824; CHECK-RV32-NEXT: vmv.s.x v12, a25825; CHECK-RV32-NEXT: li a2, 1435826; CHECK-RV32-NEXT: li a4, 1425827; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5828; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45829; CHECK-RV32-NEXT: addi a0, a0, 15830; CHECK-RV32-NEXT: vmv4r.v v16, v85831; CHECK-RV32-NEXT: vmv8r.v v8, v165832; CHECK-RV32-NEXT: slli a2, a3, 165833; CHECK-RV32-NEXT: bltz a2, .LBB61_6785834; CHECK-RV32-NEXT: j .LBB61_1535835; CHECK-RV32-NEXT: .LBB61_678: # %cond.load5695836; CHECK-RV32-NEXT: lbu a2, 0(a0)5837; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5838; CHECK-RV32-NEXT: vmv8r.v v16, v85839; CHECK-RV32-NEXT: vmv.s.x v12, a25840; CHECK-RV32-NEXT: li a2, 1445841; CHECK-RV32-NEXT: li a4, 1435842; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5843; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45844; CHECK-RV32-NEXT: addi a0, a0, 15845; CHECK-RV32-NEXT: vmv4r.v v16, v85846; CHECK-RV32-NEXT: vmv8r.v v8, v165847; CHECK-RV32-NEXT: slli a2, a3, 155848; CHECK-RV32-NEXT: bltz a2, .LBB61_6795849; CHECK-RV32-NEXT: j .LBB61_1545850; CHECK-RV32-NEXT: .LBB61_679: # %cond.load5735851; CHECK-RV32-NEXT: lbu a2, 0(a0)5852; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5853; CHECK-RV32-NEXT: vmv8r.v v16, v85854; CHECK-RV32-NEXT: vmv.s.x v12, a25855; CHECK-RV32-NEXT: li a2, 1455856; CHECK-RV32-NEXT: li a4, 1445857; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5858; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45859; CHECK-RV32-NEXT: addi a0, a0, 15860; CHECK-RV32-NEXT: vmv4r.v v16, v85861; CHECK-RV32-NEXT: vmv8r.v v8, v165862; CHECK-RV32-NEXT: slli a2, a3, 145863; CHECK-RV32-NEXT: bltz a2, .LBB61_6805864; CHECK-RV32-NEXT: j .LBB61_1555865; CHECK-RV32-NEXT: .LBB61_680: # %cond.load5775866; CHECK-RV32-NEXT: lbu a2, 0(a0)5867; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5868; CHECK-RV32-NEXT: vmv8r.v v16, v85869; CHECK-RV32-NEXT: vmv.s.x v12, a25870; CHECK-RV32-NEXT: li a2, 1465871; CHECK-RV32-NEXT: li a4, 1455872; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5873; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45874; CHECK-RV32-NEXT: addi a0, a0, 15875; CHECK-RV32-NEXT: vmv4r.v v16, v85876; CHECK-RV32-NEXT: vmv8r.v v8, v165877; CHECK-RV32-NEXT: slli a2, a3, 135878; CHECK-RV32-NEXT: bltz a2, .LBB61_6815879; CHECK-RV32-NEXT: j .LBB61_1565880; CHECK-RV32-NEXT: .LBB61_681: # %cond.load5815881; CHECK-RV32-NEXT: lbu a2, 0(a0)5882; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5883; CHECK-RV32-NEXT: vmv8r.v v16, v85884; CHECK-RV32-NEXT: vmv.s.x v12, a25885; CHECK-RV32-NEXT: li a2, 1475886; CHECK-RV32-NEXT: li a4, 1465887; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5888; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45889; CHECK-RV32-NEXT: addi a0, a0, 15890; CHECK-RV32-NEXT: vmv4r.v v16, v85891; CHECK-RV32-NEXT: vmv8r.v v8, v165892; CHECK-RV32-NEXT: slli a2, a3, 125893; CHECK-RV32-NEXT: bltz a2, .LBB61_6825894; CHECK-RV32-NEXT: j .LBB61_1575895; CHECK-RV32-NEXT: .LBB61_682: # %cond.load5855896; CHECK-RV32-NEXT: lbu a2, 0(a0)5897; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5898; CHECK-RV32-NEXT: vmv8r.v v16, v85899; CHECK-RV32-NEXT: vmv.s.x v12, a25900; CHECK-RV32-NEXT: li a2, 1485901; CHECK-RV32-NEXT: li a4, 1475902; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5903; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45904; CHECK-RV32-NEXT: addi a0, a0, 15905; CHECK-RV32-NEXT: vmv4r.v v16, v85906; CHECK-RV32-NEXT: vmv8r.v v8, v165907; CHECK-RV32-NEXT: slli a2, a3, 115908; CHECK-RV32-NEXT: bltz a2, .LBB61_6835909; CHECK-RV32-NEXT: j .LBB61_1585910; CHECK-RV32-NEXT: .LBB61_683: # %cond.load5895911; CHECK-RV32-NEXT: lbu a2, 0(a0)5912; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5913; CHECK-RV32-NEXT: vmv8r.v v16, v85914; CHECK-RV32-NEXT: vmv.s.x v12, a25915; CHECK-RV32-NEXT: li a2, 1495916; CHECK-RV32-NEXT: li a4, 1485917; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5918; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45919; CHECK-RV32-NEXT: addi a0, a0, 15920; CHECK-RV32-NEXT: vmv4r.v v16, v85921; CHECK-RV32-NEXT: vmv8r.v v8, v165922; CHECK-RV32-NEXT: slli a2, a3, 105923; CHECK-RV32-NEXT: bltz a2, .LBB61_6845924; CHECK-RV32-NEXT: j .LBB61_1595925; CHECK-RV32-NEXT: .LBB61_684: # %cond.load5935926; CHECK-RV32-NEXT: lbu a2, 0(a0)5927; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5928; CHECK-RV32-NEXT: vmv8r.v v16, v85929; CHECK-RV32-NEXT: vmv.s.x v12, a25930; CHECK-RV32-NEXT: li a2, 1505931; CHECK-RV32-NEXT: li a4, 1495932; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5933; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45934; CHECK-RV32-NEXT: addi a0, a0, 15935; CHECK-RV32-NEXT: vmv4r.v v16, v85936; CHECK-RV32-NEXT: vmv8r.v v8, v165937; CHECK-RV32-NEXT: slli a2, a3, 95938; CHECK-RV32-NEXT: bltz a2, .LBB61_6855939; CHECK-RV32-NEXT: j .LBB61_1605940; CHECK-RV32-NEXT: .LBB61_685: # %cond.load5975941; CHECK-RV32-NEXT: lbu a2, 0(a0)5942; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5943; CHECK-RV32-NEXT: vmv8r.v v16, v85944; CHECK-RV32-NEXT: vmv.s.x v12, a25945; CHECK-RV32-NEXT: li a2, 1515946; CHECK-RV32-NEXT: li a4, 1505947; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5948; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45949; CHECK-RV32-NEXT: addi a0, a0, 15950; CHECK-RV32-NEXT: vmv4r.v v16, v85951; CHECK-RV32-NEXT: vmv8r.v v8, v165952; CHECK-RV32-NEXT: slli a2, a3, 85953; CHECK-RV32-NEXT: bltz a2, .LBB61_6865954; CHECK-RV32-NEXT: j .LBB61_1615955; CHECK-RV32-NEXT: .LBB61_686: # %cond.load6015956; CHECK-RV32-NEXT: lbu a2, 0(a0)5957; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5958; CHECK-RV32-NEXT: vmv8r.v v16, v85959; CHECK-RV32-NEXT: vmv.s.x v12, a25960; CHECK-RV32-NEXT: li a2, 1525961; CHECK-RV32-NEXT: li a4, 1515962; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5963; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45964; CHECK-RV32-NEXT: addi a0, a0, 15965; CHECK-RV32-NEXT: vmv4r.v v16, v85966; CHECK-RV32-NEXT: vmv8r.v v8, v165967; CHECK-RV32-NEXT: slli a2, a3, 75968; CHECK-RV32-NEXT: bltz a2, .LBB61_6875969; CHECK-RV32-NEXT: j .LBB61_1625970; CHECK-RV32-NEXT: .LBB61_687: # %cond.load6055971; CHECK-RV32-NEXT: lbu a2, 0(a0)5972; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5973; CHECK-RV32-NEXT: vmv8r.v v16, v85974; CHECK-RV32-NEXT: vmv.s.x v12, a25975; CHECK-RV32-NEXT: li a2, 1535976; CHECK-RV32-NEXT: li a4, 1525977; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5978; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45979; CHECK-RV32-NEXT: addi a0, a0, 15980; CHECK-RV32-NEXT: vmv4r.v v16, v85981; CHECK-RV32-NEXT: vmv8r.v v8, v165982; CHECK-RV32-NEXT: slli a2, a3, 65983; CHECK-RV32-NEXT: bltz a2, .LBB61_6885984; CHECK-RV32-NEXT: j .LBB61_1635985; CHECK-RV32-NEXT: .LBB61_688: # %cond.load6095986; CHECK-RV32-NEXT: lbu a2, 0(a0)5987; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma5988; CHECK-RV32-NEXT: vmv8r.v v16, v85989; CHECK-RV32-NEXT: vmv.s.x v12, a25990; CHECK-RV32-NEXT: li a2, 1545991; CHECK-RV32-NEXT: li a4, 1535992; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma5993; CHECK-RV32-NEXT: vslideup.vx v8, v12, a45994; CHECK-RV32-NEXT: addi a0, a0, 15995; CHECK-RV32-NEXT: vmv4r.v v16, v85996; CHECK-RV32-NEXT: vmv8r.v v8, v165997; CHECK-RV32-NEXT: slli a2, a3, 55998; CHECK-RV32-NEXT: bltz a2, .LBB61_6895999; CHECK-RV32-NEXT: j .LBB61_1646000; CHECK-RV32-NEXT: .LBB61_689: # %cond.load6136001; CHECK-RV32-NEXT: lbu a2, 0(a0)6002; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6003; CHECK-RV32-NEXT: vmv8r.v v16, v86004; CHECK-RV32-NEXT: vmv.s.x v12, a26005; CHECK-RV32-NEXT: li a2, 1556006; CHECK-RV32-NEXT: li a4, 1546007; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6008; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46009; CHECK-RV32-NEXT: addi a0, a0, 16010; CHECK-RV32-NEXT: vmv4r.v v16, v86011; CHECK-RV32-NEXT: vmv8r.v v8, v166012; CHECK-RV32-NEXT: slli a2, a3, 46013; CHECK-RV32-NEXT: bltz a2, .LBB61_6906014; CHECK-RV32-NEXT: j .LBB61_1656015; CHECK-RV32-NEXT: .LBB61_690: # %cond.load6176016; CHECK-RV32-NEXT: lbu a2, 0(a0)6017; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6018; CHECK-RV32-NEXT: vmv8r.v v16, v86019; CHECK-RV32-NEXT: vmv.s.x v12, a26020; CHECK-RV32-NEXT: li a2, 1566021; CHECK-RV32-NEXT: li a4, 1556022; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6023; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46024; CHECK-RV32-NEXT: addi a0, a0, 16025; CHECK-RV32-NEXT: vmv4r.v v16, v86026; CHECK-RV32-NEXT: vmv8r.v v8, v166027; CHECK-RV32-NEXT: slli a2, a3, 36028; CHECK-RV32-NEXT: bltz a2, .LBB61_6916029; CHECK-RV32-NEXT: j .LBB61_1666030; CHECK-RV32-NEXT: .LBB61_691: # %cond.load6216031; CHECK-RV32-NEXT: lbu a2, 0(a0)6032; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6033; CHECK-RV32-NEXT: vmv8r.v v16, v86034; CHECK-RV32-NEXT: vmv.s.x v12, a26035; CHECK-RV32-NEXT: li a2, 1576036; CHECK-RV32-NEXT: li a4, 1566037; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6038; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46039; CHECK-RV32-NEXT: addi a0, a0, 16040; CHECK-RV32-NEXT: vmv4r.v v16, v86041; CHECK-RV32-NEXT: vmv8r.v v8, v166042; CHECK-RV32-NEXT: slli a2, a3, 26043; CHECK-RV32-NEXT: bgez a2, .LBB61_10296044; CHECK-RV32-NEXT: j .LBB61_1676045; CHECK-RV32-NEXT: .LBB61_1029: # %cond.load6216046; CHECK-RV32-NEXT: j .LBB61_1686047; CHECK-RV32-NEXT: .LBB61_692: # %cond.load6336048; CHECK-RV32-NEXT: lbu a3, 0(a0)6049; CHECK-RV32-NEXT: vmv8r.v v16, v86050; CHECK-RV32-NEXT: vmv.s.x v12, a36051; CHECK-RV32-NEXT: li a3, 1606052; CHECK-RV32-NEXT: li a4, 1596053; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6054; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46055; CHECK-RV32-NEXT: addi a0, a0, 16056; CHECK-RV32-NEXT: vmv4r.v v16, v86057; CHECK-RV32-NEXT: vmv8r.v v8, v166058; CHECK-RV32-NEXT: andi a3, a2, 16059; CHECK-RV32-NEXT: bnez a3, .LBB61_6936060; CHECK-RV32-NEXT: j .LBB61_1726061; CHECK-RV32-NEXT: .LBB61_693: # %cond.load6376062; CHECK-RV32-NEXT: lbu a3, 0(a0)6063; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6064; CHECK-RV32-NEXT: vmv8r.v v16, v86065; CHECK-RV32-NEXT: vmv.s.x v12, a36066; CHECK-RV32-NEXT: li a3, 1616067; CHECK-RV32-NEXT: li a4, 1606068; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6069; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46070; CHECK-RV32-NEXT: addi a0, a0, 16071; CHECK-RV32-NEXT: vmv4r.v v16, v86072; CHECK-RV32-NEXT: vmv8r.v v8, v166073; CHECK-RV32-NEXT: andi a3, a2, 26074; CHECK-RV32-NEXT: bnez a3, .LBB61_6946075; CHECK-RV32-NEXT: j .LBB61_1736076; CHECK-RV32-NEXT: .LBB61_694: # %cond.load6416077; CHECK-RV32-NEXT: lbu a3, 0(a0)6078; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6079; CHECK-RV32-NEXT: vmv8r.v v16, v86080; CHECK-RV32-NEXT: vmv.s.x v12, a36081; CHECK-RV32-NEXT: li a3, 1626082; CHECK-RV32-NEXT: li a4, 1616083; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6084; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46085; CHECK-RV32-NEXT: addi a0, a0, 16086; CHECK-RV32-NEXT: vmv4r.v v16, v86087; CHECK-RV32-NEXT: vmv8r.v v8, v166088; CHECK-RV32-NEXT: andi a3, a2, 46089; CHECK-RV32-NEXT: bnez a3, .LBB61_6956090; CHECK-RV32-NEXT: j .LBB61_1746091; CHECK-RV32-NEXT: .LBB61_695: # %cond.load6456092; CHECK-RV32-NEXT: lbu a3, 0(a0)6093; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6094; CHECK-RV32-NEXT: vmv8r.v v16, v86095; CHECK-RV32-NEXT: vmv.s.x v12, a36096; CHECK-RV32-NEXT: li a3, 1636097; CHECK-RV32-NEXT: li a4, 1626098; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6099; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46100; CHECK-RV32-NEXT: addi a0, a0, 16101; CHECK-RV32-NEXT: vmv4r.v v16, v86102; CHECK-RV32-NEXT: vmv8r.v v8, v166103; CHECK-RV32-NEXT: andi a3, a2, 86104; CHECK-RV32-NEXT: bnez a3, .LBB61_6966105; CHECK-RV32-NEXT: j .LBB61_1756106; CHECK-RV32-NEXT: .LBB61_696: # %cond.load6496107; CHECK-RV32-NEXT: lbu a3, 0(a0)6108; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6109; CHECK-RV32-NEXT: vmv8r.v v16, v86110; CHECK-RV32-NEXT: vmv.s.x v12, a36111; CHECK-RV32-NEXT: li a3, 1646112; CHECK-RV32-NEXT: li a4, 1636113; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6114; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46115; CHECK-RV32-NEXT: addi a0, a0, 16116; CHECK-RV32-NEXT: vmv4r.v v16, v86117; CHECK-RV32-NEXT: vmv8r.v v8, v166118; CHECK-RV32-NEXT: andi a3, a2, 166119; CHECK-RV32-NEXT: bnez a3, .LBB61_6976120; CHECK-RV32-NEXT: j .LBB61_1766121; CHECK-RV32-NEXT: .LBB61_697: # %cond.load6536122; CHECK-RV32-NEXT: lbu a3, 0(a0)6123; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6124; CHECK-RV32-NEXT: vmv8r.v v16, v86125; CHECK-RV32-NEXT: vmv.s.x v12, a36126; CHECK-RV32-NEXT: li a3, 1656127; CHECK-RV32-NEXT: li a4, 1646128; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6129; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46130; CHECK-RV32-NEXT: addi a0, a0, 16131; CHECK-RV32-NEXT: vmv4r.v v16, v86132; CHECK-RV32-NEXT: vmv8r.v v8, v166133; CHECK-RV32-NEXT: andi a3, a2, 326134; CHECK-RV32-NEXT: bnez a3, .LBB61_6986135; CHECK-RV32-NEXT: j .LBB61_1776136; CHECK-RV32-NEXT: .LBB61_698: # %cond.load6576137; CHECK-RV32-NEXT: lbu a3, 0(a0)6138; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6139; CHECK-RV32-NEXT: vmv8r.v v16, v86140; CHECK-RV32-NEXT: vmv.s.x v12, a36141; CHECK-RV32-NEXT: li a3, 1666142; CHECK-RV32-NEXT: li a4, 1656143; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6144; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46145; CHECK-RV32-NEXT: addi a0, a0, 16146; CHECK-RV32-NEXT: vmv4r.v v16, v86147; CHECK-RV32-NEXT: vmv8r.v v8, v166148; CHECK-RV32-NEXT: andi a3, a2, 646149; CHECK-RV32-NEXT: bnez a3, .LBB61_6996150; CHECK-RV32-NEXT: j .LBB61_1786151; CHECK-RV32-NEXT: .LBB61_699: # %cond.load6616152; CHECK-RV32-NEXT: lbu a3, 0(a0)6153; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6154; CHECK-RV32-NEXT: vmv8r.v v16, v86155; CHECK-RV32-NEXT: vmv.s.x v12, a36156; CHECK-RV32-NEXT: li a3, 1676157; CHECK-RV32-NEXT: li a4, 1666158; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6159; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46160; CHECK-RV32-NEXT: addi a0, a0, 16161; CHECK-RV32-NEXT: vmv4r.v v16, v86162; CHECK-RV32-NEXT: vmv8r.v v8, v166163; CHECK-RV32-NEXT: andi a3, a2, 1286164; CHECK-RV32-NEXT: bnez a3, .LBB61_7006165; CHECK-RV32-NEXT: j .LBB61_1796166; CHECK-RV32-NEXT: .LBB61_700: # %cond.load6656167; CHECK-RV32-NEXT: lbu a3, 0(a0)6168; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6169; CHECK-RV32-NEXT: vmv8r.v v16, v86170; CHECK-RV32-NEXT: vmv.s.x v12, a36171; CHECK-RV32-NEXT: li a3, 1686172; CHECK-RV32-NEXT: li a4, 1676173; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6174; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46175; CHECK-RV32-NEXT: addi a0, a0, 16176; CHECK-RV32-NEXT: vmv4r.v v16, v86177; CHECK-RV32-NEXT: vmv8r.v v8, v166178; CHECK-RV32-NEXT: andi a3, a2, 2566179; CHECK-RV32-NEXT: bnez a3, .LBB61_7016180; CHECK-RV32-NEXT: j .LBB61_1806181; CHECK-RV32-NEXT: .LBB61_701: # %cond.load6696182; CHECK-RV32-NEXT: lbu a3, 0(a0)6183; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6184; CHECK-RV32-NEXT: vmv8r.v v16, v86185; CHECK-RV32-NEXT: vmv.s.x v12, a36186; CHECK-RV32-NEXT: li a3, 1696187; CHECK-RV32-NEXT: li a4, 1686188; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6189; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46190; CHECK-RV32-NEXT: addi a0, a0, 16191; CHECK-RV32-NEXT: vmv4r.v v16, v86192; CHECK-RV32-NEXT: vmv8r.v v8, v166193; CHECK-RV32-NEXT: andi a3, a2, 5126194; CHECK-RV32-NEXT: bnez a3, .LBB61_7026195; CHECK-RV32-NEXT: j .LBB61_1816196; CHECK-RV32-NEXT: .LBB61_702: # %cond.load6736197; CHECK-RV32-NEXT: lbu a3, 0(a0)6198; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6199; CHECK-RV32-NEXT: vmv8r.v v16, v86200; CHECK-RV32-NEXT: vmv.s.x v12, a36201; CHECK-RV32-NEXT: li a3, 1706202; CHECK-RV32-NEXT: li a4, 1696203; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6204; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46205; CHECK-RV32-NEXT: addi a0, a0, 16206; CHECK-RV32-NEXT: vmv4r.v v16, v86207; CHECK-RV32-NEXT: vmv8r.v v8, v166208; CHECK-RV32-NEXT: andi a3, a2, 10246209; CHECK-RV32-NEXT: bnez a3, .LBB61_7036210; CHECK-RV32-NEXT: j .LBB61_1826211; CHECK-RV32-NEXT: .LBB61_703: # %cond.load6776212; CHECK-RV32-NEXT: lbu a3, 0(a0)6213; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6214; CHECK-RV32-NEXT: vmv8r.v v16, v86215; CHECK-RV32-NEXT: vmv.s.x v12, a36216; CHECK-RV32-NEXT: li a3, 1716217; CHECK-RV32-NEXT: li a4, 1706218; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6219; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46220; CHECK-RV32-NEXT: addi a0, a0, 16221; CHECK-RV32-NEXT: vmv4r.v v16, v86222; CHECK-RV32-NEXT: vmv8r.v v8, v166223; CHECK-RV32-NEXT: slli a3, a2, 206224; CHECK-RV32-NEXT: bltz a3, .LBB61_7046225; CHECK-RV32-NEXT: j .LBB61_1836226; CHECK-RV32-NEXT: .LBB61_704: # %cond.load6816227; CHECK-RV32-NEXT: lbu a3, 0(a0)6228; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6229; CHECK-RV32-NEXT: vmv8r.v v16, v86230; CHECK-RV32-NEXT: vmv.s.x v12, a36231; CHECK-RV32-NEXT: li a3, 1726232; CHECK-RV32-NEXT: li a4, 1716233; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6234; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46235; CHECK-RV32-NEXT: addi a0, a0, 16236; CHECK-RV32-NEXT: vmv4r.v v16, v86237; CHECK-RV32-NEXT: vmv8r.v v8, v166238; CHECK-RV32-NEXT: slli a3, a2, 196239; CHECK-RV32-NEXT: bltz a3, .LBB61_7056240; CHECK-RV32-NEXT: j .LBB61_1846241; CHECK-RV32-NEXT: .LBB61_705: # %cond.load6856242; CHECK-RV32-NEXT: lbu a3, 0(a0)6243; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6244; CHECK-RV32-NEXT: vmv8r.v v16, v86245; CHECK-RV32-NEXT: vmv.s.x v12, a36246; CHECK-RV32-NEXT: li a3, 1736247; CHECK-RV32-NEXT: li a4, 1726248; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6249; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46250; CHECK-RV32-NEXT: addi a0, a0, 16251; CHECK-RV32-NEXT: vmv4r.v v16, v86252; CHECK-RV32-NEXT: vmv8r.v v8, v166253; CHECK-RV32-NEXT: slli a3, a2, 186254; CHECK-RV32-NEXT: bltz a3, .LBB61_7066255; CHECK-RV32-NEXT: j .LBB61_1856256; CHECK-RV32-NEXT: .LBB61_706: # %cond.load6896257; CHECK-RV32-NEXT: lbu a3, 0(a0)6258; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6259; CHECK-RV32-NEXT: vmv8r.v v16, v86260; CHECK-RV32-NEXT: vmv.s.x v12, a36261; CHECK-RV32-NEXT: li a3, 1746262; CHECK-RV32-NEXT: li a4, 1736263; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6264; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46265; CHECK-RV32-NEXT: addi a0, a0, 16266; CHECK-RV32-NEXT: vmv4r.v v16, v86267; CHECK-RV32-NEXT: vmv8r.v v8, v166268; CHECK-RV32-NEXT: slli a3, a2, 176269; CHECK-RV32-NEXT: bltz a3, .LBB61_7076270; CHECK-RV32-NEXT: j .LBB61_1866271; CHECK-RV32-NEXT: .LBB61_707: # %cond.load6936272; CHECK-RV32-NEXT: lbu a3, 0(a0)6273; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6274; CHECK-RV32-NEXT: vmv8r.v v16, v86275; CHECK-RV32-NEXT: vmv.s.x v12, a36276; CHECK-RV32-NEXT: li a3, 1756277; CHECK-RV32-NEXT: li a4, 1746278; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6279; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46280; CHECK-RV32-NEXT: addi a0, a0, 16281; CHECK-RV32-NEXT: vmv4r.v v16, v86282; CHECK-RV32-NEXT: vmv8r.v v8, v166283; CHECK-RV32-NEXT: slli a3, a2, 166284; CHECK-RV32-NEXT: bltz a3, .LBB61_7086285; CHECK-RV32-NEXT: j .LBB61_1876286; CHECK-RV32-NEXT: .LBB61_708: # %cond.load6976287; CHECK-RV32-NEXT: lbu a3, 0(a0)6288; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6289; CHECK-RV32-NEXT: vmv8r.v v16, v86290; CHECK-RV32-NEXT: vmv.s.x v12, a36291; CHECK-RV32-NEXT: li a3, 1766292; CHECK-RV32-NEXT: li a4, 1756293; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6294; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46295; CHECK-RV32-NEXT: addi a0, a0, 16296; CHECK-RV32-NEXT: vmv4r.v v16, v86297; CHECK-RV32-NEXT: vmv8r.v v8, v166298; CHECK-RV32-NEXT: slli a3, a2, 156299; CHECK-RV32-NEXT: bltz a3, .LBB61_7096300; CHECK-RV32-NEXT: j .LBB61_1886301; CHECK-RV32-NEXT: .LBB61_709: # %cond.load7016302; CHECK-RV32-NEXT: lbu a3, 0(a0)6303; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6304; CHECK-RV32-NEXT: vmv8r.v v16, v86305; CHECK-RV32-NEXT: vmv.s.x v12, a36306; CHECK-RV32-NEXT: li a3, 1776307; CHECK-RV32-NEXT: li a4, 1766308; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6309; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46310; CHECK-RV32-NEXT: addi a0, a0, 16311; CHECK-RV32-NEXT: vmv4r.v v16, v86312; CHECK-RV32-NEXT: vmv8r.v v8, v166313; CHECK-RV32-NEXT: slli a3, a2, 146314; CHECK-RV32-NEXT: bltz a3, .LBB61_7106315; CHECK-RV32-NEXT: j .LBB61_1896316; CHECK-RV32-NEXT: .LBB61_710: # %cond.load7056317; CHECK-RV32-NEXT: lbu a3, 0(a0)6318; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6319; CHECK-RV32-NEXT: vmv8r.v v16, v86320; CHECK-RV32-NEXT: vmv.s.x v12, a36321; CHECK-RV32-NEXT: li a3, 1786322; CHECK-RV32-NEXT: li a4, 1776323; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6324; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46325; CHECK-RV32-NEXT: addi a0, a0, 16326; CHECK-RV32-NEXT: vmv4r.v v16, v86327; CHECK-RV32-NEXT: vmv8r.v v8, v166328; CHECK-RV32-NEXT: slli a3, a2, 136329; CHECK-RV32-NEXT: bltz a3, .LBB61_7116330; CHECK-RV32-NEXT: j .LBB61_1906331; CHECK-RV32-NEXT: .LBB61_711: # %cond.load7096332; CHECK-RV32-NEXT: lbu a3, 0(a0)6333; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6334; CHECK-RV32-NEXT: vmv8r.v v16, v86335; CHECK-RV32-NEXT: vmv.s.x v12, a36336; CHECK-RV32-NEXT: li a3, 1796337; CHECK-RV32-NEXT: li a4, 1786338; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6339; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46340; CHECK-RV32-NEXT: addi a0, a0, 16341; CHECK-RV32-NEXT: vmv4r.v v16, v86342; CHECK-RV32-NEXT: vmv8r.v v8, v166343; CHECK-RV32-NEXT: slli a3, a2, 126344; CHECK-RV32-NEXT: bltz a3, .LBB61_7126345; CHECK-RV32-NEXT: j .LBB61_1916346; CHECK-RV32-NEXT: .LBB61_712: # %cond.load7136347; CHECK-RV32-NEXT: lbu a3, 0(a0)6348; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6349; CHECK-RV32-NEXT: vmv8r.v v16, v86350; CHECK-RV32-NEXT: vmv.s.x v12, a36351; CHECK-RV32-NEXT: li a3, 1806352; CHECK-RV32-NEXT: li a4, 1796353; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6354; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46355; CHECK-RV32-NEXT: addi a0, a0, 16356; CHECK-RV32-NEXT: vmv4r.v v16, v86357; CHECK-RV32-NEXT: vmv8r.v v8, v166358; CHECK-RV32-NEXT: slli a3, a2, 116359; CHECK-RV32-NEXT: bltz a3, .LBB61_7136360; CHECK-RV32-NEXT: j .LBB61_1926361; CHECK-RV32-NEXT: .LBB61_713: # %cond.load7176362; CHECK-RV32-NEXT: lbu a3, 0(a0)6363; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6364; CHECK-RV32-NEXT: vmv8r.v v16, v86365; CHECK-RV32-NEXT: vmv.s.x v12, a36366; CHECK-RV32-NEXT: li a3, 1816367; CHECK-RV32-NEXT: li a4, 1806368; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6369; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46370; CHECK-RV32-NEXT: addi a0, a0, 16371; CHECK-RV32-NEXT: vmv4r.v v16, v86372; CHECK-RV32-NEXT: vmv8r.v v8, v166373; CHECK-RV32-NEXT: slli a3, a2, 106374; CHECK-RV32-NEXT: bltz a3, .LBB61_7146375; CHECK-RV32-NEXT: j .LBB61_1936376; CHECK-RV32-NEXT: .LBB61_714: # %cond.load7216377; CHECK-RV32-NEXT: lbu a3, 0(a0)6378; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6379; CHECK-RV32-NEXT: vmv8r.v v16, v86380; CHECK-RV32-NEXT: vmv.s.x v12, a36381; CHECK-RV32-NEXT: li a3, 1826382; CHECK-RV32-NEXT: li a4, 1816383; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6384; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46385; CHECK-RV32-NEXT: addi a0, a0, 16386; CHECK-RV32-NEXT: vmv4r.v v16, v86387; CHECK-RV32-NEXT: vmv8r.v v8, v166388; CHECK-RV32-NEXT: slli a3, a2, 96389; CHECK-RV32-NEXT: bltz a3, .LBB61_7156390; CHECK-RV32-NEXT: j .LBB61_1946391; CHECK-RV32-NEXT: .LBB61_715: # %cond.load7256392; CHECK-RV32-NEXT: lbu a3, 0(a0)6393; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6394; CHECK-RV32-NEXT: vmv8r.v v16, v86395; CHECK-RV32-NEXT: vmv.s.x v12, a36396; CHECK-RV32-NEXT: li a3, 1836397; CHECK-RV32-NEXT: li a4, 1826398; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6399; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46400; CHECK-RV32-NEXT: addi a0, a0, 16401; CHECK-RV32-NEXT: vmv4r.v v16, v86402; CHECK-RV32-NEXT: vmv8r.v v8, v166403; CHECK-RV32-NEXT: slli a3, a2, 86404; CHECK-RV32-NEXT: bltz a3, .LBB61_7166405; CHECK-RV32-NEXT: j .LBB61_1956406; CHECK-RV32-NEXT: .LBB61_716: # %cond.load7296407; CHECK-RV32-NEXT: lbu a3, 0(a0)6408; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6409; CHECK-RV32-NEXT: vmv8r.v v16, v86410; CHECK-RV32-NEXT: vmv.s.x v12, a36411; CHECK-RV32-NEXT: li a3, 1846412; CHECK-RV32-NEXT: li a4, 1836413; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6414; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46415; CHECK-RV32-NEXT: addi a0, a0, 16416; CHECK-RV32-NEXT: vmv4r.v v16, v86417; CHECK-RV32-NEXT: vmv8r.v v8, v166418; CHECK-RV32-NEXT: slli a3, a2, 76419; CHECK-RV32-NEXT: bltz a3, .LBB61_7176420; CHECK-RV32-NEXT: j .LBB61_1966421; CHECK-RV32-NEXT: .LBB61_717: # %cond.load7336422; CHECK-RV32-NEXT: lbu a3, 0(a0)6423; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6424; CHECK-RV32-NEXT: vmv8r.v v16, v86425; CHECK-RV32-NEXT: vmv.s.x v12, a36426; CHECK-RV32-NEXT: li a3, 1856427; CHECK-RV32-NEXT: li a4, 1846428; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6429; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46430; CHECK-RV32-NEXT: addi a0, a0, 16431; CHECK-RV32-NEXT: vmv4r.v v16, v86432; CHECK-RV32-NEXT: vmv8r.v v8, v166433; CHECK-RV32-NEXT: slli a3, a2, 66434; CHECK-RV32-NEXT: bltz a3, .LBB61_7186435; CHECK-RV32-NEXT: j .LBB61_1976436; CHECK-RV32-NEXT: .LBB61_718: # %cond.load7376437; CHECK-RV32-NEXT: lbu a3, 0(a0)6438; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6439; CHECK-RV32-NEXT: vmv8r.v v16, v86440; CHECK-RV32-NEXT: vmv.s.x v12, a36441; CHECK-RV32-NEXT: li a3, 1866442; CHECK-RV32-NEXT: li a4, 1856443; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6444; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46445; CHECK-RV32-NEXT: addi a0, a0, 16446; CHECK-RV32-NEXT: vmv4r.v v16, v86447; CHECK-RV32-NEXT: vmv8r.v v8, v166448; CHECK-RV32-NEXT: slli a3, a2, 56449; CHECK-RV32-NEXT: bltz a3, .LBB61_7196450; CHECK-RV32-NEXT: j .LBB61_1986451; CHECK-RV32-NEXT: .LBB61_719: # %cond.load7416452; CHECK-RV32-NEXT: lbu a3, 0(a0)6453; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6454; CHECK-RV32-NEXT: vmv8r.v v16, v86455; CHECK-RV32-NEXT: vmv.s.x v12, a36456; CHECK-RV32-NEXT: li a3, 1876457; CHECK-RV32-NEXT: li a4, 1866458; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6459; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46460; CHECK-RV32-NEXT: addi a0, a0, 16461; CHECK-RV32-NEXT: vmv4r.v v16, v86462; CHECK-RV32-NEXT: vmv8r.v v8, v166463; CHECK-RV32-NEXT: slli a3, a2, 46464; CHECK-RV32-NEXT: bltz a3, .LBB61_7206465; CHECK-RV32-NEXT: j .LBB61_1996466; CHECK-RV32-NEXT: .LBB61_720: # %cond.load7456467; CHECK-RV32-NEXT: lbu a3, 0(a0)6468; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6469; CHECK-RV32-NEXT: vmv8r.v v16, v86470; CHECK-RV32-NEXT: vmv.s.x v12, a36471; CHECK-RV32-NEXT: li a3, 1886472; CHECK-RV32-NEXT: li a4, 1876473; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6474; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46475; CHECK-RV32-NEXT: addi a0, a0, 16476; CHECK-RV32-NEXT: vmv4r.v v16, v86477; CHECK-RV32-NEXT: vmv8r.v v8, v166478; CHECK-RV32-NEXT: slli a3, a2, 36479; CHECK-RV32-NEXT: bltz a3, .LBB61_7216480; CHECK-RV32-NEXT: j .LBB61_2006481; CHECK-RV32-NEXT: .LBB61_721: # %cond.load7496482; CHECK-RV32-NEXT: lbu a3, 0(a0)6483; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6484; CHECK-RV32-NEXT: vmv8r.v v16, v86485; CHECK-RV32-NEXT: vmv.s.x v12, a36486; CHECK-RV32-NEXT: li a3, 1896487; CHECK-RV32-NEXT: li a4, 1886488; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6489; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46490; CHECK-RV32-NEXT: addi a0, a0, 16491; CHECK-RV32-NEXT: vmv4r.v v16, v86492; CHECK-RV32-NEXT: vmv8r.v v8, v166493; CHECK-RV32-NEXT: slli a3, a2, 26494; CHECK-RV32-NEXT: bgez a3, .LBB61_10306495; CHECK-RV32-NEXT: j .LBB61_2016496; CHECK-RV32-NEXT: .LBB61_1030: # %cond.load7496497; CHECK-RV32-NEXT: j .LBB61_2026498; CHECK-RV32-NEXT: .LBB61_722: # %cond.load7616499; CHECK-RV32-NEXT: lbu a2, 0(a0)6500; CHECK-RV32-NEXT: vmv8r.v v16, v86501; CHECK-RV32-NEXT: vmv.s.x v12, a26502; CHECK-RV32-NEXT: li a2, 1926503; CHECK-RV32-NEXT: li a4, 1916504; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6505; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46506; CHECK-RV32-NEXT: addi a0, a0, 16507; CHECK-RV32-NEXT: vmv4r.v v16, v86508; CHECK-RV32-NEXT: vmv8r.v v8, v166509; CHECK-RV32-NEXT: andi a2, a3, 16510; CHECK-RV32-NEXT: bnez a2, .LBB61_7236511; CHECK-RV32-NEXT: j .LBB61_2066512; CHECK-RV32-NEXT: .LBB61_723: # %cond.load7656513; CHECK-RV32-NEXT: lbu a2, 0(a0)6514; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6515; CHECK-RV32-NEXT: vmv8r.v v16, v86516; CHECK-RV32-NEXT: vmv.s.x v12, a26517; CHECK-RV32-NEXT: li a2, 1936518; CHECK-RV32-NEXT: li a4, 1926519; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6520; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46521; CHECK-RV32-NEXT: addi a0, a0, 16522; CHECK-RV32-NEXT: vmv4r.v v16, v86523; CHECK-RV32-NEXT: vmv8r.v v8, v166524; CHECK-RV32-NEXT: andi a2, a3, 26525; CHECK-RV32-NEXT: bnez a2, .LBB61_7246526; CHECK-RV32-NEXT: j .LBB61_2076527; CHECK-RV32-NEXT: .LBB61_724: # %cond.load7696528; CHECK-RV32-NEXT: lbu a2, 0(a0)6529; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6530; CHECK-RV32-NEXT: vmv8r.v v16, v86531; CHECK-RV32-NEXT: vmv.s.x v12, a26532; CHECK-RV32-NEXT: li a2, 1946533; CHECK-RV32-NEXT: li a4, 1936534; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6535; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46536; CHECK-RV32-NEXT: addi a0, a0, 16537; CHECK-RV32-NEXT: vmv4r.v v16, v86538; CHECK-RV32-NEXT: vmv8r.v v8, v166539; CHECK-RV32-NEXT: andi a2, a3, 46540; CHECK-RV32-NEXT: bnez a2, .LBB61_7256541; CHECK-RV32-NEXT: j .LBB61_2086542; CHECK-RV32-NEXT: .LBB61_725: # %cond.load7736543; CHECK-RV32-NEXT: lbu a2, 0(a0)6544; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6545; CHECK-RV32-NEXT: vmv8r.v v16, v86546; CHECK-RV32-NEXT: vmv.s.x v12, a26547; CHECK-RV32-NEXT: li a2, 1956548; CHECK-RV32-NEXT: li a4, 1946549; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6550; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46551; CHECK-RV32-NEXT: addi a0, a0, 16552; CHECK-RV32-NEXT: vmv4r.v v16, v86553; CHECK-RV32-NEXT: vmv8r.v v8, v166554; CHECK-RV32-NEXT: andi a2, a3, 86555; CHECK-RV32-NEXT: bnez a2, .LBB61_7266556; CHECK-RV32-NEXT: j .LBB61_2096557; CHECK-RV32-NEXT: .LBB61_726: # %cond.load7776558; CHECK-RV32-NEXT: lbu a2, 0(a0)6559; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6560; CHECK-RV32-NEXT: vmv8r.v v16, v86561; CHECK-RV32-NEXT: vmv.s.x v12, a26562; CHECK-RV32-NEXT: li a2, 1966563; CHECK-RV32-NEXT: li a4, 1956564; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6565; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46566; CHECK-RV32-NEXT: addi a0, a0, 16567; CHECK-RV32-NEXT: vmv4r.v v16, v86568; CHECK-RV32-NEXT: vmv8r.v v8, v166569; CHECK-RV32-NEXT: andi a2, a3, 166570; CHECK-RV32-NEXT: bnez a2, .LBB61_7276571; CHECK-RV32-NEXT: j .LBB61_2106572; CHECK-RV32-NEXT: .LBB61_727: # %cond.load7816573; CHECK-RV32-NEXT: lbu a2, 0(a0)6574; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6575; CHECK-RV32-NEXT: vmv8r.v v16, v86576; CHECK-RV32-NEXT: vmv.s.x v12, a26577; CHECK-RV32-NEXT: li a2, 1976578; CHECK-RV32-NEXT: li a4, 1966579; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6580; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46581; CHECK-RV32-NEXT: addi a0, a0, 16582; CHECK-RV32-NEXT: vmv4r.v v16, v86583; CHECK-RV32-NEXT: vmv8r.v v8, v166584; CHECK-RV32-NEXT: andi a2, a3, 326585; CHECK-RV32-NEXT: bnez a2, .LBB61_7286586; CHECK-RV32-NEXT: j .LBB61_2116587; CHECK-RV32-NEXT: .LBB61_728: # %cond.load7856588; CHECK-RV32-NEXT: lbu a2, 0(a0)6589; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6590; CHECK-RV32-NEXT: vmv8r.v v16, v86591; CHECK-RV32-NEXT: vmv.s.x v12, a26592; CHECK-RV32-NEXT: li a2, 1986593; CHECK-RV32-NEXT: li a4, 1976594; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6595; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46596; CHECK-RV32-NEXT: addi a0, a0, 16597; CHECK-RV32-NEXT: vmv4r.v v16, v86598; CHECK-RV32-NEXT: vmv8r.v v8, v166599; CHECK-RV32-NEXT: andi a2, a3, 646600; CHECK-RV32-NEXT: bnez a2, .LBB61_7296601; CHECK-RV32-NEXT: j .LBB61_2126602; CHECK-RV32-NEXT: .LBB61_729: # %cond.load7896603; CHECK-RV32-NEXT: lbu a2, 0(a0)6604; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6605; CHECK-RV32-NEXT: vmv8r.v v16, v86606; CHECK-RV32-NEXT: vmv.s.x v12, a26607; CHECK-RV32-NEXT: li a2, 1996608; CHECK-RV32-NEXT: li a4, 1986609; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6610; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46611; CHECK-RV32-NEXT: addi a0, a0, 16612; CHECK-RV32-NEXT: vmv4r.v v16, v86613; CHECK-RV32-NEXT: vmv8r.v v8, v166614; CHECK-RV32-NEXT: andi a2, a3, 1286615; CHECK-RV32-NEXT: bnez a2, .LBB61_7306616; CHECK-RV32-NEXT: j .LBB61_2136617; CHECK-RV32-NEXT: .LBB61_730: # %cond.load7936618; CHECK-RV32-NEXT: lbu a2, 0(a0)6619; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6620; CHECK-RV32-NEXT: vmv8r.v v16, v86621; CHECK-RV32-NEXT: vmv.s.x v12, a26622; CHECK-RV32-NEXT: li a2, 2006623; CHECK-RV32-NEXT: li a4, 1996624; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6625; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46626; CHECK-RV32-NEXT: addi a0, a0, 16627; CHECK-RV32-NEXT: vmv4r.v v16, v86628; CHECK-RV32-NEXT: vmv8r.v v8, v166629; CHECK-RV32-NEXT: andi a2, a3, 2566630; CHECK-RV32-NEXT: bnez a2, .LBB61_7316631; CHECK-RV32-NEXT: j .LBB61_2146632; CHECK-RV32-NEXT: .LBB61_731: # %cond.load7976633; CHECK-RV32-NEXT: lbu a2, 0(a0)6634; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6635; CHECK-RV32-NEXT: vmv8r.v v16, v86636; CHECK-RV32-NEXT: vmv.s.x v12, a26637; CHECK-RV32-NEXT: li a2, 2016638; CHECK-RV32-NEXT: li a4, 2006639; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6640; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46641; CHECK-RV32-NEXT: addi a0, a0, 16642; CHECK-RV32-NEXT: vmv4r.v v16, v86643; CHECK-RV32-NEXT: vmv8r.v v8, v166644; CHECK-RV32-NEXT: andi a2, a3, 5126645; CHECK-RV32-NEXT: bnez a2, .LBB61_7326646; CHECK-RV32-NEXT: j .LBB61_2156647; CHECK-RV32-NEXT: .LBB61_732: # %cond.load8016648; CHECK-RV32-NEXT: lbu a2, 0(a0)6649; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6650; CHECK-RV32-NEXT: vmv8r.v v16, v86651; CHECK-RV32-NEXT: vmv.s.x v12, a26652; CHECK-RV32-NEXT: li a2, 2026653; CHECK-RV32-NEXT: li a4, 2016654; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6655; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46656; CHECK-RV32-NEXT: addi a0, a0, 16657; CHECK-RV32-NEXT: vmv4r.v v16, v86658; CHECK-RV32-NEXT: vmv8r.v v8, v166659; CHECK-RV32-NEXT: andi a2, a3, 10246660; CHECK-RV32-NEXT: bnez a2, .LBB61_7336661; CHECK-RV32-NEXT: j .LBB61_2166662; CHECK-RV32-NEXT: .LBB61_733: # %cond.load8056663; CHECK-RV32-NEXT: lbu a2, 0(a0)6664; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6665; CHECK-RV32-NEXT: vmv8r.v v16, v86666; CHECK-RV32-NEXT: vmv.s.x v12, a26667; CHECK-RV32-NEXT: li a2, 2036668; CHECK-RV32-NEXT: li a4, 2026669; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6670; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46671; CHECK-RV32-NEXT: addi a0, a0, 16672; CHECK-RV32-NEXT: vmv4r.v v16, v86673; CHECK-RV32-NEXT: vmv8r.v v8, v166674; CHECK-RV32-NEXT: slli a2, a3, 206675; CHECK-RV32-NEXT: bltz a2, .LBB61_7346676; CHECK-RV32-NEXT: j .LBB61_2176677; CHECK-RV32-NEXT: .LBB61_734: # %cond.load8096678; CHECK-RV32-NEXT: lbu a2, 0(a0)6679; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6680; CHECK-RV32-NEXT: vmv8r.v v16, v86681; CHECK-RV32-NEXT: vmv.s.x v12, a26682; CHECK-RV32-NEXT: li a2, 2046683; CHECK-RV32-NEXT: li a4, 2036684; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6685; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46686; CHECK-RV32-NEXT: addi a0, a0, 16687; CHECK-RV32-NEXT: vmv4r.v v16, v86688; CHECK-RV32-NEXT: vmv8r.v v8, v166689; CHECK-RV32-NEXT: slli a2, a3, 196690; CHECK-RV32-NEXT: bltz a2, .LBB61_7356691; CHECK-RV32-NEXT: j .LBB61_2186692; CHECK-RV32-NEXT: .LBB61_735: # %cond.load8136693; CHECK-RV32-NEXT: lbu a2, 0(a0)6694; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6695; CHECK-RV32-NEXT: vmv8r.v v16, v86696; CHECK-RV32-NEXT: vmv.s.x v12, a26697; CHECK-RV32-NEXT: li a2, 2056698; CHECK-RV32-NEXT: li a4, 2046699; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6700; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46701; CHECK-RV32-NEXT: addi a0, a0, 16702; CHECK-RV32-NEXT: vmv4r.v v16, v86703; CHECK-RV32-NEXT: vmv8r.v v8, v166704; CHECK-RV32-NEXT: slli a2, a3, 186705; CHECK-RV32-NEXT: bltz a2, .LBB61_7366706; CHECK-RV32-NEXT: j .LBB61_2196707; CHECK-RV32-NEXT: .LBB61_736: # %cond.load8176708; CHECK-RV32-NEXT: lbu a2, 0(a0)6709; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6710; CHECK-RV32-NEXT: vmv8r.v v16, v86711; CHECK-RV32-NEXT: vmv.s.x v12, a26712; CHECK-RV32-NEXT: li a2, 2066713; CHECK-RV32-NEXT: li a4, 2056714; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6715; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46716; CHECK-RV32-NEXT: addi a0, a0, 16717; CHECK-RV32-NEXT: vmv4r.v v16, v86718; CHECK-RV32-NEXT: vmv8r.v v8, v166719; CHECK-RV32-NEXT: slli a2, a3, 176720; CHECK-RV32-NEXT: bltz a2, .LBB61_7376721; CHECK-RV32-NEXT: j .LBB61_2206722; CHECK-RV32-NEXT: .LBB61_737: # %cond.load8216723; CHECK-RV32-NEXT: lbu a2, 0(a0)6724; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6725; CHECK-RV32-NEXT: vmv8r.v v16, v86726; CHECK-RV32-NEXT: vmv.s.x v12, a26727; CHECK-RV32-NEXT: li a2, 2076728; CHECK-RV32-NEXT: li a4, 2066729; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6730; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46731; CHECK-RV32-NEXT: addi a0, a0, 16732; CHECK-RV32-NEXT: vmv4r.v v16, v86733; CHECK-RV32-NEXT: vmv8r.v v8, v166734; CHECK-RV32-NEXT: slli a2, a3, 166735; CHECK-RV32-NEXT: bltz a2, .LBB61_7386736; CHECK-RV32-NEXT: j .LBB61_2216737; CHECK-RV32-NEXT: .LBB61_738: # %cond.load8256738; CHECK-RV32-NEXT: lbu a2, 0(a0)6739; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6740; CHECK-RV32-NEXT: vmv8r.v v16, v86741; CHECK-RV32-NEXT: vmv.s.x v12, a26742; CHECK-RV32-NEXT: li a2, 2086743; CHECK-RV32-NEXT: li a4, 2076744; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6745; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46746; CHECK-RV32-NEXT: addi a0, a0, 16747; CHECK-RV32-NEXT: vmv4r.v v16, v86748; CHECK-RV32-NEXT: vmv8r.v v8, v166749; CHECK-RV32-NEXT: slli a2, a3, 156750; CHECK-RV32-NEXT: bltz a2, .LBB61_7396751; CHECK-RV32-NEXT: j .LBB61_2226752; CHECK-RV32-NEXT: .LBB61_739: # %cond.load8296753; CHECK-RV32-NEXT: lbu a2, 0(a0)6754; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6755; CHECK-RV32-NEXT: vmv8r.v v16, v86756; CHECK-RV32-NEXT: vmv.s.x v12, a26757; CHECK-RV32-NEXT: li a2, 2096758; CHECK-RV32-NEXT: li a4, 2086759; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6760; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46761; CHECK-RV32-NEXT: addi a0, a0, 16762; CHECK-RV32-NEXT: vmv4r.v v16, v86763; CHECK-RV32-NEXT: vmv8r.v v8, v166764; CHECK-RV32-NEXT: slli a2, a3, 146765; CHECK-RV32-NEXT: bltz a2, .LBB61_7406766; CHECK-RV32-NEXT: j .LBB61_2236767; CHECK-RV32-NEXT: .LBB61_740: # %cond.load8336768; CHECK-RV32-NEXT: lbu a2, 0(a0)6769; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6770; CHECK-RV32-NEXT: vmv8r.v v16, v86771; CHECK-RV32-NEXT: vmv.s.x v12, a26772; CHECK-RV32-NEXT: li a2, 2106773; CHECK-RV32-NEXT: li a4, 2096774; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6775; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46776; CHECK-RV32-NEXT: addi a0, a0, 16777; CHECK-RV32-NEXT: vmv4r.v v16, v86778; CHECK-RV32-NEXT: vmv8r.v v8, v166779; CHECK-RV32-NEXT: slli a2, a3, 136780; CHECK-RV32-NEXT: bltz a2, .LBB61_7416781; CHECK-RV32-NEXT: j .LBB61_2246782; CHECK-RV32-NEXT: .LBB61_741: # %cond.load8376783; CHECK-RV32-NEXT: lbu a2, 0(a0)6784; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6785; CHECK-RV32-NEXT: vmv8r.v v16, v86786; CHECK-RV32-NEXT: vmv.s.x v12, a26787; CHECK-RV32-NEXT: li a2, 2116788; CHECK-RV32-NEXT: li a4, 2106789; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6790; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46791; CHECK-RV32-NEXT: addi a0, a0, 16792; CHECK-RV32-NEXT: vmv4r.v v16, v86793; CHECK-RV32-NEXT: vmv8r.v v8, v166794; CHECK-RV32-NEXT: slli a2, a3, 126795; CHECK-RV32-NEXT: bltz a2, .LBB61_7426796; CHECK-RV32-NEXT: j .LBB61_2256797; CHECK-RV32-NEXT: .LBB61_742: # %cond.load8416798; CHECK-RV32-NEXT: lbu a2, 0(a0)6799; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6800; CHECK-RV32-NEXT: vmv8r.v v16, v86801; CHECK-RV32-NEXT: vmv.s.x v12, a26802; CHECK-RV32-NEXT: li a2, 2126803; CHECK-RV32-NEXT: li a4, 2116804; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6805; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46806; CHECK-RV32-NEXT: addi a0, a0, 16807; CHECK-RV32-NEXT: vmv4r.v v16, v86808; CHECK-RV32-NEXT: vmv8r.v v8, v166809; CHECK-RV32-NEXT: slli a2, a3, 116810; CHECK-RV32-NEXT: bltz a2, .LBB61_7436811; CHECK-RV32-NEXT: j .LBB61_2266812; CHECK-RV32-NEXT: .LBB61_743: # %cond.load8456813; CHECK-RV32-NEXT: lbu a2, 0(a0)6814; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6815; CHECK-RV32-NEXT: vmv8r.v v16, v86816; CHECK-RV32-NEXT: vmv.s.x v12, a26817; CHECK-RV32-NEXT: li a2, 2136818; CHECK-RV32-NEXT: li a4, 2126819; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6820; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46821; CHECK-RV32-NEXT: addi a0, a0, 16822; CHECK-RV32-NEXT: vmv4r.v v16, v86823; CHECK-RV32-NEXT: vmv8r.v v8, v166824; CHECK-RV32-NEXT: slli a2, a3, 106825; CHECK-RV32-NEXT: bltz a2, .LBB61_7446826; CHECK-RV32-NEXT: j .LBB61_2276827; CHECK-RV32-NEXT: .LBB61_744: # %cond.load8496828; CHECK-RV32-NEXT: lbu a2, 0(a0)6829; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6830; CHECK-RV32-NEXT: vmv8r.v v16, v86831; CHECK-RV32-NEXT: vmv.s.x v12, a26832; CHECK-RV32-NEXT: li a2, 2146833; CHECK-RV32-NEXT: li a4, 2136834; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6835; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46836; CHECK-RV32-NEXT: addi a0, a0, 16837; CHECK-RV32-NEXT: vmv4r.v v16, v86838; CHECK-RV32-NEXT: vmv8r.v v8, v166839; CHECK-RV32-NEXT: slli a2, a3, 96840; CHECK-RV32-NEXT: bltz a2, .LBB61_7456841; CHECK-RV32-NEXT: j .LBB61_2286842; CHECK-RV32-NEXT: .LBB61_745: # %cond.load8536843; CHECK-RV32-NEXT: lbu a2, 0(a0)6844; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6845; CHECK-RV32-NEXT: vmv8r.v v16, v86846; CHECK-RV32-NEXT: vmv.s.x v12, a26847; CHECK-RV32-NEXT: li a2, 2156848; CHECK-RV32-NEXT: li a4, 2146849; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6850; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46851; CHECK-RV32-NEXT: addi a0, a0, 16852; CHECK-RV32-NEXT: vmv4r.v v16, v86853; CHECK-RV32-NEXT: vmv8r.v v8, v166854; CHECK-RV32-NEXT: slli a2, a3, 86855; CHECK-RV32-NEXT: bltz a2, .LBB61_7466856; CHECK-RV32-NEXT: j .LBB61_2296857; CHECK-RV32-NEXT: .LBB61_746: # %cond.load8576858; CHECK-RV32-NEXT: lbu a2, 0(a0)6859; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6860; CHECK-RV32-NEXT: vmv8r.v v16, v86861; CHECK-RV32-NEXT: vmv.s.x v12, a26862; CHECK-RV32-NEXT: li a2, 2166863; CHECK-RV32-NEXT: li a4, 2156864; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6865; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46866; CHECK-RV32-NEXT: addi a0, a0, 16867; CHECK-RV32-NEXT: vmv4r.v v16, v86868; CHECK-RV32-NEXT: vmv8r.v v8, v166869; CHECK-RV32-NEXT: slli a2, a3, 76870; CHECK-RV32-NEXT: bltz a2, .LBB61_7476871; CHECK-RV32-NEXT: j .LBB61_2306872; CHECK-RV32-NEXT: .LBB61_747: # %cond.load8616873; CHECK-RV32-NEXT: lbu a2, 0(a0)6874; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6875; CHECK-RV32-NEXT: vmv8r.v v16, v86876; CHECK-RV32-NEXT: vmv.s.x v12, a26877; CHECK-RV32-NEXT: li a2, 2176878; CHECK-RV32-NEXT: li a4, 2166879; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6880; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46881; CHECK-RV32-NEXT: addi a0, a0, 16882; CHECK-RV32-NEXT: vmv4r.v v16, v86883; CHECK-RV32-NEXT: vmv8r.v v8, v166884; CHECK-RV32-NEXT: slli a2, a3, 66885; CHECK-RV32-NEXT: bltz a2, .LBB61_7486886; CHECK-RV32-NEXT: j .LBB61_2316887; CHECK-RV32-NEXT: .LBB61_748: # %cond.load8656888; CHECK-RV32-NEXT: lbu a2, 0(a0)6889; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6890; CHECK-RV32-NEXT: vmv8r.v v16, v86891; CHECK-RV32-NEXT: vmv.s.x v12, a26892; CHECK-RV32-NEXT: li a2, 2186893; CHECK-RV32-NEXT: li a4, 2176894; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6895; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46896; CHECK-RV32-NEXT: addi a0, a0, 16897; CHECK-RV32-NEXT: vmv4r.v v16, v86898; CHECK-RV32-NEXT: vmv8r.v v8, v166899; CHECK-RV32-NEXT: slli a2, a3, 56900; CHECK-RV32-NEXT: bltz a2, .LBB61_7496901; CHECK-RV32-NEXT: j .LBB61_2326902; CHECK-RV32-NEXT: .LBB61_749: # %cond.load8696903; CHECK-RV32-NEXT: lbu a2, 0(a0)6904; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6905; CHECK-RV32-NEXT: vmv8r.v v16, v86906; CHECK-RV32-NEXT: vmv.s.x v12, a26907; CHECK-RV32-NEXT: li a2, 2196908; CHECK-RV32-NEXT: li a4, 2186909; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6910; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46911; CHECK-RV32-NEXT: addi a0, a0, 16912; CHECK-RV32-NEXT: vmv4r.v v16, v86913; CHECK-RV32-NEXT: vmv8r.v v8, v166914; CHECK-RV32-NEXT: slli a2, a3, 46915; CHECK-RV32-NEXT: bltz a2, .LBB61_7506916; CHECK-RV32-NEXT: j .LBB61_2336917; CHECK-RV32-NEXT: .LBB61_750: # %cond.load8736918; CHECK-RV32-NEXT: lbu a2, 0(a0)6919; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6920; CHECK-RV32-NEXT: vmv8r.v v16, v86921; CHECK-RV32-NEXT: vmv.s.x v12, a26922; CHECK-RV32-NEXT: li a2, 2206923; CHECK-RV32-NEXT: li a4, 2196924; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6925; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46926; CHECK-RV32-NEXT: addi a0, a0, 16927; CHECK-RV32-NEXT: vmv4r.v v16, v86928; CHECK-RV32-NEXT: vmv8r.v v8, v166929; CHECK-RV32-NEXT: slli a2, a3, 36930; CHECK-RV32-NEXT: bltz a2, .LBB61_7516931; CHECK-RV32-NEXT: j .LBB61_2346932; CHECK-RV32-NEXT: .LBB61_751: # %cond.load8776933; CHECK-RV32-NEXT: lbu a2, 0(a0)6934; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6935; CHECK-RV32-NEXT: vmv8r.v v16, v86936; CHECK-RV32-NEXT: vmv.s.x v12, a26937; CHECK-RV32-NEXT: li a2, 2216938; CHECK-RV32-NEXT: li a4, 2206939; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma6940; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46941; CHECK-RV32-NEXT: addi a0, a0, 16942; CHECK-RV32-NEXT: vmv4r.v v16, v86943; CHECK-RV32-NEXT: vmv8r.v v8, v166944; CHECK-RV32-NEXT: slli a2, a3, 26945; CHECK-RV32-NEXT: bgez a2, .LBB61_10316946; CHECK-RV32-NEXT: j .LBB61_2356947; CHECK-RV32-NEXT: .LBB61_1031: # %cond.load8776948; CHECK-RV32-NEXT: j .LBB61_2366949; CHECK-RV32-NEXT: .LBB61_752: # %cond.load8896950; CHECK-RV32-NEXT: lbu a3, 0(a0)6951; CHECK-RV32-NEXT: vmv8r.v v16, v86952; CHECK-RV32-NEXT: vmv.s.x v12, a36953; CHECK-RV32-NEXT: li a3, 2246954; CHECK-RV32-NEXT: li a4, 2236955; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6956; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46957; CHECK-RV32-NEXT: addi a0, a0, 16958; CHECK-RV32-NEXT: vmv4r.v v16, v86959; CHECK-RV32-NEXT: vmv8r.v v8, v166960; CHECK-RV32-NEXT: andi a3, a2, 16961; CHECK-RV32-NEXT: bnez a3, .LBB61_7536962; CHECK-RV32-NEXT: j .LBB61_2406963; CHECK-RV32-NEXT: .LBB61_753: # %cond.load8936964; CHECK-RV32-NEXT: lbu a3, 0(a0)6965; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6966; CHECK-RV32-NEXT: vmv8r.v v16, v86967; CHECK-RV32-NEXT: vmv.s.x v12, a36968; CHECK-RV32-NEXT: li a3, 2256969; CHECK-RV32-NEXT: li a4, 2246970; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6971; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46972; CHECK-RV32-NEXT: addi a0, a0, 16973; CHECK-RV32-NEXT: vmv4r.v v16, v86974; CHECK-RV32-NEXT: vmv8r.v v8, v166975; CHECK-RV32-NEXT: andi a3, a2, 26976; CHECK-RV32-NEXT: bnez a3, .LBB61_7546977; CHECK-RV32-NEXT: j .LBB61_2416978; CHECK-RV32-NEXT: .LBB61_754: # %cond.load8976979; CHECK-RV32-NEXT: lbu a3, 0(a0)6980; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6981; CHECK-RV32-NEXT: vmv8r.v v16, v86982; CHECK-RV32-NEXT: vmv.s.x v12, a36983; CHECK-RV32-NEXT: li a3, 2266984; CHECK-RV32-NEXT: li a4, 2256985; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma6986; CHECK-RV32-NEXT: vslideup.vx v8, v12, a46987; CHECK-RV32-NEXT: addi a0, a0, 16988; CHECK-RV32-NEXT: vmv4r.v v16, v86989; CHECK-RV32-NEXT: vmv8r.v v8, v166990; CHECK-RV32-NEXT: andi a3, a2, 46991; CHECK-RV32-NEXT: bnez a3, .LBB61_7556992; CHECK-RV32-NEXT: j .LBB61_2426993; CHECK-RV32-NEXT: .LBB61_755: # %cond.load9016994; CHECK-RV32-NEXT: lbu a3, 0(a0)6995; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma6996; CHECK-RV32-NEXT: vmv8r.v v16, v86997; CHECK-RV32-NEXT: vmv.s.x v12, a36998; CHECK-RV32-NEXT: li a3, 2276999; CHECK-RV32-NEXT: li a4, 2267000; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7001; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47002; CHECK-RV32-NEXT: addi a0, a0, 17003; CHECK-RV32-NEXT: vmv4r.v v16, v87004; CHECK-RV32-NEXT: vmv8r.v v8, v167005; CHECK-RV32-NEXT: andi a3, a2, 87006; CHECK-RV32-NEXT: bnez a3, .LBB61_7567007; CHECK-RV32-NEXT: j .LBB61_2437008; CHECK-RV32-NEXT: .LBB61_756: # %cond.load9057009; CHECK-RV32-NEXT: lbu a3, 0(a0)7010; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7011; CHECK-RV32-NEXT: vmv8r.v v16, v87012; CHECK-RV32-NEXT: vmv.s.x v12, a37013; CHECK-RV32-NEXT: li a3, 2287014; CHECK-RV32-NEXT: li a4, 2277015; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7016; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47017; CHECK-RV32-NEXT: addi a0, a0, 17018; CHECK-RV32-NEXT: vmv4r.v v16, v87019; CHECK-RV32-NEXT: vmv8r.v v8, v167020; CHECK-RV32-NEXT: andi a3, a2, 167021; CHECK-RV32-NEXT: bnez a3, .LBB61_7577022; CHECK-RV32-NEXT: j .LBB61_2447023; CHECK-RV32-NEXT: .LBB61_757: # %cond.load9097024; CHECK-RV32-NEXT: lbu a3, 0(a0)7025; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7026; CHECK-RV32-NEXT: vmv8r.v v16, v87027; CHECK-RV32-NEXT: vmv.s.x v12, a37028; CHECK-RV32-NEXT: li a3, 2297029; CHECK-RV32-NEXT: li a4, 2287030; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7031; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47032; CHECK-RV32-NEXT: addi a0, a0, 17033; CHECK-RV32-NEXT: vmv4r.v v16, v87034; CHECK-RV32-NEXT: vmv8r.v v8, v167035; CHECK-RV32-NEXT: andi a3, a2, 327036; CHECK-RV32-NEXT: bnez a3, .LBB61_7587037; CHECK-RV32-NEXT: j .LBB61_2457038; CHECK-RV32-NEXT: .LBB61_758: # %cond.load9137039; CHECK-RV32-NEXT: lbu a3, 0(a0)7040; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7041; CHECK-RV32-NEXT: vmv8r.v v16, v87042; CHECK-RV32-NEXT: vmv.s.x v12, a37043; CHECK-RV32-NEXT: li a3, 2307044; CHECK-RV32-NEXT: li a4, 2297045; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7046; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47047; CHECK-RV32-NEXT: addi a0, a0, 17048; CHECK-RV32-NEXT: vmv4r.v v16, v87049; CHECK-RV32-NEXT: vmv8r.v v8, v167050; CHECK-RV32-NEXT: andi a3, a2, 647051; CHECK-RV32-NEXT: bnez a3, .LBB61_7597052; CHECK-RV32-NEXT: j .LBB61_2467053; CHECK-RV32-NEXT: .LBB61_759: # %cond.load9177054; CHECK-RV32-NEXT: lbu a3, 0(a0)7055; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7056; CHECK-RV32-NEXT: vmv8r.v v16, v87057; CHECK-RV32-NEXT: vmv.s.x v12, a37058; CHECK-RV32-NEXT: li a3, 2317059; CHECK-RV32-NEXT: li a4, 2307060; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7061; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47062; CHECK-RV32-NEXT: addi a0, a0, 17063; CHECK-RV32-NEXT: vmv4r.v v16, v87064; CHECK-RV32-NEXT: vmv8r.v v8, v167065; CHECK-RV32-NEXT: andi a3, a2, 1287066; CHECK-RV32-NEXT: bnez a3, .LBB61_7607067; CHECK-RV32-NEXT: j .LBB61_2477068; CHECK-RV32-NEXT: .LBB61_760: # %cond.load9217069; CHECK-RV32-NEXT: lbu a3, 0(a0)7070; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7071; CHECK-RV32-NEXT: vmv8r.v v16, v87072; CHECK-RV32-NEXT: vmv.s.x v12, a37073; CHECK-RV32-NEXT: li a3, 2327074; CHECK-RV32-NEXT: li a4, 2317075; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7076; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47077; CHECK-RV32-NEXT: addi a0, a0, 17078; CHECK-RV32-NEXT: vmv4r.v v16, v87079; CHECK-RV32-NEXT: vmv8r.v v8, v167080; CHECK-RV32-NEXT: andi a3, a2, 2567081; CHECK-RV32-NEXT: bnez a3, .LBB61_7617082; CHECK-RV32-NEXT: j .LBB61_2487083; CHECK-RV32-NEXT: .LBB61_761: # %cond.load9257084; CHECK-RV32-NEXT: lbu a3, 0(a0)7085; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7086; CHECK-RV32-NEXT: vmv8r.v v16, v87087; CHECK-RV32-NEXT: vmv.s.x v12, a37088; CHECK-RV32-NEXT: li a3, 2337089; CHECK-RV32-NEXT: li a4, 2327090; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7091; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47092; CHECK-RV32-NEXT: addi a0, a0, 17093; CHECK-RV32-NEXT: vmv4r.v v16, v87094; CHECK-RV32-NEXT: vmv8r.v v8, v167095; CHECK-RV32-NEXT: andi a3, a2, 5127096; CHECK-RV32-NEXT: bnez a3, .LBB61_7627097; CHECK-RV32-NEXT: j .LBB61_2497098; CHECK-RV32-NEXT: .LBB61_762: # %cond.load9297099; CHECK-RV32-NEXT: lbu a3, 0(a0)7100; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7101; CHECK-RV32-NEXT: vmv8r.v v16, v87102; CHECK-RV32-NEXT: vmv.s.x v12, a37103; CHECK-RV32-NEXT: li a3, 2347104; CHECK-RV32-NEXT: li a4, 2337105; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7106; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47107; CHECK-RV32-NEXT: addi a0, a0, 17108; CHECK-RV32-NEXT: vmv4r.v v16, v87109; CHECK-RV32-NEXT: vmv8r.v v8, v167110; CHECK-RV32-NEXT: andi a3, a2, 10247111; CHECK-RV32-NEXT: bnez a3, .LBB61_7637112; CHECK-RV32-NEXT: j .LBB61_2507113; CHECK-RV32-NEXT: .LBB61_763: # %cond.load9337114; CHECK-RV32-NEXT: lbu a3, 0(a0)7115; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7116; CHECK-RV32-NEXT: vmv8r.v v16, v87117; CHECK-RV32-NEXT: vmv.s.x v12, a37118; CHECK-RV32-NEXT: li a3, 2357119; CHECK-RV32-NEXT: li a4, 2347120; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7121; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47122; CHECK-RV32-NEXT: addi a0, a0, 17123; CHECK-RV32-NEXT: vmv4r.v v16, v87124; CHECK-RV32-NEXT: vmv8r.v v8, v167125; CHECK-RV32-NEXT: slli a3, a2, 207126; CHECK-RV32-NEXT: bltz a3, .LBB61_7647127; CHECK-RV32-NEXT: j .LBB61_2517128; CHECK-RV32-NEXT: .LBB61_764: # %cond.load9377129; CHECK-RV32-NEXT: lbu a3, 0(a0)7130; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7131; CHECK-RV32-NEXT: vmv8r.v v16, v87132; CHECK-RV32-NEXT: vmv.s.x v12, a37133; CHECK-RV32-NEXT: li a3, 2367134; CHECK-RV32-NEXT: li a4, 2357135; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7136; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47137; CHECK-RV32-NEXT: addi a0, a0, 17138; CHECK-RV32-NEXT: vmv4r.v v16, v87139; CHECK-RV32-NEXT: vmv8r.v v8, v167140; CHECK-RV32-NEXT: slli a3, a2, 197141; CHECK-RV32-NEXT: bltz a3, .LBB61_7657142; CHECK-RV32-NEXT: j .LBB61_2527143; CHECK-RV32-NEXT: .LBB61_765: # %cond.load9417144; CHECK-RV32-NEXT: lbu a3, 0(a0)7145; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7146; CHECK-RV32-NEXT: vmv8r.v v16, v87147; CHECK-RV32-NEXT: vmv.s.x v12, a37148; CHECK-RV32-NEXT: li a3, 2377149; CHECK-RV32-NEXT: li a4, 2367150; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7151; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47152; CHECK-RV32-NEXT: addi a0, a0, 17153; CHECK-RV32-NEXT: vmv4r.v v16, v87154; CHECK-RV32-NEXT: vmv8r.v v8, v167155; CHECK-RV32-NEXT: slli a3, a2, 187156; CHECK-RV32-NEXT: bltz a3, .LBB61_7667157; CHECK-RV32-NEXT: j .LBB61_2537158; CHECK-RV32-NEXT: .LBB61_766: # %cond.load9457159; CHECK-RV32-NEXT: lbu a3, 0(a0)7160; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7161; CHECK-RV32-NEXT: vmv8r.v v16, v87162; CHECK-RV32-NEXT: vmv.s.x v12, a37163; CHECK-RV32-NEXT: li a3, 2387164; CHECK-RV32-NEXT: li a4, 2377165; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7166; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47167; CHECK-RV32-NEXT: addi a0, a0, 17168; CHECK-RV32-NEXT: vmv4r.v v16, v87169; CHECK-RV32-NEXT: vmv8r.v v8, v167170; CHECK-RV32-NEXT: slli a3, a2, 177171; CHECK-RV32-NEXT: bltz a3, .LBB61_7677172; CHECK-RV32-NEXT: j .LBB61_2547173; CHECK-RV32-NEXT: .LBB61_767: # %cond.load9497174; CHECK-RV32-NEXT: lbu a3, 0(a0)7175; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7176; CHECK-RV32-NEXT: vmv8r.v v16, v87177; CHECK-RV32-NEXT: vmv.s.x v12, a37178; CHECK-RV32-NEXT: li a3, 2397179; CHECK-RV32-NEXT: li a4, 2387180; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7181; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47182; CHECK-RV32-NEXT: addi a0, a0, 17183; CHECK-RV32-NEXT: vmv4r.v v16, v87184; CHECK-RV32-NEXT: vmv8r.v v8, v167185; CHECK-RV32-NEXT: slli a3, a2, 167186; CHECK-RV32-NEXT: bltz a3, .LBB61_7687187; CHECK-RV32-NEXT: j .LBB61_2557188; CHECK-RV32-NEXT: .LBB61_768: # %cond.load9537189; CHECK-RV32-NEXT: lbu a3, 0(a0)7190; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7191; CHECK-RV32-NEXT: vmv8r.v v16, v87192; CHECK-RV32-NEXT: vmv.s.x v12, a37193; CHECK-RV32-NEXT: li a3, 2407194; CHECK-RV32-NEXT: li a4, 2397195; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7196; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47197; CHECK-RV32-NEXT: addi a0, a0, 17198; CHECK-RV32-NEXT: vmv4r.v v16, v87199; CHECK-RV32-NEXT: vmv8r.v v8, v167200; CHECK-RV32-NEXT: slli a3, a2, 157201; CHECK-RV32-NEXT: bltz a3, .LBB61_7697202; CHECK-RV32-NEXT: j .LBB61_2567203; CHECK-RV32-NEXT: .LBB61_769: # %cond.load9577204; CHECK-RV32-NEXT: lbu a3, 0(a0)7205; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7206; CHECK-RV32-NEXT: vmv8r.v v16, v87207; CHECK-RV32-NEXT: vmv.s.x v12, a37208; CHECK-RV32-NEXT: li a3, 2417209; CHECK-RV32-NEXT: li a4, 2407210; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7211; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47212; CHECK-RV32-NEXT: addi a0, a0, 17213; CHECK-RV32-NEXT: vmv4r.v v16, v87214; CHECK-RV32-NEXT: vmv8r.v v8, v167215; CHECK-RV32-NEXT: slli a3, a2, 147216; CHECK-RV32-NEXT: bltz a3, .LBB61_7707217; CHECK-RV32-NEXT: j .LBB61_2577218; CHECK-RV32-NEXT: .LBB61_770: # %cond.load9617219; CHECK-RV32-NEXT: lbu a3, 0(a0)7220; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7221; CHECK-RV32-NEXT: vmv8r.v v16, v87222; CHECK-RV32-NEXT: vmv.s.x v12, a37223; CHECK-RV32-NEXT: li a3, 2427224; CHECK-RV32-NEXT: li a4, 2417225; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7226; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47227; CHECK-RV32-NEXT: addi a0, a0, 17228; CHECK-RV32-NEXT: vmv4r.v v16, v87229; CHECK-RV32-NEXT: vmv8r.v v8, v167230; CHECK-RV32-NEXT: slli a3, a2, 137231; CHECK-RV32-NEXT: bltz a3, .LBB61_7717232; CHECK-RV32-NEXT: j .LBB61_2587233; CHECK-RV32-NEXT: .LBB61_771: # %cond.load9657234; CHECK-RV32-NEXT: lbu a3, 0(a0)7235; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7236; CHECK-RV32-NEXT: vmv8r.v v16, v87237; CHECK-RV32-NEXT: vmv.s.x v12, a37238; CHECK-RV32-NEXT: li a3, 2437239; CHECK-RV32-NEXT: li a4, 2427240; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7241; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47242; CHECK-RV32-NEXT: addi a0, a0, 17243; CHECK-RV32-NEXT: vmv4r.v v16, v87244; CHECK-RV32-NEXT: vmv8r.v v8, v167245; CHECK-RV32-NEXT: slli a3, a2, 127246; CHECK-RV32-NEXT: bltz a3, .LBB61_7727247; CHECK-RV32-NEXT: j .LBB61_2597248; CHECK-RV32-NEXT: .LBB61_772: # %cond.load9697249; CHECK-RV32-NEXT: lbu a3, 0(a0)7250; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7251; CHECK-RV32-NEXT: vmv8r.v v16, v87252; CHECK-RV32-NEXT: vmv.s.x v12, a37253; CHECK-RV32-NEXT: li a3, 2447254; CHECK-RV32-NEXT: li a4, 2437255; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7256; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47257; CHECK-RV32-NEXT: addi a0, a0, 17258; CHECK-RV32-NEXT: vmv4r.v v16, v87259; CHECK-RV32-NEXT: vmv8r.v v8, v167260; CHECK-RV32-NEXT: slli a3, a2, 117261; CHECK-RV32-NEXT: bltz a3, .LBB61_7737262; CHECK-RV32-NEXT: j .LBB61_2607263; CHECK-RV32-NEXT: .LBB61_773: # %cond.load9737264; CHECK-RV32-NEXT: lbu a3, 0(a0)7265; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7266; CHECK-RV32-NEXT: vmv8r.v v16, v87267; CHECK-RV32-NEXT: vmv.s.x v12, a37268; CHECK-RV32-NEXT: li a3, 2457269; CHECK-RV32-NEXT: li a4, 2447270; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7271; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47272; CHECK-RV32-NEXT: addi a0, a0, 17273; CHECK-RV32-NEXT: vmv4r.v v16, v87274; CHECK-RV32-NEXT: vmv8r.v v8, v167275; CHECK-RV32-NEXT: slli a3, a2, 107276; CHECK-RV32-NEXT: bltz a3, .LBB61_7747277; CHECK-RV32-NEXT: j .LBB61_2617278; CHECK-RV32-NEXT: .LBB61_774: # %cond.load9777279; CHECK-RV32-NEXT: lbu a3, 0(a0)7280; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7281; CHECK-RV32-NEXT: vmv8r.v v16, v87282; CHECK-RV32-NEXT: vmv.s.x v12, a37283; CHECK-RV32-NEXT: li a3, 2467284; CHECK-RV32-NEXT: li a4, 2457285; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7286; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47287; CHECK-RV32-NEXT: addi a0, a0, 17288; CHECK-RV32-NEXT: vmv4r.v v16, v87289; CHECK-RV32-NEXT: vmv8r.v v8, v167290; CHECK-RV32-NEXT: slli a3, a2, 97291; CHECK-RV32-NEXT: bltz a3, .LBB61_7757292; CHECK-RV32-NEXT: j .LBB61_2627293; CHECK-RV32-NEXT: .LBB61_775: # %cond.load9817294; CHECK-RV32-NEXT: lbu a3, 0(a0)7295; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7296; CHECK-RV32-NEXT: vmv8r.v v16, v87297; CHECK-RV32-NEXT: vmv.s.x v12, a37298; CHECK-RV32-NEXT: li a3, 2477299; CHECK-RV32-NEXT: li a4, 2467300; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7301; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47302; CHECK-RV32-NEXT: addi a0, a0, 17303; CHECK-RV32-NEXT: vmv4r.v v16, v87304; CHECK-RV32-NEXT: vmv8r.v v8, v167305; CHECK-RV32-NEXT: slli a3, a2, 87306; CHECK-RV32-NEXT: bltz a3, .LBB61_7767307; CHECK-RV32-NEXT: j .LBB61_2637308; CHECK-RV32-NEXT: .LBB61_776: # %cond.load9857309; CHECK-RV32-NEXT: lbu a3, 0(a0)7310; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7311; CHECK-RV32-NEXT: vmv8r.v v16, v87312; CHECK-RV32-NEXT: vmv.s.x v12, a37313; CHECK-RV32-NEXT: li a3, 2487314; CHECK-RV32-NEXT: li a4, 2477315; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7316; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47317; CHECK-RV32-NEXT: addi a0, a0, 17318; CHECK-RV32-NEXT: vmv4r.v v16, v87319; CHECK-RV32-NEXT: vmv8r.v v8, v167320; CHECK-RV32-NEXT: slli a3, a2, 77321; CHECK-RV32-NEXT: bltz a3, .LBB61_7777322; CHECK-RV32-NEXT: j .LBB61_2647323; CHECK-RV32-NEXT: .LBB61_777: # %cond.load9897324; CHECK-RV32-NEXT: lbu a3, 0(a0)7325; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7326; CHECK-RV32-NEXT: vmv8r.v v16, v87327; CHECK-RV32-NEXT: vmv.s.x v12, a37328; CHECK-RV32-NEXT: li a3, 2497329; CHECK-RV32-NEXT: li a4, 2487330; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7331; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47332; CHECK-RV32-NEXT: addi a0, a0, 17333; CHECK-RV32-NEXT: vmv4r.v v16, v87334; CHECK-RV32-NEXT: vmv8r.v v8, v167335; CHECK-RV32-NEXT: slli a3, a2, 67336; CHECK-RV32-NEXT: bltz a3, .LBB61_7787337; CHECK-RV32-NEXT: j .LBB61_2657338; CHECK-RV32-NEXT: .LBB61_778: # %cond.load9937339; CHECK-RV32-NEXT: lbu a3, 0(a0)7340; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7341; CHECK-RV32-NEXT: vmv8r.v v16, v87342; CHECK-RV32-NEXT: vmv.s.x v12, a37343; CHECK-RV32-NEXT: li a3, 2507344; CHECK-RV32-NEXT: li a4, 2497345; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7346; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47347; CHECK-RV32-NEXT: addi a0, a0, 17348; CHECK-RV32-NEXT: vmv4r.v v16, v87349; CHECK-RV32-NEXT: vmv8r.v v8, v167350; CHECK-RV32-NEXT: slli a3, a2, 57351; CHECK-RV32-NEXT: bltz a3, .LBB61_7797352; CHECK-RV32-NEXT: j .LBB61_2667353; CHECK-RV32-NEXT: .LBB61_779: # %cond.load9977354; CHECK-RV32-NEXT: lbu a3, 0(a0)7355; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7356; CHECK-RV32-NEXT: vmv8r.v v16, v87357; CHECK-RV32-NEXT: vmv.s.x v12, a37358; CHECK-RV32-NEXT: li a3, 2517359; CHECK-RV32-NEXT: li a4, 2507360; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7361; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47362; CHECK-RV32-NEXT: addi a0, a0, 17363; CHECK-RV32-NEXT: vmv4r.v v16, v87364; CHECK-RV32-NEXT: vmv8r.v v8, v167365; CHECK-RV32-NEXT: slli a3, a2, 47366; CHECK-RV32-NEXT: bltz a3, .LBB61_7807367; CHECK-RV32-NEXT: j .LBB61_2677368; CHECK-RV32-NEXT: .LBB61_780: # %cond.load10017369; CHECK-RV32-NEXT: lbu a3, 0(a0)7370; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7371; CHECK-RV32-NEXT: vmv8r.v v16, v87372; CHECK-RV32-NEXT: vmv.s.x v12, a37373; CHECK-RV32-NEXT: li a3, 2527374; CHECK-RV32-NEXT: li a4, 2517375; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7376; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47377; CHECK-RV32-NEXT: addi a0, a0, 17378; CHECK-RV32-NEXT: vmv4r.v v16, v87379; CHECK-RV32-NEXT: vmv8r.v v8, v167380; CHECK-RV32-NEXT: slli a3, a2, 37381; CHECK-RV32-NEXT: bltz a3, .LBB61_7817382; CHECK-RV32-NEXT: j .LBB61_2687383; CHECK-RV32-NEXT: .LBB61_781: # %cond.load10057384; CHECK-RV32-NEXT: lbu a3, 0(a0)7385; CHECK-RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma7386; CHECK-RV32-NEXT: vmv8r.v v16, v87387; CHECK-RV32-NEXT: vmv.s.x v12, a37388; CHECK-RV32-NEXT: li a3, 2537389; CHECK-RV32-NEXT: li a4, 2527390; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m4, tu, ma7391; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47392; CHECK-RV32-NEXT: addi a0, a0, 17393; CHECK-RV32-NEXT: vmv4r.v v16, v87394; CHECK-RV32-NEXT: vmv8r.v v8, v167395; CHECK-RV32-NEXT: slli a3, a2, 27396; CHECK-RV32-NEXT: bgez a3, .LBB61_10327397; CHECK-RV32-NEXT: j .LBB61_2697398; CHECK-RV32-NEXT: .LBB61_1032: # %cond.load10057399; CHECK-RV32-NEXT: j .LBB61_2707400; CHECK-RV32-NEXT: .LBB61_782: # %cond.load10177401; CHECK-RV32-NEXT: lbu a2, 0(a0)7402; CHECK-RV32-NEXT: vmv8r.v v16, v87403; CHECK-RV32-NEXT: vmv.s.x v12, a27404; CHECK-RV32-NEXT: li a2, 2567405; CHECK-RV32-NEXT: li a4, 2557406; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m4, tu, ma7407; CHECK-RV32-NEXT: vslideup.vx v8, v12, a47408; CHECK-RV32-NEXT: addi a0, a0, 17409; CHECK-RV32-NEXT: vmv4r.v v16, v87410; CHECK-RV32-NEXT: vmv8r.v v8, v167411; CHECK-RV32-NEXT: andi a2, a3, 17412; CHECK-RV32-NEXT: bnez a2, .LBB61_7837413; CHECK-RV32-NEXT: j .LBB61_2747414; CHECK-RV32-NEXT: .LBB61_783: # %cond.load10217415; CHECK-RV32-NEXT: lbu a2, 0(a0)7416; CHECK-RV32-NEXT: li a4, 5127417; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7418; CHECK-RV32-NEXT: vmv.s.x v16, a27419; CHECK-RV32-NEXT: li a2, 2577420; CHECK-RV32-NEXT: li a4, 2567421; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7422; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47423; CHECK-RV32-NEXT: addi a0, a0, 17424; CHECK-RV32-NEXT: andi a2, a3, 27425; CHECK-RV32-NEXT: bnez a2, .LBB61_7847426; CHECK-RV32-NEXT: j .LBB61_2757427; CHECK-RV32-NEXT: .LBB61_784: # %cond.load10257428; CHECK-RV32-NEXT: lbu a2, 0(a0)7429; CHECK-RV32-NEXT: li a4, 5127430; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7431; CHECK-RV32-NEXT: vmv.s.x v16, a27432; CHECK-RV32-NEXT: li a2, 2587433; CHECK-RV32-NEXT: li a4, 2577434; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7435; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47436; CHECK-RV32-NEXT: addi a0, a0, 17437; CHECK-RV32-NEXT: andi a2, a3, 47438; CHECK-RV32-NEXT: bnez a2, .LBB61_7857439; CHECK-RV32-NEXT: j .LBB61_2767440; CHECK-RV32-NEXT: .LBB61_785: # %cond.load10297441; CHECK-RV32-NEXT: lbu a2, 0(a0)7442; CHECK-RV32-NEXT: li a4, 5127443; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7444; CHECK-RV32-NEXT: vmv.s.x v16, a27445; CHECK-RV32-NEXT: li a2, 2597446; CHECK-RV32-NEXT: li a4, 2587447; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7448; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47449; CHECK-RV32-NEXT: addi a0, a0, 17450; CHECK-RV32-NEXT: andi a2, a3, 87451; CHECK-RV32-NEXT: bnez a2, .LBB61_7867452; CHECK-RV32-NEXT: j .LBB61_2777453; CHECK-RV32-NEXT: .LBB61_786: # %cond.load10337454; CHECK-RV32-NEXT: lbu a2, 0(a0)7455; CHECK-RV32-NEXT: li a4, 5127456; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7457; CHECK-RV32-NEXT: vmv.s.x v16, a27458; CHECK-RV32-NEXT: li a2, 2607459; CHECK-RV32-NEXT: li a4, 2597460; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7461; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47462; CHECK-RV32-NEXT: addi a0, a0, 17463; CHECK-RV32-NEXT: andi a2, a3, 167464; CHECK-RV32-NEXT: bnez a2, .LBB61_7877465; CHECK-RV32-NEXT: j .LBB61_2787466; CHECK-RV32-NEXT: .LBB61_787: # %cond.load10377467; CHECK-RV32-NEXT: lbu a2, 0(a0)7468; CHECK-RV32-NEXT: li a4, 5127469; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7470; CHECK-RV32-NEXT: vmv.s.x v16, a27471; CHECK-RV32-NEXT: li a2, 2617472; CHECK-RV32-NEXT: li a4, 2607473; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7474; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47475; CHECK-RV32-NEXT: addi a0, a0, 17476; CHECK-RV32-NEXT: andi a2, a3, 327477; CHECK-RV32-NEXT: bnez a2, .LBB61_7887478; CHECK-RV32-NEXT: j .LBB61_2797479; CHECK-RV32-NEXT: .LBB61_788: # %cond.load10417480; CHECK-RV32-NEXT: lbu a2, 0(a0)7481; CHECK-RV32-NEXT: li a4, 5127482; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7483; CHECK-RV32-NEXT: vmv.s.x v16, a27484; CHECK-RV32-NEXT: li a2, 2627485; CHECK-RV32-NEXT: li a4, 2617486; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7487; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47488; CHECK-RV32-NEXT: addi a0, a0, 17489; CHECK-RV32-NEXT: andi a2, a3, 647490; CHECK-RV32-NEXT: bnez a2, .LBB61_7897491; CHECK-RV32-NEXT: j .LBB61_2807492; CHECK-RV32-NEXT: .LBB61_789: # %cond.load10457493; CHECK-RV32-NEXT: lbu a2, 0(a0)7494; CHECK-RV32-NEXT: li a4, 5127495; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7496; CHECK-RV32-NEXT: vmv.s.x v16, a27497; CHECK-RV32-NEXT: li a2, 2637498; CHECK-RV32-NEXT: li a4, 2627499; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7500; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47501; CHECK-RV32-NEXT: addi a0, a0, 17502; CHECK-RV32-NEXT: andi a2, a3, 1287503; CHECK-RV32-NEXT: bnez a2, .LBB61_7907504; CHECK-RV32-NEXT: j .LBB61_2817505; CHECK-RV32-NEXT: .LBB61_790: # %cond.load10497506; CHECK-RV32-NEXT: lbu a2, 0(a0)7507; CHECK-RV32-NEXT: li a4, 5127508; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7509; CHECK-RV32-NEXT: vmv.s.x v16, a27510; CHECK-RV32-NEXT: li a2, 2647511; CHECK-RV32-NEXT: li a4, 2637512; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7513; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47514; CHECK-RV32-NEXT: addi a0, a0, 17515; CHECK-RV32-NEXT: andi a2, a3, 2567516; CHECK-RV32-NEXT: bnez a2, .LBB61_7917517; CHECK-RV32-NEXT: j .LBB61_2827518; CHECK-RV32-NEXT: .LBB61_791: # %cond.load10537519; CHECK-RV32-NEXT: lbu a2, 0(a0)7520; CHECK-RV32-NEXT: li a4, 5127521; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7522; CHECK-RV32-NEXT: vmv.s.x v16, a27523; CHECK-RV32-NEXT: li a2, 2657524; CHECK-RV32-NEXT: li a4, 2647525; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7526; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47527; CHECK-RV32-NEXT: addi a0, a0, 17528; CHECK-RV32-NEXT: andi a2, a3, 5127529; CHECK-RV32-NEXT: bnez a2, .LBB61_7927530; CHECK-RV32-NEXT: j .LBB61_2837531; CHECK-RV32-NEXT: .LBB61_792: # %cond.load10577532; CHECK-RV32-NEXT: lbu a2, 0(a0)7533; CHECK-RV32-NEXT: li a4, 5127534; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7535; CHECK-RV32-NEXT: vmv.s.x v16, a27536; CHECK-RV32-NEXT: li a2, 2667537; CHECK-RV32-NEXT: li a4, 2657538; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7539; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47540; CHECK-RV32-NEXT: addi a0, a0, 17541; CHECK-RV32-NEXT: andi a2, a3, 10247542; CHECK-RV32-NEXT: bnez a2, .LBB61_7937543; CHECK-RV32-NEXT: j .LBB61_2847544; CHECK-RV32-NEXT: .LBB61_793: # %cond.load10617545; CHECK-RV32-NEXT: lbu a2, 0(a0)7546; CHECK-RV32-NEXT: li a4, 5127547; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7548; CHECK-RV32-NEXT: vmv.s.x v16, a27549; CHECK-RV32-NEXT: li a2, 2677550; CHECK-RV32-NEXT: li a4, 2667551; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7552; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47553; CHECK-RV32-NEXT: addi a0, a0, 17554; CHECK-RV32-NEXT: slli a2, a3, 207555; CHECK-RV32-NEXT: bltz a2, .LBB61_7947556; CHECK-RV32-NEXT: j .LBB61_2857557; CHECK-RV32-NEXT: .LBB61_794: # %cond.load10657558; CHECK-RV32-NEXT: lbu a2, 0(a0)7559; CHECK-RV32-NEXT: li a4, 5127560; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7561; CHECK-RV32-NEXT: vmv.s.x v16, a27562; CHECK-RV32-NEXT: li a2, 2687563; CHECK-RV32-NEXT: li a4, 2677564; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7565; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47566; CHECK-RV32-NEXT: addi a0, a0, 17567; CHECK-RV32-NEXT: slli a2, a3, 197568; CHECK-RV32-NEXT: bltz a2, .LBB61_7957569; CHECK-RV32-NEXT: j .LBB61_2867570; CHECK-RV32-NEXT: .LBB61_795: # %cond.load10697571; CHECK-RV32-NEXT: lbu a2, 0(a0)7572; CHECK-RV32-NEXT: li a4, 5127573; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7574; CHECK-RV32-NEXT: vmv.s.x v16, a27575; CHECK-RV32-NEXT: li a2, 2697576; CHECK-RV32-NEXT: li a4, 2687577; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7578; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47579; CHECK-RV32-NEXT: addi a0, a0, 17580; CHECK-RV32-NEXT: slli a2, a3, 187581; CHECK-RV32-NEXT: bltz a2, .LBB61_7967582; CHECK-RV32-NEXT: j .LBB61_2877583; CHECK-RV32-NEXT: .LBB61_796: # %cond.load10737584; CHECK-RV32-NEXT: lbu a2, 0(a0)7585; CHECK-RV32-NEXT: li a4, 5127586; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7587; CHECK-RV32-NEXT: vmv.s.x v16, a27588; CHECK-RV32-NEXT: li a2, 2707589; CHECK-RV32-NEXT: li a4, 2697590; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7591; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47592; CHECK-RV32-NEXT: addi a0, a0, 17593; CHECK-RV32-NEXT: slli a2, a3, 177594; CHECK-RV32-NEXT: bltz a2, .LBB61_7977595; CHECK-RV32-NEXT: j .LBB61_2887596; CHECK-RV32-NEXT: .LBB61_797: # %cond.load10777597; CHECK-RV32-NEXT: lbu a2, 0(a0)7598; CHECK-RV32-NEXT: li a4, 5127599; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7600; CHECK-RV32-NEXT: vmv.s.x v16, a27601; CHECK-RV32-NEXT: li a2, 2717602; CHECK-RV32-NEXT: li a4, 2707603; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7604; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47605; CHECK-RV32-NEXT: addi a0, a0, 17606; CHECK-RV32-NEXT: slli a2, a3, 167607; CHECK-RV32-NEXT: bltz a2, .LBB61_7987608; CHECK-RV32-NEXT: j .LBB61_2897609; CHECK-RV32-NEXT: .LBB61_798: # %cond.load10817610; CHECK-RV32-NEXT: lbu a2, 0(a0)7611; CHECK-RV32-NEXT: li a4, 5127612; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7613; CHECK-RV32-NEXT: vmv.s.x v16, a27614; CHECK-RV32-NEXT: li a2, 2727615; CHECK-RV32-NEXT: li a4, 2717616; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7617; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47618; CHECK-RV32-NEXT: addi a0, a0, 17619; CHECK-RV32-NEXT: slli a2, a3, 157620; CHECK-RV32-NEXT: bltz a2, .LBB61_7997621; CHECK-RV32-NEXT: j .LBB61_2907622; CHECK-RV32-NEXT: .LBB61_799: # %cond.load10857623; CHECK-RV32-NEXT: lbu a2, 0(a0)7624; CHECK-RV32-NEXT: li a4, 5127625; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7626; CHECK-RV32-NEXT: vmv.s.x v16, a27627; CHECK-RV32-NEXT: li a2, 2737628; CHECK-RV32-NEXT: li a4, 2727629; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7630; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47631; CHECK-RV32-NEXT: addi a0, a0, 17632; CHECK-RV32-NEXT: slli a2, a3, 147633; CHECK-RV32-NEXT: bltz a2, .LBB61_8007634; CHECK-RV32-NEXT: j .LBB61_2917635; CHECK-RV32-NEXT: .LBB61_800: # %cond.load10897636; CHECK-RV32-NEXT: lbu a2, 0(a0)7637; CHECK-RV32-NEXT: li a4, 5127638; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7639; CHECK-RV32-NEXT: vmv.s.x v16, a27640; CHECK-RV32-NEXT: li a2, 2747641; CHECK-RV32-NEXT: li a4, 2737642; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7643; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47644; CHECK-RV32-NEXT: addi a0, a0, 17645; CHECK-RV32-NEXT: slli a2, a3, 137646; CHECK-RV32-NEXT: bltz a2, .LBB61_8017647; CHECK-RV32-NEXT: j .LBB61_2927648; CHECK-RV32-NEXT: .LBB61_801: # %cond.load10937649; CHECK-RV32-NEXT: lbu a2, 0(a0)7650; CHECK-RV32-NEXT: li a4, 5127651; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7652; CHECK-RV32-NEXT: vmv.s.x v16, a27653; CHECK-RV32-NEXT: li a2, 2757654; CHECK-RV32-NEXT: li a4, 2747655; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7656; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47657; CHECK-RV32-NEXT: addi a0, a0, 17658; CHECK-RV32-NEXT: slli a2, a3, 127659; CHECK-RV32-NEXT: bltz a2, .LBB61_8027660; CHECK-RV32-NEXT: j .LBB61_2937661; CHECK-RV32-NEXT: .LBB61_802: # %cond.load10977662; CHECK-RV32-NEXT: lbu a2, 0(a0)7663; CHECK-RV32-NEXT: li a4, 5127664; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7665; CHECK-RV32-NEXT: vmv.s.x v16, a27666; CHECK-RV32-NEXT: li a2, 2767667; CHECK-RV32-NEXT: li a4, 2757668; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7669; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47670; CHECK-RV32-NEXT: addi a0, a0, 17671; CHECK-RV32-NEXT: slli a2, a3, 117672; CHECK-RV32-NEXT: bltz a2, .LBB61_8037673; CHECK-RV32-NEXT: j .LBB61_2947674; CHECK-RV32-NEXT: .LBB61_803: # %cond.load11017675; CHECK-RV32-NEXT: lbu a2, 0(a0)7676; CHECK-RV32-NEXT: li a4, 5127677; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7678; CHECK-RV32-NEXT: vmv.s.x v16, a27679; CHECK-RV32-NEXT: li a2, 2777680; CHECK-RV32-NEXT: li a4, 2767681; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7682; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47683; CHECK-RV32-NEXT: addi a0, a0, 17684; CHECK-RV32-NEXT: slli a2, a3, 107685; CHECK-RV32-NEXT: bltz a2, .LBB61_8047686; CHECK-RV32-NEXT: j .LBB61_2957687; CHECK-RV32-NEXT: .LBB61_804: # %cond.load11057688; CHECK-RV32-NEXT: lbu a2, 0(a0)7689; CHECK-RV32-NEXT: li a4, 5127690; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7691; CHECK-RV32-NEXT: vmv.s.x v16, a27692; CHECK-RV32-NEXT: li a2, 2787693; CHECK-RV32-NEXT: li a4, 2777694; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7695; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47696; CHECK-RV32-NEXT: addi a0, a0, 17697; CHECK-RV32-NEXT: slli a2, a3, 97698; CHECK-RV32-NEXT: bltz a2, .LBB61_8057699; CHECK-RV32-NEXT: j .LBB61_2967700; CHECK-RV32-NEXT: .LBB61_805: # %cond.load11097701; CHECK-RV32-NEXT: lbu a2, 0(a0)7702; CHECK-RV32-NEXT: li a4, 5127703; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7704; CHECK-RV32-NEXT: vmv.s.x v16, a27705; CHECK-RV32-NEXT: li a2, 2797706; CHECK-RV32-NEXT: li a4, 2787707; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7708; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47709; CHECK-RV32-NEXT: addi a0, a0, 17710; CHECK-RV32-NEXT: slli a2, a3, 87711; CHECK-RV32-NEXT: bltz a2, .LBB61_8067712; CHECK-RV32-NEXT: j .LBB61_2977713; CHECK-RV32-NEXT: .LBB61_806: # %cond.load11137714; CHECK-RV32-NEXT: lbu a2, 0(a0)7715; CHECK-RV32-NEXT: li a4, 5127716; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7717; CHECK-RV32-NEXT: vmv.s.x v16, a27718; CHECK-RV32-NEXT: li a2, 2807719; CHECK-RV32-NEXT: li a4, 2797720; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7721; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47722; CHECK-RV32-NEXT: addi a0, a0, 17723; CHECK-RV32-NEXT: slli a2, a3, 77724; CHECK-RV32-NEXT: bltz a2, .LBB61_8077725; CHECK-RV32-NEXT: j .LBB61_2987726; CHECK-RV32-NEXT: .LBB61_807: # %cond.load11177727; CHECK-RV32-NEXT: lbu a2, 0(a0)7728; CHECK-RV32-NEXT: li a4, 5127729; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7730; CHECK-RV32-NEXT: vmv.s.x v16, a27731; CHECK-RV32-NEXT: li a2, 2817732; CHECK-RV32-NEXT: li a4, 2807733; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7734; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47735; CHECK-RV32-NEXT: addi a0, a0, 17736; CHECK-RV32-NEXT: slli a2, a3, 67737; CHECK-RV32-NEXT: bltz a2, .LBB61_8087738; CHECK-RV32-NEXT: j .LBB61_2997739; CHECK-RV32-NEXT: .LBB61_808: # %cond.load11217740; CHECK-RV32-NEXT: lbu a2, 0(a0)7741; CHECK-RV32-NEXT: li a4, 5127742; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7743; CHECK-RV32-NEXT: vmv.s.x v16, a27744; CHECK-RV32-NEXT: li a2, 2827745; CHECK-RV32-NEXT: li a4, 2817746; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7747; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47748; CHECK-RV32-NEXT: addi a0, a0, 17749; CHECK-RV32-NEXT: slli a2, a3, 57750; CHECK-RV32-NEXT: bltz a2, .LBB61_8097751; CHECK-RV32-NEXT: j .LBB61_3007752; CHECK-RV32-NEXT: .LBB61_809: # %cond.load11257753; CHECK-RV32-NEXT: lbu a2, 0(a0)7754; CHECK-RV32-NEXT: li a4, 5127755; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7756; CHECK-RV32-NEXT: vmv.s.x v16, a27757; CHECK-RV32-NEXT: li a2, 2837758; CHECK-RV32-NEXT: li a4, 2827759; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7760; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47761; CHECK-RV32-NEXT: addi a0, a0, 17762; CHECK-RV32-NEXT: slli a2, a3, 47763; CHECK-RV32-NEXT: bltz a2, .LBB61_8107764; CHECK-RV32-NEXT: j .LBB61_3017765; CHECK-RV32-NEXT: .LBB61_810: # %cond.load11297766; CHECK-RV32-NEXT: lbu a2, 0(a0)7767; CHECK-RV32-NEXT: li a4, 5127768; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7769; CHECK-RV32-NEXT: vmv.s.x v16, a27770; CHECK-RV32-NEXT: li a2, 2847771; CHECK-RV32-NEXT: li a4, 2837772; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7773; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47774; CHECK-RV32-NEXT: addi a0, a0, 17775; CHECK-RV32-NEXT: slli a2, a3, 37776; CHECK-RV32-NEXT: bltz a2, .LBB61_8117777; CHECK-RV32-NEXT: j .LBB61_3027778; CHECK-RV32-NEXT: .LBB61_811: # %cond.load11337779; CHECK-RV32-NEXT: lbu a2, 0(a0)7780; CHECK-RV32-NEXT: li a4, 5127781; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7782; CHECK-RV32-NEXT: vmv.s.x v16, a27783; CHECK-RV32-NEXT: li a2, 2857784; CHECK-RV32-NEXT: li a4, 2847785; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma7786; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47787; CHECK-RV32-NEXT: addi a0, a0, 17788; CHECK-RV32-NEXT: slli a2, a3, 27789; CHECK-RV32-NEXT: bgez a2, .LBB61_10337790; CHECK-RV32-NEXT: j .LBB61_3037791; CHECK-RV32-NEXT: .LBB61_1033: # %cond.load11337792; CHECK-RV32-NEXT: j .LBB61_3047793; CHECK-RV32-NEXT: .LBB61_812: # %cond.load11457794; CHECK-RV32-NEXT: lbu a3, 0(a0)7795; CHECK-RV32-NEXT: vmv.s.x v16, a37796; CHECK-RV32-NEXT: li a3, 2887797; CHECK-RV32-NEXT: li a4, 2877798; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7799; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47800; CHECK-RV32-NEXT: addi a0, a0, 17801; CHECK-RV32-NEXT: andi a3, a2, 17802; CHECK-RV32-NEXT: bnez a3, .LBB61_8137803; CHECK-RV32-NEXT: j .LBB61_3087804; CHECK-RV32-NEXT: .LBB61_813: # %cond.load11497805; CHECK-RV32-NEXT: lbu a3, 0(a0)7806; CHECK-RV32-NEXT: li a4, 5127807; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7808; CHECK-RV32-NEXT: vmv.s.x v16, a37809; CHECK-RV32-NEXT: li a3, 2897810; CHECK-RV32-NEXT: li a4, 2887811; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7812; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47813; CHECK-RV32-NEXT: addi a0, a0, 17814; CHECK-RV32-NEXT: andi a3, a2, 27815; CHECK-RV32-NEXT: bnez a3, .LBB61_8147816; CHECK-RV32-NEXT: j .LBB61_3097817; CHECK-RV32-NEXT: .LBB61_814: # %cond.load11537818; CHECK-RV32-NEXT: lbu a3, 0(a0)7819; CHECK-RV32-NEXT: li a4, 5127820; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7821; CHECK-RV32-NEXT: vmv.s.x v16, a37822; CHECK-RV32-NEXT: li a3, 2907823; CHECK-RV32-NEXT: li a4, 2897824; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7825; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47826; CHECK-RV32-NEXT: addi a0, a0, 17827; CHECK-RV32-NEXT: andi a3, a2, 47828; CHECK-RV32-NEXT: bnez a3, .LBB61_8157829; CHECK-RV32-NEXT: j .LBB61_3107830; CHECK-RV32-NEXT: .LBB61_815: # %cond.load11577831; CHECK-RV32-NEXT: lbu a3, 0(a0)7832; CHECK-RV32-NEXT: li a4, 5127833; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7834; CHECK-RV32-NEXT: vmv.s.x v16, a37835; CHECK-RV32-NEXT: li a3, 2917836; CHECK-RV32-NEXT: li a4, 2907837; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7838; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47839; CHECK-RV32-NEXT: addi a0, a0, 17840; CHECK-RV32-NEXT: andi a3, a2, 87841; CHECK-RV32-NEXT: bnez a3, .LBB61_8167842; CHECK-RV32-NEXT: j .LBB61_3117843; CHECK-RV32-NEXT: .LBB61_816: # %cond.load11617844; CHECK-RV32-NEXT: lbu a3, 0(a0)7845; CHECK-RV32-NEXT: li a4, 5127846; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7847; CHECK-RV32-NEXT: vmv.s.x v16, a37848; CHECK-RV32-NEXT: li a3, 2927849; CHECK-RV32-NEXT: li a4, 2917850; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7851; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47852; CHECK-RV32-NEXT: addi a0, a0, 17853; CHECK-RV32-NEXT: andi a3, a2, 167854; CHECK-RV32-NEXT: bnez a3, .LBB61_8177855; CHECK-RV32-NEXT: j .LBB61_3127856; CHECK-RV32-NEXT: .LBB61_817: # %cond.load11657857; CHECK-RV32-NEXT: lbu a3, 0(a0)7858; CHECK-RV32-NEXT: li a4, 5127859; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7860; CHECK-RV32-NEXT: vmv.s.x v16, a37861; CHECK-RV32-NEXT: li a3, 2937862; CHECK-RV32-NEXT: li a4, 2927863; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7864; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47865; CHECK-RV32-NEXT: addi a0, a0, 17866; CHECK-RV32-NEXT: andi a3, a2, 327867; CHECK-RV32-NEXT: bnez a3, .LBB61_8187868; CHECK-RV32-NEXT: j .LBB61_3137869; CHECK-RV32-NEXT: .LBB61_818: # %cond.load11697870; CHECK-RV32-NEXT: lbu a3, 0(a0)7871; CHECK-RV32-NEXT: li a4, 5127872; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7873; CHECK-RV32-NEXT: vmv.s.x v16, a37874; CHECK-RV32-NEXT: li a3, 2947875; CHECK-RV32-NEXT: li a4, 2937876; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7877; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47878; CHECK-RV32-NEXT: addi a0, a0, 17879; CHECK-RV32-NEXT: andi a3, a2, 647880; CHECK-RV32-NEXT: bnez a3, .LBB61_8197881; CHECK-RV32-NEXT: j .LBB61_3147882; CHECK-RV32-NEXT: .LBB61_819: # %cond.load11737883; CHECK-RV32-NEXT: lbu a3, 0(a0)7884; CHECK-RV32-NEXT: li a4, 5127885; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7886; CHECK-RV32-NEXT: vmv.s.x v16, a37887; CHECK-RV32-NEXT: li a3, 2957888; CHECK-RV32-NEXT: li a4, 2947889; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7890; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47891; CHECK-RV32-NEXT: addi a0, a0, 17892; CHECK-RV32-NEXT: andi a3, a2, 1287893; CHECK-RV32-NEXT: bnez a3, .LBB61_8207894; CHECK-RV32-NEXT: j .LBB61_3157895; CHECK-RV32-NEXT: .LBB61_820: # %cond.load11777896; CHECK-RV32-NEXT: lbu a3, 0(a0)7897; CHECK-RV32-NEXT: li a4, 5127898; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7899; CHECK-RV32-NEXT: vmv.s.x v16, a37900; CHECK-RV32-NEXT: li a3, 2967901; CHECK-RV32-NEXT: li a4, 2957902; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7903; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47904; CHECK-RV32-NEXT: addi a0, a0, 17905; CHECK-RV32-NEXT: andi a3, a2, 2567906; CHECK-RV32-NEXT: bnez a3, .LBB61_8217907; CHECK-RV32-NEXT: j .LBB61_3167908; CHECK-RV32-NEXT: .LBB61_821: # %cond.load11817909; CHECK-RV32-NEXT: lbu a3, 0(a0)7910; CHECK-RV32-NEXT: li a4, 5127911; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7912; CHECK-RV32-NEXT: vmv.s.x v16, a37913; CHECK-RV32-NEXT: li a3, 2977914; CHECK-RV32-NEXT: li a4, 2967915; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7916; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47917; CHECK-RV32-NEXT: addi a0, a0, 17918; CHECK-RV32-NEXT: andi a3, a2, 5127919; CHECK-RV32-NEXT: bnez a3, .LBB61_8227920; CHECK-RV32-NEXT: j .LBB61_3177921; CHECK-RV32-NEXT: .LBB61_822: # %cond.load11857922; CHECK-RV32-NEXT: lbu a3, 0(a0)7923; CHECK-RV32-NEXT: li a4, 5127924; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7925; CHECK-RV32-NEXT: vmv.s.x v16, a37926; CHECK-RV32-NEXT: li a3, 2987927; CHECK-RV32-NEXT: li a4, 2977928; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7929; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47930; CHECK-RV32-NEXT: addi a0, a0, 17931; CHECK-RV32-NEXT: andi a3, a2, 10247932; CHECK-RV32-NEXT: bnez a3, .LBB61_8237933; CHECK-RV32-NEXT: j .LBB61_3187934; CHECK-RV32-NEXT: .LBB61_823: # %cond.load11897935; CHECK-RV32-NEXT: lbu a3, 0(a0)7936; CHECK-RV32-NEXT: li a4, 5127937; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7938; CHECK-RV32-NEXT: vmv.s.x v16, a37939; CHECK-RV32-NEXT: li a3, 2997940; CHECK-RV32-NEXT: li a4, 2987941; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7942; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47943; CHECK-RV32-NEXT: addi a0, a0, 17944; CHECK-RV32-NEXT: slli a3, a2, 207945; CHECK-RV32-NEXT: bltz a3, .LBB61_8247946; CHECK-RV32-NEXT: j .LBB61_3197947; CHECK-RV32-NEXT: .LBB61_824: # %cond.load11937948; CHECK-RV32-NEXT: lbu a3, 0(a0)7949; CHECK-RV32-NEXT: li a4, 5127950; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7951; CHECK-RV32-NEXT: vmv.s.x v16, a37952; CHECK-RV32-NEXT: li a3, 3007953; CHECK-RV32-NEXT: li a4, 2997954; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7955; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47956; CHECK-RV32-NEXT: addi a0, a0, 17957; CHECK-RV32-NEXT: slli a3, a2, 197958; CHECK-RV32-NEXT: bltz a3, .LBB61_8257959; CHECK-RV32-NEXT: j .LBB61_3207960; CHECK-RV32-NEXT: .LBB61_825: # %cond.load11977961; CHECK-RV32-NEXT: lbu a3, 0(a0)7962; CHECK-RV32-NEXT: li a4, 5127963; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7964; CHECK-RV32-NEXT: vmv.s.x v16, a37965; CHECK-RV32-NEXT: li a3, 3017966; CHECK-RV32-NEXT: li a4, 3007967; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7968; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47969; CHECK-RV32-NEXT: addi a0, a0, 17970; CHECK-RV32-NEXT: slli a3, a2, 187971; CHECK-RV32-NEXT: bltz a3, .LBB61_8267972; CHECK-RV32-NEXT: j .LBB61_3217973; CHECK-RV32-NEXT: .LBB61_826: # %cond.load12017974; CHECK-RV32-NEXT: lbu a3, 0(a0)7975; CHECK-RV32-NEXT: li a4, 5127976; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7977; CHECK-RV32-NEXT: vmv.s.x v16, a37978; CHECK-RV32-NEXT: li a3, 3027979; CHECK-RV32-NEXT: li a4, 3017980; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7981; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47982; CHECK-RV32-NEXT: addi a0, a0, 17983; CHECK-RV32-NEXT: slli a3, a2, 177984; CHECK-RV32-NEXT: bltz a3, .LBB61_8277985; CHECK-RV32-NEXT: j .LBB61_3227986; CHECK-RV32-NEXT: .LBB61_827: # %cond.load12057987; CHECK-RV32-NEXT: lbu a3, 0(a0)7988; CHECK-RV32-NEXT: li a4, 5127989; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma7990; CHECK-RV32-NEXT: vmv.s.x v16, a37991; CHECK-RV32-NEXT: li a3, 3037992; CHECK-RV32-NEXT: li a4, 3027993; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma7994; CHECK-RV32-NEXT: vslideup.vx v8, v16, a47995; CHECK-RV32-NEXT: addi a0, a0, 17996; CHECK-RV32-NEXT: slli a3, a2, 167997; CHECK-RV32-NEXT: bltz a3, .LBB61_8287998; CHECK-RV32-NEXT: j .LBB61_3237999; CHECK-RV32-NEXT: .LBB61_828: # %cond.load12098000; CHECK-RV32-NEXT: lbu a3, 0(a0)8001; CHECK-RV32-NEXT: li a4, 5128002; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8003; CHECK-RV32-NEXT: vmv.s.x v16, a38004; CHECK-RV32-NEXT: li a3, 3048005; CHECK-RV32-NEXT: li a4, 3038006; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8007; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48008; CHECK-RV32-NEXT: addi a0, a0, 18009; CHECK-RV32-NEXT: slli a3, a2, 158010; CHECK-RV32-NEXT: bltz a3, .LBB61_8298011; CHECK-RV32-NEXT: j .LBB61_3248012; CHECK-RV32-NEXT: .LBB61_829: # %cond.load12138013; CHECK-RV32-NEXT: lbu a3, 0(a0)8014; CHECK-RV32-NEXT: li a4, 5128015; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8016; CHECK-RV32-NEXT: vmv.s.x v16, a38017; CHECK-RV32-NEXT: li a3, 3058018; CHECK-RV32-NEXT: li a4, 3048019; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8020; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48021; CHECK-RV32-NEXT: addi a0, a0, 18022; CHECK-RV32-NEXT: slli a3, a2, 148023; CHECK-RV32-NEXT: bltz a3, .LBB61_8308024; CHECK-RV32-NEXT: j .LBB61_3258025; CHECK-RV32-NEXT: .LBB61_830: # %cond.load12178026; CHECK-RV32-NEXT: lbu a3, 0(a0)8027; CHECK-RV32-NEXT: li a4, 5128028; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8029; CHECK-RV32-NEXT: vmv.s.x v16, a38030; CHECK-RV32-NEXT: li a3, 3068031; CHECK-RV32-NEXT: li a4, 3058032; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8033; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48034; CHECK-RV32-NEXT: addi a0, a0, 18035; CHECK-RV32-NEXT: slli a3, a2, 138036; CHECK-RV32-NEXT: bltz a3, .LBB61_8318037; CHECK-RV32-NEXT: j .LBB61_3268038; CHECK-RV32-NEXT: .LBB61_831: # %cond.load12218039; CHECK-RV32-NEXT: lbu a3, 0(a0)8040; CHECK-RV32-NEXT: li a4, 5128041; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8042; CHECK-RV32-NEXT: vmv.s.x v16, a38043; CHECK-RV32-NEXT: li a3, 3078044; CHECK-RV32-NEXT: li a4, 3068045; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8046; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48047; CHECK-RV32-NEXT: addi a0, a0, 18048; CHECK-RV32-NEXT: slli a3, a2, 128049; CHECK-RV32-NEXT: bltz a3, .LBB61_8328050; CHECK-RV32-NEXT: j .LBB61_3278051; CHECK-RV32-NEXT: .LBB61_832: # %cond.load12258052; CHECK-RV32-NEXT: lbu a3, 0(a0)8053; CHECK-RV32-NEXT: li a4, 5128054; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8055; CHECK-RV32-NEXT: vmv.s.x v16, a38056; CHECK-RV32-NEXT: li a3, 3088057; CHECK-RV32-NEXT: li a4, 3078058; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8059; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48060; CHECK-RV32-NEXT: addi a0, a0, 18061; CHECK-RV32-NEXT: slli a3, a2, 118062; CHECK-RV32-NEXT: bltz a3, .LBB61_8338063; CHECK-RV32-NEXT: j .LBB61_3288064; CHECK-RV32-NEXT: .LBB61_833: # %cond.load12298065; CHECK-RV32-NEXT: lbu a3, 0(a0)8066; CHECK-RV32-NEXT: li a4, 5128067; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8068; CHECK-RV32-NEXT: vmv.s.x v16, a38069; CHECK-RV32-NEXT: li a3, 3098070; CHECK-RV32-NEXT: li a4, 3088071; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8072; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48073; CHECK-RV32-NEXT: addi a0, a0, 18074; CHECK-RV32-NEXT: slli a3, a2, 108075; CHECK-RV32-NEXT: bltz a3, .LBB61_8348076; CHECK-RV32-NEXT: j .LBB61_3298077; CHECK-RV32-NEXT: .LBB61_834: # %cond.load12338078; CHECK-RV32-NEXT: lbu a3, 0(a0)8079; CHECK-RV32-NEXT: li a4, 5128080; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8081; CHECK-RV32-NEXT: vmv.s.x v16, a38082; CHECK-RV32-NEXT: li a3, 3108083; CHECK-RV32-NEXT: li a4, 3098084; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8085; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48086; CHECK-RV32-NEXT: addi a0, a0, 18087; CHECK-RV32-NEXT: slli a3, a2, 98088; CHECK-RV32-NEXT: bltz a3, .LBB61_8358089; CHECK-RV32-NEXT: j .LBB61_3308090; CHECK-RV32-NEXT: .LBB61_835: # %cond.load12378091; CHECK-RV32-NEXT: lbu a3, 0(a0)8092; CHECK-RV32-NEXT: li a4, 5128093; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8094; CHECK-RV32-NEXT: vmv.s.x v16, a38095; CHECK-RV32-NEXT: li a3, 3118096; CHECK-RV32-NEXT: li a4, 3108097; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8098; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48099; CHECK-RV32-NEXT: addi a0, a0, 18100; CHECK-RV32-NEXT: slli a3, a2, 88101; CHECK-RV32-NEXT: bltz a3, .LBB61_8368102; CHECK-RV32-NEXT: j .LBB61_3318103; CHECK-RV32-NEXT: .LBB61_836: # %cond.load12418104; CHECK-RV32-NEXT: lbu a3, 0(a0)8105; CHECK-RV32-NEXT: li a4, 5128106; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8107; CHECK-RV32-NEXT: vmv.s.x v16, a38108; CHECK-RV32-NEXT: li a3, 3128109; CHECK-RV32-NEXT: li a4, 3118110; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8111; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48112; CHECK-RV32-NEXT: addi a0, a0, 18113; CHECK-RV32-NEXT: slli a3, a2, 78114; CHECK-RV32-NEXT: bltz a3, .LBB61_8378115; CHECK-RV32-NEXT: j .LBB61_3328116; CHECK-RV32-NEXT: .LBB61_837: # %cond.load12458117; CHECK-RV32-NEXT: lbu a3, 0(a0)8118; CHECK-RV32-NEXT: li a4, 5128119; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8120; CHECK-RV32-NEXT: vmv.s.x v16, a38121; CHECK-RV32-NEXT: li a3, 3138122; CHECK-RV32-NEXT: li a4, 3128123; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8124; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48125; CHECK-RV32-NEXT: addi a0, a0, 18126; CHECK-RV32-NEXT: slli a3, a2, 68127; CHECK-RV32-NEXT: bltz a3, .LBB61_8388128; CHECK-RV32-NEXT: j .LBB61_3338129; CHECK-RV32-NEXT: .LBB61_838: # %cond.load12498130; CHECK-RV32-NEXT: lbu a3, 0(a0)8131; CHECK-RV32-NEXT: li a4, 5128132; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8133; CHECK-RV32-NEXT: vmv.s.x v16, a38134; CHECK-RV32-NEXT: li a3, 3148135; CHECK-RV32-NEXT: li a4, 3138136; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8137; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48138; CHECK-RV32-NEXT: addi a0, a0, 18139; CHECK-RV32-NEXT: slli a3, a2, 58140; CHECK-RV32-NEXT: bltz a3, .LBB61_8398141; CHECK-RV32-NEXT: j .LBB61_3348142; CHECK-RV32-NEXT: .LBB61_839: # %cond.load12538143; CHECK-RV32-NEXT: lbu a3, 0(a0)8144; CHECK-RV32-NEXT: li a4, 5128145; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8146; CHECK-RV32-NEXT: vmv.s.x v16, a38147; CHECK-RV32-NEXT: li a3, 3158148; CHECK-RV32-NEXT: li a4, 3148149; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8150; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48151; CHECK-RV32-NEXT: addi a0, a0, 18152; CHECK-RV32-NEXT: slli a3, a2, 48153; CHECK-RV32-NEXT: bltz a3, .LBB61_8408154; CHECK-RV32-NEXT: j .LBB61_3358155; CHECK-RV32-NEXT: .LBB61_840: # %cond.load12578156; CHECK-RV32-NEXT: lbu a3, 0(a0)8157; CHECK-RV32-NEXT: li a4, 5128158; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8159; CHECK-RV32-NEXT: vmv.s.x v16, a38160; CHECK-RV32-NEXT: li a3, 3168161; CHECK-RV32-NEXT: li a4, 3158162; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8163; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48164; CHECK-RV32-NEXT: addi a0, a0, 18165; CHECK-RV32-NEXT: slli a3, a2, 38166; CHECK-RV32-NEXT: bltz a3, .LBB61_8418167; CHECK-RV32-NEXT: j .LBB61_3368168; CHECK-RV32-NEXT: .LBB61_841: # %cond.load12618169; CHECK-RV32-NEXT: lbu a3, 0(a0)8170; CHECK-RV32-NEXT: li a4, 5128171; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8172; CHECK-RV32-NEXT: vmv.s.x v16, a38173; CHECK-RV32-NEXT: li a3, 3178174; CHECK-RV32-NEXT: li a4, 3168175; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8176; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48177; CHECK-RV32-NEXT: addi a0, a0, 18178; CHECK-RV32-NEXT: slli a3, a2, 28179; CHECK-RV32-NEXT: bgez a3, .LBB61_10348180; CHECK-RV32-NEXT: j .LBB61_3378181; CHECK-RV32-NEXT: .LBB61_1034: # %cond.load12618182; CHECK-RV32-NEXT: j .LBB61_3388183; CHECK-RV32-NEXT: .LBB61_842: # %cond.load12738184; CHECK-RV32-NEXT: lbu a2, 0(a0)8185; CHECK-RV32-NEXT: vmv.s.x v16, a28186; CHECK-RV32-NEXT: li a2, 3208187; CHECK-RV32-NEXT: li a4, 3198188; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8189; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48190; CHECK-RV32-NEXT: addi a0, a0, 18191; CHECK-RV32-NEXT: andi a2, a3, 18192; CHECK-RV32-NEXT: bnez a2, .LBB61_8438193; CHECK-RV32-NEXT: j .LBB61_3428194; CHECK-RV32-NEXT: .LBB61_843: # %cond.load12778195; CHECK-RV32-NEXT: lbu a2, 0(a0)8196; CHECK-RV32-NEXT: li a4, 5128197; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8198; CHECK-RV32-NEXT: vmv.s.x v16, a28199; CHECK-RV32-NEXT: li a2, 3218200; CHECK-RV32-NEXT: li a4, 3208201; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8202; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48203; CHECK-RV32-NEXT: addi a0, a0, 18204; CHECK-RV32-NEXT: andi a2, a3, 28205; CHECK-RV32-NEXT: bnez a2, .LBB61_8448206; CHECK-RV32-NEXT: j .LBB61_3438207; CHECK-RV32-NEXT: .LBB61_844: # %cond.load12818208; CHECK-RV32-NEXT: lbu a2, 0(a0)8209; CHECK-RV32-NEXT: li a4, 5128210; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8211; CHECK-RV32-NEXT: vmv.s.x v16, a28212; CHECK-RV32-NEXT: li a2, 3228213; CHECK-RV32-NEXT: li a4, 3218214; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8215; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48216; CHECK-RV32-NEXT: addi a0, a0, 18217; CHECK-RV32-NEXT: andi a2, a3, 48218; CHECK-RV32-NEXT: bnez a2, .LBB61_8458219; CHECK-RV32-NEXT: j .LBB61_3448220; CHECK-RV32-NEXT: .LBB61_845: # %cond.load12858221; CHECK-RV32-NEXT: lbu a2, 0(a0)8222; CHECK-RV32-NEXT: li a4, 5128223; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8224; CHECK-RV32-NEXT: vmv.s.x v16, a28225; CHECK-RV32-NEXT: li a2, 3238226; CHECK-RV32-NEXT: li a4, 3228227; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8228; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48229; CHECK-RV32-NEXT: addi a0, a0, 18230; CHECK-RV32-NEXT: andi a2, a3, 88231; CHECK-RV32-NEXT: bnez a2, .LBB61_8468232; CHECK-RV32-NEXT: j .LBB61_3458233; CHECK-RV32-NEXT: .LBB61_846: # %cond.load12898234; CHECK-RV32-NEXT: lbu a2, 0(a0)8235; CHECK-RV32-NEXT: li a4, 5128236; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8237; CHECK-RV32-NEXT: vmv.s.x v16, a28238; CHECK-RV32-NEXT: li a2, 3248239; CHECK-RV32-NEXT: li a4, 3238240; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8241; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48242; CHECK-RV32-NEXT: addi a0, a0, 18243; CHECK-RV32-NEXT: andi a2, a3, 168244; CHECK-RV32-NEXT: bnez a2, .LBB61_8478245; CHECK-RV32-NEXT: j .LBB61_3468246; CHECK-RV32-NEXT: .LBB61_847: # %cond.load12938247; CHECK-RV32-NEXT: lbu a2, 0(a0)8248; CHECK-RV32-NEXT: li a4, 5128249; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8250; CHECK-RV32-NEXT: vmv.s.x v16, a28251; CHECK-RV32-NEXT: li a2, 3258252; CHECK-RV32-NEXT: li a4, 3248253; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8254; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48255; CHECK-RV32-NEXT: addi a0, a0, 18256; CHECK-RV32-NEXT: andi a2, a3, 328257; CHECK-RV32-NEXT: bnez a2, .LBB61_8488258; CHECK-RV32-NEXT: j .LBB61_3478259; CHECK-RV32-NEXT: .LBB61_848: # %cond.load12978260; CHECK-RV32-NEXT: lbu a2, 0(a0)8261; CHECK-RV32-NEXT: li a4, 5128262; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8263; CHECK-RV32-NEXT: vmv.s.x v16, a28264; CHECK-RV32-NEXT: li a2, 3268265; CHECK-RV32-NEXT: li a4, 3258266; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8267; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48268; CHECK-RV32-NEXT: addi a0, a0, 18269; CHECK-RV32-NEXT: andi a2, a3, 648270; CHECK-RV32-NEXT: bnez a2, .LBB61_8498271; CHECK-RV32-NEXT: j .LBB61_3488272; CHECK-RV32-NEXT: .LBB61_849: # %cond.load13018273; CHECK-RV32-NEXT: lbu a2, 0(a0)8274; CHECK-RV32-NEXT: li a4, 5128275; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8276; CHECK-RV32-NEXT: vmv.s.x v16, a28277; CHECK-RV32-NEXT: li a2, 3278278; CHECK-RV32-NEXT: li a4, 3268279; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8280; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48281; CHECK-RV32-NEXT: addi a0, a0, 18282; CHECK-RV32-NEXT: andi a2, a3, 1288283; CHECK-RV32-NEXT: bnez a2, .LBB61_8508284; CHECK-RV32-NEXT: j .LBB61_3498285; CHECK-RV32-NEXT: .LBB61_850: # %cond.load13058286; CHECK-RV32-NEXT: lbu a2, 0(a0)8287; CHECK-RV32-NEXT: li a4, 5128288; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8289; CHECK-RV32-NEXT: vmv.s.x v16, a28290; CHECK-RV32-NEXT: li a2, 3288291; CHECK-RV32-NEXT: li a4, 3278292; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8293; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48294; CHECK-RV32-NEXT: addi a0, a0, 18295; CHECK-RV32-NEXT: andi a2, a3, 2568296; CHECK-RV32-NEXT: bnez a2, .LBB61_8518297; CHECK-RV32-NEXT: j .LBB61_3508298; CHECK-RV32-NEXT: .LBB61_851: # %cond.load13098299; CHECK-RV32-NEXT: lbu a2, 0(a0)8300; CHECK-RV32-NEXT: li a4, 5128301; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8302; CHECK-RV32-NEXT: vmv.s.x v16, a28303; CHECK-RV32-NEXT: li a2, 3298304; CHECK-RV32-NEXT: li a4, 3288305; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8306; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48307; CHECK-RV32-NEXT: addi a0, a0, 18308; CHECK-RV32-NEXT: andi a2, a3, 5128309; CHECK-RV32-NEXT: bnez a2, .LBB61_8528310; CHECK-RV32-NEXT: j .LBB61_3518311; CHECK-RV32-NEXT: .LBB61_852: # %cond.load13138312; CHECK-RV32-NEXT: lbu a2, 0(a0)8313; CHECK-RV32-NEXT: li a4, 5128314; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8315; CHECK-RV32-NEXT: vmv.s.x v16, a28316; CHECK-RV32-NEXT: li a2, 3308317; CHECK-RV32-NEXT: li a4, 3298318; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8319; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48320; CHECK-RV32-NEXT: addi a0, a0, 18321; CHECK-RV32-NEXT: andi a2, a3, 10248322; CHECK-RV32-NEXT: bnez a2, .LBB61_8538323; CHECK-RV32-NEXT: j .LBB61_3528324; CHECK-RV32-NEXT: .LBB61_853: # %cond.load13178325; CHECK-RV32-NEXT: lbu a2, 0(a0)8326; CHECK-RV32-NEXT: li a4, 5128327; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8328; CHECK-RV32-NEXT: vmv.s.x v16, a28329; CHECK-RV32-NEXT: li a2, 3318330; CHECK-RV32-NEXT: li a4, 3308331; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8332; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48333; CHECK-RV32-NEXT: addi a0, a0, 18334; CHECK-RV32-NEXT: slli a2, a3, 208335; CHECK-RV32-NEXT: bltz a2, .LBB61_8548336; CHECK-RV32-NEXT: j .LBB61_3538337; CHECK-RV32-NEXT: .LBB61_854: # %cond.load13218338; CHECK-RV32-NEXT: lbu a2, 0(a0)8339; CHECK-RV32-NEXT: li a4, 5128340; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8341; CHECK-RV32-NEXT: vmv.s.x v16, a28342; CHECK-RV32-NEXT: li a2, 3328343; CHECK-RV32-NEXT: li a4, 3318344; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8345; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48346; CHECK-RV32-NEXT: addi a0, a0, 18347; CHECK-RV32-NEXT: slli a2, a3, 198348; CHECK-RV32-NEXT: bltz a2, .LBB61_8558349; CHECK-RV32-NEXT: j .LBB61_3548350; CHECK-RV32-NEXT: .LBB61_855: # %cond.load13258351; CHECK-RV32-NEXT: lbu a2, 0(a0)8352; CHECK-RV32-NEXT: li a4, 5128353; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8354; CHECK-RV32-NEXT: vmv.s.x v16, a28355; CHECK-RV32-NEXT: li a2, 3338356; CHECK-RV32-NEXT: li a4, 3328357; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8358; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48359; CHECK-RV32-NEXT: addi a0, a0, 18360; CHECK-RV32-NEXT: slli a2, a3, 188361; CHECK-RV32-NEXT: bltz a2, .LBB61_8568362; CHECK-RV32-NEXT: j .LBB61_3558363; CHECK-RV32-NEXT: .LBB61_856: # %cond.load13298364; CHECK-RV32-NEXT: lbu a2, 0(a0)8365; CHECK-RV32-NEXT: li a4, 5128366; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8367; CHECK-RV32-NEXT: vmv.s.x v16, a28368; CHECK-RV32-NEXT: li a2, 3348369; CHECK-RV32-NEXT: li a4, 3338370; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8371; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48372; CHECK-RV32-NEXT: addi a0, a0, 18373; CHECK-RV32-NEXT: slli a2, a3, 178374; CHECK-RV32-NEXT: bltz a2, .LBB61_8578375; CHECK-RV32-NEXT: j .LBB61_3568376; CHECK-RV32-NEXT: .LBB61_857: # %cond.load13338377; CHECK-RV32-NEXT: lbu a2, 0(a0)8378; CHECK-RV32-NEXT: li a4, 5128379; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8380; CHECK-RV32-NEXT: vmv.s.x v16, a28381; CHECK-RV32-NEXT: li a2, 3358382; CHECK-RV32-NEXT: li a4, 3348383; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8384; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48385; CHECK-RV32-NEXT: addi a0, a0, 18386; CHECK-RV32-NEXT: slli a2, a3, 168387; CHECK-RV32-NEXT: bltz a2, .LBB61_8588388; CHECK-RV32-NEXT: j .LBB61_3578389; CHECK-RV32-NEXT: .LBB61_858: # %cond.load13378390; CHECK-RV32-NEXT: lbu a2, 0(a0)8391; CHECK-RV32-NEXT: li a4, 5128392; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8393; CHECK-RV32-NEXT: vmv.s.x v16, a28394; CHECK-RV32-NEXT: li a2, 3368395; CHECK-RV32-NEXT: li a4, 3358396; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8397; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48398; CHECK-RV32-NEXT: addi a0, a0, 18399; CHECK-RV32-NEXT: slli a2, a3, 158400; CHECK-RV32-NEXT: bltz a2, .LBB61_8598401; CHECK-RV32-NEXT: j .LBB61_3588402; CHECK-RV32-NEXT: .LBB61_859: # %cond.load13418403; CHECK-RV32-NEXT: lbu a2, 0(a0)8404; CHECK-RV32-NEXT: li a4, 5128405; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8406; CHECK-RV32-NEXT: vmv.s.x v16, a28407; CHECK-RV32-NEXT: li a2, 3378408; CHECK-RV32-NEXT: li a4, 3368409; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8410; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48411; CHECK-RV32-NEXT: addi a0, a0, 18412; CHECK-RV32-NEXT: slli a2, a3, 148413; CHECK-RV32-NEXT: bltz a2, .LBB61_8608414; CHECK-RV32-NEXT: j .LBB61_3598415; CHECK-RV32-NEXT: .LBB61_860: # %cond.load13458416; CHECK-RV32-NEXT: lbu a2, 0(a0)8417; CHECK-RV32-NEXT: li a4, 5128418; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8419; CHECK-RV32-NEXT: vmv.s.x v16, a28420; CHECK-RV32-NEXT: li a2, 3388421; CHECK-RV32-NEXT: li a4, 3378422; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8423; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48424; CHECK-RV32-NEXT: addi a0, a0, 18425; CHECK-RV32-NEXT: slli a2, a3, 138426; CHECK-RV32-NEXT: bltz a2, .LBB61_8618427; CHECK-RV32-NEXT: j .LBB61_3608428; CHECK-RV32-NEXT: .LBB61_861: # %cond.load13498429; CHECK-RV32-NEXT: lbu a2, 0(a0)8430; CHECK-RV32-NEXT: li a4, 5128431; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8432; CHECK-RV32-NEXT: vmv.s.x v16, a28433; CHECK-RV32-NEXT: li a2, 3398434; CHECK-RV32-NEXT: li a4, 3388435; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8436; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48437; CHECK-RV32-NEXT: addi a0, a0, 18438; CHECK-RV32-NEXT: slli a2, a3, 128439; CHECK-RV32-NEXT: bltz a2, .LBB61_8628440; CHECK-RV32-NEXT: j .LBB61_3618441; CHECK-RV32-NEXT: .LBB61_862: # %cond.load13538442; CHECK-RV32-NEXT: lbu a2, 0(a0)8443; CHECK-RV32-NEXT: li a4, 5128444; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8445; CHECK-RV32-NEXT: vmv.s.x v16, a28446; CHECK-RV32-NEXT: li a2, 3408447; CHECK-RV32-NEXT: li a4, 3398448; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8449; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48450; CHECK-RV32-NEXT: addi a0, a0, 18451; CHECK-RV32-NEXT: slli a2, a3, 118452; CHECK-RV32-NEXT: bltz a2, .LBB61_8638453; CHECK-RV32-NEXT: j .LBB61_3628454; CHECK-RV32-NEXT: .LBB61_863: # %cond.load13578455; CHECK-RV32-NEXT: lbu a2, 0(a0)8456; CHECK-RV32-NEXT: li a4, 5128457; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8458; CHECK-RV32-NEXT: vmv.s.x v16, a28459; CHECK-RV32-NEXT: li a2, 3418460; CHECK-RV32-NEXT: li a4, 3408461; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8462; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48463; CHECK-RV32-NEXT: addi a0, a0, 18464; CHECK-RV32-NEXT: slli a2, a3, 108465; CHECK-RV32-NEXT: bltz a2, .LBB61_8648466; CHECK-RV32-NEXT: j .LBB61_3638467; CHECK-RV32-NEXT: .LBB61_864: # %cond.load13618468; CHECK-RV32-NEXT: lbu a2, 0(a0)8469; CHECK-RV32-NEXT: li a4, 5128470; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8471; CHECK-RV32-NEXT: vmv.s.x v16, a28472; CHECK-RV32-NEXT: li a2, 3428473; CHECK-RV32-NEXT: li a4, 3418474; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8475; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48476; CHECK-RV32-NEXT: addi a0, a0, 18477; CHECK-RV32-NEXT: slli a2, a3, 98478; CHECK-RV32-NEXT: bltz a2, .LBB61_8658479; CHECK-RV32-NEXT: j .LBB61_3648480; CHECK-RV32-NEXT: .LBB61_865: # %cond.load13658481; CHECK-RV32-NEXT: lbu a2, 0(a0)8482; CHECK-RV32-NEXT: li a4, 5128483; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8484; CHECK-RV32-NEXT: vmv.s.x v16, a28485; CHECK-RV32-NEXT: li a2, 3438486; CHECK-RV32-NEXT: li a4, 3428487; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8488; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48489; CHECK-RV32-NEXT: addi a0, a0, 18490; CHECK-RV32-NEXT: slli a2, a3, 88491; CHECK-RV32-NEXT: bltz a2, .LBB61_8668492; CHECK-RV32-NEXT: j .LBB61_3658493; CHECK-RV32-NEXT: .LBB61_866: # %cond.load13698494; CHECK-RV32-NEXT: lbu a2, 0(a0)8495; CHECK-RV32-NEXT: li a4, 5128496; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8497; CHECK-RV32-NEXT: vmv.s.x v16, a28498; CHECK-RV32-NEXT: li a2, 3448499; CHECK-RV32-NEXT: li a4, 3438500; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8501; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48502; CHECK-RV32-NEXT: addi a0, a0, 18503; CHECK-RV32-NEXT: slli a2, a3, 78504; CHECK-RV32-NEXT: bltz a2, .LBB61_8678505; CHECK-RV32-NEXT: j .LBB61_3668506; CHECK-RV32-NEXT: .LBB61_867: # %cond.load13738507; CHECK-RV32-NEXT: lbu a2, 0(a0)8508; CHECK-RV32-NEXT: li a4, 5128509; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8510; CHECK-RV32-NEXT: vmv.s.x v16, a28511; CHECK-RV32-NEXT: li a2, 3458512; CHECK-RV32-NEXT: li a4, 3448513; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8514; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48515; CHECK-RV32-NEXT: addi a0, a0, 18516; CHECK-RV32-NEXT: slli a2, a3, 68517; CHECK-RV32-NEXT: bltz a2, .LBB61_8688518; CHECK-RV32-NEXT: j .LBB61_3678519; CHECK-RV32-NEXT: .LBB61_868: # %cond.load13778520; CHECK-RV32-NEXT: lbu a2, 0(a0)8521; CHECK-RV32-NEXT: li a4, 5128522; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8523; CHECK-RV32-NEXT: vmv.s.x v16, a28524; CHECK-RV32-NEXT: li a2, 3468525; CHECK-RV32-NEXT: li a4, 3458526; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8527; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48528; CHECK-RV32-NEXT: addi a0, a0, 18529; CHECK-RV32-NEXT: slli a2, a3, 58530; CHECK-RV32-NEXT: bltz a2, .LBB61_8698531; CHECK-RV32-NEXT: j .LBB61_3688532; CHECK-RV32-NEXT: .LBB61_869: # %cond.load13818533; CHECK-RV32-NEXT: lbu a2, 0(a0)8534; CHECK-RV32-NEXT: li a4, 5128535; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8536; CHECK-RV32-NEXT: vmv.s.x v16, a28537; CHECK-RV32-NEXT: li a2, 3478538; CHECK-RV32-NEXT: li a4, 3468539; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8540; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48541; CHECK-RV32-NEXT: addi a0, a0, 18542; CHECK-RV32-NEXT: slli a2, a3, 48543; CHECK-RV32-NEXT: bltz a2, .LBB61_8708544; CHECK-RV32-NEXT: j .LBB61_3698545; CHECK-RV32-NEXT: .LBB61_870: # %cond.load13858546; CHECK-RV32-NEXT: lbu a2, 0(a0)8547; CHECK-RV32-NEXT: li a4, 5128548; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8549; CHECK-RV32-NEXT: vmv.s.x v16, a28550; CHECK-RV32-NEXT: li a2, 3488551; CHECK-RV32-NEXT: li a4, 3478552; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8553; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48554; CHECK-RV32-NEXT: addi a0, a0, 18555; CHECK-RV32-NEXT: slli a2, a3, 38556; CHECK-RV32-NEXT: bltz a2, .LBB61_8718557; CHECK-RV32-NEXT: j .LBB61_3708558; CHECK-RV32-NEXT: .LBB61_871: # %cond.load13898559; CHECK-RV32-NEXT: lbu a2, 0(a0)8560; CHECK-RV32-NEXT: li a4, 5128561; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8562; CHECK-RV32-NEXT: vmv.s.x v16, a28563; CHECK-RV32-NEXT: li a2, 3498564; CHECK-RV32-NEXT: li a4, 3488565; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8566; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48567; CHECK-RV32-NEXT: addi a0, a0, 18568; CHECK-RV32-NEXT: slli a2, a3, 28569; CHECK-RV32-NEXT: bgez a2, .LBB61_10358570; CHECK-RV32-NEXT: j .LBB61_3718571; CHECK-RV32-NEXT: .LBB61_1035: # %cond.load13898572; CHECK-RV32-NEXT: j .LBB61_3728573; CHECK-RV32-NEXT: .LBB61_872: # %cond.load14018574; CHECK-RV32-NEXT: lbu a3, 0(a0)8575; CHECK-RV32-NEXT: vmv.s.x v16, a38576; CHECK-RV32-NEXT: li a3, 3528577; CHECK-RV32-NEXT: li a4, 3518578; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8579; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48580; CHECK-RV32-NEXT: addi a0, a0, 18581; CHECK-RV32-NEXT: andi a3, a2, 18582; CHECK-RV32-NEXT: bnez a3, .LBB61_8738583; CHECK-RV32-NEXT: j .LBB61_3768584; CHECK-RV32-NEXT: .LBB61_873: # %cond.load14058585; CHECK-RV32-NEXT: lbu a3, 0(a0)8586; CHECK-RV32-NEXT: li a4, 5128587; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8588; CHECK-RV32-NEXT: vmv.s.x v16, a38589; CHECK-RV32-NEXT: li a3, 3538590; CHECK-RV32-NEXT: li a4, 3528591; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8592; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48593; CHECK-RV32-NEXT: addi a0, a0, 18594; CHECK-RV32-NEXT: andi a3, a2, 28595; CHECK-RV32-NEXT: bnez a3, .LBB61_8748596; CHECK-RV32-NEXT: j .LBB61_3778597; CHECK-RV32-NEXT: .LBB61_874: # %cond.load14098598; CHECK-RV32-NEXT: lbu a3, 0(a0)8599; CHECK-RV32-NEXT: li a4, 5128600; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8601; CHECK-RV32-NEXT: vmv.s.x v16, a38602; CHECK-RV32-NEXT: li a3, 3548603; CHECK-RV32-NEXT: li a4, 3538604; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8605; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48606; CHECK-RV32-NEXT: addi a0, a0, 18607; CHECK-RV32-NEXT: andi a3, a2, 48608; CHECK-RV32-NEXT: bnez a3, .LBB61_8758609; CHECK-RV32-NEXT: j .LBB61_3788610; CHECK-RV32-NEXT: .LBB61_875: # %cond.load14138611; CHECK-RV32-NEXT: lbu a3, 0(a0)8612; CHECK-RV32-NEXT: li a4, 5128613; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8614; CHECK-RV32-NEXT: vmv.s.x v16, a38615; CHECK-RV32-NEXT: li a3, 3558616; CHECK-RV32-NEXT: li a4, 3548617; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8618; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48619; CHECK-RV32-NEXT: addi a0, a0, 18620; CHECK-RV32-NEXT: andi a3, a2, 88621; CHECK-RV32-NEXT: bnez a3, .LBB61_8768622; CHECK-RV32-NEXT: j .LBB61_3798623; CHECK-RV32-NEXT: .LBB61_876: # %cond.load14178624; CHECK-RV32-NEXT: lbu a3, 0(a0)8625; CHECK-RV32-NEXT: li a4, 5128626; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8627; CHECK-RV32-NEXT: vmv.s.x v16, a38628; CHECK-RV32-NEXT: li a3, 3568629; CHECK-RV32-NEXT: li a4, 3558630; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8631; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48632; CHECK-RV32-NEXT: addi a0, a0, 18633; CHECK-RV32-NEXT: andi a3, a2, 168634; CHECK-RV32-NEXT: bnez a3, .LBB61_8778635; CHECK-RV32-NEXT: j .LBB61_3808636; CHECK-RV32-NEXT: .LBB61_877: # %cond.load14218637; CHECK-RV32-NEXT: lbu a3, 0(a0)8638; CHECK-RV32-NEXT: li a4, 5128639; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8640; CHECK-RV32-NEXT: vmv.s.x v16, a38641; CHECK-RV32-NEXT: li a3, 3578642; CHECK-RV32-NEXT: li a4, 3568643; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8644; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48645; CHECK-RV32-NEXT: addi a0, a0, 18646; CHECK-RV32-NEXT: andi a3, a2, 328647; CHECK-RV32-NEXT: bnez a3, .LBB61_8788648; CHECK-RV32-NEXT: j .LBB61_3818649; CHECK-RV32-NEXT: .LBB61_878: # %cond.load14258650; CHECK-RV32-NEXT: lbu a3, 0(a0)8651; CHECK-RV32-NEXT: li a4, 5128652; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8653; CHECK-RV32-NEXT: vmv.s.x v16, a38654; CHECK-RV32-NEXT: li a3, 3588655; CHECK-RV32-NEXT: li a4, 3578656; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8657; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48658; CHECK-RV32-NEXT: addi a0, a0, 18659; CHECK-RV32-NEXT: andi a3, a2, 648660; CHECK-RV32-NEXT: bnez a3, .LBB61_8798661; CHECK-RV32-NEXT: j .LBB61_3828662; CHECK-RV32-NEXT: .LBB61_879: # %cond.load14298663; CHECK-RV32-NEXT: lbu a3, 0(a0)8664; CHECK-RV32-NEXT: li a4, 5128665; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8666; CHECK-RV32-NEXT: vmv.s.x v16, a38667; CHECK-RV32-NEXT: li a3, 3598668; CHECK-RV32-NEXT: li a4, 3588669; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8670; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48671; CHECK-RV32-NEXT: addi a0, a0, 18672; CHECK-RV32-NEXT: andi a3, a2, 1288673; CHECK-RV32-NEXT: bnez a3, .LBB61_8808674; CHECK-RV32-NEXT: j .LBB61_3838675; CHECK-RV32-NEXT: .LBB61_880: # %cond.load14338676; CHECK-RV32-NEXT: lbu a3, 0(a0)8677; CHECK-RV32-NEXT: li a4, 5128678; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8679; CHECK-RV32-NEXT: vmv.s.x v16, a38680; CHECK-RV32-NEXT: li a3, 3608681; CHECK-RV32-NEXT: li a4, 3598682; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8683; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48684; CHECK-RV32-NEXT: addi a0, a0, 18685; CHECK-RV32-NEXT: andi a3, a2, 2568686; CHECK-RV32-NEXT: bnez a3, .LBB61_8818687; CHECK-RV32-NEXT: j .LBB61_3848688; CHECK-RV32-NEXT: .LBB61_881: # %cond.load14378689; CHECK-RV32-NEXT: lbu a3, 0(a0)8690; CHECK-RV32-NEXT: li a4, 5128691; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8692; CHECK-RV32-NEXT: vmv.s.x v16, a38693; CHECK-RV32-NEXT: li a3, 3618694; CHECK-RV32-NEXT: li a4, 3608695; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8696; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48697; CHECK-RV32-NEXT: addi a0, a0, 18698; CHECK-RV32-NEXT: andi a3, a2, 5128699; CHECK-RV32-NEXT: bnez a3, .LBB61_8828700; CHECK-RV32-NEXT: j .LBB61_3858701; CHECK-RV32-NEXT: .LBB61_882: # %cond.load14418702; CHECK-RV32-NEXT: lbu a3, 0(a0)8703; CHECK-RV32-NEXT: li a4, 5128704; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8705; CHECK-RV32-NEXT: vmv.s.x v16, a38706; CHECK-RV32-NEXT: li a3, 3628707; CHECK-RV32-NEXT: li a4, 3618708; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8709; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48710; CHECK-RV32-NEXT: addi a0, a0, 18711; CHECK-RV32-NEXT: andi a3, a2, 10248712; CHECK-RV32-NEXT: bnez a3, .LBB61_8838713; CHECK-RV32-NEXT: j .LBB61_3868714; CHECK-RV32-NEXT: .LBB61_883: # %cond.load14458715; CHECK-RV32-NEXT: lbu a3, 0(a0)8716; CHECK-RV32-NEXT: li a4, 5128717; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8718; CHECK-RV32-NEXT: vmv.s.x v16, a38719; CHECK-RV32-NEXT: li a3, 3638720; CHECK-RV32-NEXT: li a4, 3628721; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8722; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48723; CHECK-RV32-NEXT: addi a0, a0, 18724; CHECK-RV32-NEXT: slli a3, a2, 208725; CHECK-RV32-NEXT: bltz a3, .LBB61_8848726; CHECK-RV32-NEXT: j .LBB61_3878727; CHECK-RV32-NEXT: .LBB61_884: # %cond.load14498728; CHECK-RV32-NEXT: lbu a3, 0(a0)8729; CHECK-RV32-NEXT: li a4, 5128730; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8731; CHECK-RV32-NEXT: vmv.s.x v16, a38732; CHECK-RV32-NEXT: li a3, 3648733; CHECK-RV32-NEXT: li a4, 3638734; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8735; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48736; CHECK-RV32-NEXT: addi a0, a0, 18737; CHECK-RV32-NEXT: slli a3, a2, 198738; CHECK-RV32-NEXT: bltz a3, .LBB61_8858739; CHECK-RV32-NEXT: j .LBB61_3888740; CHECK-RV32-NEXT: .LBB61_885: # %cond.load14538741; CHECK-RV32-NEXT: lbu a3, 0(a0)8742; CHECK-RV32-NEXT: li a4, 5128743; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8744; CHECK-RV32-NEXT: vmv.s.x v16, a38745; CHECK-RV32-NEXT: li a3, 3658746; CHECK-RV32-NEXT: li a4, 3648747; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8748; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48749; CHECK-RV32-NEXT: addi a0, a0, 18750; CHECK-RV32-NEXT: slli a3, a2, 188751; CHECK-RV32-NEXT: bltz a3, .LBB61_8868752; CHECK-RV32-NEXT: j .LBB61_3898753; CHECK-RV32-NEXT: .LBB61_886: # %cond.load14578754; CHECK-RV32-NEXT: lbu a3, 0(a0)8755; CHECK-RV32-NEXT: li a4, 5128756; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8757; CHECK-RV32-NEXT: vmv.s.x v16, a38758; CHECK-RV32-NEXT: li a3, 3668759; CHECK-RV32-NEXT: li a4, 3658760; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8761; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48762; CHECK-RV32-NEXT: addi a0, a0, 18763; CHECK-RV32-NEXT: slli a3, a2, 178764; CHECK-RV32-NEXT: bltz a3, .LBB61_8878765; CHECK-RV32-NEXT: j .LBB61_3908766; CHECK-RV32-NEXT: .LBB61_887: # %cond.load14618767; CHECK-RV32-NEXT: lbu a3, 0(a0)8768; CHECK-RV32-NEXT: li a4, 5128769; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8770; CHECK-RV32-NEXT: vmv.s.x v16, a38771; CHECK-RV32-NEXT: li a3, 3678772; CHECK-RV32-NEXT: li a4, 3668773; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8774; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48775; CHECK-RV32-NEXT: addi a0, a0, 18776; CHECK-RV32-NEXT: slli a3, a2, 168777; CHECK-RV32-NEXT: bltz a3, .LBB61_8888778; CHECK-RV32-NEXT: j .LBB61_3918779; CHECK-RV32-NEXT: .LBB61_888: # %cond.load14658780; CHECK-RV32-NEXT: lbu a3, 0(a0)8781; CHECK-RV32-NEXT: li a4, 5128782; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8783; CHECK-RV32-NEXT: vmv.s.x v16, a38784; CHECK-RV32-NEXT: li a3, 3688785; CHECK-RV32-NEXT: li a4, 3678786; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8787; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48788; CHECK-RV32-NEXT: addi a0, a0, 18789; CHECK-RV32-NEXT: slli a3, a2, 158790; CHECK-RV32-NEXT: bltz a3, .LBB61_8898791; CHECK-RV32-NEXT: j .LBB61_3928792; CHECK-RV32-NEXT: .LBB61_889: # %cond.load14698793; CHECK-RV32-NEXT: lbu a3, 0(a0)8794; CHECK-RV32-NEXT: li a4, 5128795; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8796; CHECK-RV32-NEXT: vmv.s.x v16, a38797; CHECK-RV32-NEXT: li a3, 3698798; CHECK-RV32-NEXT: li a4, 3688799; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8800; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48801; CHECK-RV32-NEXT: addi a0, a0, 18802; CHECK-RV32-NEXT: slli a3, a2, 148803; CHECK-RV32-NEXT: bltz a3, .LBB61_8908804; CHECK-RV32-NEXT: j .LBB61_3938805; CHECK-RV32-NEXT: .LBB61_890: # %cond.load14738806; CHECK-RV32-NEXT: lbu a3, 0(a0)8807; CHECK-RV32-NEXT: li a4, 5128808; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8809; CHECK-RV32-NEXT: vmv.s.x v16, a38810; CHECK-RV32-NEXT: li a3, 3708811; CHECK-RV32-NEXT: li a4, 3698812; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8813; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48814; CHECK-RV32-NEXT: addi a0, a0, 18815; CHECK-RV32-NEXT: slli a3, a2, 138816; CHECK-RV32-NEXT: bltz a3, .LBB61_8918817; CHECK-RV32-NEXT: j .LBB61_3948818; CHECK-RV32-NEXT: .LBB61_891: # %cond.load14778819; CHECK-RV32-NEXT: lbu a3, 0(a0)8820; CHECK-RV32-NEXT: li a4, 5128821; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8822; CHECK-RV32-NEXT: vmv.s.x v16, a38823; CHECK-RV32-NEXT: li a3, 3718824; CHECK-RV32-NEXT: li a4, 3708825; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8826; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48827; CHECK-RV32-NEXT: addi a0, a0, 18828; CHECK-RV32-NEXT: slli a3, a2, 128829; CHECK-RV32-NEXT: bltz a3, .LBB61_8928830; CHECK-RV32-NEXT: j .LBB61_3958831; CHECK-RV32-NEXT: .LBB61_892: # %cond.load14818832; CHECK-RV32-NEXT: lbu a3, 0(a0)8833; CHECK-RV32-NEXT: li a4, 5128834; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8835; CHECK-RV32-NEXT: vmv.s.x v16, a38836; CHECK-RV32-NEXT: li a3, 3728837; CHECK-RV32-NEXT: li a4, 3718838; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8839; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48840; CHECK-RV32-NEXT: addi a0, a0, 18841; CHECK-RV32-NEXT: slli a3, a2, 118842; CHECK-RV32-NEXT: bltz a3, .LBB61_8938843; CHECK-RV32-NEXT: j .LBB61_3968844; CHECK-RV32-NEXT: .LBB61_893: # %cond.load14858845; CHECK-RV32-NEXT: lbu a3, 0(a0)8846; CHECK-RV32-NEXT: li a4, 5128847; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8848; CHECK-RV32-NEXT: vmv.s.x v16, a38849; CHECK-RV32-NEXT: li a3, 3738850; CHECK-RV32-NEXT: li a4, 3728851; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8852; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48853; CHECK-RV32-NEXT: addi a0, a0, 18854; CHECK-RV32-NEXT: slli a3, a2, 108855; CHECK-RV32-NEXT: bltz a3, .LBB61_8948856; CHECK-RV32-NEXT: j .LBB61_3978857; CHECK-RV32-NEXT: .LBB61_894: # %cond.load14898858; CHECK-RV32-NEXT: lbu a3, 0(a0)8859; CHECK-RV32-NEXT: li a4, 5128860; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8861; CHECK-RV32-NEXT: vmv.s.x v16, a38862; CHECK-RV32-NEXT: li a3, 3748863; CHECK-RV32-NEXT: li a4, 3738864; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8865; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48866; CHECK-RV32-NEXT: addi a0, a0, 18867; CHECK-RV32-NEXT: slli a3, a2, 98868; CHECK-RV32-NEXT: bltz a3, .LBB61_8958869; CHECK-RV32-NEXT: j .LBB61_3988870; CHECK-RV32-NEXT: .LBB61_895: # %cond.load14938871; CHECK-RV32-NEXT: lbu a3, 0(a0)8872; CHECK-RV32-NEXT: li a4, 5128873; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8874; CHECK-RV32-NEXT: vmv.s.x v16, a38875; CHECK-RV32-NEXT: li a3, 3758876; CHECK-RV32-NEXT: li a4, 3748877; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8878; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48879; CHECK-RV32-NEXT: addi a0, a0, 18880; CHECK-RV32-NEXT: slli a3, a2, 88881; CHECK-RV32-NEXT: bltz a3, .LBB61_8968882; CHECK-RV32-NEXT: j .LBB61_3998883; CHECK-RV32-NEXT: .LBB61_896: # %cond.load14978884; CHECK-RV32-NEXT: lbu a3, 0(a0)8885; CHECK-RV32-NEXT: li a4, 5128886; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8887; CHECK-RV32-NEXT: vmv.s.x v16, a38888; CHECK-RV32-NEXT: li a3, 3768889; CHECK-RV32-NEXT: li a4, 3758890; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8891; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48892; CHECK-RV32-NEXT: addi a0, a0, 18893; CHECK-RV32-NEXT: slli a3, a2, 78894; CHECK-RV32-NEXT: bltz a3, .LBB61_8978895; CHECK-RV32-NEXT: j .LBB61_4008896; CHECK-RV32-NEXT: .LBB61_897: # %cond.load15018897; CHECK-RV32-NEXT: lbu a3, 0(a0)8898; CHECK-RV32-NEXT: li a4, 5128899; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8900; CHECK-RV32-NEXT: vmv.s.x v16, a38901; CHECK-RV32-NEXT: li a3, 3778902; CHECK-RV32-NEXT: li a4, 3768903; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8904; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48905; CHECK-RV32-NEXT: addi a0, a0, 18906; CHECK-RV32-NEXT: slli a3, a2, 68907; CHECK-RV32-NEXT: bltz a3, .LBB61_8988908; CHECK-RV32-NEXT: j .LBB61_4018909; CHECK-RV32-NEXT: .LBB61_898: # %cond.load15058910; CHECK-RV32-NEXT: lbu a3, 0(a0)8911; CHECK-RV32-NEXT: li a4, 5128912; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8913; CHECK-RV32-NEXT: vmv.s.x v16, a38914; CHECK-RV32-NEXT: li a3, 3788915; CHECK-RV32-NEXT: li a4, 3778916; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8917; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48918; CHECK-RV32-NEXT: addi a0, a0, 18919; CHECK-RV32-NEXT: slli a3, a2, 58920; CHECK-RV32-NEXT: bltz a3, .LBB61_8998921; CHECK-RV32-NEXT: j .LBB61_4028922; CHECK-RV32-NEXT: .LBB61_899: # %cond.load15098923; CHECK-RV32-NEXT: lbu a3, 0(a0)8924; CHECK-RV32-NEXT: li a4, 5128925; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8926; CHECK-RV32-NEXT: vmv.s.x v16, a38927; CHECK-RV32-NEXT: li a3, 3798928; CHECK-RV32-NEXT: li a4, 3788929; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8930; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48931; CHECK-RV32-NEXT: addi a0, a0, 18932; CHECK-RV32-NEXT: slli a3, a2, 48933; CHECK-RV32-NEXT: bltz a3, .LBB61_9008934; CHECK-RV32-NEXT: j .LBB61_4038935; CHECK-RV32-NEXT: .LBB61_900: # %cond.load15138936; CHECK-RV32-NEXT: lbu a3, 0(a0)8937; CHECK-RV32-NEXT: li a4, 5128938; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8939; CHECK-RV32-NEXT: vmv.s.x v16, a38940; CHECK-RV32-NEXT: li a3, 3808941; CHECK-RV32-NEXT: li a4, 3798942; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8943; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48944; CHECK-RV32-NEXT: addi a0, a0, 18945; CHECK-RV32-NEXT: slli a3, a2, 38946; CHECK-RV32-NEXT: bltz a3, .LBB61_9018947; CHECK-RV32-NEXT: j .LBB61_4048948; CHECK-RV32-NEXT: .LBB61_901: # %cond.load15178949; CHECK-RV32-NEXT: lbu a3, 0(a0)8950; CHECK-RV32-NEXT: li a4, 5128951; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8952; CHECK-RV32-NEXT: vmv.s.x v16, a38953; CHECK-RV32-NEXT: li a3, 3818954; CHECK-RV32-NEXT: li a4, 3808955; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma8956; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48957; CHECK-RV32-NEXT: addi a0, a0, 18958; CHECK-RV32-NEXT: slli a3, a2, 28959; CHECK-RV32-NEXT: bgez a3, .LBB61_10368960; CHECK-RV32-NEXT: j .LBB61_4058961; CHECK-RV32-NEXT: .LBB61_1036: # %cond.load15178962; CHECK-RV32-NEXT: j .LBB61_4068963; CHECK-RV32-NEXT: .LBB61_902: # %cond.load15298964; CHECK-RV32-NEXT: lbu a2, 0(a0)8965; CHECK-RV32-NEXT: vmv.s.x v16, a28966; CHECK-RV32-NEXT: li a2, 3848967; CHECK-RV32-NEXT: li a4, 3838968; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8969; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48970; CHECK-RV32-NEXT: addi a0, a0, 18971; CHECK-RV32-NEXT: andi a2, a3, 18972; CHECK-RV32-NEXT: bnez a2, .LBB61_9038973; CHECK-RV32-NEXT: j .LBB61_4108974; CHECK-RV32-NEXT: .LBB61_903: # %cond.load15338975; CHECK-RV32-NEXT: lbu a2, 0(a0)8976; CHECK-RV32-NEXT: li a4, 5128977; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8978; CHECK-RV32-NEXT: vmv.s.x v16, a28979; CHECK-RV32-NEXT: li a2, 3858980; CHECK-RV32-NEXT: li a4, 3848981; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8982; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48983; CHECK-RV32-NEXT: addi a0, a0, 18984; CHECK-RV32-NEXT: andi a2, a3, 28985; CHECK-RV32-NEXT: bnez a2, .LBB61_9048986; CHECK-RV32-NEXT: j .LBB61_4118987; CHECK-RV32-NEXT: .LBB61_904: # %cond.load15378988; CHECK-RV32-NEXT: lbu a2, 0(a0)8989; CHECK-RV32-NEXT: li a4, 5128990; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma8991; CHECK-RV32-NEXT: vmv.s.x v16, a28992; CHECK-RV32-NEXT: li a2, 3868993; CHECK-RV32-NEXT: li a4, 3858994; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma8995; CHECK-RV32-NEXT: vslideup.vx v8, v16, a48996; CHECK-RV32-NEXT: addi a0, a0, 18997; CHECK-RV32-NEXT: andi a2, a3, 48998; CHECK-RV32-NEXT: bnez a2, .LBB61_9058999; CHECK-RV32-NEXT: j .LBB61_4129000; CHECK-RV32-NEXT: .LBB61_905: # %cond.load15419001; CHECK-RV32-NEXT: lbu a2, 0(a0)9002; CHECK-RV32-NEXT: li a4, 5129003; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9004; CHECK-RV32-NEXT: vmv.s.x v16, a29005; CHECK-RV32-NEXT: li a2, 3879006; CHECK-RV32-NEXT: li a4, 3869007; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9008; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49009; CHECK-RV32-NEXT: addi a0, a0, 19010; CHECK-RV32-NEXT: andi a2, a3, 89011; CHECK-RV32-NEXT: bnez a2, .LBB61_9069012; CHECK-RV32-NEXT: j .LBB61_4139013; CHECK-RV32-NEXT: .LBB61_906: # %cond.load15459014; CHECK-RV32-NEXT: lbu a2, 0(a0)9015; CHECK-RV32-NEXT: li a4, 5129016; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9017; CHECK-RV32-NEXT: vmv.s.x v16, a29018; CHECK-RV32-NEXT: li a2, 3889019; CHECK-RV32-NEXT: li a4, 3879020; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9021; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49022; CHECK-RV32-NEXT: addi a0, a0, 19023; CHECK-RV32-NEXT: andi a2, a3, 169024; CHECK-RV32-NEXT: bnez a2, .LBB61_9079025; CHECK-RV32-NEXT: j .LBB61_4149026; CHECK-RV32-NEXT: .LBB61_907: # %cond.load15499027; CHECK-RV32-NEXT: lbu a2, 0(a0)9028; CHECK-RV32-NEXT: li a4, 5129029; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9030; CHECK-RV32-NEXT: vmv.s.x v16, a29031; CHECK-RV32-NEXT: li a2, 3899032; CHECK-RV32-NEXT: li a4, 3889033; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9034; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49035; CHECK-RV32-NEXT: addi a0, a0, 19036; CHECK-RV32-NEXT: andi a2, a3, 329037; CHECK-RV32-NEXT: bnez a2, .LBB61_9089038; CHECK-RV32-NEXT: j .LBB61_4159039; CHECK-RV32-NEXT: .LBB61_908: # %cond.load15539040; CHECK-RV32-NEXT: lbu a2, 0(a0)9041; CHECK-RV32-NEXT: li a4, 5129042; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9043; CHECK-RV32-NEXT: vmv.s.x v16, a29044; CHECK-RV32-NEXT: li a2, 3909045; CHECK-RV32-NEXT: li a4, 3899046; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9047; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49048; CHECK-RV32-NEXT: addi a0, a0, 19049; CHECK-RV32-NEXT: andi a2, a3, 649050; CHECK-RV32-NEXT: bnez a2, .LBB61_9099051; CHECK-RV32-NEXT: j .LBB61_4169052; CHECK-RV32-NEXT: .LBB61_909: # %cond.load15579053; CHECK-RV32-NEXT: lbu a2, 0(a0)9054; CHECK-RV32-NEXT: li a4, 5129055; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9056; CHECK-RV32-NEXT: vmv.s.x v16, a29057; CHECK-RV32-NEXT: li a2, 3919058; CHECK-RV32-NEXT: li a4, 3909059; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9060; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49061; CHECK-RV32-NEXT: addi a0, a0, 19062; CHECK-RV32-NEXT: andi a2, a3, 1289063; CHECK-RV32-NEXT: bnez a2, .LBB61_9109064; CHECK-RV32-NEXT: j .LBB61_4179065; CHECK-RV32-NEXT: .LBB61_910: # %cond.load15619066; CHECK-RV32-NEXT: lbu a2, 0(a0)9067; CHECK-RV32-NEXT: li a4, 5129068; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9069; CHECK-RV32-NEXT: vmv.s.x v16, a29070; CHECK-RV32-NEXT: li a2, 3929071; CHECK-RV32-NEXT: li a4, 3919072; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9073; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49074; CHECK-RV32-NEXT: addi a0, a0, 19075; CHECK-RV32-NEXT: andi a2, a3, 2569076; CHECK-RV32-NEXT: bnez a2, .LBB61_9119077; CHECK-RV32-NEXT: j .LBB61_4189078; CHECK-RV32-NEXT: .LBB61_911: # %cond.load15659079; CHECK-RV32-NEXT: lbu a2, 0(a0)9080; CHECK-RV32-NEXT: li a4, 5129081; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9082; CHECK-RV32-NEXT: vmv.s.x v16, a29083; CHECK-RV32-NEXT: li a2, 3939084; CHECK-RV32-NEXT: li a4, 3929085; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9086; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49087; CHECK-RV32-NEXT: addi a0, a0, 19088; CHECK-RV32-NEXT: andi a2, a3, 5129089; CHECK-RV32-NEXT: bnez a2, .LBB61_9129090; CHECK-RV32-NEXT: j .LBB61_4199091; CHECK-RV32-NEXT: .LBB61_912: # %cond.load15699092; CHECK-RV32-NEXT: lbu a2, 0(a0)9093; CHECK-RV32-NEXT: li a4, 5129094; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9095; CHECK-RV32-NEXT: vmv.s.x v16, a29096; CHECK-RV32-NEXT: li a2, 3949097; CHECK-RV32-NEXT: li a4, 3939098; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9099; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49100; CHECK-RV32-NEXT: addi a0, a0, 19101; CHECK-RV32-NEXT: andi a2, a3, 10249102; CHECK-RV32-NEXT: bnez a2, .LBB61_9139103; CHECK-RV32-NEXT: j .LBB61_4209104; CHECK-RV32-NEXT: .LBB61_913: # %cond.load15739105; CHECK-RV32-NEXT: lbu a2, 0(a0)9106; CHECK-RV32-NEXT: li a4, 5129107; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9108; CHECK-RV32-NEXT: vmv.s.x v16, a29109; CHECK-RV32-NEXT: li a2, 3959110; CHECK-RV32-NEXT: li a4, 3949111; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9112; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49113; CHECK-RV32-NEXT: addi a0, a0, 19114; CHECK-RV32-NEXT: slli a2, a3, 209115; CHECK-RV32-NEXT: bltz a2, .LBB61_9149116; CHECK-RV32-NEXT: j .LBB61_4219117; CHECK-RV32-NEXT: .LBB61_914: # %cond.load15779118; CHECK-RV32-NEXT: lbu a2, 0(a0)9119; CHECK-RV32-NEXT: li a4, 5129120; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9121; CHECK-RV32-NEXT: vmv.s.x v16, a29122; CHECK-RV32-NEXT: li a2, 3969123; CHECK-RV32-NEXT: li a4, 3959124; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9125; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49126; CHECK-RV32-NEXT: addi a0, a0, 19127; CHECK-RV32-NEXT: slli a2, a3, 199128; CHECK-RV32-NEXT: bltz a2, .LBB61_9159129; CHECK-RV32-NEXT: j .LBB61_4229130; CHECK-RV32-NEXT: .LBB61_915: # %cond.load15819131; CHECK-RV32-NEXT: lbu a2, 0(a0)9132; CHECK-RV32-NEXT: li a4, 5129133; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9134; CHECK-RV32-NEXT: vmv.s.x v16, a29135; CHECK-RV32-NEXT: li a2, 3979136; CHECK-RV32-NEXT: li a4, 3969137; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9138; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49139; CHECK-RV32-NEXT: addi a0, a0, 19140; CHECK-RV32-NEXT: slli a2, a3, 189141; CHECK-RV32-NEXT: bltz a2, .LBB61_9169142; CHECK-RV32-NEXT: j .LBB61_4239143; CHECK-RV32-NEXT: .LBB61_916: # %cond.load15859144; CHECK-RV32-NEXT: lbu a2, 0(a0)9145; CHECK-RV32-NEXT: li a4, 5129146; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9147; CHECK-RV32-NEXT: vmv.s.x v16, a29148; CHECK-RV32-NEXT: li a2, 3989149; CHECK-RV32-NEXT: li a4, 3979150; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9151; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49152; CHECK-RV32-NEXT: addi a0, a0, 19153; CHECK-RV32-NEXT: slli a2, a3, 179154; CHECK-RV32-NEXT: bltz a2, .LBB61_9179155; CHECK-RV32-NEXT: j .LBB61_4249156; CHECK-RV32-NEXT: .LBB61_917: # %cond.load15899157; CHECK-RV32-NEXT: lbu a2, 0(a0)9158; CHECK-RV32-NEXT: li a4, 5129159; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9160; CHECK-RV32-NEXT: vmv.s.x v16, a29161; CHECK-RV32-NEXT: li a2, 3999162; CHECK-RV32-NEXT: li a4, 3989163; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9164; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49165; CHECK-RV32-NEXT: addi a0, a0, 19166; CHECK-RV32-NEXT: slli a2, a3, 169167; CHECK-RV32-NEXT: bltz a2, .LBB61_9189168; CHECK-RV32-NEXT: j .LBB61_4259169; CHECK-RV32-NEXT: .LBB61_918: # %cond.load15939170; CHECK-RV32-NEXT: lbu a2, 0(a0)9171; CHECK-RV32-NEXT: li a4, 5129172; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9173; CHECK-RV32-NEXT: vmv.s.x v16, a29174; CHECK-RV32-NEXT: li a2, 4009175; CHECK-RV32-NEXT: li a4, 3999176; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9177; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49178; CHECK-RV32-NEXT: addi a0, a0, 19179; CHECK-RV32-NEXT: slli a2, a3, 159180; CHECK-RV32-NEXT: bltz a2, .LBB61_9199181; CHECK-RV32-NEXT: j .LBB61_4269182; CHECK-RV32-NEXT: .LBB61_919: # %cond.load15979183; CHECK-RV32-NEXT: lbu a2, 0(a0)9184; CHECK-RV32-NEXT: li a4, 5129185; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9186; CHECK-RV32-NEXT: vmv.s.x v16, a29187; CHECK-RV32-NEXT: li a2, 4019188; CHECK-RV32-NEXT: li a4, 4009189; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9190; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49191; CHECK-RV32-NEXT: addi a0, a0, 19192; CHECK-RV32-NEXT: slli a2, a3, 149193; CHECK-RV32-NEXT: bltz a2, .LBB61_9209194; CHECK-RV32-NEXT: j .LBB61_4279195; CHECK-RV32-NEXT: .LBB61_920: # %cond.load16019196; CHECK-RV32-NEXT: lbu a2, 0(a0)9197; CHECK-RV32-NEXT: li a4, 5129198; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9199; CHECK-RV32-NEXT: vmv.s.x v16, a29200; CHECK-RV32-NEXT: li a2, 4029201; CHECK-RV32-NEXT: li a4, 4019202; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9203; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49204; CHECK-RV32-NEXT: addi a0, a0, 19205; CHECK-RV32-NEXT: slli a2, a3, 139206; CHECK-RV32-NEXT: bltz a2, .LBB61_9219207; CHECK-RV32-NEXT: j .LBB61_4289208; CHECK-RV32-NEXT: .LBB61_921: # %cond.load16059209; CHECK-RV32-NEXT: lbu a2, 0(a0)9210; CHECK-RV32-NEXT: li a4, 5129211; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9212; CHECK-RV32-NEXT: vmv.s.x v16, a29213; CHECK-RV32-NEXT: li a2, 4039214; CHECK-RV32-NEXT: li a4, 4029215; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9216; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49217; CHECK-RV32-NEXT: addi a0, a0, 19218; CHECK-RV32-NEXT: slli a2, a3, 129219; CHECK-RV32-NEXT: bltz a2, .LBB61_9229220; CHECK-RV32-NEXT: j .LBB61_4299221; CHECK-RV32-NEXT: .LBB61_922: # %cond.load16099222; CHECK-RV32-NEXT: lbu a2, 0(a0)9223; CHECK-RV32-NEXT: li a4, 5129224; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9225; CHECK-RV32-NEXT: vmv.s.x v16, a29226; CHECK-RV32-NEXT: li a2, 4049227; CHECK-RV32-NEXT: li a4, 4039228; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9229; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49230; CHECK-RV32-NEXT: addi a0, a0, 19231; CHECK-RV32-NEXT: slli a2, a3, 119232; CHECK-RV32-NEXT: bltz a2, .LBB61_9239233; CHECK-RV32-NEXT: j .LBB61_4309234; CHECK-RV32-NEXT: .LBB61_923: # %cond.load16139235; CHECK-RV32-NEXT: lbu a2, 0(a0)9236; CHECK-RV32-NEXT: li a4, 5129237; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9238; CHECK-RV32-NEXT: vmv.s.x v16, a29239; CHECK-RV32-NEXT: li a2, 4059240; CHECK-RV32-NEXT: li a4, 4049241; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9242; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49243; CHECK-RV32-NEXT: addi a0, a0, 19244; CHECK-RV32-NEXT: slli a2, a3, 109245; CHECK-RV32-NEXT: bltz a2, .LBB61_9249246; CHECK-RV32-NEXT: j .LBB61_4319247; CHECK-RV32-NEXT: .LBB61_924: # %cond.load16179248; CHECK-RV32-NEXT: lbu a2, 0(a0)9249; CHECK-RV32-NEXT: li a4, 5129250; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9251; CHECK-RV32-NEXT: vmv.s.x v16, a29252; CHECK-RV32-NEXT: li a2, 4069253; CHECK-RV32-NEXT: li a4, 4059254; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9255; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49256; CHECK-RV32-NEXT: addi a0, a0, 19257; CHECK-RV32-NEXT: slli a2, a3, 99258; CHECK-RV32-NEXT: bltz a2, .LBB61_9259259; CHECK-RV32-NEXT: j .LBB61_4329260; CHECK-RV32-NEXT: .LBB61_925: # %cond.load16219261; CHECK-RV32-NEXT: lbu a2, 0(a0)9262; CHECK-RV32-NEXT: li a4, 5129263; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9264; CHECK-RV32-NEXT: vmv.s.x v16, a29265; CHECK-RV32-NEXT: li a2, 4079266; CHECK-RV32-NEXT: li a4, 4069267; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9268; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49269; CHECK-RV32-NEXT: addi a0, a0, 19270; CHECK-RV32-NEXT: slli a2, a3, 89271; CHECK-RV32-NEXT: bltz a2, .LBB61_9269272; CHECK-RV32-NEXT: j .LBB61_4339273; CHECK-RV32-NEXT: .LBB61_926: # %cond.load16259274; CHECK-RV32-NEXT: lbu a2, 0(a0)9275; CHECK-RV32-NEXT: li a4, 5129276; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9277; CHECK-RV32-NEXT: vmv.s.x v16, a29278; CHECK-RV32-NEXT: li a2, 4089279; CHECK-RV32-NEXT: li a4, 4079280; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9281; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49282; CHECK-RV32-NEXT: addi a0, a0, 19283; CHECK-RV32-NEXT: slli a2, a3, 79284; CHECK-RV32-NEXT: bltz a2, .LBB61_9279285; CHECK-RV32-NEXT: j .LBB61_4349286; CHECK-RV32-NEXT: .LBB61_927: # %cond.load16299287; CHECK-RV32-NEXT: lbu a2, 0(a0)9288; CHECK-RV32-NEXT: li a4, 5129289; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9290; CHECK-RV32-NEXT: vmv.s.x v16, a29291; CHECK-RV32-NEXT: li a2, 4099292; CHECK-RV32-NEXT: li a4, 4089293; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9294; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49295; CHECK-RV32-NEXT: addi a0, a0, 19296; CHECK-RV32-NEXT: slli a2, a3, 69297; CHECK-RV32-NEXT: bltz a2, .LBB61_9289298; CHECK-RV32-NEXT: j .LBB61_4359299; CHECK-RV32-NEXT: .LBB61_928: # %cond.load16339300; CHECK-RV32-NEXT: lbu a2, 0(a0)9301; CHECK-RV32-NEXT: li a4, 5129302; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9303; CHECK-RV32-NEXT: vmv.s.x v16, a29304; CHECK-RV32-NEXT: li a2, 4109305; CHECK-RV32-NEXT: li a4, 4099306; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9307; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49308; CHECK-RV32-NEXT: addi a0, a0, 19309; CHECK-RV32-NEXT: slli a2, a3, 59310; CHECK-RV32-NEXT: bltz a2, .LBB61_9299311; CHECK-RV32-NEXT: j .LBB61_4369312; CHECK-RV32-NEXT: .LBB61_929: # %cond.load16379313; CHECK-RV32-NEXT: lbu a2, 0(a0)9314; CHECK-RV32-NEXT: li a4, 5129315; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9316; CHECK-RV32-NEXT: vmv.s.x v16, a29317; CHECK-RV32-NEXT: li a2, 4119318; CHECK-RV32-NEXT: li a4, 4109319; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9320; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49321; CHECK-RV32-NEXT: addi a0, a0, 19322; CHECK-RV32-NEXT: slli a2, a3, 49323; CHECK-RV32-NEXT: bltz a2, .LBB61_9309324; CHECK-RV32-NEXT: j .LBB61_4379325; CHECK-RV32-NEXT: .LBB61_930: # %cond.load16419326; CHECK-RV32-NEXT: lbu a2, 0(a0)9327; CHECK-RV32-NEXT: li a4, 5129328; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9329; CHECK-RV32-NEXT: vmv.s.x v16, a29330; CHECK-RV32-NEXT: li a2, 4129331; CHECK-RV32-NEXT: li a4, 4119332; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9333; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49334; CHECK-RV32-NEXT: addi a0, a0, 19335; CHECK-RV32-NEXT: slli a2, a3, 39336; CHECK-RV32-NEXT: bltz a2, .LBB61_9319337; CHECK-RV32-NEXT: j .LBB61_4389338; CHECK-RV32-NEXT: .LBB61_931: # %cond.load16459339; CHECK-RV32-NEXT: lbu a2, 0(a0)9340; CHECK-RV32-NEXT: li a4, 5129341; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9342; CHECK-RV32-NEXT: vmv.s.x v16, a29343; CHECK-RV32-NEXT: li a2, 4139344; CHECK-RV32-NEXT: li a4, 4129345; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9346; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49347; CHECK-RV32-NEXT: addi a0, a0, 19348; CHECK-RV32-NEXT: slli a2, a3, 29349; CHECK-RV32-NEXT: bgez a2, .LBB61_10379350; CHECK-RV32-NEXT: j .LBB61_4399351; CHECK-RV32-NEXT: .LBB61_1037: # %cond.load16459352; CHECK-RV32-NEXT: j .LBB61_4409353; CHECK-RV32-NEXT: .LBB61_932: # %cond.load16579354; CHECK-RV32-NEXT: lbu a3, 0(a0)9355; CHECK-RV32-NEXT: vmv.s.x v16, a39356; CHECK-RV32-NEXT: li a3, 4169357; CHECK-RV32-NEXT: li a4, 4159358; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9359; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49360; CHECK-RV32-NEXT: addi a0, a0, 19361; CHECK-RV32-NEXT: andi a3, a2, 19362; CHECK-RV32-NEXT: bnez a3, .LBB61_9339363; CHECK-RV32-NEXT: j .LBB61_4449364; CHECK-RV32-NEXT: .LBB61_933: # %cond.load16619365; CHECK-RV32-NEXT: lbu a3, 0(a0)9366; CHECK-RV32-NEXT: li a4, 5129367; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9368; CHECK-RV32-NEXT: vmv.s.x v16, a39369; CHECK-RV32-NEXT: li a3, 4179370; CHECK-RV32-NEXT: li a4, 4169371; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9372; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49373; CHECK-RV32-NEXT: addi a0, a0, 19374; CHECK-RV32-NEXT: andi a3, a2, 29375; CHECK-RV32-NEXT: bnez a3, .LBB61_9349376; CHECK-RV32-NEXT: j .LBB61_4459377; CHECK-RV32-NEXT: .LBB61_934: # %cond.load16659378; CHECK-RV32-NEXT: lbu a3, 0(a0)9379; CHECK-RV32-NEXT: li a4, 5129380; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9381; CHECK-RV32-NEXT: vmv.s.x v16, a39382; CHECK-RV32-NEXT: li a3, 4189383; CHECK-RV32-NEXT: li a4, 4179384; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9385; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49386; CHECK-RV32-NEXT: addi a0, a0, 19387; CHECK-RV32-NEXT: andi a3, a2, 49388; CHECK-RV32-NEXT: bnez a3, .LBB61_9359389; CHECK-RV32-NEXT: j .LBB61_4469390; CHECK-RV32-NEXT: .LBB61_935: # %cond.load16699391; CHECK-RV32-NEXT: lbu a3, 0(a0)9392; CHECK-RV32-NEXT: li a4, 5129393; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9394; CHECK-RV32-NEXT: vmv.s.x v16, a39395; CHECK-RV32-NEXT: li a3, 4199396; CHECK-RV32-NEXT: li a4, 4189397; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9398; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49399; CHECK-RV32-NEXT: addi a0, a0, 19400; CHECK-RV32-NEXT: andi a3, a2, 89401; CHECK-RV32-NEXT: bnez a3, .LBB61_9369402; CHECK-RV32-NEXT: j .LBB61_4479403; CHECK-RV32-NEXT: .LBB61_936: # %cond.load16739404; CHECK-RV32-NEXT: lbu a3, 0(a0)9405; CHECK-RV32-NEXT: li a4, 5129406; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9407; CHECK-RV32-NEXT: vmv.s.x v16, a39408; CHECK-RV32-NEXT: li a3, 4209409; CHECK-RV32-NEXT: li a4, 4199410; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9411; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49412; CHECK-RV32-NEXT: addi a0, a0, 19413; CHECK-RV32-NEXT: andi a3, a2, 169414; CHECK-RV32-NEXT: bnez a3, .LBB61_9379415; CHECK-RV32-NEXT: j .LBB61_4489416; CHECK-RV32-NEXT: .LBB61_937: # %cond.load16779417; CHECK-RV32-NEXT: lbu a3, 0(a0)9418; CHECK-RV32-NEXT: li a4, 5129419; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9420; CHECK-RV32-NEXT: vmv.s.x v16, a39421; CHECK-RV32-NEXT: li a3, 4219422; CHECK-RV32-NEXT: li a4, 4209423; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9424; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49425; CHECK-RV32-NEXT: addi a0, a0, 19426; CHECK-RV32-NEXT: andi a3, a2, 329427; CHECK-RV32-NEXT: bnez a3, .LBB61_9389428; CHECK-RV32-NEXT: j .LBB61_4499429; CHECK-RV32-NEXT: .LBB61_938: # %cond.load16819430; CHECK-RV32-NEXT: lbu a3, 0(a0)9431; CHECK-RV32-NEXT: li a4, 5129432; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9433; CHECK-RV32-NEXT: vmv.s.x v16, a39434; CHECK-RV32-NEXT: li a3, 4229435; CHECK-RV32-NEXT: li a4, 4219436; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9437; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49438; CHECK-RV32-NEXT: addi a0, a0, 19439; CHECK-RV32-NEXT: andi a3, a2, 649440; CHECK-RV32-NEXT: bnez a3, .LBB61_9399441; CHECK-RV32-NEXT: j .LBB61_4509442; CHECK-RV32-NEXT: .LBB61_939: # %cond.load16859443; CHECK-RV32-NEXT: lbu a3, 0(a0)9444; CHECK-RV32-NEXT: li a4, 5129445; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9446; CHECK-RV32-NEXT: vmv.s.x v16, a39447; CHECK-RV32-NEXT: li a3, 4239448; CHECK-RV32-NEXT: li a4, 4229449; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9450; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49451; CHECK-RV32-NEXT: addi a0, a0, 19452; CHECK-RV32-NEXT: andi a3, a2, 1289453; CHECK-RV32-NEXT: bnez a3, .LBB61_9409454; CHECK-RV32-NEXT: j .LBB61_4519455; CHECK-RV32-NEXT: .LBB61_940: # %cond.load16899456; CHECK-RV32-NEXT: lbu a3, 0(a0)9457; CHECK-RV32-NEXT: li a4, 5129458; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9459; CHECK-RV32-NEXT: vmv.s.x v16, a39460; CHECK-RV32-NEXT: li a3, 4249461; CHECK-RV32-NEXT: li a4, 4239462; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9463; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49464; CHECK-RV32-NEXT: addi a0, a0, 19465; CHECK-RV32-NEXT: andi a3, a2, 2569466; CHECK-RV32-NEXT: bnez a3, .LBB61_9419467; CHECK-RV32-NEXT: j .LBB61_4529468; CHECK-RV32-NEXT: .LBB61_941: # %cond.load16939469; CHECK-RV32-NEXT: lbu a3, 0(a0)9470; CHECK-RV32-NEXT: li a4, 5129471; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9472; CHECK-RV32-NEXT: vmv.s.x v16, a39473; CHECK-RV32-NEXT: li a3, 4259474; CHECK-RV32-NEXT: li a4, 4249475; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9476; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49477; CHECK-RV32-NEXT: addi a0, a0, 19478; CHECK-RV32-NEXT: andi a3, a2, 5129479; CHECK-RV32-NEXT: bnez a3, .LBB61_9429480; CHECK-RV32-NEXT: j .LBB61_4539481; CHECK-RV32-NEXT: .LBB61_942: # %cond.load16979482; CHECK-RV32-NEXT: lbu a3, 0(a0)9483; CHECK-RV32-NEXT: li a4, 5129484; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9485; CHECK-RV32-NEXT: vmv.s.x v16, a39486; CHECK-RV32-NEXT: li a3, 4269487; CHECK-RV32-NEXT: li a4, 4259488; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9489; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49490; CHECK-RV32-NEXT: addi a0, a0, 19491; CHECK-RV32-NEXT: andi a3, a2, 10249492; CHECK-RV32-NEXT: bnez a3, .LBB61_9439493; CHECK-RV32-NEXT: j .LBB61_4549494; CHECK-RV32-NEXT: .LBB61_943: # %cond.load17019495; CHECK-RV32-NEXT: lbu a3, 0(a0)9496; CHECK-RV32-NEXT: li a4, 5129497; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9498; CHECK-RV32-NEXT: vmv.s.x v16, a39499; CHECK-RV32-NEXT: li a3, 4279500; CHECK-RV32-NEXT: li a4, 4269501; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9502; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49503; CHECK-RV32-NEXT: addi a0, a0, 19504; CHECK-RV32-NEXT: slli a3, a2, 209505; CHECK-RV32-NEXT: bltz a3, .LBB61_9449506; CHECK-RV32-NEXT: j .LBB61_4559507; CHECK-RV32-NEXT: .LBB61_944: # %cond.load17059508; CHECK-RV32-NEXT: lbu a3, 0(a0)9509; CHECK-RV32-NEXT: li a4, 5129510; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9511; CHECK-RV32-NEXT: vmv.s.x v16, a39512; CHECK-RV32-NEXT: li a3, 4289513; CHECK-RV32-NEXT: li a4, 4279514; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9515; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49516; CHECK-RV32-NEXT: addi a0, a0, 19517; CHECK-RV32-NEXT: slli a3, a2, 199518; CHECK-RV32-NEXT: bltz a3, .LBB61_9459519; CHECK-RV32-NEXT: j .LBB61_4569520; CHECK-RV32-NEXT: .LBB61_945: # %cond.load17099521; CHECK-RV32-NEXT: lbu a3, 0(a0)9522; CHECK-RV32-NEXT: li a4, 5129523; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9524; CHECK-RV32-NEXT: vmv.s.x v16, a39525; CHECK-RV32-NEXT: li a3, 4299526; CHECK-RV32-NEXT: li a4, 4289527; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9528; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49529; CHECK-RV32-NEXT: addi a0, a0, 19530; CHECK-RV32-NEXT: slli a3, a2, 189531; CHECK-RV32-NEXT: bltz a3, .LBB61_9469532; CHECK-RV32-NEXT: j .LBB61_4579533; CHECK-RV32-NEXT: .LBB61_946: # %cond.load17139534; CHECK-RV32-NEXT: lbu a3, 0(a0)9535; CHECK-RV32-NEXT: li a4, 5129536; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9537; CHECK-RV32-NEXT: vmv.s.x v16, a39538; CHECK-RV32-NEXT: li a3, 4309539; CHECK-RV32-NEXT: li a4, 4299540; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9541; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49542; CHECK-RV32-NEXT: addi a0, a0, 19543; CHECK-RV32-NEXT: slli a3, a2, 179544; CHECK-RV32-NEXT: bltz a3, .LBB61_9479545; CHECK-RV32-NEXT: j .LBB61_4589546; CHECK-RV32-NEXT: .LBB61_947: # %cond.load17179547; CHECK-RV32-NEXT: lbu a3, 0(a0)9548; CHECK-RV32-NEXT: li a4, 5129549; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9550; CHECK-RV32-NEXT: vmv.s.x v16, a39551; CHECK-RV32-NEXT: li a3, 4319552; CHECK-RV32-NEXT: li a4, 4309553; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9554; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49555; CHECK-RV32-NEXT: addi a0, a0, 19556; CHECK-RV32-NEXT: slli a3, a2, 169557; CHECK-RV32-NEXT: bltz a3, .LBB61_9489558; CHECK-RV32-NEXT: j .LBB61_4599559; CHECK-RV32-NEXT: .LBB61_948: # %cond.load17219560; CHECK-RV32-NEXT: lbu a3, 0(a0)9561; CHECK-RV32-NEXT: li a4, 5129562; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9563; CHECK-RV32-NEXT: vmv.s.x v16, a39564; CHECK-RV32-NEXT: li a3, 4329565; CHECK-RV32-NEXT: li a4, 4319566; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9567; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49568; CHECK-RV32-NEXT: addi a0, a0, 19569; CHECK-RV32-NEXT: slli a3, a2, 159570; CHECK-RV32-NEXT: bltz a3, .LBB61_9499571; CHECK-RV32-NEXT: j .LBB61_4609572; CHECK-RV32-NEXT: .LBB61_949: # %cond.load17259573; CHECK-RV32-NEXT: lbu a3, 0(a0)9574; CHECK-RV32-NEXT: li a4, 5129575; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9576; CHECK-RV32-NEXT: vmv.s.x v16, a39577; CHECK-RV32-NEXT: li a3, 4339578; CHECK-RV32-NEXT: li a4, 4329579; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9580; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49581; CHECK-RV32-NEXT: addi a0, a0, 19582; CHECK-RV32-NEXT: slli a3, a2, 149583; CHECK-RV32-NEXT: bltz a3, .LBB61_9509584; CHECK-RV32-NEXT: j .LBB61_4619585; CHECK-RV32-NEXT: .LBB61_950: # %cond.load17299586; CHECK-RV32-NEXT: lbu a3, 0(a0)9587; CHECK-RV32-NEXT: li a4, 5129588; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9589; CHECK-RV32-NEXT: vmv.s.x v16, a39590; CHECK-RV32-NEXT: li a3, 4349591; CHECK-RV32-NEXT: li a4, 4339592; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9593; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49594; CHECK-RV32-NEXT: addi a0, a0, 19595; CHECK-RV32-NEXT: slli a3, a2, 139596; CHECK-RV32-NEXT: bltz a3, .LBB61_9519597; CHECK-RV32-NEXT: j .LBB61_4629598; CHECK-RV32-NEXT: .LBB61_951: # %cond.load17339599; CHECK-RV32-NEXT: lbu a3, 0(a0)9600; CHECK-RV32-NEXT: li a4, 5129601; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9602; CHECK-RV32-NEXT: vmv.s.x v16, a39603; CHECK-RV32-NEXT: li a3, 4359604; CHECK-RV32-NEXT: li a4, 4349605; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9606; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49607; CHECK-RV32-NEXT: addi a0, a0, 19608; CHECK-RV32-NEXT: slli a3, a2, 129609; CHECK-RV32-NEXT: bltz a3, .LBB61_9529610; CHECK-RV32-NEXT: j .LBB61_4639611; CHECK-RV32-NEXT: .LBB61_952: # %cond.load17379612; CHECK-RV32-NEXT: lbu a3, 0(a0)9613; CHECK-RV32-NEXT: li a4, 5129614; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9615; CHECK-RV32-NEXT: vmv.s.x v16, a39616; CHECK-RV32-NEXT: li a3, 4369617; CHECK-RV32-NEXT: li a4, 4359618; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9619; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49620; CHECK-RV32-NEXT: addi a0, a0, 19621; CHECK-RV32-NEXT: slli a3, a2, 119622; CHECK-RV32-NEXT: bltz a3, .LBB61_9539623; CHECK-RV32-NEXT: j .LBB61_4649624; CHECK-RV32-NEXT: .LBB61_953: # %cond.load17419625; CHECK-RV32-NEXT: lbu a3, 0(a0)9626; CHECK-RV32-NEXT: li a4, 5129627; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9628; CHECK-RV32-NEXT: vmv.s.x v16, a39629; CHECK-RV32-NEXT: li a3, 4379630; CHECK-RV32-NEXT: li a4, 4369631; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9632; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49633; CHECK-RV32-NEXT: addi a0, a0, 19634; CHECK-RV32-NEXT: slli a3, a2, 109635; CHECK-RV32-NEXT: bltz a3, .LBB61_9549636; CHECK-RV32-NEXT: j .LBB61_4659637; CHECK-RV32-NEXT: .LBB61_954: # %cond.load17459638; CHECK-RV32-NEXT: lbu a3, 0(a0)9639; CHECK-RV32-NEXT: li a4, 5129640; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9641; CHECK-RV32-NEXT: vmv.s.x v16, a39642; CHECK-RV32-NEXT: li a3, 4389643; CHECK-RV32-NEXT: li a4, 4379644; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9645; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49646; CHECK-RV32-NEXT: addi a0, a0, 19647; CHECK-RV32-NEXT: slli a3, a2, 99648; CHECK-RV32-NEXT: bltz a3, .LBB61_9559649; CHECK-RV32-NEXT: j .LBB61_4669650; CHECK-RV32-NEXT: .LBB61_955: # %cond.load17499651; CHECK-RV32-NEXT: lbu a3, 0(a0)9652; CHECK-RV32-NEXT: li a4, 5129653; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9654; CHECK-RV32-NEXT: vmv.s.x v16, a39655; CHECK-RV32-NEXT: li a3, 4399656; CHECK-RV32-NEXT: li a4, 4389657; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9658; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49659; CHECK-RV32-NEXT: addi a0, a0, 19660; CHECK-RV32-NEXT: slli a3, a2, 89661; CHECK-RV32-NEXT: bltz a3, .LBB61_9569662; CHECK-RV32-NEXT: j .LBB61_4679663; CHECK-RV32-NEXT: .LBB61_956: # %cond.load17539664; CHECK-RV32-NEXT: lbu a3, 0(a0)9665; CHECK-RV32-NEXT: li a4, 5129666; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9667; CHECK-RV32-NEXT: vmv.s.x v16, a39668; CHECK-RV32-NEXT: li a3, 4409669; CHECK-RV32-NEXT: li a4, 4399670; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9671; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49672; CHECK-RV32-NEXT: addi a0, a0, 19673; CHECK-RV32-NEXT: slli a3, a2, 79674; CHECK-RV32-NEXT: bltz a3, .LBB61_9579675; CHECK-RV32-NEXT: j .LBB61_4689676; CHECK-RV32-NEXT: .LBB61_957: # %cond.load17579677; CHECK-RV32-NEXT: lbu a3, 0(a0)9678; CHECK-RV32-NEXT: li a4, 5129679; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9680; CHECK-RV32-NEXT: vmv.s.x v16, a39681; CHECK-RV32-NEXT: li a3, 4419682; CHECK-RV32-NEXT: li a4, 4409683; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9684; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49685; CHECK-RV32-NEXT: addi a0, a0, 19686; CHECK-RV32-NEXT: slli a3, a2, 69687; CHECK-RV32-NEXT: bltz a3, .LBB61_9589688; CHECK-RV32-NEXT: j .LBB61_4699689; CHECK-RV32-NEXT: .LBB61_958: # %cond.load17619690; CHECK-RV32-NEXT: lbu a3, 0(a0)9691; CHECK-RV32-NEXT: li a4, 5129692; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9693; CHECK-RV32-NEXT: vmv.s.x v16, a39694; CHECK-RV32-NEXT: li a3, 4429695; CHECK-RV32-NEXT: li a4, 4419696; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9697; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49698; CHECK-RV32-NEXT: addi a0, a0, 19699; CHECK-RV32-NEXT: slli a3, a2, 59700; CHECK-RV32-NEXT: bltz a3, .LBB61_9599701; CHECK-RV32-NEXT: j .LBB61_4709702; CHECK-RV32-NEXT: .LBB61_959: # %cond.load17659703; CHECK-RV32-NEXT: lbu a3, 0(a0)9704; CHECK-RV32-NEXT: li a4, 5129705; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9706; CHECK-RV32-NEXT: vmv.s.x v16, a39707; CHECK-RV32-NEXT: li a3, 4439708; CHECK-RV32-NEXT: li a4, 4429709; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9710; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49711; CHECK-RV32-NEXT: addi a0, a0, 19712; CHECK-RV32-NEXT: slli a3, a2, 49713; CHECK-RV32-NEXT: bltz a3, .LBB61_9609714; CHECK-RV32-NEXT: j .LBB61_4719715; CHECK-RV32-NEXT: .LBB61_960: # %cond.load17699716; CHECK-RV32-NEXT: lbu a3, 0(a0)9717; CHECK-RV32-NEXT: li a4, 5129718; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9719; CHECK-RV32-NEXT: vmv.s.x v16, a39720; CHECK-RV32-NEXT: li a3, 4449721; CHECK-RV32-NEXT: li a4, 4439722; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9723; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49724; CHECK-RV32-NEXT: addi a0, a0, 19725; CHECK-RV32-NEXT: slli a3, a2, 39726; CHECK-RV32-NEXT: bltz a3, .LBB61_9619727; CHECK-RV32-NEXT: j .LBB61_4729728; CHECK-RV32-NEXT: .LBB61_961: # %cond.load17739729; CHECK-RV32-NEXT: lbu a3, 0(a0)9730; CHECK-RV32-NEXT: li a4, 5129731; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9732; CHECK-RV32-NEXT: vmv.s.x v16, a39733; CHECK-RV32-NEXT: li a3, 4459734; CHECK-RV32-NEXT: li a4, 4449735; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m8, tu, ma9736; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49737; CHECK-RV32-NEXT: addi a0, a0, 19738; CHECK-RV32-NEXT: slli a3, a2, 29739; CHECK-RV32-NEXT: bgez a3, .LBB61_10389740; CHECK-RV32-NEXT: j .LBB61_4739741; CHECK-RV32-NEXT: .LBB61_1038: # %cond.load17739742; CHECK-RV32-NEXT: j .LBB61_4749743; CHECK-RV32-NEXT: .LBB61_962: # %cond.load17859744; CHECK-RV32-NEXT: lbu a2, 0(a0)9745; CHECK-RV32-NEXT: vmv.s.x v16, a29746; CHECK-RV32-NEXT: li a2, 4489747; CHECK-RV32-NEXT: li a4, 4479748; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9749; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49750; CHECK-RV32-NEXT: addi a0, a0, 19751; CHECK-RV32-NEXT: andi a2, a3, 19752; CHECK-RV32-NEXT: bnez a2, .LBB61_9639753; CHECK-RV32-NEXT: j .LBB61_4789754; CHECK-RV32-NEXT: .LBB61_963: # %cond.load17899755; CHECK-RV32-NEXT: lbu a2, 0(a0)9756; CHECK-RV32-NEXT: li a4, 5129757; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9758; CHECK-RV32-NEXT: vmv.s.x v16, a29759; CHECK-RV32-NEXT: li a2, 4499760; CHECK-RV32-NEXT: li a4, 4489761; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9762; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49763; CHECK-RV32-NEXT: addi a0, a0, 19764; CHECK-RV32-NEXT: andi a2, a3, 29765; CHECK-RV32-NEXT: bnez a2, .LBB61_9649766; CHECK-RV32-NEXT: j .LBB61_4799767; CHECK-RV32-NEXT: .LBB61_964: # %cond.load17939768; CHECK-RV32-NEXT: lbu a2, 0(a0)9769; CHECK-RV32-NEXT: li a4, 5129770; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9771; CHECK-RV32-NEXT: vmv.s.x v16, a29772; CHECK-RV32-NEXT: li a2, 4509773; CHECK-RV32-NEXT: li a4, 4499774; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9775; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49776; CHECK-RV32-NEXT: addi a0, a0, 19777; CHECK-RV32-NEXT: andi a2, a3, 49778; CHECK-RV32-NEXT: bnez a2, .LBB61_9659779; CHECK-RV32-NEXT: j .LBB61_4809780; CHECK-RV32-NEXT: .LBB61_965: # %cond.load17979781; CHECK-RV32-NEXT: lbu a2, 0(a0)9782; CHECK-RV32-NEXT: li a4, 5129783; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9784; CHECK-RV32-NEXT: vmv.s.x v16, a29785; CHECK-RV32-NEXT: li a2, 4519786; CHECK-RV32-NEXT: li a4, 4509787; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9788; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49789; CHECK-RV32-NEXT: addi a0, a0, 19790; CHECK-RV32-NEXT: andi a2, a3, 89791; CHECK-RV32-NEXT: bnez a2, .LBB61_9669792; CHECK-RV32-NEXT: j .LBB61_4819793; CHECK-RV32-NEXT: .LBB61_966: # %cond.load18019794; CHECK-RV32-NEXT: lbu a2, 0(a0)9795; CHECK-RV32-NEXT: li a4, 5129796; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9797; CHECK-RV32-NEXT: vmv.s.x v16, a29798; CHECK-RV32-NEXT: li a2, 4529799; CHECK-RV32-NEXT: li a4, 4519800; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9801; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49802; CHECK-RV32-NEXT: addi a0, a0, 19803; CHECK-RV32-NEXT: andi a2, a3, 169804; CHECK-RV32-NEXT: bnez a2, .LBB61_9679805; CHECK-RV32-NEXT: j .LBB61_4829806; CHECK-RV32-NEXT: .LBB61_967: # %cond.load18059807; CHECK-RV32-NEXT: lbu a2, 0(a0)9808; CHECK-RV32-NEXT: li a4, 5129809; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9810; CHECK-RV32-NEXT: vmv.s.x v16, a29811; CHECK-RV32-NEXT: li a2, 4539812; CHECK-RV32-NEXT: li a4, 4529813; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9814; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49815; CHECK-RV32-NEXT: addi a0, a0, 19816; CHECK-RV32-NEXT: andi a2, a3, 329817; CHECK-RV32-NEXT: bnez a2, .LBB61_9689818; CHECK-RV32-NEXT: j .LBB61_4839819; CHECK-RV32-NEXT: .LBB61_968: # %cond.load18099820; CHECK-RV32-NEXT: lbu a2, 0(a0)9821; CHECK-RV32-NEXT: li a4, 5129822; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9823; CHECK-RV32-NEXT: vmv.s.x v16, a29824; CHECK-RV32-NEXT: li a2, 4549825; CHECK-RV32-NEXT: li a4, 4539826; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9827; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49828; CHECK-RV32-NEXT: addi a0, a0, 19829; CHECK-RV32-NEXT: andi a2, a3, 649830; CHECK-RV32-NEXT: bnez a2, .LBB61_9699831; CHECK-RV32-NEXT: j .LBB61_4849832; CHECK-RV32-NEXT: .LBB61_969: # %cond.load18139833; CHECK-RV32-NEXT: lbu a2, 0(a0)9834; CHECK-RV32-NEXT: li a4, 5129835; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9836; CHECK-RV32-NEXT: vmv.s.x v16, a29837; CHECK-RV32-NEXT: li a2, 4559838; CHECK-RV32-NEXT: li a4, 4549839; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9840; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49841; CHECK-RV32-NEXT: addi a0, a0, 19842; CHECK-RV32-NEXT: andi a2, a3, 1289843; CHECK-RV32-NEXT: bnez a2, .LBB61_9709844; CHECK-RV32-NEXT: j .LBB61_4859845; CHECK-RV32-NEXT: .LBB61_970: # %cond.load18179846; CHECK-RV32-NEXT: lbu a2, 0(a0)9847; CHECK-RV32-NEXT: li a4, 5129848; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9849; CHECK-RV32-NEXT: vmv.s.x v16, a29850; CHECK-RV32-NEXT: li a2, 4569851; CHECK-RV32-NEXT: li a4, 4559852; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9853; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49854; CHECK-RV32-NEXT: addi a0, a0, 19855; CHECK-RV32-NEXT: andi a2, a3, 2569856; CHECK-RV32-NEXT: bnez a2, .LBB61_9719857; CHECK-RV32-NEXT: j .LBB61_4869858; CHECK-RV32-NEXT: .LBB61_971: # %cond.load18219859; CHECK-RV32-NEXT: lbu a2, 0(a0)9860; CHECK-RV32-NEXT: li a4, 5129861; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9862; CHECK-RV32-NEXT: vmv.s.x v16, a29863; CHECK-RV32-NEXT: li a2, 4579864; CHECK-RV32-NEXT: li a4, 4569865; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9866; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49867; CHECK-RV32-NEXT: addi a0, a0, 19868; CHECK-RV32-NEXT: andi a2, a3, 5129869; CHECK-RV32-NEXT: bnez a2, .LBB61_9729870; CHECK-RV32-NEXT: j .LBB61_4879871; CHECK-RV32-NEXT: .LBB61_972: # %cond.load18259872; CHECK-RV32-NEXT: lbu a2, 0(a0)9873; CHECK-RV32-NEXT: li a4, 5129874; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9875; CHECK-RV32-NEXT: vmv.s.x v16, a29876; CHECK-RV32-NEXT: li a2, 4589877; CHECK-RV32-NEXT: li a4, 4579878; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9879; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49880; CHECK-RV32-NEXT: addi a0, a0, 19881; CHECK-RV32-NEXT: andi a2, a3, 10249882; CHECK-RV32-NEXT: bnez a2, .LBB61_9739883; CHECK-RV32-NEXT: j .LBB61_4889884; CHECK-RV32-NEXT: .LBB61_973: # %cond.load18299885; CHECK-RV32-NEXT: lbu a2, 0(a0)9886; CHECK-RV32-NEXT: li a4, 5129887; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9888; CHECK-RV32-NEXT: vmv.s.x v16, a29889; CHECK-RV32-NEXT: li a2, 4599890; CHECK-RV32-NEXT: li a4, 4589891; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9892; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49893; CHECK-RV32-NEXT: addi a0, a0, 19894; CHECK-RV32-NEXT: slli a2, a3, 209895; CHECK-RV32-NEXT: bltz a2, .LBB61_9749896; CHECK-RV32-NEXT: j .LBB61_4899897; CHECK-RV32-NEXT: .LBB61_974: # %cond.load18339898; CHECK-RV32-NEXT: lbu a2, 0(a0)9899; CHECK-RV32-NEXT: li a4, 5129900; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9901; CHECK-RV32-NEXT: vmv.s.x v16, a29902; CHECK-RV32-NEXT: li a2, 4609903; CHECK-RV32-NEXT: li a4, 4599904; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9905; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49906; CHECK-RV32-NEXT: addi a0, a0, 19907; CHECK-RV32-NEXT: slli a2, a3, 199908; CHECK-RV32-NEXT: bltz a2, .LBB61_9759909; CHECK-RV32-NEXT: j .LBB61_4909910; CHECK-RV32-NEXT: .LBB61_975: # %cond.load18379911; CHECK-RV32-NEXT: lbu a2, 0(a0)9912; CHECK-RV32-NEXT: li a4, 5129913; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9914; CHECK-RV32-NEXT: vmv.s.x v16, a29915; CHECK-RV32-NEXT: li a2, 4619916; CHECK-RV32-NEXT: li a4, 4609917; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9918; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49919; CHECK-RV32-NEXT: addi a0, a0, 19920; CHECK-RV32-NEXT: slli a2, a3, 189921; CHECK-RV32-NEXT: bltz a2, .LBB61_9769922; CHECK-RV32-NEXT: j .LBB61_4919923; CHECK-RV32-NEXT: .LBB61_976: # %cond.load18419924; CHECK-RV32-NEXT: lbu a2, 0(a0)9925; CHECK-RV32-NEXT: li a4, 5129926; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9927; CHECK-RV32-NEXT: vmv.s.x v16, a29928; CHECK-RV32-NEXT: li a2, 4629929; CHECK-RV32-NEXT: li a4, 4619930; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9931; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49932; CHECK-RV32-NEXT: addi a0, a0, 19933; CHECK-RV32-NEXT: slli a2, a3, 179934; CHECK-RV32-NEXT: bltz a2, .LBB61_9779935; CHECK-RV32-NEXT: j .LBB61_4929936; CHECK-RV32-NEXT: .LBB61_977: # %cond.load18459937; CHECK-RV32-NEXT: lbu a2, 0(a0)9938; CHECK-RV32-NEXT: li a4, 5129939; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9940; CHECK-RV32-NEXT: vmv.s.x v16, a29941; CHECK-RV32-NEXT: li a2, 4639942; CHECK-RV32-NEXT: li a4, 4629943; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9944; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49945; CHECK-RV32-NEXT: addi a0, a0, 19946; CHECK-RV32-NEXT: slli a2, a3, 169947; CHECK-RV32-NEXT: bltz a2, .LBB61_9789948; CHECK-RV32-NEXT: j .LBB61_4939949; CHECK-RV32-NEXT: .LBB61_978: # %cond.load18499950; CHECK-RV32-NEXT: lbu a2, 0(a0)9951; CHECK-RV32-NEXT: li a4, 5129952; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9953; CHECK-RV32-NEXT: vmv.s.x v16, a29954; CHECK-RV32-NEXT: li a2, 4649955; CHECK-RV32-NEXT: li a4, 4639956; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9957; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49958; CHECK-RV32-NEXT: addi a0, a0, 19959; CHECK-RV32-NEXT: slli a2, a3, 159960; CHECK-RV32-NEXT: bltz a2, .LBB61_9799961; CHECK-RV32-NEXT: j .LBB61_4949962; CHECK-RV32-NEXT: .LBB61_979: # %cond.load18539963; CHECK-RV32-NEXT: lbu a2, 0(a0)9964; CHECK-RV32-NEXT: li a4, 5129965; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9966; CHECK-RV32-NEXT: vmv.s.x v16, a29967; CHECK-RV32-NEXT: li a2, 4659968; CHECK-RV32-NEXT: li a4, 4649969; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9970; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49971; CHECK-RV32-NEXT: addi a0, a0, 19972; CHECK-RV32-NEXT: slli a2, a3, 149973; CHECK-RV32-NEXT: bltz a2, .LBB61_9809974; CHECK-RV32-NEXT: j .LBB61_4959975; CHECK-RV32-NEXT: .LBB61_980: # %cond.load18579976; CHECK-RV32-NEXT: lbu a2, 0(a0)9977; CHECK-RV32-NEXT: li a4, 5129978; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9979; CHECK-RV32-NEXT: vmv.s.x v16, a29980; CHECK-RV32-NEXT: li a2, 4669981; CHECK-RV32-NEXT: li a4, 4659982; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9983; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49984; CHECK-RV32-NEXT: addi a0, a0, 19985; CHECK-RV32-NEXT: slli a2, a3, 139986; CHECK-RV32-NEXT: bltz a2, .LBB61_9819987; CHECK-RV32-NEXT: j .LBB61_4969988; CHECK-RV32-NEXT: .LBB61_981: # %cond.load18619989; CHECK-RV32-NEXT: lbu a2, 0(a0)9990; CHECK-RV32-NEXT: li a4, 5129991; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma9992; CHECK-RV32-NEXT: vmv.s.x v16, a29993; CHECK-RV32-NEXT: li a2, 4679994; CHECK-RV32-NEXT: li a4, 4669995; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma9996; CHECK-RV32-NEXT: vslideup.vx v8, v16, a49997; CHECK-RV32-NEXT: addi a0, a0, 19998; CHECK-RV32-NEXT: slli a2, a3, 129999; CHECK-RV32-NEXT: bltz a2, .LBB61_98210000; CHECK-RV32-NEXT: j .LBB61_49710001; CHECK-RV32-NEXT: .LBB61_982: # %cond.load186510002; CHECK-RV32-NEXT: lbu a2, 0(a0)10003; CHECK-RV32-NEXT: li a4, 51210004; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10005; CHECK-RV32-NEXT: vmv.s.x v16, a210006; CHECK-RV32-NEXT: li a2, 46810007; CHECK-RV32-NEXT: li a4, 46710008; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10009; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410010; CHECK-RV32-NEXT: addi a0, a0, 110011; CHECK-RV32-NEXT: slli a2, a3, 1110012; CHECK-RV32-NEXT: bltz a2, .LBB61_98310013; CHECK-RV32-NEXT: j .LBB61_49810014; CHECK-RV32-NEXT: .LBB61_983: # %cond.load186910015; CHECK-RV32-NEXT: lbu a2, 0(a0)10016; CHECK-RV32-NEXT: li a4, 51210017; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10018; CHECK-RV32-NEXT: vmv.s.x v16, a210019; CHECK-RV32-NEXT: li a2, 46910020; CHECK-RV32-NEXT: li a4, 46810021; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10022; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410023; CHECK-RV32-NEXT: addi a0, a0, 110024; CHECK-RV32-NEXT: slli a2, a3, 1010025; CHECK-RV32-NEXT: bltz a2, .LBB61_98410026; CHECK-RV32-NEXT: j .LBB61_49910027; CHECK-RV32-NEXT: .LBB61_984: # %cond.load187310028; CHECK-RV32-NEXT: lbu a2, 0(a0)10029; CHECK-RV32-NEXT: li a4, 51210030; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10031; CHECK-RV32-NEXT: vmv.s.x v16, a210032; CHECK-RV32-NEXT: li a2, 47010033; CHECK-RV32-NEXT: li a4, 46910034; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10035; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410036; CHECK-RV32-NEXT: addi a0, a0, 110037; CHECK-RV32-NEXT: slli a2, a3, 910038; CHECK-RV32-NEXT: bltz a2, .LBB61_98510039; CHECK-RV32-NEXT: j .LBB61_50010040; CHECK-RV32-NEXT: .LBB61_985: # %cond.load187710041; CHECK-RV32-NEXT: lbu a2, 0(a0)10042; CHECK-RV32-NEXT: li a4, 51210043; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10044; CHECK-RV32-NEXT: vmv.s.x v16, a210045; CHECK-RV32-NEXT: li a2, 47110046; CHECK-RV32-NEXT: li a4, 47010047; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10048; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410049; CHECK-RV32-NEXT: addi a0, a0, 110050; CHECK-RV32-NEXT: slli a2, a3, 810051; CHECK-RV32-NEXT: bltz a2, .LBB61_98610052; CHECK-RV32-NEXT: j .LBB61_50110053; CHECK-RV32-NEXT: .LBB61_986: # %cond.load188110054; CHECK-RV32-NEXT: lbu a2, 0(a0)10055; CHECK-RV32-NEXT: li a4, 51210056; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10057; CHECK-RV32-NEXT: vmv.s.x v16, a210058; CHECK-RV32-NEXT: li a2, 47210059; CHECK-RV32-NEXT: li a4, 47110060; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10061; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410062; CHECK-RV32-NEXT: addi a0, a0, 110063; CHECK-RV32-NEXT: slli a2, a3, 710064; CHECK-RV32-NEXT: bltz a2, .LBB61_98710065; CHECK-RV32-NEXT: j .LBB61_50210066; CHECK-RV32-NEXT: .LBB61_987: # %cond.load188510067; CHECK-RV32-NEXT: lbu a2, 0(a0)10068; CHECK-RV32-NEXT: li a4, 51210069; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10070; CHECK-RV32-NEXT: vmv.s.x v16, a210071; CHECK-RV32-NEXT: li a2, 47310072; CHECK-RV32-NEXT: li a4, 47210073; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10074; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410075; CHECK-RV32-NEXT: addi a0, a0, 110076; CHECK-RV32-NEXT: slli a2, a3, 610077; CHECK-RV32-NEXT: bltz a2, .LBB61_98810078; CHECK-RV32-NEXT: j .LBB61_50310079; CHECK-RV32-NEXT: .LBB61_988: # %cond.load188910080; CHECK-RV32-NEXT: lbu a2, 0(a0)10081; CHECK-RV32-NEXT: li a4, 51210082; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10083; CHECK-RV32-NEXT: vmv.s.x v16, a210084; CHECK-RV32-NEXT: li a2, 47410085; CHECK-RV32-NEXT: li a4, 47310086; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10087; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410088; CHECK-RV32-NEXT: addi a0, a0, 110089; CHECK-RV32-NEXT: slli a2, a3, 510090; CHECK-RV32-NEXT: bltz a2, .LBB61_98910091; CHECK-RV32-NEXT: j .LBB61_50410092; CHECK-RV32-NEXT: .LBB61_989: # %cond.load189310093; CHECK-RV32-NEXT: lbu a2, 0(a0)10094; CHECK-RV32-NEXT: li a4, 51210095; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10096; CHECK-RV32-NEXT: vmv.s.x v16, a210097; CHECK-RV32-NEXT: li a2, 47510098; CHECK-RV32-NEXT: li a4, 47410099; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10100; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410101; CHECK-RV32-NEXT: addi a0, a0, 110102; CHECK-RV32-NEXT: slli a2, a3, 410103; CHECK-RV32-NEXT: bltz a2, .LBB61_99010104; CHECK-RV32-NEXT: j .LBB61_50510105; CHECK-RV32-NEXT: .LBB61_990: # %cond.load189710106; CHECK-RV32-NEXT: lbu a2, 0(a0)10107; CHECK-RV32-NEXT: li a4, 51210108; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10109; CHECK-RV32-NEXT: vmv.s.x v16, a210110; CHECK-RV32-NEXT: li a2, 47610111; CHECK-RV32-NEXT: li a4, 47510112; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10113; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410114; CHECK-RV32-NEXT: addi a0, a0, 110115; CHECK-RV32-NEXT: slli a2, a3, 310116; CHECK-RV32-NEXT: bltz a2, .LBB61_99110117; CHECK-RV32-NEXT: j .LBB61_50610118; CHECK-RV32-NEXT: .LBB61_991: # %cond.load190110119; CHECK-RV32-NEXT: lbu a2, 0(a0)10120; CHECK-RV32-NEXT: li a4, 51210121; CHECK-RV32-NEXT: vsetvli zero, a4, e8, m1, ta, ma10122; CHECK-RV32-NEXT: vmv.s.x v16, a210123; CHECK-RV32-NEXT: li a2, 47710124; CHECK-RV32-NEXT: li a4, 47610125; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10126; CHECK-RV32-NEXT: vslideup.vx v8, v16, a410127; CHECK-RV32-NEXT: addi a0, a0, 110128; CHECK-RV32-NEXT: slli a2, a3, 210129; CHECK-RV32-NEXT: bgez a2, .LBB61_103910130; CHECK-RV32-NEXT: j .LBB61_50710131; CHECK-RV32-NEXT: .LBB61_1039: # %cond.load190110132; CHECK-RV32-NEXT: j .LBB61_50810133; CHECK-RV32-NEXT: .LBB61_992: # %cond.load191310134; CHECK-RV32-NEXT: lbu a2, 0(a0)10135; CHECK-RV32-NEXT: vmv.s.x v16, a210136; CHECK-RV32-NEXT: li a2, 48010137; CHECK-RV32-NEXT: li a3, 47910138; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10139; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310140; CHECK-RV32-NEXT: addi a0, a0, 110141; CHECK-RV32-NEXT: andi a2, a1, 110142; CHECK-RV32-NEXT: bnez a2, .LBB61_99310143; CHECK-RV32-NEXT: j .LBB61_51210144; CHECK-RV32-NEXT: .LBB61_993: # %cond.load191710145; CHECK-RV32-NEXT: lbu a2, 0(a0)10146; CHECK-RV32-NEXT: li a3, 51210147; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10148; CHECK-RV32-NEXT: vmv.s.x v16, a210149; CHECK-RV32-NEXT: li a2, 48110150; CHECK-RV32-NEXT: li a3, 48010151; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10152; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310153; CHECK-RV32-NEXT: addi a0, a0, 110154; CHECK-RV32-NEXT: andi a2, a1, 210155; CHECK-RV32-NEXT: bnez a2, .LBB61_99410156; CHECK-RV32-NEXT: j .LBB61_51310157; CHECK-RV32-NEXT: .LBB61_994: # %cond.load192110158; CHECK-RV32-NEXT: lbu a2, 0(a0)10159; CHECK-RV32-NEXT: li a3, 51210160; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10161; CHECK-RV32-NEXT: vmv.s.x v16, a210162; CHECK-RV32-NEXT: li a2, 48210163; CHECK-RV32-NEXT: li a3, 48110164; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10165; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310166; CHECK-RV32-NEXT: addi a0, a0, 110167; CHECK-RV32-NEXT: andi a2, a1, 410168; CHECK-RV32-NEXT: bnez a2, .LBB61_99510169; CHECK-RV32-NEXT: j .LBB61_51410170; CHECK-RV32-NEXT: .LBB61_995: # %cond.load192510171; CHECK-RV32-NEXT: lbu a2, 0(a0)10172; CHECK-RV32-NEXT: li a3, 51210173; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10174; CHECK-RV32-NEXT: vmv.s.x v16, a210175; CHECK-RV32-NEXT: li a2, 48310176; CHECK-RV32-NEXT: li a3, 48210177; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10178; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310179; CHECK-RV32-NEXT: addi a0, a0, 110180; CHECK-RV32-NEXT: andi a2, a1, 810181; CHECK-RV32-NEXT: bnez a2, .LBB61_99610182; CHECK-RV32-NEXT: j .LBB61_51510183; CHECK-RV32-NEXT: .LBB61_996: # %cond.load192910184; CHECK-RV32-NEXT: lbu a2, 0(a0)10185; CHECK-RV32-NEXT: li a3, 51210186; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10187; CHECK-RV32-NEXT: vmv.s.x v16, a210188; CHECK-RV32-NEXT: li a2, 48410189; CHECK-RV32-NEXT: li a3, 48310190; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10191; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310192; CHECK-RV32-NEXT: addi a0, a0, 110193; CHECK-RV32-NEXT: andi a2, a1, 1610194; CHECK-RV32-NEXT: bnez a2, .LBB61_99710195; CHECK-RV32-NEXT: j .LBB61_51610196; CHECK-RV32-NEXT: .LBB61_997: # %cond.load193310197; CHECK-RV32-NEXT: lbu a2, 0(a0)10198; CHECK-RV32-NEXT: li a3, 51210199; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10200; CHECK-RV32-NEXT: vmv.s.x v16, a210201; CHECK-RV32-NEXT: li a2, 48510202; CHECK-RV32-NEXT: li a3, 48410203; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10204; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310205; CHECK-RV32-NEXT: addi a0, a0, 110206; CHECK-RV32-NEXT: andi a2, a1, 3210207; CHECK-RV32-NEXT: bnez a2, .LBB61_99810208; CHECK-RV32-NEXT: j .LBB61_51710209; CHECK-RV32-NEXT: .LBB61_998: # %cond.load193710210; CHECK-RV32-NEXT: lbu a2, 0(a0)10211; CHECK-RV32-NEXT: li a3, 51210212; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10213; CHECK-RV32-NEXT: vmv.s.x v16, a210214; CHECK-RV32-NEXT: li a2, 48610215; CHECK-RV32-NEXT: li a3, 48510216; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10217; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310218; CHECK-RV32-NEXT: addi a0, a0, 110219; CHECK-RV32-NEXT: andi a2, a1, 6410220; CHECK-RV32-NEXT: bnez a2, .LBB61_99910221; CHECK-RV32-NEXT: j .LBB61_51810222; CHECK-RV32-NEXT: .LBB61_999: # %cond.load194110223; CHECK-RV32-NEXT: lbu a2, 0(a0)10224; CHECK-RV32-NEXT: li a3, 51210225; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10226; CHECK-RV32-NEXT: vmv.s.x v16, a210227; CHECK-RV32-NEXT: li a2, 48710228; CHECK-RV32-NEXT: li a3, 48610229; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10230; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310231; CHECK-RV32-NEXT: addi a0, a0, 110232; CHECK-RV32-NEXT: andi a2, a1, 12810233; CHECK-RV32-NEXT: bnez a2, .LBB61_100010234; CHECK-RV32-NEXT: j .LBB61_51910235; CHECK-RV32-NEXT: .LBB61_1000: # %cond.load194510236; CHECK-RV32-NEXT: lbu a2, 0(a0)10237; CHECK-RV32-NEXT: li a3, 51210238; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10239; CHECK-RV32-NEXT: vmv.s.x v16, a210240; CHECK-RV32-NEXT: li a2, 48810241; CHECK-RV32-NEXT: li a3, 48710242; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10243; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310244; CHECK-RV32-NEXT: addi a0, a0, 110245; CHECK-RV32-NEXT: andi a2, a1, 25610246; CHECK-RV32-NEXT: bnez a2, .LBB61_100110247; CHECK-RV32-NEXT: j .LBB61_52010248; CHECK-RV32-NEXT: .LBB61_1001: # %cond.load194910249; CHECK-RV32-NEXT: lbu a2, 0(a0)10250; CHECK-RV32-NEXT: li a3, 51210251; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10252; CHECK-RV32-NEXT: vmv.s.x v16, a210253; CHECK-RV32-NEXT: li a2, 48910254; CHECK-RV32-NEXT: li a3, 48810255; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10256; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310257; CHECK-RV32-NEXT: addi a0, a0, 110258; CHECK-RV32-NEXT: andi a2, a1, 51210259; CHECK-RV32-NEXT: bnez a2, .LBB61_100210260; CHECK-RV32-NEXT: j .LBB61_52110261; CHECK-RV32-NEXT: .LBB61_1002: # %cond.load195310262; CHECK-RV32-NEXT: lbu a2, 0(a0)10263; CHECK-RV32-NEXT: li a3, 51210264; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10265; CHECK-RV32-NEXT: vmv.s.x v16, a210266; CHECK-RV32-NEXT: li a2, 49010267; CHECK-RV32-NEXT: li a3, 48910268; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10269; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310270; CHECK-RV32-NEXT: addi a0, a0, 110271; CHECK-RV32-NEXT: andi a2, a1, 102410272; CHECK-RV32-NEXT: bnez a2, .LBB61_100310273; CHECK-RV32-NEXT: j .LBB61_52210274; CHECK-RV32-NEXT: .LBB61_1003: # %cond.load195710275; CHECK-RV32-NEXT: lbu a2, 0(a0)10276; CHECK-RV32-NEXT: li a3, 51210277; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10278; CHECK-RV32-NEXT: vmv.s.x v16, a210279; CHECK-RV32-NEXT: li a2, 49110280; CHECK-RV32-NEXT: li a3, 49010281; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10282; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310283; CHECK-RV32-NEXT: addi a0, a0, 110284; CHECK-RV32-NEXT: slli a2, a1, 2010285; CHECK-RV32-NEXT: bltz a2, .LBB61_100410286; CHECK-RV32-NEXT: j .LBB61_52310287; CHECK-RV32-NEXT: .LBB61_1004: # %cond.load196110288; CHECK-RV32-NEXT: lbu a2, 0(a0)10289; CHECK-RV32-NEXT: li a3, 51210290; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10291; CHECK-RV32-NEXT: vmv.s.x v16, a210292; CHECK-RV32-NEXT: li a2, 49210293; CHECK-RV32-NEXT: li a3, 49110294; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10295; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310296; CHECK-RV32-NEXT: addi a0, a0, 110297; CHECK-RV32-NEXT: slli a2, a1, 1910298; CHECK-RV32-NEXT: bltz a2, .LBB61_100510299; CHECK-RV32-NEXT: j .LBB61_52410300; CHECK-RV32-NEXT: .LBB61_1005: # %cond.load196510301; CHECK-RV32-NEXT: lbu a2, 0(a0)10302; CHECK-RV32-NEXT: li a3, 51210303; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10304; CHECK-RV32-NEXT: vmv.s.x v16, a210305; CHECK-RV32-NEXT: li a2, 49310306; CHECK-RV32-NEXT: li a3, 49210307; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10308; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310309; CHECK-RV32-NEXT: addi a0, a0, 110310; CHECK-RV32-NEXT: slli a2, a1, 1810311; CHECK-RV32-NEXT: bltz a2, .LBB61_100610312; CHECK-RV32-NEXT: j .LBB61_52510313; CHECK-RV32-NEXT: .LBB61_1006: # %cond.load196910314; CHECK-RV32-NEXT: lbu a2, 0(a0)10315; CHECK-RV32-NEXT: li a3, 51210316; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10317; CHECK-RV32-NEXT: vmv.s.x v16, a210318; CHECK-RV32-NEXT: li a2, 49410319; CHECK-RV32-NEXT: li a3, 49310320; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10321; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310322; CHECK-RV32-NEXT: addi a0, a0, 110323; CHECK-RV32-NEXT: slli a2, a1, 1710324; CHECK-RV32-NEXT: bltz a2, .LBB61_100710325; CHECK-RV32-NEXT: j .LBB61_52610326; CHECK-RV32-NEXT: .LBB61_1007: # %cond.load197310327; CHECK-RV32-NEXT: lbu a2, 0(a0)10328; CHECK-RV32-NEXT: li a3, 51210329; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10330; CHECK-RV32-NEXT: vmv.s.x v16, a210331; CHECK-RV32-NEXT: li a2, 49510332; CHECK-RV32-NEXT: li a3, 49410333; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10334; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310335; CHECK-RV32-NEXT: addi a0, a0, 110336; CHECK-RV32-NEXT: slli a2, a1, 1610337; CHECK-RV32-NEXT: bltz a2, .LBB61_100810338; CHECK-RV32-NEXT: j .LBB61_52710339; CHECK-RV32-NEXT: .LBB61_1008: # %cond.load197710340; CHECK-RV32-NEXT: lbu a2, 0(a0)10341; CHECK-RV32-NEXT: li a3, 51210342; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10343; CHECK-RV32-NEXT: vmv.s.x v16, a210344; CHECK-RV32-NEXT: li a2, 49610345; CHECK-RV32-NEXT: li a3, 49510346; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10347; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310348; CHECK-RV32-NEXT: addi a0, a0, 110349; CHECK-RV32-NEXT: slli a2, a1, 1510350; CHECK-RV32-NEXT: bltz a2, .LBB61_100910351; CHECK-RV32-NEXT: j .LBB61_52810352; CHECK-RV32-NEXT: .LBB61_1009: # %cond.load198110353; CHECK-RV32-NEXT: lbu a2, 0(a0)10354; CHECK-RV32-NEXT: li a3, 51210355; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10356; CHECK-RV32-NEXT: vmv.s.x v16, a210357; CHECK-RV32-NEXT: li a2, 49710358; CHECK-RV32-NEXT: li a3, 49610359; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10360; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310361; CHECK-RV32-NEXT: addi a0, a0, 110362; CHECK-RV32-NEXT: slli a2, a1, 1410363; CHECK-RV32-NEXT: bltz a2, .LBB61_101010364; CHECK-RV32-NEXT: j .LBB61_52910365; CHECK-RV32-NEXT: .LBB61_1010: # %cond.load198510366; CHECK-RV32-NEXT: lbu a2, 0(a0)10367; CHECK-RV32-NEXT: li a3, 51210368; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10369; CHECK-RV32-NEXT: vmv.s.x v16, a210370; CHECK-RV32-NEXT: li a2, 49810371; CHECK-RV32-NEXT: li a3, 49710372; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10373; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310374; CHECK-RV32-NEXT: addi a0, a0, 110375; CHECK-RV32-NEXT: slli a2, a1, 1310376; CHECK-RV32-NEXT: bltz a2, .LBB61_101110377; CHECK-RV32-NEXT: j .LBB61_53010378; CHECK-RV32-NEXT: .LBB61_1011: # %cond.load198910379; CHECK-RV32-NEXT: lbu a2, 0(a0)10380; CHECK-RV32-NEXT: li a3, 51210381; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10382; CHECK-RV32-NEXT: vmv.s.x v16, a210383; CHECK-RV32-NEXT: li a2, 49910384; CHECK-RV32-NEXT: li a3, 49810385; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10386; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310387; CHECK-RV32-NEXT: addi a0, a0, 110388; CHECK-RV32-NEXT: slli a2, a1, 1210389; CHECK-RV32-NEXT: bltz a2, .LBB61_101210390; CHECK-RV32-NEXT: j .LBB61_53110391; CHECK-RV32-NEXT: .LBB61_1012: # %cond.load199310392; CHECK-RV32-NEXT: lbu a2, 0(a0)10393; CHECK-RV32-NEXT: li a3, 51210394; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10395; CHECK-RV32-NEXT: vmv.s.x v16, a210396; CHECK-RV32-NEXT: li a2, 50010397; CHECK-RV32-NEXT: li a3, 49910398; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10399; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310400; CHECK-RV32-NEXT: addi a0, a0, 110401; CHECK-RV32-NEXT: slli a2, a1, 1110402; CHECK-RV32-NEXT: bltz a2, .LBB61_101310403; CHECK-RV32-NEXT: j .LBB61_53210404; CHECK-RV32-NEXT: .LBB61_1013: # %cond.load199710405; CHECK-RV32-NEXT: lbu a2, 0(a0)10406; CHECK-RV32-NEXT: li a3, 51210407; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10408; CHECK-RV32-NEXT: vmv.s.x v16, a210409; CHECK-RV32-NEXT: li a2, 50110410; CHECK-RV32-NEXT: li a3, 50010411; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10412; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310413; CHECK-RV32-NEXT: addi a0, a0, 110414; CHECK-RV32-NEXT: slli a2, a1, 1010415; CHECK-RV32-NEXT: bltz a2, .LBB61_101410416; CHECK-RV32-NEXT: j .LBB61_53310417; CHECK-RV32-NEXT: .LBB61_1014: # %cond.load200110418; CHECK-RV32-NEXT: lbu a2, 0(a0)10419; CHECK-RV32-NEXT: li a3, 51210420; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10421; CHECK-RV32-NEXT: vmv.s.x v16, a210422; CHECK-RV32-NEXT: li a2, 50210423; CHECK-RV32-NEXT: li a3, 50110424; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10425; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310426; CHECK-RV32-NEXT: addi a0, a0, 110427; CHECK-RV32-NEXT: slli a2, a1, 910428; CHECK-RV32-NEXT: bltz a2, .LBB61_101510429; CHECK-RV32-NEXT: j .LBB61_53410430; CHECK-RV32-NEXT: .LBB61_1015: # %cond.load200510431; CHECK-RV32-NEXT: lbu a2, 0(a0)10432; CHECK-RV32-NEXT: li a3, 51210433; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10434; CHECK-RV32-NEXT: vmv.s.x v16, a210435; CHECK-RV32-NEXT: li a2, 50310436; CHECK-RV32-NEXT: li a3, 50210437; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10438; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310439; CHECK-RV32-NEXT: addi a0, a0, 110440; CHECK-RV32-NEXT: slli a2, a1, 810441; CHECK-RV32-NEXT: bltz a2, .LBB61_101610442; CHECK-RV32-NEXT: j .LBB61_53510443; CHECK-RV32-NEXT: .LBB61_1016: # %cond.load200910444; CHECK-RV32-NEXT: lbu a2, 0(a0)10445; CHECK-RV32-NEXT: li a3, 51210446; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10447; CHECK-RV32-NEXT: vmv.s.x v16, a210448; CHECK-RV32-NEXT: li a2, 50410449; CHECK-RV32-NEXT: li a3, 50310450; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10451; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310452; CHECK-RV32-NEXT: addi a0, a0, 110453; CHECK-RV32-NEXT: slli a2, a1, 710454; CHECK-RV32-NEXT: bltz a2, .LBB61_101710455; CHECK-RV32-NEXT: j .LBB61_53610456; CHECK-RV32-NEXT: .LBB61_1017: # %cond.load201310457; CHECK-RV32-NEXT: lbu a2, 0(a0)10458; CHECK-RV32-NEXT: li a3, 51210459; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10460; CHECK-RV32-NEXT: vmv.s.x v16, a210461; CHECK-RV32-NEXT: li a2, 50510462; CHECK-RV32-NEXT: li a3, 50410463; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10464; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310465; CHECK-RV32-NEXT: addi a0, a0, 110466; CHECK-RV32-NEXT: slli a2, a1, 610467; CHECK-RV32-NEXT: bltz a2, .LBB61_101810468; CHECK-RV32-NEXT: j .LBB61_53710469; CHECK-RV32-NEXT: .LBB61_1018: # %cond.load201710470; CHECK-RV32-NEXT: lbu a2, 0(a0)10471; CHECK-RV32-NEXT: li a3, 51210472; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10473; CHECK-RV32-NEXT: vmv.s.x v16, a210474; CHECK-RV32-NEXT: li a2, 50610475; CHECK-RV32-NEXT: li a3, 50510476; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10477; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310478; CHECK-RV32-NEXT: addi a0, a0, 110479; CHECK-RV32-NEXT: slli a2, a1, 510480; CHECK-RV32-NEXT: bltz a2, .LBB61_101910481; CHECK-RV32-NEXT: j .LBB61_53810482; CHECK-RV32-NEXT: .LBB61_1019: # %cond.load202110483; CHECK-RV32-NEXT: lbu a2, 0(a0)10484; CHECK-RV32-NEXT: li a3, 51210485; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10486; CHECK-RV32-NEXT: vmv.s.x v16, a210487; CHECK-RV32-NEXT: li a2, 50710488; CHECK-RV32-NEXT: li a3, 50610489; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10490; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310491; CHECK-RV32-NEXT: addi a0, a0, 110492; CHECK-RV32-NEXT: slli a2, a1, 410493; CHECK-RV32-NEXT: bltz a2, .LBB61_102010494; CHECK-RV32-NEXT: j .LBB61_53910495; CHECK-RV32-NEXT: .LBB61_1020: # %cond.load202510496; CHECK-RV32-NEXT: lbu a2, 0(a0)10497; CHECK-RV32-NEXT: li a3, 51210498; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10499; CHECK-RV32-NEXT: vmv.s.x v16, a210500; CHECK-RV32-NEXT: li a2, 50810501; CHECK-RV32-NEXT: li a3, 50710502; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10503; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310504; CHECK-RV32-NEXT: addi a0, a0, 110505; CHECK-RV32-NEXT: slli a2, a1, 310506; CHECK-RV32-NEXT: bltz a2, .LBB61_102110507; CHECK-RV32-NEXT: j .LBB61_54010508; CHECK-RV32-NEXT: .LBB61_1021: # %cond.load202910509; CHECK-RV32-NEXT: lbu a2, 0(a0)10510; CHECK-RV32-NEXT: li a3, 51210511; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10512; CHECK-RV32-NEXT: vmv.s.x v16, a210513; CHECK-RV32-NEXT: li a2, 50910514; CHECK-RV32-NEXT: li a3, 50810515; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10516; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310517; CHECK-RV32-NEXT: addi a0, a0, 110518; CHECK-RV32-NEXT: slli a2, a1, 210519; CHECK-RV32-NEXT: bltz a2, .LBB61_102210520; CHECK-RV32-NEXT: j .LBB61_54110521; CHECK-RV32-NEXT: .LBB61_1022: # %cond.load203310522; CHECK-RV32-NEXT: lbu a2, 0(a0)10523; CHECK-RV32-NEXT: li a3, 51210524; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10525; CHECK-RV32-NEXT: vmv.s.x v16, a210526; CHECK-RV32-NEXT: li a2, 51010527; CHECK-RV32-NEXT: li a3, 50910528; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10529; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310530; CHECK-RV32-NEXT: addi a0, a0, 110531; CHECK-RV32-NEXT: slli a2, a1, 110532; CHECK-RV32-NEXT: bltz a2, .LBB61_102310533; CHECK-RV32-NEXT: j .LBB61_54210534; CHECK-RV32-NEXT: .LBB61_1023: # %cond.load203710535; CHECK-RV32-NEXT: lbu a2, 0(a0)10536; CHECK-RV32-NEXT: li a3, 51210537; CHECK-RV32-NEXT: vsetvli zero, a3, e8, m1, ta, ma10538; CHECK-RV32-NEXT: vmv.s.x v16, a210539; CHECK-RV32-NEXT: li a2, 51110540; CHECK-RV32-NEXT: li a3, 51010541; CHECK-RV32-NEXT: vsetvli zero, a2, e8, m8, tu, ma10542; CHECK-RV32-NEXT: vslideup.vx v8, v16, a310543; CHECK-RV32-NEXT: addi a0, a0, 110544; CHECK-RV32-NEXT: bltz a1, .LBB61_102410545; CHECK-RV32-NEXT: j .LBB61_54310546; CHECK-RV32-NEXT: .LBB61_1024: # %cond.load204110547; CHECK-RV32-NEXT: lbu a0, 0(a0)10548; CHECK-RV32-NEXT: li a1, 51210549; CHECK-RV32-NEXT: vsetvli zero, a1, e8, m8, ta, ma10550; CHECK-RV32-NEXT: vmv.s.x v16, a010551; CHECK-RV32-NEXT: li a0, 51110552; CHECK-RV32-NEXT: vslideup.vx v8, v16, a010553; CHECK-RV32-NEXT: ret10554;10555; CHECK-RV64-LABEL: test_expandload_v512i8_vlen512:10556; CHECK-RV64: # %bb.0:10557; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma10558; CHECK-RV64-NEXT: vmv.x.s a2, v010559; CHECK-RV64-NEXT: andi a1, a2, 110560; CHECK-RV64-NEXT: beqz a1, .LBB61_110561; CHECK-RV64-NEXT: j .LBB61_52710562; CHECK-RV64-NEXT: .LBB61_1: # %else10563; CHECK-RV64-NEXT: andi a1, a2, 210564; CHECK-RV64-NEXT: beqz a1, .LBB61_210565; CHECK-RV64-NEXT: j .LBB61_52810566; CHECK-RV64-NEXT: .LBB61_2: # %else210567; CHECK-RV64-NEXT: andi a1, a2, 410568; CHECK-RV64-NEXT: beqz a1, .LBB61_310569; CHECK-RV64-NEXT: j .LBB61_52910570; CHECK-RV64-NEXT: .LBB61_3: # %else610571; CHECK-RV64-NEXT: andi a1, a2, 810572; CHECK-RV64-NEXT: beqz a1, .LBB61_410573; CHECK-RV64-NEXT: j .LBB61_53010574; CHECK-RV64-NEXT: .LBB61_4: # %else1010575; CHECK-RV64-NEXT: andi a1, a2, 1610576; CHECK-RV64-NEXT: beqz a1, .LBB61_510577; CHECK-RV64-NEXT: j .LBB61_53110578; CHECK-RV64-NEXT: .LBB61_5: # %else1410579; CHECK-RV64-NEXT: andi a1, a2, 3210580; CHECK-RV64-NEXT: beqz a1, .LBB61_610581; CHECK-RV64-NEXT: j .LBB61_53210582; CHECK-RV64-NEXT: .LBB61_6: # %else1810583; CHECK-RV64-NEXT: andi a1, a2, 6410584; CHECK-RV64-NEXT: beqz a1, .LBB61_710585; CHECK-RV64-NEXT: j .LBB61_53310586; CHECK-RV64-NEXT: .LBB61_7: # %else2210587; CHECK-RV64-NEXT: andi a1, a2, 12810588; CHECK-RV64-NEXT: beqz a1, .LBB61_810589; CHECK-RV64-NEXT: j .LBB61_53410590; CHECK-RV64-NEXT: .LBB61_8: # %else2610591; CHECK-RV64-NEXT: andi a1, a2, 25610592; CHECK-RV64-NEXT: beqz a1, .LBB61_910593; CHECK-RV64-NEXT: j .LBB61_53510594; CHECK-RV64-NEXT: .LBB61_9: # %else3010595; CHECK-RV64-NEXT: andi a1, a2, 51210596; CHECK-RV64-NEXT: beqz a1, .LBB61_1010597; CHECK-RV64-NEXT: j .LBB61_53610598; CHECK-RV64-NEXT: .LBB61_10: # %else3410599; CHECK-RV64-NEXT: andi a1, a2, 102410600; CHECK-RV64-NEXT: beqz a1, .LBB61_1110601; CHECK-RV64-NEXT: j .LBB61_53710602; CHECK-RV64-NEXT: .LBB61_11: # %else3810603; CHECK-RV64-NEXT: slli a1, a2, 5210604; CHECK-RV64-NEXT: bgez a1, .LBB61_1210605; CHECK-RV64-NEXT: j .LBB61_53810606; CHECK-RV64-NEXT: .LBB61_12: # %else4210607; CHECK-RV64-NEXT: slli a1, a2, 5110608; CHECK-RV64-NEXT: bgez a1, .LBB61_1310609; CHECK-RV64-NEXT: j .LBB61_53910610; CHECK-RV64-NEXT: .LBB61_13: # %else4610611; CHECK-RV64-NEXT: slli a1, a2, 5010612; CHECK-RV64-NEXT: bgez a1, .LBB61_1410613; CHECK-RV64-NEXT: j .LBB61_54010614; CHECK-RV64-NEXT: .LBB61_14: # %else5010615; CHECK-RV64-NEXT: slli a1, a2, 4910616; CHECK-RV64-NEXT: bgez a1, .LBB61_1510617; CHECK-RV64-NEXT: j .LBB61_54110618; CHECK-RV64-NEXT: .LBB61_15: # %else5410619; CHECK-RV64-NEXT: slli a1, a2, 4810620; CHECK-RV64-NEXT: bgez a1, .LBB61_1610621; CHECK-RV64-NEXT: j .LBB61_54210622; CHECK-RV64-NEXT: .LBB61_16: # %else5810623; CHECK-RV64-NEXT: slli a1, a2, 4710624; CHECK-RV64-NEXT: bgez a1, .LBB61_1710625; CHECK-RV64-NEXT: j .LBB61_54310626; CHECK-RV64-NEXT: .LBB61_17: # %else6210627; CHECK-RV64-NEXT: slli a1, a2, 4610628; CHECK-RV64-NEXT: bgez a1, .LBB61_1810629; CHECK-RV64-NEXT: j .LBB61_54410630; CHECK-RV64-NEXT: .LBB61_18: # %else6610631; CHECK-RV64-NEXT: slli a1, a2, 4510632; CHECK-RV64-NEXT: bgez a1, .LBB61_1910633; CHECK-RV64-NEXT: j .LBB61_54510634; CHECK-RV64-NEXT: .LBB61_19: # %else7010635; CHECK-RV64-NEXT: slli a1, a2, 4410636; CHECK-RV64-NEXT: bgez a1, .LBB61_2010637; CHECK-RV64-NEXT: j .LBB61_54610638; CHECK-RV64-NEXT: .LBB61_20: # %else7410639; CHECK-RV64-NEXT: slli a1, a2, 4310640; CHECK-RV64-NEXT: bgez a1, .LBB61_2110641; CHECK-RV64-NEXT: j .LBB61_54710642; CHECK-RV64-NEXT: .LBB61_21: # %else7810643; CHECK-RV64-NEXT: slli a1, a2, 4210644; CHECK-RV64-NEXT: bgez a1, .LBB61_2210645; CHECK-RV64-NEXT: j .LBB61_54810646; CHECK-RV64-NEXT: .LBB61_22: # %else8210647; CHECK-RV64-NEXT: slli a1, a2, 4110648; CHECK-RV64-NEXT: bgez a1, .LBB61_2310649; CHECK-RV64-NEXT: j .LBB61_54910650; CHECK-RV64-NEXT: .LBB61_23: # %else8610651; CHECK-RV64-NEXT: slli a1, a2, 4010652; CHECK-RV64-NEXT: bgez a1, .LBB61_2410653; CHECK-RV64-NEXT: j .LBB61_55010654; CHECK-RV64-NEXT: .LBB61_24: # %else9010655; CHECK-RV64-NEXT: slli a1, a2, 3910656; CHECK-RV64-NEXT: bgez a1, .LBB61_2510657; CHECK-RV64-NEXT: j .LBB61_55110658; CHECK-RV64-NEXT: .LBB61_25: # %else9410659; CHECK-RV64-NEXT: slli a1, a2, 3810660; CHECK-RV64-NEXT: bgez a1, .LBB61_2610661; CHECK-RV64-NEXT: j .LBB61_55210662; CHECK-RV64-NEXT: .LBB61_26: # %else9810663; CHECK-RV64-NEXT: slli a1, a2, 3710664; CHECK-RV64-NEXT: bgez a1, .LBB61_2710665; CHECK-RV64-NEXT: j .LBB61_55310666; CHECK-RV64-NEXT: .LBB61_27: # %else10210667; CHECK-RV64-NEXT: slli a1, a2, 3610668; CHECK-RV64-NEXT: bgez a1, .LBB61_2810669; CHECK-RV64-NEXT: j .LBB61_55410670; CHECK-RV64-NEXT: .LBB61_28: # %else10610671; CHECK-RV64-NEXT: slli a1, a2, 3510672; CHECK-RV64-NEXT: bgez a1, .LBB61_2910673; CHECK-RV64-NEXT: j .LBB61_55510674; CHECK-RV64-NEXT: .LBB61_29: # %else11010675; CHECK-RV64-NEXT: slli a1, a2, 3410676; CHECK-RV64-NEXT: bgez a1, .LBB61_3010677; CHECK-RV64-NEXT: j .LBB61_55610678; CHECK-RV64-NEXT: .LBB61_30: # %else11410679; CHECK-RV64-NEXT: slli a1, a2, 3310680; CHECK-RV64-NEXT: bgez a1, .LBB61_3110681; CHECK-RV64-NEXT: j .LBB61_55710682; CHECK-RV64-NEXT: .LBB61_31: # %else11810683; CHECK-RV64-NEXT: slli a1, a2, 3210684; CHECK-RV64-NEXT: bgez a1, .LBB61_3210685; CHECK-RV64-NEXT: j .LBB61_55810686; CHECK-RV64-NEXT: .LBB61_32: # %else12210687; CHECK-RV64-NEXT: slli a1, a2, 3110688; CHECK-RV64-NEXT: bgez a1, .LBB61_3310689; CHECK-RV64-NEXT: j .LBB61_55910690; CHECK-RV64-NEXT: .LBB61_33: # %else12610691; CHECK-RV64-NEXT: slli a1, a2, 3010692; CHECK-RV64-NEXT: bgez a1, .LBB61_3410693; CHECK-RV64-NEXT: j .LBB61_56010694; CHECK-RV64-NEXT: .LBB61_34: # %else13010695; CHECK-RV64-NEXT: slli a1, a2, 2910696; CHECK-RV64-NEXT: bgez a1, .LBB61_3510697; CHECK-RV64-NEXT: j .LBB61_56110698; CHECK-RV64-NEXT: .LBB61_35: # %else13410699; CHECK-RV64-NEXT: slli a1, a2, 2810700; CHECK-RV64-NEXT: bgez a1, .LBB61_3610701; CHECK-RV64-NEXT: j .LBB61_56210702; CHECK-RV64-NEXT: .LBB61_36: # %else13810703; CHECK-RV64-NEXT: slli a1, a2, 2710704; CHECK-RV64-NEXT: bgez a1, .LBB61_3710705; CHECK-RV64-NEXT: j .LBB61_56310706; CHECK-RV64-NEXT: .LBB61_37: # %else14210707; CHECK-RV64-NEXT: slli a1, a2, 2610708; CHECK-RV64-NEXT: bgez a1, .LBB61_3810709; CHECK-RV64-NEXT: j .LBB61_56410710; CHECK-RV64-NEXT: .LBB61_38: # %else14610711; CHECK-RV64-NEXT: slli a1, a2, 2510712; CHECK-RV64-NEXT: bgez a1, .LBB61_3910713; CHECK-RV64-NEXT: j .LBB61_56510714; CHECK-RV64-NEXT: .LBB61_39: # %else15010715; CHECK-RV64-NEXT: slli a1, a2, 2410716; CHECK-RV64-NEXT: bgez a1, .LBB61_4010717; CHECK-RV64-NEXT: j .LBB61_56610718; CHECK-RV64-NEXT: .LBB61_40: # %else15410719; CHECK-RV64-NEXT: slli a1, a2, 2310720; CHECK-RV64-NEXT: bgez a1, .LBB61_4110721; CHECK-RV64-NEXT: j .LBB61_56710722; CHECK-RV64-NEXT: .LBB61_41: # %else15810723; CHECK-RV64-NEXT: slli a1, a2, 2210724; CHECK-RV64-NEXT: bgez a1, .LBB61_4210725; CHECK-RV64-NEXT: j .LBB61_56810726; CHECK-RV64-NEXT: .LBB61_42: # %else16210727; CHECK-RV64-NEXT: slli a1, a2, 2110728; CHECK-RV64-NEXT: bgez a1, .LBB61_4310729; CHECK-RV64-NEXT: j .LBB61_56910730; CHECK-RV64-NEXT: .LBB61_43: # %else16610731; CHECK-RV64-NEXT: slli a1, a2, 2010732; CHECK-RV64-NEXT: bgez a1, .LBB61_4410733; CHECK-RV64-NEXT: j .LBB61_57010734; CHECK-RV64-NEXT: .LBB61_44: # %else17010735; CHECK-RV64-NEXT: slli a1, a2, 1910736; CHECK-RV64-NEXT: bgez a1, .LBB61_4510737; CHECK-RV64-NEXT: j .LBB61_57110738; CHECK-RV64-NEXT: .LBB61_45: # %else17410739; CHECK-RV64-NEXT: slli a1, a2, 1810740; CHECK-RV64-NEXT: bgez a1, .LBB61_4610741; CHECK-RV64-NEXT: j .LBB61_57210742; CHECK-RV64-NEXT: .LBB61_46: # %else17810743; CHECK-RV64-NEXT: slli a1, a2, 1710744; CHECK-RV64-NEXT: bgez a1, .LBB61_4710745; CHECK-RV64-NEXT: j .LBB61_57310746; CHECK-RV64-NEXT: .LBB61_47: # %else18210747; CHECK-RV64-NEXT: slli a1, a2, 1610748; CHECK-RV64-NEXT: bgez a1, .LBB61_4810749; CHECK-RV64-NEXT: j .LBB61_57410750; CHECK-RV64-NEXT: .LBB61_48: # %else18610751; CHECK-RV64-NEXT: slli a1, a2, 1510752; CHECK-RV64-NEXT: bgez a1, .LBB61_4910753; CHECK-RV64-NEXT: j .LBB61_57510754; CHECK-RV64-NEXT: .LBB61_49: # %else19010755; CHECK-RV64-NEXT: slli a1, a2, 1410756; CHECK-RV64-NEXT: bgez a1, .LBB61_5010757; CHECK-RV64-NEXT: j .LBB61_57610758; CHECK-RV64-NEXT: .LBB61_50: # %else19410759; CHECK-RV64-NEXT: slli a1, a2, 1310760; CHECK-RV64-NEXT: bgez a1, .LBB61_5110761; CHECK-RV64-NEXT: j .LBB61_57710762; CHECK-RV64-NEXT: .LBB61_51: # %else19810763; CHECK-RV64-NEXT: slli a1, a2, 1210764; CHECK-RV64-NEXT: bgez a1, .LBB61_5210765; CHECK-RV64-NEXT: j .LBB61_57810766; CHECK-RV64-NEXT: .LBB61_52: # %else20210767; CHECK-RV64-NEXT: slli a1, a2, 1110768; CHECK-RV64-NEXT: bgez a1, .LBB61_5310769; CHECK-RV64-NEXT: j .LBB61_57910770; CHECK-RV64-NEXT: .LBB61_53: # %else20610771; CHECK-RV64-NEXT: slli a1, a2, 1010772; CHECK-RV64-NEXT: bgez a1, .LBB61_5410773; CHECK-RV64-NEXT: j .LBB61_58010774; CHECK-RV64-NEXT: .LBB61_54: # %else21010775; CHECK-RV64-NEXT: slli a1, a2, 910776; CHECK-RV64-NEXT: bgez a1, .LBB61_5510777; CHECK-RV64-NEXT: j .LBB61_58110778; CHECK-RV64-NEXT: .LBB61_55: # %else21410779; CHECK-RV64-NEXT: slli a1, a2, 810780; CHECK-RV64-NEXT: bgez a1, .LBB61_5610781; CHECK-RV64-NEXT: j .LBB61_58210782; CHECK-RV64-NEXT: .LBB61_56: # %else21810783; CHECK-RV64-NEXT: slli a1, a2, 710784; CHECK-RV64-NEXT: bgez a1, .LBB61_5710785; CHECK-RV64-NEXT: j .LBB61_58310786; CHECK-RV64-NEXT: .LBB61_57: # %else22210787; CHECK-RV64-NEXT: slli a1, a2, 610788; CHECK-RV64-NEXT: bgez a1, .LBB61_5810789; CHECK-RV64-NEXT: j .LBB61_58410790; CHECK-RV64-NEXT: .LBB61_58: # %else22610791; CHECK-RV64-NEXT: slli a1, a2, 510792; CHECK-RV64-NEXT: bgez a1, .LBB61_5910793; CHECK-RV64-NEXT: j .LBB61_58510794; CHECK-RV64-NEXT: .LBB61_59: # %else23010795; CHECK-RV64-NEXT: slli a1, a2, 410796; CHECK-RV64-NEXT: bgez a1, .LBB61_6010797; CHECK-RV64-NEXT: j .LBB61_58610798; CHECK-RV64-NEXT: .LBB61_60: # %else23410799; CHECK-RV64-NEXT: slli a1, a2, 310800; CHECK-RV64-NEXT: bgez a1, .LBB61_6110801; CHECK-RV64-NEXT: j .LBB61_58710802; CHECK-RV64-NEXT: .LBB61_61: # %else23810803; CHECK-RV64-NEXT: slli a1, a2, 210804; CHECK-RV64-NEXT: bgez a1, .LBB61_6310805; CHECK-RV64-NEXT: .LBB61_62: # %cond.load24110806; CHECK-RV64-NEXT: lbu a1, 0(a0)10807; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma10808; CHECK-RV64-NEXT: vmv8r.v v16, v810809; CHECK-RV64-NEXT: vmv.s.x v9, a110810; CHECK-RV64-NEXT: li a1, 6210811; CHECK-RV64-NEXT: li a3, 6110812; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma10813; CHECK-RV64-NEXT: vslideup.vx v8, v9, a310814; CHECK-RV64-NEXT: addi a0, a0, 110815; CHECK-RV64-NEXT: vmv1r.v v16, v810816; CHECK-RV64-NEXT: vmv8r.v v8, v1610817; CHECK-RV64-NEXT: .LBB61_63: # %else24210818; CHECK-RV64-NEXT: slli a1, a2, 110819; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma10820; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 110821; CHECK-RV64-NEXT: bgez a1, .LBB61_6510822; CHECK-RV64-NEXT: # %bb.64: # %cond.load24510823; CHECK-RV64-NEXT: lbu a1, 0(a0)10824; CHECK-RV64-NEXT: vmv8r.v v16, v810825; CHECK-RV64-NEXT: vmv.s.x v9, a110826; CHECK-RV64-NEXT: li a1, 6310827; CHECK-RV64-NEXT: li a3, 6210828; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma10829; CHECK-RV64-NEXT: vslideup.vx v8, v9, a310830; CHECK-RV64-NEXT: addi a0, a0, 110831; CHECK-RV64-NEXT: vmv1r.v v16, v810832; CHECK-RV64-NEXT: vmv8r.v v8, v1610833; CHECK-RV64-NEXT: .LBB61_65: # %else24610834; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma10835; CHECK-RV64-NEXT: vmv.x.s a1, v2410836; CHECK-RV64-NEXT: bgez a2, .LBB61_6610837; CHECK-RV64-NEXT: j .LBB61_58810838; CHECK-RV64-NEXT: .LBB61_66: # %else25010839; CHECK-RV64-NEXT: andi a2, a1, 110840; CHECK-RV64-NEXT: beqz a2, .LBB61_6710841; CHECK-RV64-NEXT: j .LBB61_58910842; CHECK-RV64-NEXT: .LBB61_67: # %else25410843; CHECK-RV64-NEXT: andi a2, a1, 210844; CHECK-RV64-NEXT: beqz a2, .LBB61_6810845; CHECK-RV64-NEXT: j .LBB61_59010846; CHECK-RV64-NEXT: .LBB61_68: # %else25810847; CHECK-RV64-NEXT: andi a2, a1, 410848; CHECK-RV64-NEXT: beqz a2, .LBB61_6910849; CHECK-RV64-NEXT: j .LBB61_59110850; CHECK-RV64-NEXT: .LBB61_69: # %else26210851; CHECK-RV64-NEXT: andi a2, a1, 810852; CHECK-RV64-NEXT: beqz a2, .LBB61_7010853; CHECK-RV64-NEXT: j .LBB61_59210854; CHECK-RV64-NEXT: .LBB61_70: # %else26610855; CHECK-RV64-NEXT: andi a2, a1, 1610856; CHECK-RV64-NEXT: beqz a2, .LBB61_7110857; CHECK-RV64-NEXT: j .LBB61_59310858; CHECK-RV64-NEXT: .LBB61_71: # %else27010859; CHECK-RV64-NEXT: andi a2, a1, 3210860; CHECK-RV64-NEXT: beqz a2, .LBB61_7210861; CHECK-RV64-NEXT: j .LBB61_59410862; CHECK-RV64-NEXT: .LBB61_72: # %else27410863; CHECK-RV64-NEXT: andi a2, a1, 6410864; CHECK-RV64-NEXT: beqz a2, .LBB61_7310865; CHECK-RV64-NEXT: j .LBB61_59510866; CHECK-RV64-NEXT: .LBB61_73: # %else27810867; CHECK-RV64-NEXT: andi a2, a1, 12810868; CHECK-RV64-NEXT: beqz a2, .LBB61_7410869; CHECK-RV64-NEXT: j .LBB61_59610870; CHECK-RV64-NEXT: .LBB61_74: # %else28210871; CHECK-RV64-NEXT: andi a2, a1, 25610872; CHECK-RV64-NEXT: beqz a2, .LBB61_7510873; CHECK-RV64-NEXT: j .LBB61_59710874; CHECK-RV64-NEXT: .LBB61_75: # %else28610875; CHECK-RV64-NEXT: andi a2, a1, 51210876; CHECK-RV64-NEXT: beqz a2, .LBB61_7610877; CHECK-RV64-NEXT: j .LBB61_59810878; CHECK-RV64-NEXT: .LBB61_76: # %else29010879; CHECK-RV64-NEXT: andi a2, a1, 102410880; CHECK-RV64-NEXT: beqz a2, .LBB61_7710881; CHECK-RV64-NEXT: j .LBB61_59910882; CHECK-RV64-NEXT: .LBB61_77: # %else29410883; CHECK-RV64-NEXT: slli a2, a1, 5210884; CHECK-RV64-NEXT: bgez a2, .LBB61_7810885; CHECK-RV64-NEXT: j .LBB61_60010886; CHECK-RV64-NEXT: .LBB61_78: # %else29810887; CHECK-RV64-NEXT: slli a2, a1, 5110888; CHECK-RV64-NEXT: bgez a2, .LBB61_7910889; CHECK-RV64-NEXT: j .LBB61_60110890; CHECK-RV64-NEXT: .LBB61_79: # %else30210891; CHECK-RV64-NEXT: slli a2, a1, 5010892; CHECK-RV64-NEXT: bgez a2, .LBB61_8010893; CHECK-RV64-NEXT: j .LBB61_60210894; CHECK-RV64-NEXT: .LBB61_80: # %else30610895; CHECK-RV64-NEXT: slli a2, a1, 4910896; CHECK-RV64-NEXT: bgez a2, .LBB61_8110897; CHECK-RV64-NEXT: j .LBB61_60310898; CHECK-RV64-NEXT: .LBB61_81: # %else31010899; CHECK-RV64-NEXT: slli a2, a1, 4810900; CHECK-RV64-NEXT: bgez a2, .LBB61_8210901; CHECK-RV64-NEXT: j .LBB61_60410902; CHECK-RV64-NEXT: .LBB61_82: # %else31410903; CHECK-RV64-NEXT: slli a2, a1, 4710904; CHECK-RV64-NEXT: bgez a2, .LBB61_8310905; CHECK-RV64-NEXT: j .LBB61_60510906; CHECK-RV64-NEXT: .LBB61_83: # %else31810907; CHECK-RV64-NEXT: slli a2, a1, 4610908; CHECK-RV64-NEXT: bgez a2, .LBB61_8410909; CHECK-RV64-NEXT: j .LBB61_60610910; CHECK-RV64-NEXT: .LBB61_84: # %else32210911; CHECK-RV64-NEXT: slli a2, a1, 4510912; CHECK-RV64-NEXT: bgez a2, .LBB61_8510913; CHECK-RV64-NEXT: j .LBB61_60710914; CHECK-RV64-NEXT: .LBB61_85: # %else32610915; CHECK-RV64-NEXT: slli a2, a1, 4410916; CHECK-RV64-NEXT: bgez a2, .LBB61_8610917; CHECK-RV64-NEXT: j .LBB61_60810918; CHECK-RV64-NEXT: .LBB61_86: # %else33010919; CHECK-RV64-NEXT: slli a2, a1, 4310920; CHECK-RV64-NEXT: bgez a2, .LBB61_8710921; CHECK-RV64-NEXT: j .LBB61_60910922; CHECK-RV64-NEXT: .LBB61_87: # %else33410923; CHECK-RV64-NEXT: slli a2, a1, 4210924; CHECK-RV64-NEXT: bgez a2, .LBB61_8810925; CHECK-RV64-NEXT: j .LBB61_61010926; CHECK-RV64-NEXT: .LBB61_88: # %else33810927; CHECK-RV64-NEXT: slli a2, a1, 4110928; CHECK-RV64-NEXT: bgez a2, .LBB61_8910929; CHECK-RV64-NEXT: j .LBB61_61110930; CHECK-RV64-NEXT: .LBB61_89: # %else34210931; CHECK-RV64-NEXT: slli a2, a1, 4010932; CHECK-RV64-NEXT: bgez a2, .LBB61_9010933; CHECK-RV64-NEXT: j .LBB61_61210934; CHECK-RV64-NEXT: .LBB61_90: # %else34610935; CHECK-RV64-NEXT: slli a2, a1, 3910936; CHECK-RV64-NEXT: bgez a2, .LBB61_9110937; CHECK-RV64-NEXT: j .LBB61_61310938; CHECK-RV64-NEXT: .LBB61_91: # %else35010939; CHECK-RV64-NEXT: slli a2, a1, 3810940; CHECK-RV64-NEXT: bgez a2, .LBB61_9210941; CHECK-RV64-NEXT: j .LBB61_61410942; CHECK-RV64-NEXT: .LBB61_92: # %else35410943; CHECK-RV64-NEXT: slli a2, a1, 3710944; CHECK-RV64-NEXT: bgez a2, .LBB61_9310945; CHECK-RV64-NEXT: j .LBB61_61510946; CHECK-RV64-NEXT: .LBB61_93: # %else35810947; CHECK-RV64-NEXT: slli a2, a1, 3610948; CHECK-RV64-NEXT: bgez a2, .LBB61_9410949; CHECK-RV64-NEXT: j .LBB61_61610950; CHECK-RV64-NEXT: .LBB61_94: # %else36210951; CHECK-RV64-NEXT: slli a2, a1, 3510952; CHECK-RV64-NEXT: bgez a2, .LBB61_9510953; CHECK-RV64-NEXT: j .LBB61_61710954; CHECK-RV64-NEXT: .LBB61_95: # %else36610955; CHECK-RV64-NEXT: slli a2, a1, 3410956; CHECK-RV64-NEXT: bgez a2, .LBB61_9610957; CHECK-RV64-NEXT: j .LBB61_61810958; CHECK-RV64-NEXT: .LBB61_96: # %else37010959; CHECK-RV64-NEXT: slli a2, a1, 3310960; CHECK-RV64-NEXT: bgez a2, .LBB61_9710961; CHECK-RV64-NEXT: j .LBB61_61910962; CHECK-RV64-NEXT: .LBB61_97: # %else37410963; CHECK-RV64-NEXT: slli a2, a1, 3210964; CHECK-RV64-NEXT: bgez a2, .LBB61_9810965; CHECK-RV64-NEXT: j .LBB61_62010966; CHECK-RV64-NEXT: .LBB61_98: # %else37810967; CHECK-RV64-NEXT: slli a2, a1, 3110968; CHECK-RV64-NEXT: bgez a2, .LBB61_9910969; CHECK-RV64-NEXT: j .LBB61_62110970; CHECK-RV64-NEXT: .LBB61_99: # %else38210971; CHECK-RV64-NEXT: slli a2, a1, 3010972; CHECK-RV64-NEXT: bgez a2, .LBB61_10010973; CHECK-RV64-NEXT: j .LBB61_62210974; CHECK-RV64-NEXT: .LBB61_100: # %else38610975; CHECK-RV64-NEXT: slli a2, a1, 2910976; CHECK-RV64-NEXT: bgez a2, .LBB61_10110977; CHECK-RV64-NEXT: j .LBB61_62310978; CHECK-RV64-NEXT: .LBB61_101: # %else39010979; CHECK-RV64-NEXT: slli a2, a1, 2810980; CHECK-RV64-NEXT: bgez a2, .LBB61_10210981; CHECK-RV64-NEXT: j .LBB61_62410982; CHECK-RV64-NEXT: .LBB61_102: # %else39410983; CHECK-RV64-NEXT: slli a2, a1, 2710984; CHECK-RV64-NEXT: bgez a2, .LBB61_10310985; CHECK-RV64-NEXT: j .LBB61_62510986; CHECK-RV64-NEXT: .LBB61_103: # %else39810987; CHECK-RV64-NEXT: slli a2, a1, 2610988; CHECK-RV64-NEXT: bgez a2, .LBB61_10410989; CHECK-RV64-NEXT: j .LBB61_62610990; CHECK-RV64-NEXT: .LBB61_104: # %else40210991; CHECK-RV64-NEXT: slli a2, a1, 2510992; CHECK-RV64-NEXT: bgez a2, .LBB61_10510993; CHECK-RV64-NEXT: j .LBB61_62710994; CHECK-RV64-NEXT: .LBB61_105: # %else40610995; CHECK-RV64-NEXT: slli a2, a1, 2410996; CHECK-RV64-NEXT: bgez a2, .LBB61_10610997; CHECK-RV64-NEXT: j .LBB61_62810998; CHECK-RV64-NEXT: .LBB61_106: # %else41010999; CHECK-RV64-NEXT: slli a2, a1, 2311000; CHECK-RV64-NEXT: bgez a2, .LBB61_10711001; CHECK-RV64-NEXT: j .LBB61_62911002; CHECK-RV64-NEXT: .LBB61_107: # %else41411003; CHECK-RV64-NEXT: slli a2, a1, 2211004; CHECK-RV64-NEXT: bgez a2, .LBB61_10811005; CHECK-RV64-NEXT: j .LBB61_63011006; CHECK-RV64-NEXT: .LBB61_108: # %else41811007; CHECK-RV64-NEXT: slli a2, a1, 2111008; CHECK-RV64-NEXT: bgez a2, .LBB61_10911009; CHECK-RV64-NEXT: j .LBB61_63111010; CHECK-RV64-NEXT: .LBB61_109: # %else42211011; CHECK-RV64-NEXT: slli a2, a1, 2011012; CHECK-RV64-NEXT: bgez a2, .LBB61_11011013; CHECK-RV64-NEXT: j .LBB61_63211014; CHECK-RV64-NEXT: .LBB61_110: # %else42611015; CHECK-RV64-NEXT: slli a2, a1, 1911016; CHECK-RV64-NEXT: bgez a2, .LBB61_11111017; CHECK-RV64-NEXT: j .LBB61_63311018; CHECK-RV64-NEXT: .LBB61_111: # %else43011019; CHECK-RV64-NEXT: slli a2, a1, 1811020; CHECK-RV64-NEXT: bgez a2, .LBB61_11211021; CHECK-RV64-NEXT: j .LBB61_63411022; CHECK-RV64-NEXT: .LBB61_112: # %else43411023; CHECK-RV64-NEXT: slli a2, a1, 1711024; CHECK-RV64-NEXT: bgez a2, .LBB61_11311025; CHECK-RV64-NEXT: j .LBB61_63511026; CHECK-RV64-NEXT: .LBB61_113: # %else43811027; CHECK-RV64-NEXT: slli a2, a1, 1611028; CHECK-RV64-NEXT: bgez a2, .LBB61_11411029; CHECK-RV64-NEXT: j .LBB61_63611030; CHECK-RV64-NEXT: .LBB61_114: # %else44211031; CHECK-RV64-NEXT: slli a2, a1, 1511032; CHECK-RV64-NEXT: bgez a2, .LBB61_11511033; CHECK-RV64-NEXT: j .LBB61_63711034; CHECK-RV64-NEXT: .LBB61_115: # %else44611035; CHECK-RV64-NEXT: slli a2, a1, 1411036; CHECK-RV64-NEXT: bgez a2, .LBB61_11611037; CHECK-RV64-NEXT: j .LBB61_63811038; CHECK-RV64-NEXT: .LBB61_116: # %else45011039; CHECK-RV64-NEXT: slli a2, a1, 1311040; CHECK-RV64-NEXT: bgez a2, .LBB61_11711041; CHECK-RV64-NEXT: j .LBB61_63911042; CHECK-RV64-NEXT: .LBB61_117: # %else45411043; CHECK-RV64-NEXT: slli a2, a1, 1211044; CHECK-RV64-NEXT: bgez a2, .LBB61_11811045; CHECK-RV64-NEXT: j .LBB61_64011046; CHECK-RV64-NEXT: .LBB61_118: # %else45811047; CHECK-RV64-NEXT: slli a2, a1, 1111048; CHECK-RV64-NEXT: bgez a2, .LBB61_11911049; CHECK-RV64-NEXT: j .LBB61_64111050; CHECK-RV64-NEXT: .LBB61_119: # %else46211051; CHECK-RV64-NEXT: slli a2, a1, 1011052; CHECK-RV64-NEXT: bgez a2, .LBB61_12011053; CHECK-RV64-NEXT: j .LBB61_64211054; CHECK-RV64-NEXT: .LBB61_120: # %else46611055; CHECK-RV64-NEXT: slli a2, a1, 911056; CHECK-RV64-NEXT: bgez a2, .LBB61_12111057; CHECK-RV64-NEXT: j .LBB61_64311058; CHECK-RV64-NEXT: .LBB61_121: # %else47011059; CHECK-RV64-NEXT: slli a2, a1, 811060; CHECK-RV64-NEXT: bgez a2, .LBB61_12211061; CHECK-RV64-NEXT: j .LBB61_64411062; CHECK-RV64-NEXT: .LBB61_122: # %else47411063; CHECK-RV64-NEXT: slli a2, a1, 711064; CHECK-RV64-NEXT: bgez a2, .LBB61_12311065; CHECK-RV64-NEXT: j .LBB61_64511066; CHECK-RV64-NEXT: .LBB61_123: # %else47811067; CHECK-RV64-NEXT: slli a2, a1, 611068; CHECK-RV64-NEXT: bgez a2, .LBB61_12411069; CHECK-RV64-NEXT: j .LBB61_64611070; CHECK-RV64-NEXT: .LBB61_124: # %else48211071; CHECK-RV64-NEXT: slli a2, a1, 511072; CHECK-RV64-NEXT: bgez a2, .LBB61_12511073; CHECK-RV64-NEXT: j .LBB61_64711074; CHECK-RV64-NEXT: .LBB61_125: # %else48611075; CHECK-RV64-NEXT: slli a2, a1, 411076; CHECK-RV64-NEXT: bgez a2, .LBB61_12611077; CHECK-RV64-NEXT: j .LBB61_64811078; CHECK-RV64-NEXT: .LBB61_126: # %else49011079; CHECK-RV64-NEXT: slli a2, a1, 311080; CHECK-RV64-NEXT: bgez a2, .LBB61_12711081; CHECK-RV64-NEXT: j .LBB61_64911082; CHECK-RV64-NEXT: .LBB61_127: # %else49411083; CHECK-RV64-NEXT: slli a2, a1, 211084; CHECK-RV64-NEXT: bgez a2, .LBB61_12911085; CHECK-RV64-NEXT: .LBB61_128: # %cond.load49711086; CHECK-RV64-NEXT: lbu a2, 0(a0)11087; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma11088; CHECK-RV64-NEXT: vmv8r.v v16, v811089; CHECK-RV64-NEXT: vmv.s.x v10, a211090; CHECK-RV64-NEXT: li a2, 12611091; CHECK-RV64-NEXT: li a3, 12511092; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma11093; CHECK-RV64-NEXT: vslideup.vx v8, v10, a311094; CHECK-RV64-NEXT: addi a0, a0, 111095; CHECK-RV64-NEXT: vmv2r.v v16, v811096; CHECK-RV64-NEXT: vmv8r.v v8, v1611097; CHECK-RV64-NEXT: .LBB61_129: # %else49811098; CHECK-RV64-NEXT: slli a2, a1, 111099; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11100; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 211101; CHECK-RV64-NEXT: bgez a2, .LBB61_13111102; CHECK-RV64-NEXT: # %bb.130: # %cond.load50111103; CHECK-RV64-NEXT: lbu a2, 0(a0)11104; CHECK-RV64-NEXT: vmv8r.v v16, v811105; CHECK-RV64-NEXT: vmv.s.x v10, a211106; CHECK-RV64-NEXT: li a2, 12711107; CHECK-RV64-NEXT: li a3, 12611108; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma11109; CHECK-RV64-NEXT: vslideup.vx v8, v10, a311110; CHECK-RV64-NEXT: addi a0, a0, 111111; CHECK-RV64-NEXT: vmv2r.v v16, v811112; CHECK-RV64-NEXT: vmv8r.v v8, v1611113; CHECK-RV64-NEXT: .LBB61_131: # %else50211114; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11115; CHECK-RV64-NEXT: vmv.x.s a2, v2411116; CHECK-RV64-NEXT: bgez a1, .LBB61_13211117; CHECK-RV64-NEXT: j .LBB61_65011118; CHECK-RV64-NEXT: .LBB61_132: # %else50611119; CHECK-RV64-NEXT: andi a1, a2, 111120; CHECK-RV64-NEXT: beqz a1, .LBB61_13311121; CHECK-RV64-NEXT: j .LBB61_65111122; CHECK-RV64-NEXT: .LBB61_133: # %else51011123; CHECK-RV64-NEXT: andi a1, a2, 211124; CHECK-RV64-NEXT: beqz a1, .LBB61_13411125; CHECK-RV64-NEXT: j .LBB61_65211126; CHECK-RV64-NEXT: .LBB61_134: # %else51411127; CHECK-RV64-NEXT: andi a1, a2, 411128; CHECK-RV64-NEXT: beqz a1, .LBB61_13511129; CHECK-RV64-NEXT: j .LBB61_65311130; CHECK-RV64-NEXT: .LBB61_135: # %else51811131; CHECK-RV64-NEXT: andi a1, a2, 811132; CHECK-RV64-NEXT: beqz a1, .LBB61_13611133; CHECK-RV64-NEXT: j .LBB61_65411134; CHECK-RV64-NEXT: .LBB61_136: # %else52211135; CHECK-RV64-NEXT: andi a1, a2, 1611136; CHECK-RV64-NEXT: beqz a1, .LBB61_13711137; CHECK-RV64-NEXT: j .LBB61_65511138; CHECK-RV64-NEXT: .LBB61_137: # %else52611139; CHECK-RV64-NEXT: andi a1, a2, 3211140; CHECK-RV64-NEXT: beqz a1, .LBB61_13811141; CHECK-RV64-NEXT: j .LBB61_65611142; CHECK-RV64-NEXT: .LBB61_138: # %else53011143; CHECK-RV64-NEXT: andi a1, a2, 6411144; CHECK-RV64-NEXT: beqz a1, .LBB61_13911145; CHECK-RV64-NEXT: j .LBB61_65711146; CHECK-RV64-NEXT: .LBB61_139: # %else53411147; CHECK-RV64-NEXT: andi a1, a2, 12811148; CHECK-RV64-NEXT: beqz a1, .LBB61_14011149; CHECK-RV64-NEXT: j .LBB61_65811150; CHECK-RV64-NEXT: .LBB61_140: # %else53811151; CHECK-RV64-NEXT: andi a1, a2, 25611152; CHECK-RV64-NEXT: beqz a1, .LBB61_14111153; CHECK-RV64-NEXT: j .LBB61_65911154; CHECK-RV64-NEXT: .LBB61_141: # %else54211155; CHECK-RV64-NEXT: andi a1, a2, 51211156; CHECK-RV64-NEXT: beqz a1, .LBB61_14211157; CHECK-RV64-NEXT: j .LBB61_66011158; CHECK-RV64-NEXT: .LBB61_142: # %else54611159; CHECK-RV64-NEXT: andi a1, a2, 102411160; CHECK-RV64-NEXT: beqz a1, .LBB61_14311161; CHECK-RV64-NEXT: j .LBB61_66111162; CHECK-RV64-NEXT: .LBB61_143: # %else55011163; CHECK-RV64-NEXT: slli a1, a2, 5211164; CHECK-RV64-NEXT: bgez a1, .LBB61_14411165; CHECK-RV64-NEXT: j .LBB61_66211166; CHECK-RV64-NEXT: .LBB61_144: # %else55411167; CHECK-RV64-NEXT: slli a1, a2, 5111168; CHECK-RV64-NEXT: bgez a1, .LBB61_14511169; CHECK-RV64-NEXT: j .LBB61_66311170; CHECK-RV64-NEXT: .LBB61_145: # %else55811171; CHECK-RV64-NEXT: slli a1, a2, 5011172; CHECK-RV64-NEXT: bgez a1, .LBB61_14611173; CHECK-RV64-NEXT: j .LBB61_66411174; CHECK-RV64-NEXT: .LBB61_146: # %else56211175; CHECK-RV64-NEXT: slli a1, a2, 4911176; CHECK-RV64-NEXT: bgez a1, .LBB61_14711177; CHECK-RV64-NEXT: j .LBB61_66511178; CHECK-RV64-NEXT: .LBB61_147: # %else56611179; CHECK-RV64-NEXT: slli a1, a2, 4811180; CHECK-RV64-NEXT: bgez a1, .LBB61_14811181; CHECK-RV64-NEXT: j .LBB61_66611182; CHECK-RV64-NEXT: .LBB61_148: # %else57011183; CHECK-RV64-NEXT: slli a1, a2, 4711184; CHECK-RV64-NEXT: bgez a1, .LBB61_14911185; CHECK-RV64-NEXT: j .LBB61_66711186; CHECK-RV64-NEXT: .LBB61_149: # %else57411187; CHECK-RV64-NEXT: slli a1, a2, 4611188; CHECK-RV64-NEXT: bgez a1, .LBB61_15011189; CHECK-RV64-NEXT: j .LBB61_66811190; CHECK-RV64-NEXT: .LBB61_150: # %else57811191; CHECK-RV64-NEXT: slli a1, a2, 4511192; CHECK-RV64-NEXT: bgez a1, .LBB61_15111193; CHECK-RV64-NEXT: j .LBB61_66911194; CHECK-RV64-NEXT: .LBB61_151: # %else58211195; CHECK-RV64-NEXT: slli a1, a2, 4411196; CHECK-RV64-NEXT: bgez a1, .LBB61_15211197; CHECK-RV64-NEXT: j .LBB61_67011198; CHECK-RV64-NEXT: .LBB61_152: # %else58611199; CHECK-RV64-NEXT: slli a1, a2, 4311200; CHECK-RV64-NEXT: bgez a1, .LBB61_15311201; CHECK-RV64-NEXT: j .LBB61_67111202; CHECK-RV64-NEXT: .LBB61_153: # %else59011203; CHECK-RV64-NEXT: slli a1, a2, 4211204; CHECK-RV64-NEXT: bgez a1, .LBB61_15411205; CHECK-RV64-NEXT: j .LBB61_67211206; CHECK-RV64-NEXT: .LBB61_154: # %else59411207; CHECK-RV64-NEXT: slli a1, a2, 4111208; CHECK-RV64-NEXT: bgez a1, .LBB61_15511209; CHECK-RV64-NEXT: j .LBB61_67311210; CHECK-RV64-NEXT: .LBB61_155: # %else59811211; CHECK-RV64-NEXT: slli a1, a2, 4011212; CHECK-RV64-NEXT: bgez a1, .LBB61_15611213; CHECK-RV64-NEXT: j .LBB61_67411214; CHECK-RV64-NEXT: .LBB61_156: # %else60211215; CHECK-RV64-NEXT: slli a1, a2, 3911216; CHECK-RV64-NEXT: bgez a1, .LBB61_15711217; CHECK-RV64-NEXT: j .LBB61_67511218; CHECK-RV64-NEXT: .LBB61_157: # %else60611219; CHECK-RV64-NEXT: slli a1, a2, 3811220; CHECK-RV64-NEXT: bgez a1, .LBB61_15811221; CHECK-RV64-NEXT: j .LBB61_67611222; CHECK-RV64-NEXT: .LBB61_158: # %else61011223; CHECK-RV64-NEXT: slli a1, a2, 3711224; CHECK-RV64-NEXT: bgez a1, .LBB61_15911225; CHECK-RV64-NEXT: j .LBB61_67711226; CHECK-RV64-NEXT: .LBB61_159: # %else61411227; CHECK-RV64-NEXT: slli a1, a2, 3611228; CHECK-RV64-NEXT: bgez a1, .LBB61_16011229; CHECK-RV64-NEXT: j .LBB61_67811230; CHECK-RV64-NEXT: .LBB61_160: # %else61811231; CHECK-RV64-NEXT: slli a1, a2, 3511232; CHECK-RV64-NEXT: bgez a1, .LBB61_16111233; CHECK-RV64-NEXT: j .LBB61_67911234; CHECK-RV64-NEXT: .LBB61_161: # %else62211235; CHECK-RV64-NEXT: slli a1, a2, 3411236; CHECK-RV64-NEXT: bgez a1, .LBB61_16211237; CHECK-RV64-NEXT: j .LBB61_68011238; CHECK-RV64-NEXT: .LBB61_162: # %else62611239; CHECK-RV64-NEXT: slli a1, a2, 3311240; CHECK-RV64-NEXT: bgez a1, .LBB61_16311241; CHECK-RV64-NEXT: j .LBB61_68111242; CHECK-RV64-NEXT: .LBB61_163: # %else63011243; CHECK-RV64-NEXT: slli a1, a2, 3211244; CHECK-RV64-NEXT: bgez a1, .LBB61_16411245; CHECK-RV64-NEXT: j .LBB61_68211246; CHECK-RV64-NEXT: .LBB61_164: # %else63411247; CHECK-RV64-NEXT: slli a1, a2, 3111248; CHECK-RV64-NEXT: bgez a1, .LBB61_16511249; CHECK-RV64-NEXT: j .LBB61_68311250; CHECK-RV64-NEXT: .LBB61_165: # %else63811251; CHECK-RV64-NEXT: slli a1, a2, 3011252; CHECK-RV64-NEXT: bgez a1, .LBB61_16611253; CHECK-RV64-NEXT: j .LBB61_68411254; CHECK-RV64-NEXT: .LBB61_166: # %else64211255; CHECK-RV64-NEXT: slli a1, a2, 2911256; CHECK-RV64-NEXT: bgez a1, .LBB61_16711257; CHECK-RV64-NEXT: j .LBB61_68511258; CHECK-RV64-NEXT: .LBB61_167: # %else64611259; CHECK-RV64-NEXT: slli a1, a2, 2811260; CHECK-RV64-NEXT: bgez a1, .LBB61_16811261; CHECK-RV64-NEXT: j .LBB61_68611262; CHECK-RV64-NEXT: .LBB61_168: # %else65011263; CHECK-RV64-NEXT: slli a1, a2, 2711264; CHECK-RV64-NEXT: bgez a1, .LBB61_16911265; CHECK-RV64-NEXT: j .LBB61_68711266; CHECK-RV64-NEXT: .LBB61_169: # %else65411267; CHECK-RV64-NEXT: slli a1, a2, 2611268; CHECK-RV64-NEXT: bgez a1, .LBB61_17011269; CHECK-RV64-NEXT: j .LBB61_68811270; CHECK-RV64-NEXT: .LBB61_170: # %else65811271; CHECK-RV64-NEXT: slli a1, a2, 2511272; CHECK-RV64-NEXT: bgez a1, .LBB61_17111273; CHECK-RV64-NEXT: j .LBB61_68911274; CHECK-RV64-NEXT: .LBB61_171: # %else66211275; CHECK-RV64-NEXT: slli a1, a2, 2411276; CHECK-RV64-NEXT: bgez a1, .LBB61_17211277; CHECK-RV64-NEXT: j .LBB61_69011278; CHECK-RV64-NEXT: .LBB61_172: # %else66611279; CHECK-RV64-NEXT: slli a1, a2, 2311280; CHECK-RV64-NEXT: bgez a1, .LBB61_17311281; CHECK-RV64-NEXT: j .LBB61_69111282; CHECK-RV64-NEXT: .LBB61_173: # %else67011283; CHECK-RV64-NEXT: slli a1, a2, 2211284; CHECK-RV64-NEXT: bgez a1, .LBB61_17411285; CHECK-RV64-NEXT: j .LBB61_69211286; CHECK-RV64-NEXT: .LBB61_174: # %else67411287; CHECK-RV64-NEXT: slli a1, a2, 2111288; CHECK-RV64-NEXT: bgez a1, .LBB61_17511289; CHECK-RV64-NEXT: j .LBB61_69311290; CHECK-RV64-NEXT: .LBB61_175: # %else67811291; CHECK-RV64-NEXT: slli a1, a2, 2011292; CHECK-RV64-NEXT: bgez a1, .LBB61_17611293; CHECK-RV64-NEXT: j .LBB61_69411294; CHECK-RV64-NEXT: .LBB61_176: # %else68211295; CHECK-RV64-NEXT: slli a1, a2, 1911296; CHECK-RV64-NEXT: bgez a1, .LBB61_17711297; CHECK-RV64-NEXT: j .LBB61_69511298; CHECK-RV64-NEXT: .LBB61_177: # %else68611299; CHECK-RV64-NEXT: slli a1, a2, 1811300; CHECK-RV64-NEXT: bgez a1, .LBB61_17811301; CHECK-RV64-NEXT: j .LBB61_69611302; CHECK-RV64-NEXT: .LBB61_178: # %else69011303; CHECK-RV64-NEXT: slli a1, a2, 1711304; CHECK-RV64-NEXT: bgez a1, .LBB61_17911305; CHECK-RV64-NEXT: j .LBB61_69711306; CHECK-RV64-NEXT: .LBB61_179: # %else69411307; CHECK-RV64-NEXT: slli a1, a2, 1611308; CHECK-RV64-NEXT: bgez a1, .LBB61_18011309; CHECK-RV64-NEXT: j .LBB61_69811310; CHECK-RV64-NEXT: .LBB61_180: # %else69811311; CHECK-RV64-NEXT: slli a1, a2, 1511312; CHECK-RV64-NEXT: bgez a1, .LBB61_18111313; CHECK-RV64-NEXT: j .LBB61_69911314; CHECK-RV64-NEXT: .LBB61_181: # %else70211315; CHECK-RV64-NEXT: slli a1, a2, 1411316; CHECK-RV64-NEXT: bgez a1, .LBB61_18211317; CHECK-RV64-NEXT: j .LBB61_70011318; CHECK-RV64-NEXT: .LBB61_182: # %else70611319; CHECK-RV64-NEXT: slli a1, a2, 1311320; CHECK-RV64-NEXT: bgez a1, .LBB61_18311321; CHECK-RV64-NEXT: j .LBB61_70111322; CHECK-RV64-NEXT: .LBB61_183: # %else71011323; CHECK-RV64-NEXT: slli a1, a2, 1211324; CHECK-RV64-NEXT: bgez a1, .LBB61_18411325; CHECK-RV64-NEXT: j .LBB61_70211326; CHECK-RV64-NEXT: .LBB61_184: # %else71411327; CHECK-RV64-NEXT: slli a1, a2, 1111328; CHECK-RV64-NEXT: bgez a1, .LBB61_18511329; CHECK-RV64-NEXT: j .LBB61_70311330; CHECK-RV64-NEXT: .LBB61_185: # %else71811331; CHECK-RV64-NEXT: slli a1, a2, 1011332; CHECK-RV64-NEXT: bgez a1, .LBB61_18611333; CHECK-RV64-NEXT: j .LBB61_70411334; CHECK-RV64-NEXT: .LBB61_186: # %else72211335; CHECK-RV64-NEXT: slli a1, a2, 911336; CHECK-RV64-NEXT: bgez a1, .LBB61_18711337; CHECK-RV64-NEXT: j .LBB61_70511338; CHECK-RV64-NEXT: .LBB61_187: # %else72611339; CHECK-RV64-NEXT: slli a1, a2, 811340; CHECK-RV64-NEXT: bgez a1, .LBB61_18811341; CHECK-RV64-NEXT: j .LBB61_70611342; CHECK-RV64-NEXT: .LBB61_188: # %else73011343; CHECK-RV64-NEXT: slli a1, a2, 711344; CHECK-RV64-NEXT: bgez a1, .LBB61_18911345; CHECK-RV64-NEXT: j .LBB61_70711346; CHECK-RV64-NEXT: .LBB61_189: # %else73411347; CHECK-RV64-NEXT: slli a1, a2, 611348; CHECK-RV64-NEXT: bgez a1, .LBB61_19011349; CHECK-RV64-NEXT: j .LBB61_70811350; CHECK-RV64-NEXT: .LBB61_190: # %else73811351; CHECK-RV64-NEXT: slli a1, a2, 511352; CHECK-RV64-NEXT: bgez a1, .LBB61_19111353; CHECK-RV64-NEXT: j .LBB61_70911354; CHECK-RV64-NEXT: .LBB61_191: # %else74211355; CHECK-RV64-NEXT: slli a1, a2, 411356; CHECK-RV64-NEXT: bgez a1, .LBB61_19211357; CHECK-RV64-NEXT: j .LBB61_71011358; CHECK-RV64-NEXT: .LBB61_192: # %else74611359; CHECK-RV64-NEXT: slli a1, a2, 311360; CHECK-RV64-NEXT: bgez a1, .LBB61_19311361; CHECK-RV64-NEXT: j .LBB61_71111362; CHECK-RV64-NEXT: .LBB61_193: # %else75011363; CHECK-RV64-NEXT: slli a1, a2, 211364; CHECK-RV64-NEXT: bgez a1, .LBB61_19511365; CHECK-RV64-NEXT: .LBB61_194: # %cond.load75311366; CHECK-RV64-NEXT: lbu a1, 0(a0)11367; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma11368; CHECK-RV64-NEXT: vmv8r.v v16, v811369; CHECK-RV64-NEXT: vmv.s.x v12, a111370; CHECK-RV64-NEXT: li a1, 19011371; CHECK-RV64-NEXT: li a3, 18911372; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma11373; CHECK-RV64-NEXT: vslideup.vx v8, v12, a311374; CHECK-RV64-NEXT: addi a0, a0, 111375; CHECK-RV64-NEXT: vmv4r.v v16, v811376; CHECK-RV64-NEXT: vmv8r.v v8, v1611377; CHECK-RV64-NEXT: .LBB61_195: # %else75411378; CHECK-RV64-NEXT: slli a1, a2, 111379; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11380; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 311381; CHECK-RV64-NEXT: bgez a1, .LBB61_19711382; CHECK-RV64-NEXT: # %bb.196: # %cond.load75711383; CHECK-RV64-NEXT: lbu a1, 0(a0)11384; CHECK-RV64-NEXT: vmv8r.v v16, v811385; CHECK-RV64-NEXT: vmv.s.x v12, a111386; CHECK-RV64-NEXT: li a1, 19111387; CHECK-RV64-NEXT: li a3, 19011388; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma11389; CHECK-RV64-NEXT: vslideup.vx v8, v12, a311390; CHECK-RV64-NEXT: addi a0, a0, 111391; CHECK-RV64-NEXT: vmv4r.v v16, v811392; CHECK-RV64-NEXT: vmv8r.v v8, v1611393; CHECK-RV64-NEXT: .LBB61_197: # %else75811394; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11395; CHECK-RV64-NEXT: vmv.x.s a1, v2411396; CHECK-RV64-NEXT: bgez a2, .LBB61_19811397; CHECK-RV64-NEXT: j .LBB61_71211398; CHECK-RV64-NEXT: .LBB61_198: # %else76211399; CHECK-RV64-NEXT: andi a2, a1, 111400; CHECK-RV64-NEXT: beqz a2, .LBB61_19911401; CHECK-RV64-NEXT: j .LBB61_71311402; CHECK-RV64-NEXT: .LBB61_199: # %else76611403; CHECK-RV64-NEXT: andi a2, a1, 211404; CHECK-RV64-NEXT: beqz a2, .LBB61_20011405; CHECK-RV64-NEXT: j .LBB61_71411406; CHECK-RV64-NEXT: .LBB61_200: # %else77011407; CHECK-RV64-NEXT: andi a2, a1, 411408; CHECK-RV64-NEXT: beqz a2, .LBB61_20111409; CHECK-RV64-NEXT: j .LBB61_71511410; CHECK-RV64-NEXT: .LBB61_201: # %else77411411; CHECK-RV64-NEXT: andi a2, a1, 811412; CHECK-RV64-NEXT: beqz a2, .LBB61_20211413; CHECK-RV64-NEXT: j .LBB61_71611414; CHECK-RV64-NEXT: .LBB61_202: # %else77811415; CHECK-RV64-NEXT: andi a2, a1, 1611416; CHECK-RV64-NEXT: beqz a2, .LBB61_20311417; CHECK-RV64-NEXT: j .LBB61_71711418; CHECK-RV64-NEXT: .LBB61_203: # %else78211419; CHECK-RV64-NEXT: andi a2, a1, 3211420; CHECK-RV64-NEXT: beqz a2, .LBB61_20411421; CHECK-RV64-NEXT: j .LBB61_71811422; CHECK-RV64-NEXT: .LBB61_204: # %else78611423; CHECK-RV64-NEXT: andi a2, a1, 6411424; CHECK-RV64-NEXT: beqz a2, .LBB61_20511425; CHECK-RV64-NEXT: j .LBB61_71911426; CHECK-RV64-NEXT: .LBB61_205: # %else79011427; CHECK-RV64-NEXT: andi a2, a1, 12811428; CHECK-RV64-NEXT: beqz a2, .LBB61_20611429; CHECK-RV64-NEXT: j .LBB61_72011430; CHECK-RV64-NEXT: .LBB61_206: # %else79411431; CHECK-RV64-NEXT: andi a2, a1, 25611432; CHECK-RV64-NEXT: beqz a2, .LBB61_20711433; CHECK-RV64-NEXT: j .LBB61_72111434; CHECK-RV64-NEXT: .LBB61_207: # %else79811435; CHECK-RV64-NEXT: andi a2, a1, 51211436; CHECK-RV64-NEXT: beqz a2, .LBB61_20811437; CHECK-RV64-NEXT: j .LBB61_72211438; CHECK-RV64-NEXT: .LBB61_208: # %else80211439; CHECK-RV64-NEXT: andi a2, a1, 102411440; CHECK-RV64-NEXT: beqz a2, .LBB61_20911441; CHECK-RV64-NEXT: j .LBB61_72311442; CHECK-RV64-NEXT: .LBB61_209: # %else80611443; CHECK-RV64-NEXT: slli a2, a1, 5211444; CHECK-RV64-NEXT: bgez a2, .LBB61_21011445; CHECK-RV64-NEXT: j .LBB61_72411446; CHECK-RV64-NEXT: .LBB61_210: # %else81011447; CHECK-RV64-NEXT: slli a2, a1, 5111448; CHECK-RV64-NEXT: bgez a2, .LBB61_21111449; CHECK-RV64-NEXT: j .LBB61_72511450; CHECK-RV64-NEXT: .LBB61_211: # %else81411451; CHECK-RV64-NEXT: slli a2, a1, 5011452; CHECK-RV64-NEXT: bgez a2, .LBB61_21211453; CHECK-RV64-NEXT: j .LBB61_72611454; CHECK-RV64-NEXT: .LBB61_212: # %else81811455; CHECK-RV64-NEXT: slli a2, a1, 4911456; CHECK-RV64-NEXT: bgez a2, .LBB61_21311457; CHECK-RV64-NEXT: j .LBB61_72711458; CHECK-RV64-NEXT: .LBB61_213: # %else82211459; CHECK-RV64-NEXT: slli a2, a1, 4811460; CHECK-RV64-NEXT: bgez a2, .LBB61_21411461; CHECK-RV64-NEXT: j .LBB61_72811462; CHECK-RV64-NEXT: .LBB61_214: # %else82611463; CHECK-RV64-NEXT: slli a2, a1, 4711464; CHECK-RV64-NEXT: bgez a2, .LBB61_21511465; CHECK-RV64-NEXT: j .LBB61_72911466; CHECK-RV64-NEXT: .LBB61_215: # %else83011467; CHECK-RV64-NEXT: slli a2, a1, 4611468; CHECK-RV64-NEXT: bgez a2, .LBB61_21611469; CHECK-RV64-NEXT: j .LBB61_73011470; CHECK-RV64-NEXT: .LBB61_216: # %else83411471; CHECK-RV64-NEXT: slli a2, a1, 4511472; CHECK-RV64-NEXT: bgez a2, .LBB61_21711473; CHECK-RV64-NEXT: j .LBB61_73111474; CHECK-RV64-NEXT: .LBB61_217: # %else83811475; CHECK-RV64-NEXT: slli a2, a1, 4411476; CHECK-RV64-NEXT: bgez a2, .LBB61_21811477; CHECK-RV64-NEXT: j .LBB61_73211478; CHECK-RV64-NEXT: .LBB61_218: # %else84211479; CHECK-RV64-NEXT: slli a2, a1, 4311480; CHECK-RV64-NEXT: bgez a2, .LBB61_21911481; CHECK-RV64-NEXT: j .LBB61_73311482; CHECK-RV64-NEXT: .LBB61_219: # %else84611483; CHECK-RV64-NEXT: slli a2, a1, 4211484; CHECK-RV64-NEXT: bgez a2, .LBB61_22011485; CHECK-RV64-NEXT: j .LBB61_73411486; CHECK-RV64-NEXT: .LBB61_220: # %else85011487; CHECK-RV64-NEXT: slli a2, a1, 4111488; CHECK-RV64-NEXT: bgez a2, .LBB61_22111489; CHECK-RV64-NEXT: j .LBB61_73511490; CHECK-RV64-NEXT: .LBB61_221: # %else85411491; CHECK-RV64-NEXT: slli a2, a1, 4011492; CHECK-RV64-NEXT: bgez a2, .LBB61_22211493; CHECK-RV64-NEXT: j .LBB61_73611494; CHECK-RV64-NEXT: .LBB61_222: # %else85811495; CHECK-RV64-NEXT: slli a2, a1, 3911496; CHECK-RV64-NEXT: bgez a2, .LBB61_22311497; CHECK-RV64-NEXT: j .LBB61_73711498; CHECK-RV64-NEXT: .LBB61_223: # %else86211499; CHECK-RV64-NEXT: slli a2, a1, 3811500; CHECK-RV64-NEXT: bgez a2, .LBB61_22411501; CHECK-RV64-NEXT: j .LBB61_73811502; CHECK-RV64-NEXT: .LBB61_224: # %else86611503; CHECK-RV64-NEXT: slli a2, a1, 3711504; CHECK-RV64-NEXT: bgez a2, .LBB61_22511505; CHECK-RV64-NEXT: j .LBB61_73911506; CHECK-RV64-NEXT: .LBB61_225: # %else87011507; CHECK-RV64-NEXT: slli a2, a1, 3611508; CHECK-RV64-NEXT: bgez a2, .LBB61_22611509; CHECK-RV64-NEXT: j .LBB61_74011510; CHECK-RV64-NEXT: .LBB61_226: # %else87411511; CHECK-RV64-NEXT: slli a2, a1, 3511512; CHECK-RV64-NEXT: bgez a2, .LBB61_22711513; CHECK-RV64-NEXT: j .LBB61_74111514; CHECK-RV64-NEXT: .LBB61_227: # %else87811515; CHECK-RV64-NEXT: slli a2, a1, 3411516; CHECK-RV64-NEXT: bgez a2, .LBB61_22811517; CHECK-RV64-NEXT: j .LBB61_74211518; CHECK-RV64-NEXT: .LBB61_228: # %else88211519; CHECK-RV64-NEXT: slli a2, a1, 3311520; CHECK-RV64-NEXT: bgez a2, .LBB61_22911521; CHECK-RV64-NEXT: j .LBB61_74311522; CHECK-RV64-NEXT: .LBB61_229: # %else88611523; CHECK-RV64-NEXT: slli a2, a1, 3211524; CHECK-RV64-NEXT: bgez a2, .LBB61_23011525; CHECK-RV64-NEXT: j .LBB61_74411526; CHECK-RV64-NEXT: .LBB61_230: # %else89011527; CHECK-RV64-NEXT: slli a2, a1, 3111528; CHECK-RV64-NEXT: bgez a2, .LBB61_23111529; CHECK-RV64-NEXT: j .LBB61_74511530; CHECK-RV64-NEXT: .LBB61_231: # %else89411531; CHECK-RV64-NEXT: slli a2, a1, 3011532; CHECK-RV64-NEXT: bgez a2, .LBB61_23211533; CHECK-RV64-NEXT: j .LBB61_74611534; CHECK-RV64-NEXT: .LBB61_232: # %else89811535; CHECK-RV64-NEXT: slli a2, a1, 2911536; CHECK-RV64-NEXT: bgez a2, .LBB61_23311537; CHECK-RV64-NEXT: j .LBB61_74711538; CHECK-RV64-NEXT: .LBB61_233: # %else90211539; CHECK-RV64-NEXT: slli a2, a1, 2811540; CHECK-RV64-NEXT: bgez a2, .LBB61_23411541; CHECK-RV64-NEXT: j .LBB61_74811542; CHECK-RV64-NEXT: .LBB61_234: # %else90611543; CHECK-RV64-NEXT: slli a2, a1, 2711544; CHECK-RV64-NEXT: bgez a2, .LBB61_23511545; CHECK-RV64-NEXT: j .LBB61_74911546; CHECK-RV64-NEXT: .LBB61_235: # %else91011547; CHECK-RV64-NEXT: slli a2, a1, 2611548; CHECK-RV64-NEXT: bgez a2, .LBB61_23611549; CHECK-RV64-NEXT: j .LBB61_75011550; CHECK-RV64-NEXT: .LBB61_236: # %else91411551; CHECK-RV64-NEXT: slli a2, a1, 2511552; CHECK-RV64-NEXT: bgez a2, .LBB61_23711553; CHECK-RV64-NEXT: j .LBB61_75111554; CHECK-RV64-NEXT: .LBB61_237: # %else91811555; CHECK-RV64-NEXT: slli a2, a1, 2411556; CHECK-RV64-NEXT: bgez a2, .LBB61_23811557; CHECK-RV64-NEXT: j .LBB61_75211558; CHECK-RV64-NEXT: .LBB61_238: # %else92211559; CHECK-RV64-NEXT: slli a2, a1, 2311560; CHECK-RV64-NEXT: bgez a2, .LBB61_23911561; CHECK-RV64-NEXT: j .LBB61_75311562; CHECK-RV64-NEXT: .LBB61_239: # %else92611563; CHECK-RV64-NEXT: slli a2, a1, 2211564; CHECK-RV64-NEXT: bgez a2, .LBB61_24011565; CHECK-RV64-NEXT: j .LBB61_75411566; CHECK-RV64-NEXT: .LBB61_240: # %else93011567; CHECK-RV64-NEXT: slli a2, a1, 2111568; CHECK-RV64-NEXT: bgez a2, .LBB61_24111569; CHECK-RV64-NEXT: j .LBB61_75511570; CHECK-RV64-NEXT: .LBB61_241: # %else93411571; CHECK-RV64-NEXT: slli a2, a1, 2011572; CHECK-RV64-NEXT: bgez a2, .LBB61_24211573; CHECK-RV64-NEXT: j .LBB61_75611574; CHECK-RV64-NEXT: .LBB61_242: # %else93811575; CHECK-RV64-NEXT: slli a2, a1, 1911576; CHECK-RV64-NEXT: bgez a2, .LBB61_24311577; CHECK-RV64-NEXT: j .LBB61_75711578; CHECK-RV64-NEXT: .LBB61_243: # %else94211579; CHECK-RV64-NEXT: slli a2, a1, 1811580; CHECK-RV64-NEXT: bgez a2, .LBB61_24411581; CHECK-RV64-NEXT: j .LBB61_75811582; CHECK-RV64-NEXT: .LBB61_244: # %else94611583; CHECK-RV64-NEXT: slli a2, a1, 1711584; CHECK-RV64-NEXT: bgez a2, .LBB61_24511585; CHECK-RV64-NEXT: j .LBB61_75911586; CHECK-RV64-NEXT: .LBB61_245: # %else95011587; CHECK-RV64-NEXT: slli a2, a1, 1611588; CHECK-RV64-NEXT: bgez a2, .LBB61_24611589; CHECK-RV64-NEXT: j .LBB61_76011590; CHECK-RV64-NEXT: .LBB61_246: # %else95411591; CHECK-RV64-NEXT: slli a2, a1, 1511592; CHECK-RV64-NEXT: bgez a2, .LBB61_24711593; CHECK-RV64-NEXT: j .LBB61_76111594; CHECK-RV64-NEXT: .LBB61_247: # %else95811595; CHECK-RV64-NEXT: slli a2, a1, 1411596; CHECK-RV64-NEXT: bgez a2, .LBB61_24811597; CHECK-RV64-NEXT: j .LBB61_76211598; CHECK-RV64-NEXT: .LBB61_248: # %else96211599; CHECK-RV64-NEXT: slli a2, a1, 1311600; CHECK-RV64-NEXT: bgez a2, .LBB61_24911601; CHECK-RV64-NEXT: j .LBB61_76311602; CHECK-RV64-NEXT: .LBB61_249: # %else96611603; CHECK-RV64-NEXT: slli a2, a1, 1211604; CHECK-RV64-NEXT: bgez a2, .LBB61_25011605; CHECK-RV64-NEXT: j .LBB61_76411606; CHECK-RV64-NEXT: .LBB61_250: # %else97011607; CHECK-RV64-NEXT: slli a2, a1, 1111608; CHECK-RV64-NEXT: bgez a2, .LBB61_25111609; CHECK-RV64-NEXT: j .LBB61_76511610; CHECK-RV64-NEXT: .LBB61_251: # %else97411611; CHECK-RV64-NEXT: slli a2, a1, 1011612; CHECK-RV64-NEXT: bgez a2, .LBB61_25211613; CHECK-RV64-NEXT: j .LBB61_76611614; CHECK-RV64-NEXT: .LBB61_252: # %else97811615; CHECK-RV64-NEXT: slli a2, a1, 911616; CHECK-RV64-NEXT: bgez a2, .LBB61_25311617; CHECK-RV64-NEXT: j .LBB61_76711618; CHECK-RV64-NEXT: .LBB61_253: # %else98211619; CHECK-RV64-NEXT: slli a2, a1, 811620; CHECK-RV64-NEXT: bgez a2, .LBB61_25411621; CHECK-RV64-NEXT: j .LBB61_76811622; CHECK-RV64-NEXT: .LBB61_254: # %else98611623; CHECK-RV64-NEXT: slli a2, a1, 711624; CHECK-RV64-NEXT: bgez a2, .LBB61_25511625; CHECK-RV64-NEXT: j .LBB61_76911626; CHECK-RV64-NEXT: .LBB61_255: # %else99011627; CHECK-RV64-NEXT: slli a2, a1, 611628; CHECK-RV64-NEXT: bgez a2, .LBB61_25611629; CHECK-RV64-NEXT: j .LBB61_77011630; CHECK-RV64-NEXT: .LBB61_256: # %else99411631; CHECK-RV64-NEXT: slli a2, a1, 511632; CHECK-RV64-NEXT: bgez a2, .LBB61_25711633; CHECK-RV64-NEXT: j .LBB61_77111634; CHECK-RV64-NEXT: .LBB61_257: # %else99811635; CHECK-RV64-NEXT: slli a2, a1, 411636; CHECK-RV64-NEXT: bgez a2, .LBB61_25811637; CHECK-RV64-NEXT: j .LBB61_77211638; CHECK-RV64-NEXT: .LBB61_258: # %else100211639; CHECK-RV64-NEXT: slli a2, a1, 311640; CHECK-RV64-NEXT: bgez a2, .LBB61_25911641; CHECK-RV64-NEXT: j .LBB61_77311642; CHECK-RV64-NEXT: .LBB61_259: # %else100611643; CHECK-RV64-NEXT: slli a2, a1, 211644; CHECK-RV64-NEXT: bgez a2, .LBB61_26111645; CHECK-RV64-NEXT: .LBB61_260: # %cond.load100911646; CHECK-RV64-NEXT: lbu a2, 0(a0)11647; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma11648; CHECK-RV64-NEXT: vmv8r.v v16, v811649; CHECK-RV64-NEXT: vmv.s.x v12, a211650; CHECK-RV64-NEXT: li a2, 25411651; CHECK-RV64-NEXT: li a3, 25311652; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma11653; CHECK-RV64-NEXT: vslideup.vx v8, v12, a311654; CHECK-RV64-NEXT: addi a0, a0, 111655; CHECK-RV64-NEXT: vmv4r.v v16, v811656; CHECK-RV64-NEXT: vmv8r.v v8, v1611657; CHECK-RV64-NEXT: .LBB61_261: # %else101011658; CHECK-RV64-NEXT: slli a2, a1, 111659; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11660; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 411661; CHECK-RV64-NEXT: bgez a2, .LBB61_26311662; CHECK-RV64-NEXT: # %bb.262: # %cond.load101311663; CHECK-RV64-NEXT: lbu a2, 0(a0)11664; CHECK-RV64-NEXT: vmv8r.v v16, v811665; CHECK-RV64-NEXT: vmv.s.x v12, a211666; CHECK-RV64-NEXT: li a2, 25511667; CHECK-RV64-NEXT: li a3, 25411668; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma11669; CHECK-RV64-NEXT: vslideup.vx v8, v12, a311670; CHECK-RV64-NEXT: addi a0, a0, 111671; CHECK-RV64-NEXT: vmv4r.v v16, v811672; CHECK-RV64-NEXT: vmv8r.v v8, v1611673; CHECK-RV64-NEXT: .LBB61_263: # %else101411674; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11675; CHECK-RV64-NEXT: vmv.x.s a2, v2411676; CHECK-RV64-NEXT: bgez a1, .LBB61_26411677; CHECK-RV64-NEXT: j .LBB61_77411678; CHECK-RV64-NEXT: .LBB61_264: # %else101811679; CHECK-RV64-NEXT: andi a1, a2, 111680; CHECK-RV64-NEXT: beqz a1, .LBB61_26511681; CHECK-RV64-NEXT: j .LBB61_77511682; CHECK-RV64-NEXT: .LBB61_265: # %else102211683; CHECK-RV64-NEXT: andi a1, a2, 211684; CHECK-RV64-NEXT: beqz a1, .LBB61_26611685; CHECK-RV64-NEXT: j .LBB61_77611686; CHECK-RV64-NEXT: .LBB61_266: # %else102611687; CHECK-RV64-NEXT: andi a1, a2, 411688; CHECK-RV64-NEXT: beqz a1, .LBB61_26711689; CHECK-RV64-NEXT: j .LBB61_77711690; CHECK-RV64-NEXT: .LBB61_267: # %else103011691; CHECK-RV64-NEXT: andi a1, a2, 811692; CHECK-RV64-NEXT: beqz a1, .LBB61_26811693; CHECK-RV64-NEXT: j .LBB61_77811694; CHECK-RV64-NEXT: .LBB61_268: # %else103411695; CHECK-RV64-NEXT: andi a1, a2, 1611696; CHECK-RV64-NEXT: beqz a1, .LBB61_26911697; CHECK-RV64-NEXT: j .LBB61_77911698; CHECK-RV64-NEXT: .LBB61_269: # %else103811699; CHECK-RV64-NEXT: andi a1, a2, 3211700; CHECK-RV64-NEXT: beqz a1, .LBB61_27011701; CHECK-RV64-NEXT: j .LBB61_78011702; CHECK-RV64-NEXT: .LBB61_270: # %else104211703; CHECK-RV64-NEXT: andi a1, a2, 6411704; CHECK-RV64-NEXT: beqz a1, .LBB61_27111705; CHECK-RV64-NEXT: j .LBB61_78111706; CHECK-RV64-NEXT: .LBB61_271: # %else104611707; CHECK-RV64-NEXT: andi a1, a2, 12811708; CHECK-RV64-NEXT: beqz a1, .LBB61_27211709; CHECK-RV64-NEXT: j .LBB61_78211710; CHECK-RV64-NEXT: .LBB61_272: # %else105011711; CHECK-RV64-NEXT: andi a1, a2, 25611712; CHECK-RV64-NEXT: beqz a1, .LBB61_27311713; CHECK-RV64-NEXT: j .LBB61_78311714; CHECK-RV64-NEXT: .LBB61_273: # %else105411715; CHECK-RV64-NEXT: andi a1, a2, 51211716; CHECK-RV64-NEXT: beqz a1, .LBB61_27411717; CHECK-RV64-NEXT: j .LBB61_78411718; CHECK-RV64-NEXT: .LBB61_274: # %else105811719; CHECK-RV64-NEXT: andi a1, a2, 102411720; CHECK-RV64-NEXT: beqz a1, .LBB61_27511721; CHECK-RV64-NEXT: j .LBB61_78511722; CHECK-RV64-NEXT: .LBB61_275: # %else106211723; CHECK-RV64-NEXT: slli a1, a2, 5211724; CHECK-RV64-NEXT: bgez a1, .LBB61_27611725; CHECK-RV64-NEXT: j .LBB61_78611726; CHECK-RV64-NEXT: .LBB61_276: # %else106611727; CHECK-RV64-NEXT: slli a1, a2, 5111728; CHECK-RV64-NEXT: bgez a1, .LBB61_27711729; CHECK-RV64-NEXT: j .LBB61_78711730; CHECK-RV64-NEXT: .LBB61_277: # %else107011731; CHECK-RV64-NEXT: slli a1, a2, 5011732; CHECK-RV64-NEXT: bgez a1, .LBB61_27811733; CHECK-RV64-NEXT: j .LBB61_78811734; CHECK-RV64-NEXT: .LBB61_278: # %else107411735; CHECK-RV64-NEXT: slli a1, a2, 4911736; CHECK-RV64-NEXT: bgez a1, .LBB61_27911737; CHECK-RV64-NEXT: j .LBB61_78911738; CHECK-RV64-NEXT: .LBB61_279: # %else107811739; CHECK-RV64-NEXT: slli a1, a2, 4811740; CHECK-RV64-NEXT: bgez a1, .LBB61_28011741; CHECK-RV64-NEXT: j .LBB61_79011742; CHECK-RV64-NEXT: .LBB61_280: # %else108211743; CHECK-RV64-NEXT: slli a1, a2, 4711744; CHECK-RV64-NEXT: bgez a1, .LBB61_28111745; CHECK-RV64-NEXT: j .LBB61_79111746; CHECK-RV64-NEXT: .LBB61_281: # %else108611747; CHECK-RV64-NEXT: slli a1, a2, 4611748; CHECK-RV64-NEXT: bgez a1, .LBB61_28211749; CHECK-RV64-NEXT: j .LBB61_79211750; CHECK-RV64-NEXT: .LBB61_282: # %else109011751; CHECK-RV64-NEXT: slli a1, a2, 4511752; CHECK-RV64-NEXT: bgez a1, .LBB61_28311753; CHECK-RV64-NEXT: j .LBB61_79311754; CHECK-RV64-NEXT: .LBB61_283: # %else109411755; CHECK-RV64-NEXT: slli a1, a2, 4411756; CHECK-RV64-NEXT: bgez a1, .LBB61_28411757; CHECK-RV64-NEXT: j .LBB61_79411758; CHECK-RV64-NEXT: .LBB61_284: # %else109811759; CHECK-RV64-NEXT: slli a1, a2, 4311760; CHECK-RV64-NEXT: bgez a1, .LBB61_28511761; CHECK-RV64-NEXT: j .LBB61_79511762; CHECK-RV64-NEXT: .LBB61_285: # %else110211763; CHECK-RV64-NEXT: slli a1, a2, 4211764; CHECK-RV64-NEXT: bgez a1, .LBB61_28611765; CHECK-RV64-NEXT: j .LBB61_79611766; CHECK-RV64-NEXT: .LBB61_286: # %else110611767; CHECK-RV64-NEXT: slli a1, a2, 4111768; CHECK-RV64-NEXT: bgez a1, .LBB61_28711769; CHECK-RV64-NEXT: j .LBB61_79711770; CHECK-RV64-NEXT: .LBB61_287: # %else111011771; CHECK-RV64-NEXT: slli a1, a2, 4011772; CHECK-RV64-NEXT: bgez a1, .LBB61_28811773; CHECK-RV64-NEXT: j .LBB61_79811774; CHECK-RV64-NEXT: .LBB61_288: # %else111411775; CHECK-RV64-NEXT: slli a1, a2, 3911776; CHECK-RV64-NEXT: bgez a1, .LBB61_28911777; CHECK-RV64-NEXT: j .LBB61_79911778; CHECK-RV64-NEXT: .LBB61_289: # %else111811779; CHECK-RV64-NEXT: slli a1, a2, 3811780; CHECK-RV64-NEXT: bgez a1, .LBB61_29011781; CHECK-RV64-NEXT: j .LBB61_80011782; CHECK-RV64-NEXT: .LBB61_290: # %else112211783; CHECK-RV64-NEXT: slli a1, a2, 3711784; CHECK-RV64-NEXT: bgez a1, .LBB61_29111785; CHECK-RV64-NEXT: j .LBB61_80111786; CHECK-RV64-NEXT: .LBB61_291: # %else112611787; CHECK-RV64-NEXT: slli a1, a2, 3611788; CHECK-RV64-NEXT: bgez a1, .LBB61_29211789; CHECK-RV64-NEXT: j .LBB61_80211790; CHECK-RV64-NEXT: .LBB61_292: # %else113011791; CHECK-RV64-NEXT: slli a1, a2, 3511792; CHECK-RV64-NEXT: bgez a1, .LBB61_29311793; CHECK-RV64-NEXT: j .LBB61_80311794; CHECK-RV64-NEXT: .LBB61_293: # %else113411795; CHECK-RV64-NEXT: slli a1, a2, 3411796; CHECK-RV64-NEXT: bgez a1, .LBB61_29411797; CHECK-RV64-NEXT: j .LBB61_80411798; CHECK-RV64-NEXT: .LBB61_294: # %else113811799; CHECK-RV64-NEXT: slli a1, a2, 3311800; CHECK-RV64-NEXT: bgez a1, .LBB61_29511801; CHECK-RV64-NEXT: j .LBB61_80511802; CHECK-RV64-NEXT: .LBB61_295: # %else114211803; CHECK-RV64-NEXT: slli a1, a2, 3211804; CHECK-RV64-NEXT: bgez a1, .LBB61_29611805; CHECK-RV64-NEXT: j .LBB61_80611806; CHECK-RV64-NEXT: .LBB61_296: # %else114611807; CHECK-RV64-NEXT: slli a1, a2, 3111808; CHECK-RV64-NEXT: bgez a1, .LBB61_29711809; CHECK-RV64-NEXT: j .LBB61_80711810; CHECK-RV64-NEXT: .LBB61_297: # %else115011811; CHECK-RV64-NEXT: slli a1, a2, 3011812; CHECK-RV64-NEXT: bgez a1, .LBB61_29811813; CHECK-RV64-NEXT: j .LBB61_80811814; CHECK-RV64-NEXT: .LBB61_298: # %else115411815; CHECK-RV64-NEXT: slli a1, a2, 2911816; CHECK-RV64-NEXT: bgez a1, .LBB61_29911817; CHECK-RV64-NEXT: j .LBB61_80911818; CHECK-RV64-NEXT: .LBB61_299: # %else115811819; CHECK-RV64-NEXT: slli a1, a2, 2811820; CHECK-RV64-NEXT: bgez a1, .LBB61_30011821; CHECK-RV64-NEXT: j .LBB61_81011822; CHECK-RV64-NEXT: .LBB61_300: # %else116211823; CHECK-RV64-NEXT: slli a1, a2, 2711824; CHECK-RV64-NEXT: bgez a1, .LBB61_30111825; CHECK-RV64-NEXT: j .LBB61_81111826; CHECK-RV64-NEXT: .LBB61_301: # %else116611827; CHECK-RV64-NEXT: slli a1, a2, 2611828; CHECK-RV64-NEXT: bgez a1, .LBB61_30211829; CHECK-RV64-NEXT: j .LBB61_81211830; CHECK-RV64-NEXT: .LBB61_302: # %else117011831; CHECK-RV64-NEXT: slli a1, a2, 2511832; CHECK-RV64-NEXT: bgez a1, .LBB61_30311833; CHECK-RV64-NEXT: j .LBB61_81311834; CHECK-RV64-NEXT: .LBB61_303: # %else117411835; CHECK-RV64-NEXT: slli a1, a2, 2411836; CHECK-RV64-NEXT: bgez a1, .LBB61_30411837; CHECK-RV64-NEXT: j .LBB61_81411838; CHECK-RV64-NEXT: .LBB61_304: # %else117811839; CHECK-RV64-NEXT: slli a1, a2, 2311840; CHECK-RV64-NEXT: bgez a1, .LBB61_30511841; CHECK-RV64-NEXT: j .LBB61_81511842; CHECK-RV64-NEXT: .LBB61_305: # %else118211843; CHECK-RV64-NEXT: slli a1, a2, 2211844; CHECK-RV64-NEXT: bgez a1, .LBB61_30611845; CHECK-RV64-NEXT: j .LBB61_81611846; CHECK-RV64-NEXT: .LBB61_306: # %else118611847; CHECK-RV64-NEXT: slli a1, a2, 2111848; CHECK-RV64-NEXT: bgez a1, .LBB61_30711849; CHECK-RV64-NEXT: j .LBB61_81711850; CHECK-RV64-NEXT: .LBB61_307: # %else119011851; CHECK-RV64-NEXT: slli a1, a2, 2011852; CHECK-RV64-NEXT: bgez a1, .LBB61_30811853; CHECK-RV64-NEXT: j .LBB61_81811854; CHECK-RV64-NEXT: .LBB61_308: # %else119411855; CHECK-RV64-NEXT: slli a1, a2, 1911856; CHECK-RV64-NEXT: bgez a1, .LBB61_30911857; CHECK-RV64-NEXT: j .LBB61_81911858; CHECK-RV64-NEXT: .LBB61_309: # %else119811859; CHECK-RV64-NEXT: slli a1, a2, 1811860; CHECK-RV64-NEXT: bgez a1, .LBB61_31011861; CHECK-RV64-NEXT: j .LBB61_82011862; CHECK-RV64-NEXT: .LBB61_310: # %else120211863; CHECK-RV64-NEXT: slli a1, a2, 1711864; CHECK-RV64-NEXT: bgez a1, .LBB61_31111865; CHECK-RV64-NEXT: j .LBB61_82111866; CHECK-RV64-NEXT: .LBB61_311: # %else120611867; CHECK-RV64-NEXT: slli a1, a2, 1611868; CHECK-RV64-NEXT: bgez a1, .LBB61_31211869; CHECK-RV64-NEXT: j .LBB61_82211870; CHECK-RV64-NEXT: .LBB61_312: # %else121011871; CHECK-RV64-NEXT: slli a1, a2, 1511872; CHECK-RV64-NEXT: bgez a1, .LBB61_31311873; CHECK-RV64-NEXT: j .LBB61_82311874; CHECK-RV64-NEXT: .LBB61_313: # %else121411875; CHECK-RV64-NEXT: slli a1, a2, 1411876; CHECK-RV64-NEXT: bgez a1, .LBB61_31411877; CHECK-RV64-NEXT: j .LBB61_82411878; CHECK-RV64-NEXT: .LBB61_314: # %else121811879; CHECK-RV64-NEXT: slli a1, a2, 1311880; CHECK-RV64-NEXT: bgez a1, .LBB61_31511881; CHECK-RV64-NEXT: j .LBB61_82511882; CHECK-RV64-NEXT: .LBB61_315: # %else122211883; CHECK-RV64-NEXT: slli a1, a2, 1211884; CHECK-RV64-NEXT: bgez a1, .LBB61_31611885; CHECK-RV64-NEXT: j .LBB61_82611886; CHECK-RV64-NEXT: .LBB61_316: # %else122611887; CHECK-RV64-NEXT: slli a1, a2, 1111888; CHECK-RV64-NEXT: bgez a1, .LBB61_31711889; CHECK-RV64-NEXT: j .LBB61_82711890; CHECK-RV64-NEXT: .LBB61_317: # %else123011891; CHECK-RV64-NEXT: slli a1, a2, 1011892; CHECK-RV64-NEXT: bgez a1, .LBB61_31811893; CHECK-RV64-NEXT: j .LBB61_82811894; CHECK-RV64-NEXT: .LBB61_318: # %else123411895; CHECK-RV64-NEXT: slli a1, a2, 911896; CHECK-RV64-NEXT: bgez a1, .LBB61_31911897; CHECK-RV64-NEXT: j .LBB61_82911898; CHECK-RV64-NEXT: .LBB61_319: # %else123811899; CHECK-RV64-NEXT: slli a1, a2, 811900; CHECK-RV64-NEXT: bgez a1, .LBB61_32011901; CHECK-RV64-NEXT: j .LBB61_83011902; CHECK-RV64-NEXT: .LBB61_320: # %else124211903; CHECK-RV64-NEXT: slli a1, a2, 711904; CHECK-RV64-NEXT: bgez a1, .LBB61_32111905; CHECK-RV64-NEXT: j .LBB61_83111906; CHECK-RV64-NEXT: .LBB61_321: # %else124611907; CHECK-RV64-NEXT: slli a1, a2, 611908; CHECK-RV64-NEXT: bgez a1, .LBB61_32211909; CHECK-RV64-NEXT: j .LBB61_83211910; CHECK-RV64-NEXT: .LBB61_322: # %else125011911; CHECK-RV64-NEXT: slli a1, a2, 511912; CHECK-RV64-NEXT: bgez a1, .LBB61_32311913; CHECK-RV64-NEXT: j .LBB61_83311914; CHECK-RV64-NEXT: .LBB61_323: # %else125411915; CHECK-RV64-NEXT: slli a1, a2, 411916; CHECK-RV64-NEXT: bgez a1, .LBB61_32411917; CHECK-RV64-NEXT: j .LBB61_83411918; CHECK-RV64-NEXT: .LBB61_324: # %else125811919; CHECK-RV64-NEXT: slli a1, a2, 311920; CHECK-RV64-NEXT: bgez a1, .LBB61_32511921; CHECK-RV64-NEXT: j .LBB61_83511922; CHECK-RV64-NEXT: .LBB61_325: # %else126211923; CHECK-RV64-NEXT: slli a1, a2, 211924; CHECK-RV64-NEXT: bgez a1, .LBB61_32711925; CHECK-RV64-NEXT: .LBB61_326: # %cond.load126511926; CHECK-RV64-NEXT: lbu a1, 0(a0)11927; CHECK-RV64-NEXT: li a3, 51211928; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma11929; CHECK-RV64-NEXT: vmv.s.x v16, a111930; CHECK-RV64-NEXT: li a1, 31811931; CHECK-RV64-NEXT: li a3, 31711932; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma11933; CHECK-RV64-NEXT: vslideup.vx v8, v16, a311934; CHECK-RV64-NEXT: addi a0, a0, 111935; CHECK-RV64-NEXT: .LBB61_327: # %else126611936; CHECK-RV64-NEXT: slli a1, a2, 111937; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11938; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 511939; CHECK-RV64-NEXT: bgez a1, .LBB61_32911940; CHECK-RV64-NEXT: # %bb.328: # %cond.load126911941; CHECK-RV64-NEXT: lbu a1, 0(a0)11942; CHECK-RV64-NEXT: vmv.s.x v16, a111943; CHECK-RV64-NEXT: li a1, 31911944; CHECK-RV64-NEXT: li a3, 31811945; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma11946; CHECK-RV64-NEXT: vslideup.vx v8, v16, a311947; CHECK-RV64-NEXT: addi a0, a0, 111948; CHECK-RV64-NEXT: .LBB61_329: # %else127011949; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma11950; CHECK-RV64-NEXT: vmv.x.s a1, v2411951; CHECK-RV64-NEXT: bgez a2, .LBB61_33011952; CHECK-RV64-NEXT: j .LBB61_83611953; CHECK-RV64-NEXT: .LBB61_330: # %else127411954; CHECK-RV64-NEXT: andi a2, a1, 111955; CHECK-RV64-NEXT: beqz a2, .LBB61_33111956; CHECK-RV64-NEXT: j .LBB61_83711957; CHECK-RV64-NEXT: .LBB61_331: # %else127811958; CHECK-RV64-NEXT: andi a2, a1, 211959; CHECK-RV64-NEXT: beqz a2, .LBB61_33211960; CHECK-RV64-NEXT: j .LBB61_83811961; CHECK-RV64-NEXT: .LBB61_332: # %else128211962; CHECK-RV64-NEXT: andi a2, a1, 411963; CHECK-RV64-NEXT: beqz a2, .LBB61_33311964; CHECK-RV64-NEXT: j .LBB61_83911965; CHECK-RV64-NEXT: .LBB61_333: # %else128611966; CHECK-RV64-NEXT: andi a2, a1, 811967; CHECK-RV64-NEXT: beqz a2, .LBB61_33411968; CHECK-RV64-NEXT: j .LBB61_84011969; CHECK-RV64-NEXT: .LBB61_334: # %else129011970; CHECK-RV64-NEXT: andi a2, a1, 1611971; CHECK-RV64-NEXT: beqz a2, .LBB61_33511972; CHECK-RV64-NEXT: j .LBB61_84111973; CHECK-RV64-NEXT: .LBB61_335: # %else129411974; CHECK-RV64-NEXT: andi a2, a1, 3211975; CHECK-RV64-NEXT: beqz a2, .LBB61_33611976; CHECK-RV64-NEXT: j .LBB61_84211977; CHECK-RV64-NEXT: .LBB61_336: # %else129811978; CHECK-RV64-NEXT: andi a2, a1, 6411979; CHECK-RV64-NEXT: beqz a2, .LBB61_33711980; CHECK-RV64-NEXT: j .LBB61_84311981; CHECK-RV64-NEXT: .LBB61_337: # %else130211982; CHECK-RV64-NEXT: andi a2, a1, 12811983; CHECK-RV64-NEXT: beqz a2, .LBB61_33811984; CHECK-RV64-NEXT: j .LBB61_84411985; CHECK-RV64-NEXT: .LBB61_338: # %else130611986; CHECK-RV64-NEXT: andi a2, a1, 25611987; CHECK-RV64-NEXT: beqz a2, .LBB61_33911988; CHECK-RV64-NEXT: j .LBB61_84511989; CHECK-RV64-NEXT: .LBB61_339: # %else131011990; CHECK-RV64-NEXT: andi a2, a1, 51211991; CHECK-RV64-NEXT: beqz a2, .LBB61_34011992; CHECK-RV64-NEXT: j .LBB61_84611993; CHECK-RV64-NEXT: .LBB61_340: # %else131411994; CHECK-RV64-NEXT: andi a2, a1, 102411995; CHECK-RV64-NEXT: beqz a2, .LBB61_34111996; CHECK-RV64-NEXT: j .LBB61_84711997; CHECK-RV64-NEXT: .LBB61_341: # %else131811998; CHECK-RV64-NEXT: slli a2, a1, 5211999; CHECK-RV64-NEXT: bgez a2, .LBB61_34212000; CHECK-RV64-NEXT: j .LBB61_84812001; CHECK-RV64-NEXT: .LBB61_342: # %else132212002; CHECK-RV64-NEXT: slli a2, a1, 5112003; CHECK-RV64-NEXT: bgez a2, .LBB61_34312004; CHECK-RV64-NEXT: j .LBB61_84912005; CHECK-RV64-NEXT: .LBB61_343: # %else132612006; CHECK-RV64-NEXT: slli a2, a1, 5012007; CHECK-RV64-NEXT: bgez a2, .LBB61_34412008; CHECK-RV64-NEXT: j .LBB61_85012009; CHECK-RV64-NEXT: .LBB61_344: # %else133012010; CHECK-RV64-NEXT: slli a2, a1, 4912011; CHECK-RV64-NEXT: bgez a2, .LBB61_34512012; CHECK-RV64-NEXT: j .LBB61_85112013; CHECK-RV64-NEXT: .LBB61_345: # %else133412014; CHECK-RV64-NEXT: slli a2, a1, 4812015; CHECK-RV64-NEXT: bgez a2, .LBB61_34612016; CHECK-RV64-NEXT: j .LBB61_85212017; CHECK-RV64-NEXT: .LBB61_346: # %else133812018; CHECK-RV64-NEXT: slli a2, a1, 4712019; CHECK-RV64-NEXT: bgez a2, .LBB61_34712020; CHECK-RV64-NEXT: j .LBB61_85312021; CHECK-RV64-NEXT: .LBB61_347: # %else134212022; CHECK-RV64-NEXT: slli a2, a1, 4612023; CHECK-RV64-NEXT: bgez a2, .LBB61_34812024; CHECK-RV64-NEXT: j .LBB61_85412025; CHECK-RV64-NEXT: .LBB61_348: # %else134612026; CHECK-RV64-NEXT: slli a2, a1, 4512027; CHECK-RV64-NEXT: bgez a2, .LBB61_34912028; CHECK-RV64-NEXT: j .LBB61_85512029; CHECK-RV64-NEXT: .LBB61_349: # %else135012030; CHECK-RV64-NEXT: slli a2, a1, 4412031; CHECK-RV64-NEXT: bgez a2, .LBB61_35012032; CHECK-RV64-NEXT: j .LBB61_85612033; CHECK-RV64-NEXT: .LBB61_350: # %else135412034; CHECK-RV64-NEXT: slli a2, a1, 4312035; CHECK-RV64-NEXT: bgez a2, .LBB61_35112036; CHECK-RV64-NEXT: j .LBB61_85712037; CHECK-RV64-NEXT: .LBB61_351: # %else135812038; CHECK-RV64-NEXT: slli a2, a1, 4212039; CHECK-RV64-NEXT: bgez a2, .LBB61_35212040; CHECK-RV64-NEXT: j .LBB61_85812041; CHECK-RV64-NEXT: .LBB61_352: # %else136212042; CHECK-RV64-NEXT: slli a2, a1, 4112043; CHECK-RV64-NEXT: bgez a2, .LBB61_35312044; CHECK-RV64-NEXT: j .LBB61_85912045; CHECK-RV64-NEXT: .LBB61_353: # %else136612046; CHECK-RV64-NEXT: slli a2, a1, 4012047; CHECK-RV64-NEXT: bgez a2, .LBB61_35412048; CHECK-RV64-NEXT: j .LBB61_86012049; CHECK-RV64-NEXT: .LBB61_354: # %else137012050; CHECK-RV64-NEXT: slli a2, a1, 3912051; CHECK-RV64-NEXT: bgez a2, .LBB61_35512052; CHECK-RV64-NEXT: j .LBB61_86112053; CHECK-RV64-NEXT: .LBB61_355: # %else137412054; CHECK-RV64-NEXT: slli a2, a1, 3812055; CHECK-RV64-NEXT: bgez a2, .LBB61_35612056; CHECK-RV64-NEXT: j .LBB61_86212057; CHECK-RV64-NEXT: .LBB61_356: # %else137812058; CHECK-RV64-NEXT: slli a2, a1, 3712059; CHECK-RV64-NEXT: bgez a2, .LBB61_35712060; CHECK-RV64-NEXT: j .LBB61_86312061; CHECK-RV64-NEXT: .LBB61_357: # %else138212062; CHECK-RV64-NEXT: slli a2, a1, 3612063; CHECK-RV64-NEXT: bgez a2, .LBB61_35812064; CHECK-RV64-NEXT: j .LBB61_86412065; CHECK-RV64-NEXT: .LBB61_358: # %else138612066; CHECK-RV64-NEXT: slli a2, a1, 3512067; CHECK-RV64-NEXT: bgez a2, .LBB61_35912068; CHECK-RV64-NEXT: j .LBB61_86512069; CHECK-RV64-NEXT: .LBB61_359: # %else139012070; CHECK-RV64-NEXT: slli a2, a1, 3412071; CHECK-RV64-NEXT: bgez a2, .LBB61_36012072; CHECK-RV64-NEXT: j .LBB61_86612073; CHECK-RV64-NEXT: .LBB61_360: # %else139412074; CHECK-RV64-NEXT: slli a2, a1, 3312075; CHECK-RV64-NEXT: bgez a2, .LBB61_36112076; CHECK-RV64-NEXT: j .LBB61_86712077; CHECK-RV64-NEXT: .LBB61_361: # %else139812078; CHECK-RV64-NEXT: slli a2, a1, 3212079; CHECK-RV64-NEXT: bgez a2, .LBB61_36212080; CHECK-RV64-NEXT: j .LBB61_86812081; CHECK-RV64-NEXT: .LBB61_362: # %else140212082; CHECK-RV64-NEXT: slli a2, a1, 3112083; CHECK-RV64-NEXT: bgez a2, .LBB61_36312084; CHECK-RV64-NEXT: j .LBB61_86912085; CHECK-RV64-NEXT: .LBB61_363: # %else140612086; CHECK-RV64-NEXT: slli a2, a1, 3012087; CHECK-RV64-NEXT: bgez a2, .LBB61_36412088; CHECK-RV64-NEXT: j .LBB61_87012089; CHECK-RV64-NEXT: .LBB61_364: # %else141012090; CHECK-RV64-NEXT: slli a2, a1, 2912091; CHECK-RV64-NEXT: bgez a2, .LBB61_36512092; CHECK-RV64-NEXT: j .LBB61_87112093; CHECK-RV64-NEXT: .LBB61_365: # %else141412094; CHECK-RV64-NEXT: slli a2, a1, 2812095; CHECK-RV64-NEXT: bgez a2, .LBB61_36612096; CHECK-RV64-NEXT: j .LBB61_87212097; CHECK-RV64-NEXT: .LBB61_366: # %else141812098; CHECK-RV64-NEXT: slli a2, a1, 2712099; CHECK-RV64-NEXT: bgez a2, .LBB61_36712100; CHECK-RV64-NEXT: j .LBB61_87312101; CHECK-RV64-NEXT: .LBB61_367: # %else142212102; CHECK-RV64-NEXT: slli a2, a1, 2612103; CHECK-RV64-NEXT: bgez a2, .LBB61_36812104; CHECK-RV64-NEXT: j .LBB61_87412105; CHECK-RV64-NEXT: .LBB61_368: # %else142612106; CHECK-RV64-NEXT: slli a2, a1, 2512107; CHECK-RV64-NEXT: bgez a2, .LBB61_36912108; CHECK-RV64-NEXT: j .LBB61_87512109; CHECK-RV64-NEXT: .LBB61_369: # %else143012110; CHECK-RV64-NEXT: slli a2, a1, 2412111; CHECK-RV64-NEXT: bgez a2, .LBB61_37012112; CHECK-RV64-NEXT: j .LBB61_87612113; CHECK-RV64-NEXT: .LBB61_370: # %else143412114; CHECK-RV64-NEXT: slli a2, a1, 2312115; CHECK-RV64-NEXT: bgez a2, .LBB61_37112116; CHECK-RV64-NEXT: j .LBB61_87712117; CHECK-RV64-NEXT: .LBB61_371: # %else143812118; CHECK-RV64-NEXT: slli a2, a1, 2212119; CHECK-RV64-NEXT: bgez a2, .LBB61_37212120; CHECK-RV64-NEXT: j .LBB61_87812121; CHECK-RV64-NEXT: .LBB61_372: # %else144212122; CHECK-RV64-NEXT: slli a2, a1, 2112123; CHECK-RV64-NEXT: bgez a2, .LBB61_37312124; CHECK-RV64-NEXT: j .LBB61_87912125; CHECK-RV64-NEXT: .LBB61_373: # %else144612126; CHECK-RV64-NEXT: slli a2, a1, 2012127; CHECK-RV64-NEXT: bgez a2, .LBB61_37412128; CHECK-RV64-NEXT: j .LBB61_88012129; CHECK-RV64-NEXT: .LBB61_374: # %else145012130; CHECK-RV64-NEXT: slli a2, a1, 1912131; CHECK-RV64-NEXT: bgez a2, .LBB61_37512132; CHECK-RV64-NEXT: j .LBB61_88112133; CHECK-RV64-NEXT: .LBB61_375: # %else145412134; CHECK-RV64-NEXT: slli a2, a1, 1812135; CHECK-RV64-NEXT: bgez a2, .LBB61_37612136; CHECK-RV64-NEXT: j .LBB61_88212137; CHECK-RV64-NEXT: .LBB61_376: # %else145812138; CHECK-RV64-NEXT: slli a2, a1, 1712139; CHECK-RV64-NEXT: bgez a2, .LBB61_37712140; CHECK-RV64-NEXT: j .LBB61_88312141; CHECK-RV64-NEXT: .LBB61_377: # %else146212142; CHECK-RV64-NEXT: slli a2, a1, 1612143; CHECK-RV64-NEXT: bgez a2, .LBB61_37812144; CHECK-RV64-NEXT: j .LBB61_88412145; CHECK-RV64-NEXT: .LBB61_378: # %else146612146; CHECK-RV64-NEXT: slli a2, a1, 1512147; CHECK-RV64-NEXT: bgez a2, .LBB61_37912148; CHECK-RV64-NEXT: j .LBB61_88512149; CHECK-RV64-NEXT: .LBB61_379: # %else147012150; CHECK-RV64-NEXT: slli a2, a1, 1412151; CHECK-RV64-NEXT: bgez a2, .LBB61_38012152; CHECK-RV64-NEXT: j .LBB61_88612153; CHECK-RV64-NEXT: .LBB61_380: # %else147412154; CHECK-RV64-NEXT: slli a2, a1, 1312155; CHECK-RV64-NEXT: bgez a2, .LBB61_38112156; CHECK-RV64-NEXT: j .LBB61_88712157; CHECK-RV64-NEXT: .LBB61_381: # %else147812158; CHECK-RV64-NEXT: slli a2, a1, 1212159; CHECK-RV64-NEXT: bgez a2, .LBB61_38212160; CHECK-RV64-NEXT: j .LBB61_88812161; CHECK-RV64-NEXT: .LBB61_382: # %else148212162; CHECK-RV64-NEXT: slli a2, a1, 1112163; CHECK-RV64-NEXT: bgez a2, .LBB61_38312164; CHECK-RV64-NEXT: j .LBB61_88912165; CHECK-RV64-NEXT: .LBB61_383: # %else148612166; CHECK-RV64-NEXT: slli a2, a1, 1012167; CHECK-RV64-NEXT: bgez a2, .LBB61_38412168; CHECK-RV64-NEXT: j .LBB61_89012169; CHECK-RV64-NEXT: .LBB61_384: # %else149012170; CHECK-RV64-NEXT: slli a2, a1, 912171; CHECK-RV64-NEXT: bgez a2, .LBB61_38512172; CHECK-RV64-NEXT: j .LBB61_89112173; CHECK-RV64-NEXT: .LBB61_385: # %else149412174; CHECK-RV64-NEXT: slli a2, a1, 812175; CHECK-RV64-NEXT: bgez a2, .LBB61_38612176; CHECK-RV64-NEXT: j .LBB61_89212177; CHECK-RV64-NEXT: .LBB61_386: # %else149812178; CHECK-RV64-NEXT: slli a2, a1, 712179; CHECK-RV64-NEXT: bgez a2, .LBB61_38712180; CHECK-RV64-NEXT: j .LBB61_89312181; CHECK-RV64-NEXT: .LBB61_387: # %else150212182; CHECK-RV64-NEXT: slli a2, a1, 612183; CHECK-RV64-NEXT: bgez a2, .LBB61_38812184; CHECK-RV64-NEXT: j .LBB61_89412185; CHECK-RV64-NEXT: .LBB61_388: # %else150612186; CHECK-RV64-NEXT: slli a2, a1, 512187; CHECK-RV64-NEXT: bgez a2, .LBB61_38912188; CHECK-RV64-NEXT: j .LBB61_89512189; CHECK-RV64-NEXT: .LBB61_389: # %else151012190; CHECK-RV64-NEXT: slli a2, a1, 412191; CHECK-RV64-NEXT: bgez a2, .LBB61_39012192; CHECK-RV64-NEXT: j .LBB61_89612193; CHECK-RV64-NEXT: .LBB61_390: # %else151412194; CHECK-RV64-NEXT: slli a2, a1, 312195; CHECK-RV64-NEXT: bgez a2, .LBB61_39112196; CHECK-RV64-NEXT: j .LBB61_89712197; CHECK-RV64-NEXT: .LBB61_391: # %else151812198; CHECK-RV64-NEXT: slli a2, a1, 212199; CHECK-RV64-NEXT: bgez a2, .LBB61_39312200; CHECK-RV64-NEXT: .LBB61_392: # %cond.load152112201; CHECK-RV64-NEXT: lbu a2, 0(a0)12202; CHECK-RV64-NEXT: li a3, 51212203; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma12204; CHECK-RV64-NEXT: vmv.s.x v16, a212205; CHECK-RV64-NEXT: li a2, 38212206; CHECK-RV64-NEXT: li a3, 38112207; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma12208; CHECK-RV64-NEXT: vslideup.vx v8, v16, a312209; CHECK-RV64-NEXT: addi a0, a0, 112210; CHECK-RV64-NEXT: .LBB61_393: # %else152212211; CHECK-RV64-NEXT: slli a2, a1, 112212; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma12213; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 612214; CHECK-RV64-NEXT: bgez a2, .LBB61_39512215; CHECK-RV64-NEXT: # %bb.394: # %cond.load152512216; CHECK-RV64-NEXT: lbu a2, 0(a0)12217; CHECK-RV64-NEXT: vmv.s.x v16, a212218; CHECK-RV64-NEXT: li a2, 38312219; CHECK-RV64-NEXT: li a3, 38212220; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma12221; CHECK-RV64-NEXT: vslideup.vx v8, v16, a312222; CHECK-RV64-NEXT: addi a0, a0, 112223; CHECK-RV64-NEXT: .LBB61_395: # %else152612224; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma12225; CHECK-RV64-NEXT: vmv.x.s a2, v2412226; CHECK-RV64-NEXT: bgez a1, .LBB61_39612227; CHECK-RV64-NEXT: j .LBB61_89812228; CHECK-RV64-NEXT: .LBB61_396: # %else153012229; CHECK-RV64-NEXT: andi a1, a2, 112230; CHECK-RV64-NEXT: beqz a1, .LBB61_39712231; CHECK-RV64-NEXT: j .LBB61_89912232; CHECK-RV64-NEXT: .LBB61_397: # %else153412233; CHECK-RV64-NEXT: andi a1, a2, 212234; CHECK-RV64-NEXT: beqz a1, .LBB61_39812235; CHECK-RV64-NEXT: j .LBB61_90012236; CHECK-RV64-NEXT: .LBB61_398: # %else153812237; CHECK-RV64-NEXT: andi a1, a2, 412238; CHECK-RV64-NEXT: beqz a1, .LBB61_39912239; CHECK-RV64-NEXT: j .LBB61_90112240; CHECK-RV64-NEXT: .LBB61_399: # %else154212241; CHECK-RV64-NEXT: andi a1, a2, 812242; CHECK-RV64-NEXT: beqz a1, .LBB61_40012243; CHECK-RV64-NEXT: j .LBB61_90212244; CHECK-RV64-NEXT: .LBB61_400: # %else154612245; CHECK-RV64-NEXT: andi a1, a2, 1612246; CHECK-RV64-NEXT: beqz a1, .LBB61_40112247; CHECK-RV64-NEXT: j .LBB61_90312248; CHECK-RV64-NEXT: .LBB61_401: # %else155012249; CHECK-RV64-NEXT: andi a1, a2, 3212250; CHECK-RV64-NEXT: beqz a1, .LBB61_40212251; CHECK-RV64-NEXT: j .LBB61_90412252; CHECK-RV64-NEXT: .LBB61_402: # %else155412253; CHECK-RV64-NEXT: andi a1, a2, 6412254; CHECK-RV64-NEXT: beqz a1, .LBB61_40312255; CHECK-RV64-NEXT: j .LBB61_90512256; CHECK-RV64-NEXT: .LBB61_403: # %else155812257; CHECK-RV64-NEXT: andi a1, a2, 12812258; CHECK-RV64-NEXT: beqz a1, .LBB61_40412259; CHECK-RV64-NEXT: j .LBB61_90612260; CHECK-RV64-NEXT: .LBB61_404: # %else156212261; CHECK-RV64-NEXT: andi a1, a2, 25612262; CHECK-RV64-NEXT: beqz a1, .LBB61_40512263; CHECK-RV64-NEXT: j .LBB61_90712264; CHECK-RV64-NEXT: .LBB61_405: # %else156612265; CHECK-RV64-NEXT: andi a1, a2, 51212266; CHECK-RV64-NEXT: beqz a1, .LBB61_40612267; CHECK-RV64-NEXT: j .LBB61_90812268; CHECK-RV64-NEXT: .LBB61_406: # %else157012269; CHECK-RV64-NEXT: andi a1, a2, 102412270; CHECK-RV64-NEXT: beqz a1, .LBB61_40712271; CHECK-RV64-NEXT: j .LBB61_90912272; CHECK-RV64-NEXT: .LBB61_407: # %else157412273; CHECK-RV64-NEXT: slli a1, a2, 5212274; CHECK-RV64-NEXT: bgez a1, .LBB61_40812275; CHECK-RV64-NEXT: j .LBB61_91012276; CHECK-RV64-NEXT: .LBB61_408: # %else157812277; CHECK-RV64-NEXT: slli a1, a2, 5112278; CHECK-RV64-NEXT: bgez a1, .LBB61_40912279; CHECK-RV64-NEXT: j .LBB61_91112280; CHECK-RV64-NEXT: .LBB61_409: # %else158212281; CHECK-RV64-NEXT: slli a1, a2, 5012282; CHECK-RV64-NEXT: bgez a1, .LBB61_41012283; CHECK-RV64-NEXT: j .LBB61_91212284; CHECK-RV64-NEXT: .LBB61_410: # %else158612285; CHECK-RV64-NEXT: slli a1, a2, 4912286; CHECK-RV64-NEXT: bgez a1, .LBB61_41112287; CHECK-RV64-NEXT: j .LBB61_91312288; CHECK-RV64-NEXT: .LBB61_411: # %else159012289; CHECK-RV64-NEXT: slli a1, a2, 4812290; CHECK-RV64-NEXT: bgez a1, .LBB61_41212291; CHECK-RV64-NEXT: j .LBB61_91412292; CHECK-RV64-NEXT: .LBB61_412: # %else159412293; CHECK-RV64-NEXT: slli a1, a2, 4712294; CHECK-RV64-NEXT: bgez a1, .LBB61_41312295; CHECK-RV64-NEXT: j .LBB61_91512296; CHECK-RV64-NEXT: .LBB61_413: # %else159812297; CHECK-RV64-NEXT: slli a1, a2, 4612298; CHECK-RV64-NEXT: bgez a1, .LBB61_41412299; CHECK-RV64-NEXT: j .LBB61_91612300; CHECK-RV64-NEXT: .LBB61_414: # %else160212301; CHECK-RV64-NEXT: slli a1, a2, 4512302; CHECK-RV64-NEXT: bgez a1, .LBB61_41512303; CHECK-RV64-NEXT: j .LBB61_91712304; CHECK-RV64-NEXT: .LBB61_415: # %else160612305; CHECK-RV64-NEXT: slli a1, a2, 4412306; CHECK-RV64-NEXT: bgez a1, .LBB61_41612307; CHECK-RV64-NEXT: j .LBB61_91812308; CHECK-RV64-NEXT: .LBB61_416: # %else161012309; CHECK-RV64-NEXT: slli a1, a2, 4312310; CHECK-RV64-NEXT: bgez a1, .LBB61_41712311; CHECK-RV64-NEXT: j .LBB61_91912312; CHECK-RV64-NEXT: .LBB61_417: # %else161412313; CHECK-RV64-NEXT: slli a1, a2, 4212314; CHECK-RV64-NEXT: bgez a1, .LBB61_41812315; CHECK-RV64-NEXT: j .LBB61_92012316; CHECK-RV64-NEXT: .LBB61_418: # %else161812317; CHECK-RV64-NEXT: slli a1, a2, 4112318; CHECK-RV64-NEXT: bgez a1, .LBB61_41912319; CHECK-RV64-NEXT: j .LBB61_92112320; CHECK-RV64-NEXT: .LBB61_419: # %else162212321; CHECK-RV64-NEXT: slli a1, a2, 4012322; CHECK-RV64-NEXT: bgez a1, .LBB61_42012323; CHECK-RV64-NEXT: j .LBB61_92212324; CHECK-RV64-NEXT: .LBB61_420: # %else162612325; CHECK-RV64-NEXT: slli a1, a2, 3912326; CHECK-RV64-NEXT: bgez a1, .LBB61_42112327; CHECK-RV64-NEXT: j .LBB61_92312328; CHECK-RV64-NEXT: .LBB61_421: # %else163012329; CHECK-RV64-NEXT: slli a1, a2, 3812330; CHECK-RV64-NEXT: bgez a1, .LBB61_42212331; CHECK-RV64-NEXT: j .LBB61_92412332; CHECK-RV64-NEXT: .LBB61_422: # %else163412333; CHECK-RV64-NEXT: slli a1, a2, 3712334; CHECK-RV64-NEXT: bgez a1, .LBB61_42312335; CHECK-RV64-NEXT: j .LBB61_92512336; CHECK-RV64-NEXT: .LBB61_423: # %else163812337; CHECK-RV64-NEXT: slli a1, a2, 3612338; CHECK-RV64-NEXT: bgez a1, .LBB61_42412339; CHECK-RV64-NEXT: j .LBB61_92612340; CHECK-RV64-NEXT: .LBB61_424: # %else164212341; CHECK-RV64-NEXT: slli a1, a2, 3512342; CHECK-RV64-NEXT: bgez a1, .LBB61_42512343; CHECK-RV64-NEXT: j .LBB61_92712344; CHECK-RV64-NEXT: .LBB61_425: # %else164612345; CHECK-RV64-NEXT: slli a1, a2, 3412346; CHECK-RV64-NEXT: bgez a1, .LBB61_42612347; CHECK-RV64-NEXT: j .LBB61_92812348; CHECK-RV64-NEXT: .LBB61_426: # %else165012349; CHECK-RV64-NEXT: slli a1, a2, 3312350; CHECK-RV64-NEXT: bgez a1, .LBB61_42712351; CHECK-RV64-NEXT: j .LBB61_92912352; CHECK-RV64-NEXT: .LBB61_427: # %else165412353; CHECK-RV64-NEXT: slli a1, a2, 3212354; CHECK-RV64-NEXT: bgez a1, .LBB61_42812355; CHECK-RV64-NEXT: j .LBB61_93012356; CHECK-RV64-NEXT: .LBB61_428: # %else165812357; CHECK-RV64-NEXT: slli a1, a2, 3112358; CHECK-RV64-NEXT: bgez a1, .LBB61_42912359; CHECK-RV64-NEXT: j .LBB61_93112360; CHECK-RV64-NEXT: .LBB61_429: # %else166212361; CHECK-RV64-NEXT: slli a1, a2, 3012362; CHECK-RV64-NEXT: bgez a1, .LBB61_43012363; CHECK-RV64-NEXT: j .LBB61_93212364; CHECK-RV64-NEXT: .LBB61_430: # %else166612365; CHECK-RV64-NEXT: slli a1, a2, 2912366; CHECK-RV64-NEXT: bgez a1, .LBB61_43112367; CHECK-RV64-NEXT: j .LBB61_93312368; CHECK-RV64-NEXT: .LBB61_431: # %else167012369; CHECK-RV64-NEXT: slli a1, a2, 2812370; CHECK-RV64-NEXT: bgez a1, .LBB61_43212371; CHECK-RV64-NEXT: j .LBB61_93412372; CHECK-RV64-NEXT: .LBB61_432: # %else167412373; CHECK-RV64-NEXT: slli a1, a2, 2712374; CHECK-RV64-NEXT: bgez a1, .LBB61_43312375; CHECK-RV64-NEXT: j .LBB61_93512376; CHECK-RV64-NEXT: .LBB61_433: # %else167812377; CHECK-RV64-NEXT: slli a1, a2, 2612378; CHECK-RV64-NEXT: bgez a1, .LBB61_43412379; CHECK-RV64-NEXT: j .LBB61_93612380; CHECK-RV64-NEXT: .LBB61_434: # %else168212381; CHECK-RV64-NEXT: slli a1, a2, 2512382; CHECK-RV64-NEXT: bgez a1, .LBB61_43512383; CHECK-RV64-NEXT: j .LBB61_93712384; CHECK-RV64-NEXT: .LBB61_435: # %else168612385; CHECK-RV64-NEXT: slli a1, a2, 2412386; CHECK-RV64-NEXT: bgez a1, .LBB61_43612387; CHECK-RV64-NEXT: j .LBB61_93812388; CHECK-RV64-NEXT: .LBB61_436: # %else169012389; CHECK-RV64-NEXT: slli a1, a2, 2312390; CHECK-RV64-NEXT: bgez a1, .LBB61_43712391; CHECK-RV64-NEXT: j .LBB61_93912392; CHECK-RV64-NEXT: .LBB61_437: # %else169412393; CHECK-RV64-NEXT: slli a1, a2, 2212394; CHECK-RV64-NEXT: bgez a1, .LBB61_43812395; CHECK-RV64-NEXT: j .LBB61_94012396; CHECK-RV64-NEXT: .LBB61_438: # %else169812397; CHECK-RV64-NEXT: slli a1, a2, 2112398; CHECK-RV64-NEXT: bgez a1, .LBB61_43912399; CHECK-RV64-NEXT: j .LBB61_94112400; CHECK-RV64-NEXT: .LBB61_439: # %else170212401; CHECK-RV64-NEXT: slli a1, a2, 2012402; CHECK-RV64-NEXT: bgez a1, .LBB61_44012403; CHECK-RV64-NEXT: j .LBB61_94212404; CHECK-RV64-NEXT: .LBB61_440: # %else170612405; CHECK-RV64-NEXT: slli a1, a2, 1912406; CHECK-RV64-NEXT: bgez a1, .LBB61_44112407; CHECK-RV64-NEXT: j .LBB61_94312408; CHECK-RV64-NEXT: .LBB61_441: # %else171012409; CHECK-RV64-NEXT: slli a1, a2, 1812410; CHECK-RV64-NEXT: bgez a1, .LBB61_44212411; CHECK-RV64-NEXT: j .LBB61_94412412; CHECK-RV64-NEXT: .LBB61_442: # %else171412413; CHECK-RV64-NEXT: slli a1, a2, 1712414; CHECK-RV64-NEXT: bgez a1, .LBB61_44312415; CHECK-RV64-NEXT: j .LBB61_94512416; CHECK-RV64-NEXT: .LBB61_443: # %else171812417; CHECK-RV64-NEXT: slli a1, a2, 1612418; CHECK-RV64-NEXT: bgez a1, .LBB61_44412419; CHECK-RV64-NEXT: j .LBB61_94612420; CHECK-RV64-NEXT: .LBB61_444: # %else172212421; CHECK-RV64-NEXT: slli a1, a2, 1512422; CHECK-RV64-NEXT: bgez a1, .LBB61_44512423; CHECK-RV64-NEXT: j .LBB61_94712424; CHECK-RV64-NEXT: .LBB61_445: # %else172612425; CHECK-RV64-NEXT: slli a1, a2, 1412426; CHECK-RV64-NEXT: bgez a1, .LBB61_44612427; CHECK-RV64-NEXT: j .LBB61_94812428; CHECK-RV64-NEXT: .LBB61_446: # %else173012429; CHECK-RV64-NEXT: slli a1, a2, 1312430; CHECK-RV64-NEXT: bgez a1, .LBB61_44712431; CHECK-RV64-NEXT: j .LBB61_94912432; CHECK-RV64-NEXT: .LBB61_447: # %else173412433; CHECK-RV64-NEXT: slli a1, a2, 1212434; CHECK-RV64-NEXT: bgez a1, .LBB61_44812435; CHECK-RV64-NEXT: j .LBB61_95012436; CHECK-RV64-NEXT: .LBB61_448: # %else173812437; CHECK-RV64-NEXT: slli a1, a2, 1112438; CHECK-RV64-NEXT: bgez a1, .LBB61_44912439; CHECK-RV64-NEXT: j .LBB61_95112440; CHECK-RV64-NEXT: .LBB61_449: # %else174212441; CHECK-RV64-NEXT: slli a1, a2, 1012442; CHECK-RV64-NEXT: bgez a1, .LBB61_45012443; CHECK-RV64-NEXT: j .LBB61_95212444; CHECK-RV64-NEXT: .LBB61_450: # %else174612445; CHECK-RV64-NEXT: slli a1, a2, 912446; CHECK-RV64-NEXT: bgez a1, .LBB61_45112447; CHECK-RV64-NEXT: j .LBB61_95312448; CHECK-RV64-NEXT: .LBB61_451: # %else175012449; CHECK-RV64-NEXT: slli a1, a2, 812450; CHECK-RV64-NEXT: bgez a1, .LBB61_45212451; CHECK-RV64-NEXT: j .LBB61_95412452; CHECK-RV64-NEXT: .LBB61_452: # %else175412453; CHECK-RV64-NEXT: slli a1, a2, 712454; CHECK-RV64-NEXT: bgez a1, .LBB61_45312455; CHECK-RV64-NEXT: j .LBB61_95512456; CHECK-RV64-NEXT: .LBB61_453: # %else175812457; CHECK-RV64-NEXT: slli a1, a2, 612458; CHECK-RV64-NEXT: bgez a1, .LBB61_45412459; CHECK-RV64-NEXT: j .LBB61_95612460; CHECK-RV64-NEXT: .LBB61_454: # %else176212461; CHECK-RV64-NEXT: slli a1, a2, 512462; CHECK-RV64-NEXT: bgez a1, .LBB61_45512463; CHECK-RV64-NEXT: j .LBB61_95712464; CHECK-RV64-NEXT: .LBB61_455: # %else176612465; CHECK-RV64-NEXT: slli a1, a2, 412466; CHECK-RV64-NEXT: bgez a1, .LBB61_45612467; CHECK-RV64-NEXT: j .LBB61_95812468; CHECK-RV64-NEXT: .LBB61_456: # %else177012469; CHECK-RV64-NEXT: slli a1, a2, 312470; CHECK-RV64-NEXT: bgez a1, .LBB61_45712471; CHECK-RV64-NEXT: j .LBB61_95912472; CHECK-RV64-NEXT: .LBB61_457: # %else177412473; CHECK-RV64-NEXT: slli a1, a2, 212474; CHECK-RV64-NEXT: bgez a1, .LBB61_45912475; CHECK-RV64-NEXT: .LBB61_458: # %cond.load177712476; CHECK-RV64-NEXT: lbu a1, 0(a0)12477; CHECK-RV64-NEXT: li a3, 51212478; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma12479; CHECK-RV64-NEXT: vmv.s.x v16, a112480; CHECK-RV64-NEXT: li a1, 44612481; CHECK-RV64-NEXT: li a3, 44512482; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma12483; CHECK-RV64-NEXT: vslideup.vx v8, v16, a312484; CHECK-RV64-NEXT: addi a0, a0, 112485; CHECK-RV64-NEXT: .LBB61_459: # %else177812486; CHECK-RV64-NEXT: slli a1, a2, 112487; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma12488; CHECK-RV64-NEXT: vslidedown.vi v24, v0, 712489; CHECK-RV64-NEXT: bgez a1, .LBB61_46112490; CHECK-RV64-NEXT: # %bb.460: # %cond.load178112491; CHECK-RV64-NEXT: lbu a1, 0(a0)12492; CHECK-RV64-NEXT: vmv.s.x v16, a112493; CHECK-RV64-NEXT: li a1, 44712494; CHECK-RV64-NEXT: li a3, 44612495; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma12496; CHECK-RV64-NEXT: vslideup.vx v8, v16, a312497; CHECK-RV64-NEXT: addi a0, a0, 112498; CHECK-RV64-NEXT: .LBB61_461: # %else178212499; CHECK-RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma12500; CHECK-RV64-NEXT: vmv.x.s a1, v2412501; CHECK-RV64-NEXT: bgez a2, .LBB61_46212502; CHECK-RV64-NEXT: j .LBB61_96012503; CHECK-RV64-NEXT: .LBB61_462: # %else178612504; CHECK-RV64-NEXT: andi a2, a1, 112505; CHECK-RV64-NEXT: beqz a2, .LBB61_46312506; CHECK-RV64-NEXT: j .LBB61_96112507; CHECK-RV64-NEXT: .LBB61_463: # %else179012508; CHECK-RV64-NEXT: andi a2, a1, 212509; CHECK-RV64-NEXT: beqz a2, .LBB61_46412510; CHECK-RV64-NEXT: j .LBB61_96212511; CHECK-RV64-NEXT: .LBB61_464: # %else179412512; CHECK-RV64-NEXT: andi a2, a1, 412513; CHECK-RV64-NEXT: beqz a2, .LBB61_46512514; CHECK-RV64-NEXT: j .LBB61_96312515; CHECK-RV64-NEXT: .LBB61_465: # %else179812516; CHECK-RV64-NEXT: andi a2, a1, 812517; CHECK-RV64-NEXT: beqz a2, .LBB61_46612518; CHECK-RV64-NEXT: j .LBB61_96412519; CHECK-RV64-NEXT: .LBB61_466: # %else180212520; CHECK-RV64-NEXT: andi a2, a1, 1612521; CHECK-RV64-NEXT: beqz a2, .LBB61_46712522; CHECK-RV64-NEXT: j .LBB61_96512523; CHECK-RV64-NEXT: .LBB61_467: # %else180612524; CHECK-RV64-NEXT: andi a2, a1, 3212525; CHECK-RV64-NEXT: beqz a2, .LBB61_46812526; CHECK-RV64-NEXT: j .LBB61_96612527; CHECK-RV64-NEXT: .LBB61_468: # %else181012528; CHECK-RV64-NEXT: andi a2, a1, 6412529; CHECK-RV64-NEXT: beqz a2, .LBB61_46912530; CHECK-RV64-NEXT: j .LBB61_96712531; CHECK-RV64-NEXT: .LBB61_469: # %else181412532; CHECK-RV64-NEXT: andi a2, a1, 12812533; CHECK-RV64-NEXT: beqz a2, .LBB61_47012534; CHECK-RV64-NEXT: j .LBB61_96812535; CHECK-RV64-NEXT: .LBB61_470: # %else181812536; CHECK-RV64-NEXT: andi a2, a1, 25612537; CHECK-RV64-NEXT: beqz a2, .LBB61_47112538; CHECK-RV64-NEXT: j .LBB61_96912539; CHECK-RV64-NEXT: .LBB61_471: # %else182212540; CHECK-RV64-NEXT: andi a2, a1, 51212541; CHECK-RV64-NEXT: beqz a2, .LBB61_47212542; CHECK-RV64-NEXT: j .LBB61_97012543; CHECK-RV64-NEXT: .LBB61_472: # %else182612544; CHECK-RV64-NEXT: andi a2, a1, 102412545; CHECK-RV64-NEXT: beqz a2, .LBB61_47312546; CHECK-RV64-NEXT: j .LBB61_97112547; CHECK-RV64-NEXT: .LBB61_473: # %else183012548; CHECK-RV64-NEXT: slli a2, a1, 5212549; CHECK-RV64-NEXT: bgez a2, .LBB61_47412550; CHECK-RV64-NEXT: j .LBB61_97212551; CHECK-RV64-NEXT: .LBB61_474: # %else183412552; CHECK-RV64-NEXT: slli a2, a1, 5112553; CHECK-RV64-NEXT: bgez a2, .LBB61_47512554; CHECK-RV64-NEXT: j .LBB61_97312555; CHECK-RV64-NEXT: .LBB61_475: # %else183812556; CHECK-RV64-NEXT: slli a2, a1, 5012557; CHECK-RV64-NEXT: bgez a2, .LBB61_47612558; CHECK-RV64-NEXT: j .LBB61_97412559; CHECK-RV64-NEXT: .LBB61_476: # %else184212560; CHECK-RV64-NEXT: slli a2, a1, 4912561; CHECK-RV64-NEXT: bgez a2, .LBB61_47712562; CHECK-RV64-NEXT: j .LBB61_97512563; CHECK-RV64-NEXT: .LBB61_477: # %else184612564; CHECK-RV64-NEXT: slli a2, a1, 4812565; CHECK-RV64-NEXT: bgez a2, .LBB61_47812566; CHECK-RV64-NEXT: j .LBB61_97612567; CHECK-RV64-NEXT: .LBB61_478: # %else185012568; CHECK-RV64-NEXT: slli a2, a1, 4712569; CHECK-RV64-NEXT: bgez a2, .LBB61_47912570; CHECK-RV64-NEXT: j .LBB61_97712571; CHECK-RV64-NEXT: .LBB61_479: # %else185412572; CHECK-RV64-NEXT: slli a2, a1, 4612573; CHECK-RV64-NEXT: bgez a2, .LBB61_48012574; CHECK-RV64-NEXT: j .LBB61_97812575; CHECK-RV64-NEXT: .LBB61_480: # %else185812576; CHECK-RV64-NEXT: slli a2, a1, 4512577; CHECK-RV64-NEXT: bgez a2, .LBB61_48112578; CHECK-RV64-NEXT: j .LBB61_97912579; CHECK-RV64-NEXT: .LBB61_481: # %else186212580; CHECK-RV64-NEXT: slli a2, a1, 4412581; CHECK-RV64-NEXT: bgez a2, .LBB61_48212582; CHECK-RV64-NEXT: j .LBB61_98012583; CHECK-RV64-NEXT: .LBB61_482: # %else186612584; CHECK-RV64-NEXT: slli a2, a1, 4312585; CHECK-RV64-NEXT: bgez a2, .LBB61_48312586; CHECK-RV64-NEXT: j .LBB61_98112587; CHECK-RV64-NEXT: .LBB61_483: # %else187012588; CHECK-RV64-NEXT: slli a2, a1, 4212589; CHECK-RV64-NEXT: bgez a2, .LBB61_48412590; CHECK-RV64-NEXT: j .LBB61_98212591; CHECK-RV64-NEXT: .LBB61_484: # %else187412592; CHECK-RV64-NEXT: slli a2, a1, 4112593; CHECK-RV64-NEXT: bgez a2, .LBB61_48512594; CHECK-RV64-NEXT: j .LBB61_98312595; CHECK-RV64-NEXT: .LBB61_485: # %else187812596; CHECK-RV64-NEXT: slli a2, a1, 4012597; CHECK-RV64-NEXT: bgez a2, .LBB61_48612598; CHECK-RV64-NEXT: j .LBB61_98412599; CHECK-RV64-NEXT: .LBB61_486: # %else188212600; CHECK-RV64-NEXT: slli a2, a1, 3912601; CHECK-RV64-NEXT: bgez a2, .LBB61_48712602; CHECK-RV64-NEXT: j .LBB61_98512603; CHECK-RV64-NEXT: .LBB61_487: # %else188612604; CHECK-RV64-NEXT: slli a2, a1, 3812605; CHECK-RV64-NEXT: bgez a2, .LBB61_48812606; CHECK-RV64-NEXT: j .LBB61_98612607; CHECK-RV64-NEXT: .LBB61_488: # %else189012608; CHECK-RV64-NEXT: slli a2, a1, 3712609; CHECK-RV64-NEXT: bgez a2, .LBB61_48912610; CHECK-RV64-NEXT: j .LBB61_98712611; CHECK-RV64-NEXT: .LBB61_489: # %else189412612; CHECK-RV64-NEXT: slli a2, a1, 3612613; CHECK-RV64-NEXT: bgez a2, .LBB61_49012614; CHECK-RV64-NEXT: j .LBB61_98812615; CHECK-RV64-NEXT: .LBB61_490: # %else189812616; CHECK-RV64-NEXT: slli a2, a1, 3512617; CHECK-RV64-NEXT: bgez a2, .LBB61_49112618; CHECK-RV64-NEXT: j .LBB61_98912619; CHECK-RV64-NEXT: .LBB61_491: # %else190212620; CHECK-RV64-NEXT: slli a2, a1, 3412621; CHECK-RV64-NEXT: bgez a2, .LBB61_49212622; CHECK-RV64-NEXT: j .LBB61_99012623; CHECK-RV64-NEXT: .LBB61_492: # %else190612624; CHECK-RV64-NEXT: slli a2, a1, 3312625; CHECK-RV64-NEXT: bgez a2, .LBB61_49312626; CHECK-RV64-NEXT: j .LBB61_99112627; CHECK-RV64-NEXT: .LBB61_493: # %else191012628; CHECK-RV64-NEXT: slli a2, a1, 3212629; CHECK-RV64-NEXT: bgez a2, .LBB61_49412630; CHECK-RV64-NEXT: j .LBB61_99212631; CHECK-RV64-NEXT: .LBB61_494: # %else191412632; CHECK-RV64-NEXT: slli a2, a1, 3112633; CHECK-RV64-NEXT: bgez a2, .LBB61_49512634; CHECK-RV64-NEXT: j .LBB61_99312635; CHECK-RV64-NEXT: .LBB61_495: # %else191812636; CHECK-RV64-NEXT: slli a2, a1, 3012637; CHECK-RV64-NEXT: bgez a2, .LBB61_49612638; CHECK-RV64-NEXT: j .LBB61_99412639; CHECK-RV64-NEXT: .LBB61_496: # %else192212640; CHECK-RV64-NEXT: slli a2, a1, 2912641; CHECK-RV64-NEXT: bgez a2, .LBB61_49712642; CHECK-RV64-NEXT: j .LBB61_99512643; CHECK-RV64-NEXT: .LBB61_497: # %else192612644; CHECK-RV64-NEXT: slli a2, a1, 2812645; CHECK-RV64-NEXT: bgez a2, .LBB61_49812646; CHECK-RV64-NEXT: j .LBB61_99612647; CHECK-RV64-NEXT: .LBB61_498: # %else193012648; CHECK-RV64-NEXT: slli a2, a1, 2712649; CHECK-RV64-NEXT: bgez a2, .LBB61_49912650; CHECK-RV64-NEXT: j .LBB61_99712651; CHECK-RV64-NEXT: .LBB61_499: # %else193412652; CHECK-RV64-NEXT: slli a2, a1, 2612653; CHECK-RV64-NEXT: bgez a2, .LBB61_50012654; CHECK-RV64-NEXT: j .LBB61_99812655; CHECK-RV64-NEXT: .LBB61_500: # %else193812656; CHECK-RV64-NEXT: slli a2, a1, 2512657; CHECK-RV64-NEXT: bgez a2, .LBB61_50112658; CHECK-RV64-NEXT: j .LBB61_99912659; CHECK-RV64-NEXT: .LBB61_501: # %else194212660; CHECK-RV64-NEXT: slli a2, a1, 2412661; CHECK-RV64-NEXT: bgez a2, .LBB61_50212662; CHECK-RV64-NEXT: j .LBB61_100012663; CHECK-RV64-NEXT: .LBB61_502: # %else194612664; CHECK-RV64-NEXT: slli a2, a1, 2312665; CHECK-RV64-NEXT: bgez a2, .LBB61_50312666; CHECK-RV64-NEXT: j .LBB61_100112667; CHECK-RV64-NEXT: .LBB61_503: # %else195012668; CHECK-RV64-NEXT: slli a2, a1, 2212669; CHECK-RV64-NEXT: bgez a2, .LBB61_50412670; CHECK-RV64-NEXT: j .LBB61_100212671; CHECK-RV64-NEXT: .LBB61_504: # %else195412672; CHECK-RV64-NEXT: slli a2, a1, 2112673; CHECK-RV64-NEXT: bgez a2, .LBB61_50512674; CHECK-RV64-NEXT: j .LBB61_100312675; CHECK-RV64-NEXT: .LBB61_505: # %else195812676; CHECK-RV64-NEXT: slli a2, a1, 2012677; CHECK-RV64-NEXT: bgez a2, .LBB61_50612678; CHECK-RV64-NEXT: j .LBB61_100412679; CHECK-RV64-NEXT: .LBB61_506: # %else196212680; CHECK-RV64-NEXT: slli a2, a1, 1912681; CHECK-RV64-NEXT: bgez a2, .LBB61_50712682; CHECK-RV64-NEXT: j .LBB61_100512683; CHECK-RV64-NEXT: .LBB61_507: # %else196612684; CHECK-RV64-NEXT: slli a2, a1, 1812685; CHECK-RV64-NEXT: bgez a2, .LBB61_50812686; CHECK-RV64-NEXT: j .LBB61_100612687; CHECK-RV64-NEXT: .LBB61_508: # %else197012688; CHECK-RV64-NEXT: slli a2, a1, 1712689; CHECK-RV64-NEXT: bgez a2, .LBB61_50912690; CHECK-RV64-NEXT: j .LBB61_100712691; CHECK-RV64-NEXT: .LBB61_509: # %else197412692; CHECK-RV64-NEXT: slli a2, a1, 1612693; CHECK-RV64-NEXT: bgez a2, .LBB61_51012694; CHECK-RV64-NEXT: j .LBB61_100812695; CHECK-RV64-NEXT: .LBB61_510: # %else197812696; CHECK-RV64-NEXT: slli a2, a1, 1512697; CHECK-RV64-NEXT: bgez a2, .LBB61_51112698; CHECK-RV64-NEXT: j .LBB61_100912699; CHECK-RV64-NEXT: .LBB61_511: # %else198212700; CHECK-RV64-NEXT: slli a2, a1, 1412701; CHECK-RV64-NEXT: bgez a2, .LBB61_51212702; CHECK-RV64-NEXT: j .LBB61_101012703; CHECK-RV64-NEXT: .LBB61_512: # %else198612704; CHECK-RV64-NEXT: slli a2, a1, 1312705; CHECK-RV64-NEXT: bgez a2, .LBB61_51312706; CHECK-RV64-NEXT: j .LBB61_101112707; CHECK-RV64-NEXT: .LBB61_513: # %else199012708; CHECK-RV64-NEXT: slli a2, a1, 1212709; CHECK-RV64-NEXT: bgez a2, .LBB61_51412710; CHECK-RV64-NEXT: j .LBB61_101212711; CHECK-RV64-NEXT: .LBB61_514: # %else199412712; CHECK-RV64-NEXT: slli a2, a1, 1112713; CHECK-RV64-NEXT: bgez a2, .LBB61_51512714; CHECK-RV64-NEXT: j .LBB61_101312715; CHECK-RV64-NEXT: .LBB61_515: # %else199812716; CHECK-RV64-NEXT: slli a2, a1, 1012717; CHECK-RV64-NEXT: bgez a2, .LBB61_51612718; CHECK-RV64-NEXT: j .LBB61_101412719; CHECK-RV64-NEXT: .LBB61_516: # %else200212720; CHECK-RV64-NEXT: slli a2, a1, 912721; CHECK-RV64-NEXT: bgez a2, .LBB61_51712722; CHECK-RV64-NEXT: j .LBB61_101512723; CHECK-RV64-NEXT: .LBB61_517: # %else200612724; CHECK-RV64-NEXT: slli a2, a1, 812725; CHECK-RV64-NEXT: bgez a2, .LBB61_51812726; CHECK-RV64-NEXT: j .LBB61_101612727; CHECK-RV64-NEXT: .LBB61_518: # %else201012728; CHECK-RV64-NEXT: slli a2, a1, 712729; CHECK-RV64-NEXT: bgez a2, .LBB61_51912730; CHECK-RV64-NEXT: j .LBB61_101712731; CHECK-RV64-NEXT: .LBB61_519: # %else201412732; CHECK-RV64-NEXT: slli a2, a1, 612733; CHECK-RV64-NEXT: bgez a2, .LBB61_52012734; CHECK-RV64-NEXT: j .LBB61_101812735; CHECK-RV64-NEXT: .LBB61_520: # %else201812736; CHECK-RV64-NEXT: slli a2, a1, 512737; CHECK-RV64-NEXT: bgez a2, .LBB61_52112738; CHECK-RV64-NEXT: j .LBB61_101912739; CHECK-RV64-NEXT: .LBB61_521: # %else202212740; CHECK-RV64-NEXT: slli a2, a1, 412741; CHECK-RV64-NEXT: bgez a2, .LBB61_52212742; CHECK-RV64-NEXT: j .LBB61_102012743; CHECK-RV64-NEXT: .LBB61_522: # %else202612744; CHECK-RV64-NEXT: slli a2, a1, 312745; CHECK-RV64-NEXT: bgez a2, .LBB61_52312746; CHECK-RV64-NEXT: j .LBB61_102112747; CHECK-RV64-NEXT: .LBB61_523: # %else203012748; CHECK-RV64-NEXT: slli a2, a1, 212749; CHECK-RV64-NEXT: bgez a2, .LBB61_52412750; CHECK-RV64-NEXT: j .LBB61_102212751; CHECK-RV64-NEXT: .LBB61_524: # %else203412752; CHECK-RV64-NEXT: slli a2, a1, 112753; CHECK-RV64-NEXT: bgez a2, .LBB61_52512754; CHECK-RV64-NEXT: j .LBB61_102312755; CHECK-RV64-NEXT: .LBB61_525: # %else203812756; CHECK-RV64-NEXT: bgez a1, .LBB61_52612757; CHECK-RV64-NEXT: j .LBB61_102412758; CHECK-RV64-NEXT: .LBB61_526: # %else204212759; CHECK-RV64-NEXT: ret12760; CHECK-RV64-NEXT: .LBB61_527: # %cond.load12761; CHECK-RV64-NEXT: lbu a1, 0(a0)12762; CHECK-RV64-NEXT: vmv8r.v v16, v812763; CHECK-RV64-NEXT: vsetvli zero, zero, e8, mf8, tu, ma12764; CHECK-RV64-NEXT: vmv.s.x v8, a112765; CHECK-RV64-NEXT: addi a0, a0, 112766; CHECK-RV64-NEXT: vmv1r.v v16, v812767; CHECK-RV64-NEXT: vmv8r.v v8, v1612768; CHECK-RV64-NEXT: andi a1, a2, 212769; CHECK-RV64-NEXT: bnez a1, .LBB61_52812770; CHECK-RV64-NEXT: j .LBB61_212771; CHECK-RV64-NEXT: .LBB61_528: # %cond.load112772; CHECK-RV64-NEXT: lbu a1, 0(a0)12773; CHECK-RV64-NEXT: vsetivli zero, 2, e8, m1, tu, ma12774; CHECK-RV64-NEXT: vmv8r.v v16, v812775; CHECK-RV64-NEXT: vmv.s.x v9, a112776; CHECK-RV64-NEXT: vslideup.vi v8, v9, 112777; CHECK-RV64-NEXT: addi a0, a0, 112778; CHECK-RV64-NEXT: vmv1r.v v16, v812779; CHECK-RV64-NEXT: vmv8r.v v8, v1612780; CHECK-RV64-NEXT: andi a1, a2, 412781; CHECK-RV64-NEXT: bnez a1, .LBB61_52912782; CHECK-RV64-NEXT: j .LBB61_312783; CHECK-RV64-NEXT: .LBB61_529: # %cond.load512784; CHECK-RV64-NEXT: lbu a1, 0(a0)12785; CHECK-RV64-NEXT: vsetivli zero, 3, e8, m1, tu, ma12786; CHECK-RV64-NEXT: vmv8r.v v16, v812787; CHECK-RV64-NEXT: vmv.s.x v9, a112788; CHECK-RV64-NEXT: vslideup.vi v8, v9, 212789; CHECK-RV64-NEXT: addi a0, a0, 112790; CHECK-RV64-NEXT: vmv1r.v v16, v812791; CHECK-RV64-NEXT: vmv8r.v v8, v1612792; CHECK-RV64-NEXT: andi a1, a2, 812793; CHECK-RV64-NEXT: bnez a1, .LBB61_53012794; CHECK-RV64-NEXT: j .LBB61_412795; CHECK-RV64-NEXT: .LBB61_530: # %cond.load912796; CHECK-RV64-NEXT: lbu a1, 0(a0)12797; CHECK-RV64-NEXT: vsetivli zero, 4, e8, m1, tu, ma12798; CHECK-RV64-NEXT: vmv8r.v v16, v812799; CHECK-RV64-NEXT: vmv.s.x v9, a112800; CHECK-RV64-NEXT: vslideup.vi v8, v9, 312801; CHECK-RV64-NEXT: addi a0, a0, 112802; CHECK-RV64-NEXT: vmv1r.v v16, v812803; CHECK-RV64-NEXT: vmv8r.v v8, v1612804; CHECK-RV64-NEXT: andi a1, a2, 1612805; CHECK-RV64-NEXT: bnez a1, .LBB61_53112806; CHECK-RV64-NEXT: j .LBB61_512807; CHECK-RV64-NEXT: .LBB61_531: # %cond.load1312808; CHECK-RV64-NEXT: lbu a1, 0(a0)12809; CHECK-RV64-NEXT: vsetivli zero, 5, e8, m1, tu, ma12810; CHECK-RV64-NEXT: vmv8r.v v16, v812811; CHECK-RV64-NEXT: vmv.s.x v9, a112812; CHECK-RV64-NEXT: vslideup.vi v8, v9, 412813; CHECK-RV64-NEXT: addi a0, a0, 112814; CHECK-RV64-NEXT: vmv1r.v v16, v812815; CHECK-RV64-NEXT: vmv8r.v v8, v1612816; CHECK-RV64-NEXT: andi a1, a2, 3212817; CHECK-RV64-NEXT: bnez a1, .LBB61_53212818; CHECK-RV64-NEXT: j .LBB61_612819; CHECK-RV64-NEXT: .LBB61_532: # %cond.load1712820; CHECK-RV64-NEXT: lbu a1, 0(a0)12821; CHECK-RV64-NEXT: vsetivli zero, 6, e8, m1, tu, ma12822; CHECK-RV64-NEXT: vmv8r.v v16, v812823; CHECK-RV64-NEXT: vmv.s.x v9, a112824; CHECK-RV64-NEXT: vslideup.vi v8, v9, 512825; CHECK-RV64-NEXT: addi a0, a0, 112826; CHECK-RV64-NEXT: vmv1r.v v16, v812827; CHECK-RV64-NEXT: vmv8r.v v8, v1612828; CHECK-RV64-NEXT: andi a1, a2, 6412829; CHECK-RV64-NEXT: bnez a1, .LBB61_53312830; CHECK-RV64-NEXT: j .LBB61_712831; CHECK-RV64-NEXT: .LBB61_533: # %cond.load2112832; CHECK-RV64-NEXT: lbu a1, 0(a0)12833; CHECK-RV64-NEXT: vsetivli zero, 7, e8, m1, tu, ma12834; CHECK-RV64-NEXT: vmv8r.v v16, v812835; CHECK-RV64-NEXT: vmv.s.x v9, a112836; CHECK-RV64-NEXT: vslideup.vi v8, v9, 612837; CHECK-RV64-NEXT: addi a0, a0, 112838; CHECK-RV64-NEXT: vmv1r.v v16, v812839; CHECK-RV64-NEXT: vmv8r.v v8, v1612840; CHECK-RV64-NEXT: andi a1, a2, 12812841; CHECK-RV64-NEXT: bnez a1, .LBB61_53412842; CHECK-RV64-NEXT: j .LBB61_812843; CHECK-RV64-NEXT: .LBB61_534: # %cond.load2512844; CHECK-RV64-NEXT: lbu a1, 0(a0)12845; CHECK-RV64-NEXT: vsetivli zero, 8, e8, m1, tu, ma12846; CHECK-RV64-NEXT: vmv8r.v v16, v812847; CHECK-RV64-NEXT: vmv.s.x v9, a112848; CHECK-RV64-NEXT: vslideup.vi v8, v9, 712849; CHECK-RV64-NEXT: addi a0, a0, 112850; CHECK-RV64-NEXT: vmv1r.v v16, v812851; CHECK-RV64-NEXT: vmv8r.v v8, v1612852; CHECK-RV64-NEXT: andi a1, a2, 25612853; CHECK-RV64-NEXT: bnez a1, .LBB61_53512854; CHECK-RV64-NEXT: j .LBB61_912855; CHECK-RV64-NEXT: .LBB61_535: # %cond.load2912856; CHECK-RV64-NEXT: lbu a1, 0(a0)12857; CHECK-RV64-NEXT: vsetivli zero, 9, e8, m1, tu, ma12858; CHECK-RV64-NEXT: vmv8r.v v16, v812859; CHECK-RV64-NEXT: vmv.s.x v9, a112860; CHECK-RV64-NEXT: vslideup.vi v8, v9, 812861; CHECK-RV64-NEXT: addi a0, a0, 112862; CHECK-RV64-NEXT: vmv1r.v v16, v812863; CHECK-RV64-NEXT: vmv8r.v v8, v1612864; CHECK-RV64-NEXT: andi a1, a2, 51212865; CHECK-RV64-NEXT: bnez a1, .LBB61_53612866; CHECK-RV64-NEXT: j .LBB61_1012867; CHECK-RV64-NEXT: .LBB61_536: # %cond.load3312868; CHECK-RV64-NEXT: lbu a1, 0(a0)12869; CHECK-RV64-NEXT: vsetivli zero, 10, e8, m1, tu, ma12870; CHECK-RV64-NEXT: vmv8r.v v16, v812871; CHECK-RV64-NEXT: vmv.s.x v9, a112872; CHECK-RV64-NEXT: vslideup.vi v8, v9, 912873; CHECK-RV64-NEXT: addi a0, a0, 112874; CHECK-RV64-NEXT: vmv1r.v v16, v812875; CHECK-RV64-NEXT: vmv8r.v v8, v1612876; CHECK-RV64-NEXT: andi a1, a2, 102412877; CHECK-RV64-NEXT: bnez a1, .LBB61_53712878; CHECK-RV64-NEXT: j .LBB61_1112879; CHECK-RV64-NEXT: .LBB61_537: # %cond.load3712880; CHECK-RV64-NEXT: lbu a1, 0(a0)12881; CHECK-RV64-NEXT: vsetivli zero, 11, e8, m1, tu, ma12882; CHECK-RV64-NEXT: vmv8r.v v16, v812883; CHECK-RV64-NEXT: vmv.s.x v9, a112884; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1012885; CHECK-RV64-NEXT: addi a0, a0, 112886; CHECK-RV64-NEXT: vmv1r.v v16, v812887; CHECK-RV64-NEXT: vmv8r.v v8, v1612888; CHECK-RV64-NEXT: slli a1, a2, 5212889; CHECK-RV64-NEXT: bltz a1, .LBB61_53812890; CHECK-RV64-NEXT: j .LBB61_1212891; CHECK-RV64-NEXT: .LBB61_538: # %cond.load4112892; CHECK-RV64-NEXT: lbu a1, 0(a0)12893; CHECK-RV64-NEXT: vsetivli zero, 12, e8, m1, tu, ma12894; CHECK-RV64-NEXT: vmv8r.v v16, v812895; CHECK-RV64-NEXT: vmv.s.x v9, a112896; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1112897; CHECK-RV64-NEXT: addi a0, a0, 112898; CHECK-RV64-NEXT: vmv1r.v v16, v812899; CHECK-RV64-NEXT: vmv8r.v v8, v1612900; CHECK-RV64-NEXT: slli a1, a2, 5112901; CHECK-RV64-NEXT: bltz a1, .LBB61_53912902; CHECK-RV64-NEXT: j .LBB61_1312903; CHECK-RV64-NEXT: .LBB61_539: # %cond.load4512904; CHECK-RV64-NEXT: lbu a1, 0(a0)12905; CHECK-RV64-NEXT: vsetivli zero, 13, e8, m1, tu, ma12906; CHECK-RV64-NEXT: vmv8r.v v16, v812907; CHECK-RV64-NEXT: vmv.s.x v9, a112908; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1212909; CHECK-RV64-NEXT: addi a0, a0, 112910; CHECK-RV64-NEXT: vmv1r.v v16, v812911; CHECK-RV64-NEXT: vmv8r.v v8, v1612912; CHECK-RV64-NEXT: slli a1, a2, 5012913; CHECK-RV64-NEXT: bltz a1, .LBB61_54012914; CHECK-RV64-NEXT: j .LBB61_1412915; CHECK-RV64-NEXT: .LBB61_540: # %cond.load4912916; CHECK-RV64-NEXT: lbu a1, 0(a0)12917; CHECK-RV64-NEXT: vsetivli zero, 14, e8, m1, tu, ma12918; CHECK-RV64-NEXT: vmv8r.v v16, v812919; CHECK-RV64-NEXT: vmv.s.x v9, a112920; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1312921; CHECK-RV64-NEXT: addi a0, a0, 112922; CHECK-RV64-NEXT: vmv1r.v v16, v812923; CHECK-RV64-NEXT: vmv8r.v v8, v1612924; CHECK-RV64-NEXT: slli a1, a2, 4912925; CHECK-RV64-NEXT: bltz a1, .LBB61_54112926; CHECK-RV64-NEXT: j .LBB61_1512927; CHECK-RV64-NEXT: .LBB61_541: # %cond.load5312928; CHECK-RV64-NEXT: lbu a1, 0(a0)12929; CHECK-RV64-NEXT: vsetivli zero, 15, e8, m1, tu, ma12930; CHECK-RV64-NEXT: vmv8r.v v16, v812931; CHECK-RV64-NEXT: vmv.s.x v9, a112932; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1412933; CHECK-RV64-NEXT: addi a0, a0, 112934; CHECK-RV64-NEXT: vmv1r.v v16, v812935; CHECK-RV64-NEXT: vmv8r.v v8, v1612936; CHECK-RV64-NEXT: slli a1, a2, 4812937; CHECK-RV64-NEXT: bltz a1, .LBB61_54212938; CHECK-RV64-NEXT: j .LBB61_1612939; CHECK-RV64-NEXT: .LBB61_542: # %cond.load5712940; CHECK-RV64-NEXT: lbu a1, 0(a0)12941; CHECK-RV64-NEXT: vsetivli zero, 16, e8, m1, tu, ma12942; CHECK-RV64-NEXT: vmv8r.v v16, v812943; CHECK-RV64-NEXT: vmv.s.x v9, a112944; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1512945; CHECK-RV64-NEXT: addi a0, a0, 112946; CHECK-RV64-NEXT: vmv1r.v v16, v812947; CHECK-RV64-NEXT: vmv8r.v v8, v1612948; CHECK-RV64-NEXT: slli a1, a2, 4712949; CHECK-RV64-NEXT: bltz a1, .LBB61_54312950; CHECK-RV64-NEXT: j .LBB61_1712951; CHECK-RV64-NEXT: .LBB61_543: # %cond.load6112952; CHECK-RV64-NEXT: lbu a1, 0(a0)12953; CHECK-RV64-NEXT: vsetivli zero, 17, e8, m1, tu, ma12954; CHECK-RV64-NEXT: vmv8r.v v16, v812955; CHECK-RV64-NEXT: vmv.s.x v9, a112956; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1612957; CHECK-RV64-NEXT: addi a0, a0, 112958; CHECK-RV64-NEXT: vmv1r.v v16, v812959; CHECK-RV64-NEXT: vmv8r.v v8, v1612960; CHECK-RV64-NEXT: slli a1, a2, 4612961; CHECK-RV64-NEXT: bltz a1, .LBB61_54412962; CHECK-RV64-NEXT: j .LBB61_1812963; CHECK-RV64-NEXT: .LBB61_544: # %cond.load6512964; CHECK-RV64-NEXT: lbu a1, 0(a0)12965; CHECK-RV64-NEXT: vsetivli zero, 18, e8, m1, tu, ma12966; CHECK-RV64-NEXT: vmv8r.v v16, v812967; CHECK-RV64-NEXT: vmv.s.x v9, a112968; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1712969; CHECK-RV64-NEXT: addi a0, a0, 112970; CHECK-RV64-NEXT: vmv1r.v v16, v812971; CHECK-RV64-NEXT: vmv8r.v v8, v1612972; CHECK-RV64-NEXT: slli a1, a2, 4512973; CHECK-RV64-NEXT: bltz a1, .LBB61_54512974; CHECK-RV64-NEXT: j .LBB61_1912975; CHECK-RV64-NEXT: .LBB61_545: # %cond.load6912976; CHECK-RV64-NEXT: lbu a1, 0(a0)12977; CHECK-RV64-NEXT: vsetivli zero, 19, e8, m1, tu, ma12978; CHECK-RV64-NEXT: vmv8r.v v16, v812979; CHECK-RV64-NEXT: vmv.s.x v9, a112980; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1812981; CHECK-RV64-NEXT: addi a0, a0, 112982; CHECK-RV64-NEXT: vmv1r.v v16, v812983; CHECK-RV64-NEXT: vmv8r.v v8, v1612984; CHECK-RV64-NEXT: slli a1, a2, 4412985; CHECK-RV64-NEXT: bltz a1, .LBB61_54612986; CHECK-RV64-NEXT: j .LBB61_2012987; CHECK-RV64-NEXT: .LBB61_546: # %cond.load7312988; CHECK-RV64-NEXT: lbu a1, 0(a0)12989; CHECK-RV64-NEXT: vsetivli zero, 20, e8, m1, tu, ma12990; CHECK-RV64-NEXT: vmv8r.v v16, v812991; CHECK-RV64-NEXT: vmv.s.x v9, a112992; CHECK-RV64-NEXT: vslideup.vi v8, v9, 1912993; CHECK-RV64-NEXT: addi a0, a0, 112994; CHECK-RV64-NEXT: vmv1r.v v16, v812995; CHECK-RV64-NEXT: vmv8r.v v8, v1612996; CHECK-RV64-NEXT: slli a1, a2, 4312997; CHECK-RV64-NEXT: bltz a1, .LBB61_54712998; CHECK-RV64-NEXT: j .LBB61_2112999; CHECK-RV64-NEXT: .LBB61_547: # %cond.load7713000; CHECK-RV64-NEXT: lbu a1, 0(a0)13001; CHECK-RV64-NEXT: vsetivli zero, 21, e8, m1, tu, ma13002; CHECK-RV64-NEXT: vmv8r.v v16, v813003; CHECK-RV64-NEXT: vmv.s.x v9, a113004; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2013005; CHECK-RV64-NEXT: addi a0, a0, 113006; CHECK-RV64-NEXT: vmv1r.v v16, v813007; CHECK-RV64-NEXT: vmv8r.v v8, v1613008; CHECK-RV64-NEXT: slli a1, a2, 4213009; CHECK-RV64-NEXT: bltz a1, .LBB61_54813010; CHECK-RV64-NEXT: j .LBB61_2213011; CHECK-RV64-NEXT: .LBB61_548: # %cond.load8113012; CHECK-RV64-NEXT: lbu a1, 0(a0)13013; CHECK-RV64-NEXT: vsetivli zero, 22, e8, m1, tu, ma13014; CHECK-RV64-NEXT: vmv8r.v v16, v813015; CHECK-RV64-NEXT: vmv.s.x v9, a113016; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2113017; CHECK-RV64-NEXT: addi a0, a0, 113018; CHECK-RV64-NEXT: vmv1r.v v16, v813019; CHECK-RV64-NEXT: vmv8r.v v8, v1613020; CHECK-RV64-NEXT: slli a1, a2, 4113021; CHECK-RV64-NEXT: bltz a1, .LBB61_54913022; CHECK-RV64-NEXT: j .LBB61_2313023; CHECK-RV64-NEXT: .LBB61_549: # %cond.load8513024; CHECK-RV64-NEXT: lbu a1, 0(a0)13025; CHECK-RV64-NEXT: vsetivli zero, 23, e8, m1, tu, ma13026; CHECK-RV64-NEXT: vmv8r.v v16, v813027; CHECK-RV64-NEXT: vmv.s.x v9, a113028; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2213029; CHECK-RV64-NEXT: addi a0, a0, 113030; CHECK-RV64-NEXT: vmv1r.v v16, v813031; CHECK-RV64-NEXT: vmv8r.v v8, v1613032; CHECK-RV64-NEXT: slli a1, a2, 4013033; CHECK-RV64-NEXT: bltz a1, .LBB61_55013034; CHECK-RV64-NEXT: j .LBB61_2413035; CHECK-RV64-NEXT: .LBB61_550: # %cond.load8913036; CHECK-RV64-NEXT: lbu a1, 0(a0)13037; CHECK-RV64-NEXT: vsetivli zero, 24, e8, m1, tu, ma13038; CHECK-RV64-NEXT: vmv8r.v v16, v813039; CHECK-RV64-NEXT: vmv.s.x v9, a113040; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2313041; CHECK-RV64-NEXT: addi a0, a0, 113042; CHECK-RV64-NEXT: vmv1r.v v16, v813043; CHECK-RV64-NEXT: vmv8r.v v8, v1613044; CHECK-RV64-NEXT: slli a1, a2, 3913045; CHECK-RV64-NEXT: bltz a1, .LBB61_55113046; CHECK-RV64-NEXT: j .LBB61_2513047; CHECK-RV64-NEXT: .LBB61_551: # %cond.load9313048; CHECK-RV64-NEXT: lbu a1, 0(a0)13049; CHECK-RV64-NEXT: vsetivli zero, 25, e8, m1, tu, ma13050; CHECK-RV64-NEXT: vmv8r.v v16, v813051; CHECK-RV64-NEXT: vmv.s.x v9, a113052; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2413053; CHECK-RV64-NEXT: addi a0, a0, 113054; CHECK-RV64-NEXT: vmv1r.v v16, v813055; CHECK-RV64-NEXT: vmv8r.v v8, v1613056; CHECK-RV64-NEXT: slli a1, a2, 3813057; CHECK-RV64-NEXT: bltz a1, .LBB61_55213058; CHECK-RV64-NEXT: j .LBB61_2613059; CHECK-RV64-NEXT: .LBB61_552: # %cond.load9713060; CHECK-RV64-NEXT: lbu a1, 0(a0)13061; CHECK-RV64-NEXT: vsetivli zero, 26, e8, m1, tu, ma13062; CHECK-RV64-NEXT: vmv8r.v v16, v813063; CHECK-RV64-NEXT: vmv.s.x v9, a113064; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2513065; CHECK-RV64-NEXT: addi a0, a0, 113066; CHECK-RV64-NEXT: vmv1r.v v16, v813067; CHECK-RV64-NEXT: vmv8r.v v8, v1613068; CHECK-RV64-NEXT: slli a1, a2, 3713069; CHECK-RV64-NEXT: bltz a1, .LBB61_55313070; CHECK-RV64-NEXT: j .LBB61_2713071; CHECK-RV64-NEXT: .LBB61_553: # %cond.load10113072; CHECK-RV64-NEXT: lbu a1, 0(a0)13073; CHECK-RV64-NEXT: vsetivli zero, 27, e8, m1, tu, ma13074; CHECK-RV64-NEXT: vmv8r.v v16, v813075; CHECK-RV64-NEXT: vmv.s.x v9, a113076; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2613077; CHECK-RV64-NEXT: addi a0, a0, 113078; CHECK-RV64-NEXT: vmv1r.v v16, v813079; CHECK-RV64-NEXT: vmv8r.v v8, v1613080; CHECK-RV64-NEXT: slli a1, a2, 3613081; CHECK-RV64-NEXT: bltz a1, .LBB61_55413082; CHECK-RV64-NEXT: j .LBB61_2813083; CHECK-RV64-NEXT: .LBB61_554: # %cond.load10513084; CHECK-RV64-NEXT: lbu a1, 0(a0)13085; CHECK-RV64-NEXT: vsetivli zero, 28, e8, m1, tu, ma13086; CHECK-RV64-NEXT: vmv8r.v v16, v813087; CHECK-RV64-NEXT: vmv.s.x v9, a113088; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2713089; CHECK-RV64-NEXT: addi a0, a0, 113090; CHECK-RV64-NEXT: vmv1r.v v16, v813091; CHECK-RV64-NEXT: vmv8r.v v8, v1613092; CHECK-RV64-NEXT: slli a1, a2, 3513093; CHECK-RV64-NEXT: bltz a1, .LBB61_55513094; CHECK-RV64-NEXT: j .LBB61_2913095; CHECK-RV64-NEXT: .LBB61_555: # %cond.load10913096; CHECK-RV64-NEXT: lbu a1, 0(a0)13097; CHECK-RV64-NEXT: vsetivli zero, 29, e8, m1, tu, ma13098; CHECK-RV64-NEXT: vmv8r.v v16, v813099; CHECK-RV64-NEXT: vmv.s.x v9, a113100; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2813101; CHECK-RV64-NEXT: addi a0, a0, 113102; CHECK-RV64-NEXT: vmv1r.v v16, v813103; CHECK-RV64-NEXT: vmv8r.v v8, v1613104; CHECK-RV64-NEXT: slli a1, a2, 3413105; CHECK-RV64-NEXT: bltz a1, .LBB61_55613106; CHECK-RV64-NEXT: j .LBB61_3013107; CHECK-RV64-NEXT: .LBB61_556: # %cond.load11313108; CHECK-RV64-NEXT: lbu a1, 0(a0)13109; CHECK-RV64-NEXT: vsetivli zero, 30, e8, m1, tu, ma13110; CHECK-RV64-NEXT: vmv8r.v v16, v813111; CHECK-RV64-NEXT: vmv.s.x v9, a113112; CHECK-RV64-NEXT: vslideup.vi v8, v9, 2913113; CHECK-RV64-NEXT: addi a0, a0, 113114; CHECK-RV64-NEXT: vmv1r.v v16, v813115; CHECK-RV64-NEXT: vmv8r.v v8, v1613116; CHECK-RV64-NEXT: slli a1, a2, 3313117; CHECK-RV64-NEXT: bltz a1, .LBB61_55713118; CHECK-RV64-NEXT: j .LBB61_3113119; CHECK-RV64-NEXT: .LBB61_557: # %cond.load11713120; CHECK-RV64-NEXT: lbu a1, 0(a0)13121; CHECK-RV64-NEXT: vsetivli zero, 31, e8, m1, tu, ma13122; CHECK-RV64-NEXT: vmv8r.v v16, v813123; CHECK-RV64-NEXT: vmv.s.x v9, a113124; CHECK-RV64-NEXT: vslideup.vi v8, v9, 3013125; CHECK-RV64-NEXT: addi a0, a0, 113126; CHECK-RV64-NEXT: vmv1r.v v16, v813127; CHECK-RV64-NEXT: vmv8r.v v8, v1613128; CHECK-RV64-NEXT: slli a1, a2, 3213129; CHECK-RV64-NEXT: bltz a1, .LBB61_55813130; CHECK-RV64-NEXT: j .LBB61_3213131; CHECK-RV64-NEXT: .LBB61_558: # %cond.load12113132; CHECK-RV64-NEXT: lbu a1, 0(a0)13133; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13134; CHECK-RV64-NEXT: vmv8r.v v16, v813135; CHECK-RV64-NEXT: vmv.s.x v9, a113136; CHECK-RV64-NEXT: li a1, 3213137; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13138; CHECK-RV64-NEXT: vslideup.vi v8, v9, 3113139; CHECK-RV64-NEXT: addi a0, a0, 113140; CHECK-RV64-NEXT: vmv1r.v v16, v813141; CHECK-RV64-NEXT: vmv8r.v v8, v1613142; CHECK-RV64-NEXT: slli a1, a2, 3113143; CHECK-RV64-NEXT: bltz a1, .LBB61_55913144; CHECK-RV64-NEXT: j .LBB61_3313145; CHECK-RV64-NEXT: .LBB61_559: # %cond.load12513146; CHECK-RV64-NEXT: lbu a1, 0(a0)13147; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13148; CHECK-RV64-NEXT: vmv8r.v v16, v813149; CHECK-RV64-NEXT: vmv.s.x v9, a113150; CHECK-RV64-NEXT: li a1, 3313151; CHECK-RV64-NEXT: li a3, 3213152; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13153; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313154; CHECK-RV64-NEXT: addi a0, a0, 113155; CHECK-RV64-NEXT: vmv1r.v v16, v813156; CHECK-RV64-NEXT: vmv8r.v v8, v1613157; CHECK-RV64-NEXT: slli a1, a2, 3013158; CHECK-RV64-NEXT: bltz a1, .LBB61_56013159; CHECK-RV64-NEXT: j .LBB61_3413160; CHECK-RV64-NEXT: .LBB61_560: # %cond.load12913161; CHECK-RV64-NEXT: lbu a1, 0(a0)13162; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13163; CHECK-RV64-NEXT: vmv8r.v v16, v813164; CHECK-RV64-NEXT: vmv.s.x v9, a113165; CHECK-RV64-NEXT: li a1, 3413166; CHECK-RV64-NEXT: li a3, 3313167; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13168; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313169; CHECK-RV64-NEXT: addi a0, a0, 113170; CHECK-RV64-NEXT: vmv1r.v v16, v813171; CHECK-RV64-NEXT: vmv8r.v v8, v1613172; CHECK-RV64-NEXT: slli a1, a2, 2913173; CHECK-RV64-NEXT: bltz a1, .LBB61_56113174; CHECK-RV64-NEXT: j .LBB61_3513175; CHECK-RV64-NEXT: .LBB61_561: # %cond.load13313176; CHECK-RV64-NEXT: lbu a1, 0(a0)13177; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13178; CHECK-RV64-NEXT: vmv8r.v v16, v813179; CHECK-RV64-NEXT: vmv.s.x v9, a113180; CHECK-RV64-NEXT: li a1, 3513181; CHECK-RV64-NEXT: li a3, 3413182; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13183; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313184; CHECK-RV64-NEXT: addi a0, a0, 113185; CHECK-RV64-NEXT: vmv1r.v v16, v813186; CHECK-RV64-NEXT: vmv8r.v v8, v1613187; CHECK-RV64-NEXT: slli a1, a2, 2813188; CHECK-RV64-NEXT: bltz a1, .LBB61_56213189; CHECK-RV64-NEXT: j .LBB61_3613190; CHECK-RV64-NEXT: .LBB61_562: # %cond.load13713191; CHECK-RV64-NEXT: lbu a1, 0(a0)13192; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13193; CHECK-RV64-NEXT: vmv8r.v v16, v813194; CHECK-RV64-NEXT: vmv.s.x v9, a113195; CHECK-RV64-NEXT: li a1, 3613196; CHECK-RV64-NEXT: li a3, 3513197; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13198; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313199; CHECK-RV64-NEXT: addi a0, a0, 113200; CHECK-RV64-NEXT: vmv1r.v v16, v813201; CHECK-RV64-NEXT: vmv8r.v v8, v1613202; CHECK-RV64-NEXT: slli a1, a2, 2713203; CHECK-RV64-NEXT: bltz a1, .LBB61_56313204; CHECK-RV64-NEXT: j .LBB61_3713205; CHECK-RV64-NEXT: .LBB61_563: # %cond.load14113206; CHECK-RV64-NEXT: lbu a1, 0(a0)13207; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13208; CHECK-RV64-NEXT: vmv8r.v v16, v813209; CHECK-RV64-NEXT: vmv.s.x v9, a113210; CHECK-RV64-NEXT: li a1, 3713211; CHECK-RV64-NEXT: li a3, 3613212; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13213; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313214; CHECK-RV64-NEXT: addi a0, a0, 113215; CHECK-RV64-NEXT: vmv1r.v v16, v813216; CHECK-RV64-NEXT: vmv8r.v v8, v1613217; CHECK-RV64-NEXT: slli a1, a2, 2613218; CHECK-RV64-NEXT: bltz a1, .LBB61_56413219; CHECK-RV64-NEXT: j .LBB61_3813220; CHECK-RV64-NEXT: .LBB61_564: # %cond.load14513221; CHECK-RV64-NEXT: lbu a1, 0(a0)13222; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13223; CHECK-RV64-NEXT: vmv8r.v v16, v813224; CHECK-RV64-NEXT: vmv.s.x v9, a113225; CHECK-RV64-NEXT: li a1, 3813226; CHECK-RV64-NEXT: li a3, 3713227; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13228; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313229; CHECK-RV64-NEXT: addi a0, a0, 113230; CHECK-RV64-NEXT: vmv1r.v v16, v813231; CHECK-RV64-NEXT: vmv8r.v v8, v1613232; CHECK-RV64-NEXT: slli a1, a2, 2513233; CHECK-RV64-NEXT: bltz a1, .LBB61_56513234; CHECK-RV64-NEXT: j .LBB61_3913235; CHECK-RV64-NEXT: .LBB61_565: # %cond.load14913236; CHECK-RV64-NEXT: lbu a1, 0(a0)13237; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13238; CHECK-RV64-NEXT: vmv8r.v v16, v813239; CHECK-RV64-NEXT: vmv.s.x v9, a113240; CHECK-RV64-NEXT: li a1, 3913241; CHECK-RV64-NEXT: li a3, 3813242; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13243; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313244; CHECK-RV64-NEXT: addi a0, a0, 113245; CHECK-RV64-NEXT: vmv1r.v v16, v813246; CHECK-RV64-NEXT: vmv8r.v v8, v1613247; CHECK-RV64-NEXT: slli a1, a2, 2413248; CHECK-RV64-NEXT: bltz a1, .LBB61_56613249; CHECK-RV64-NEXT: j .LBB61_4013250; CHECK-RV64-NEXT: .LBB61_566: # %cond.load15313251; CHECK-RV64-NEXT: lbu a1, 0(a0)13252; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13253; CHECK-RV64-NEXT: vmv8r.v v16, v813254; CHECK-RV64-NEXT: vmv.s.x v9, a113255; CHECK-RV64-NEXT: li a1, 4013256; CHECK-RV64-NEXT: li a3, 3913257; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13258; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313259; CHECK-RV64-NEXT: addi a0, a0, 113260; CHECK-RV64-NEXT: vmv1r.v v16, v813261; CHECK-RV64-NEXT: vmv8r.v v8, v1613262; CHECK-RV64-NEXT: slli a1, a2, 2313263; CHECK-RV64-NEXT: bltz a1, .LBB61_56713264; CHECK-RV64-NEXT: j .LBB61_4113265; CHECK-RV64-NEXT: .LBB61_567: # %cond.load15713266; CHECK-RV64-NEXT: lbu a1, 0(a0)13267; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13268; CHECK-RV64-NEXT: vmv8r.v v16, v813269; CHECK-RV64-NEXT: vmv.s.x v9, a113270; CHECK-RV64-NEXT: li a1, 4113271; CHECK-RV64-NEXT: li a3, 4013272; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13273; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313274; CHECK-RV64-NEXT: addi a0, a0, 113275; CHECK-RV64-NEXT: vmv1r.v v16, v813276; CHECK-RV64-NEXT: vmv8r.v v8, v1613277; CHECK-RV64-NEXT: slli a1, a2, 2213278; CHECK-RV64-NEXT: bltz a1, .LBB61_56813279; CHECK-RV64-NEXT: j .LBB61_4213280; CHECK-RV64-NEXT: .LBB61_568: # %cond.load16113281; CHECK-RV64-NEXT: lbu a1, 0(a0)13282; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13283; CHECK-RV64-NEXT: vmv8r.v v16, v813284; CHECK-RV64-NEXT: vmv.s.x v9, a113285; CHECK-RV64-NEXT: li a1, 4213286; CHECK-RV64-NEXT: li a3, 4113287; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13288; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313289; CHECK-RV64-NEXT: addi a0, a0, 113290; CHECK-RV64-NEXT: vmv1r.v v16, v813291; CHECK-RV64-NEXT: vmv8r.v v8, v1613292; CHECK-RV64-NEXT: slli a1, a2, 2113293; CHECK-RV64-NEXT: bltz a1, .LBB61_56913294; CHECK-RV64-NEXT: j .LBB61_4313295; CHECK-RV64-NEXT: .LBB61_569: # %cond.load16513296; CHECK-RV64-NEXT: lbu a1, 0(a0)13297; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13298; CHECK-RV64-NEXT: vmv8r.v v16, v813299; CHECK-RV64-NEXT: vmv.s.x v9, a113300; CHECK-RV64-NEXT: li a1, 4313301; CHECK-RV64-NEXT: li a3, 4213302; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13303; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313304; CHECK-RV64-NEXT: addi a0, a0, 113305; CHECK-RV64-NEXT: vmv1r.v v16, v813306; CHECK-RV64-NEXT: vmv8r.v v8, v1613307; CHECK-RV64-NEXT: slli a1, a2, 2013308; CHECK-RV64-NEXT: bltz a1, .LBB61_57013309; CHECK-RV64-NEXT: j .LBB61_4413310; CHECK-RV64-NEXT: .LBB61_570: # %cond.load16913311; CHECK-RV64-NEXT: lbu a1, 0(a0)13312; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13313; CHECK-RV64-NEXT: vmv8r.v v16, v813314; CHECK-RV64-NEXT: vmv.s.x v9, a113315; CHECK-RV64-NEXT: li a1, 4413316; CHECK-RV64-NEXT: li a3, 4313317; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13318; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313319; CHECK-RV64-NEXT: addi a0, a0, 113320; CHECK-RV64-NEXT: vmv1r.v v16, v813321; CHECK-RV64-NEXT: vmv8r.v v8, v1613322; CHECK-RV64-NEXT: slli a1, a2, 1913323; CHECK-RV64-NEXT: bltz a1, .LBB61_57113324; CHECK-RV64-NEXT: j .LBB61_4513325; CHECK-RV64-NEXT: .LBB61_571: # %cond.load17313326; CHECK-RV64-NEXT: lbu a1, 0(a0)13327; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13328; CHECK-RV64-NEXT: vmv8r.v v16, v813329; CHECK-RV64-NEXT: vmv.s.x v9, a113330; CHECK-RV64-NEXT: li a1, 4513331; CHECK-RV64-NEXT: li a3, 4413332; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13333; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313334; CHECK-RV64-NEXT: addi a0, a0, 113335; CHECK-RV64-NEXT: vmv1r.v v16, v813336; CHECK-RV64-NEXT: vmv8r.v v8, v1613337; CHECK-RV64-NEXT: slli a1, a2, 1813338; CHECK-RV64-NEXT: bltz a1, .LBB61_57213339; CHECK-RV64-NEXT: j .LBB61_4613340; CHECK-RV64-NEXT: .LBB61_572: # %cond.load17713341; CHECK-RV64-NEXT: lbu a1, 0(a0)13342; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13343; CHECK-RV64-NEXT: vmv8r.v v16, v813344; CHECK-RV64-NEXT: vmv.s.x v9, a113345; CHECK-RV64-NEXT: li a1, 4613346; CHECK-RV64-NEXT: li a3, 4513347; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13348; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313349; CHECK-RV64-NEXT: addi a0, a0, 113350; CHECK-RV64-NEXT: vmv1r.v v16, v813351; CHECK-RV64-NEXT: vmv8r.v v8, v1613352; CHECK-RV64-NEXT: slli a1, a2, 1713353; CHECK-RV64-NEXT: bltz a1, .LBB61_57313354; CHECK-RV64-NEXT: j .LBB61_4713355; CHECK-RV64-NEXT: .LBB61_573: # %cond.load18113356; CHECK-RV64-NEXT: lbu a1, 0(a0)13357; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13358; CHECK-RV64-NEXT: vmv8r.v v16, v813359; CHECK-RV64-NEXT: vmv.s.x v9, a113360; CHECK-RV64-NEXT: li a1, 4713361; CHECK-RV64-NEXT: li a3, 4613362; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13363; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313364; CHECK-RV64-NEXT: addi a0, a0, 113365; CHECK-RV64-NEXT: vmv1r.v v16, v813366; CHECK-RV64-NEXT: vmv8r.v v8, v1613367; CHECK-RV64-NEXT: slli a1, a2, 1613368; CHECK-RV64-NEXT: bltz a1, .LBB61_57413369; CHECK-RV64-NEXT: j .LBB61_4813370; CHECK-RV64-NEXT: .LBB61_574: # %cond.load18513371; CHECK-RV64-NEXT: lbu a1, 0(a0)13372; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13373; CHECK-RV64-NEXT: vmv8r.v v16, v813374; CHECK-RV64-NEXT: vmv.s.x v9, a113375; CHECK-RV64-NEXT: li a1, 4813376; CHECK-RV64-NEXT: li a3, 4713377; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13378; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313379; CHECK-RV64-NEXT: addi a0, a0, 113380; CHECK-RV64-NEXT: vmv1r.v v16, v813381; CHECK-RV64-NEXT: vmv8r.v v8, v1613382; CHECK-RV64-NEXT: slli a1, a2, 1513383; CHECK-RV64-NEXT: bltz a1, .LBB61_57513384; CHECK-RV64-NEXT: j .LBB61_4913385; CHECK-RV64-NEXT: .LBB61_575: # %cond.load18913386; CHECK-RV64-NEXT: lbu a1, 0(a0)13387; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13388; CHECK-RV64-NEXT: vmv8r.v v16, v813389; CHECK-RV64-NEXT: vmv.s.x v9, a113390; CHECK-RV64-NEXT: li a1, 4913391; CHECK-RV64-NEXT: li a3, 4813392; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13393; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313394; CHECK-RV64-NEXT: addi a0, a0, 113395; CHECK-RV64-NEXT: vmv1r.v v16, v813396; CHECK-RV64-NEXT: vmv8r.v v8, v1613397; CHECK-RV64-NEXT: slli a1, a2, 1413398; CHECK-RV64-NEXT: bltz a1, .LBB61_57613399; CHECK-RV64-NEXT: j .LBB61_5013400; CHECK-RV64-NEXT: .LBB61_576: # %cond.load19313401; CHECK-RV64-NEXT: lbu a1, 0(a0)13402; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13403; CHECK-RV64-NEXT: vmv8r.v v16, v813404; CHECK-RV64-NEXT: vmv.s.x v9, a113405; CHECK-RV64-NEXT: li a1, 5013406; CHECK-RV64-NEXT: li a3, 4913407; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13408; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313409; CHECK-RV64-NEXT: addi a0, a0, 113410; CHECK-RV64-NEXT: vmv1r.v v16, v813411; CHECK-RV64-NEXT: vmv8r.v v8, v1613412; CHECK-RV64-NEXT: slli a1, a2, 1313413; CHECK-RV64-NEXT: bltz a1, .LBB61_57713414; CHECK-RV64-NEXT: j .LBB61_5113415; CHECK-RV64-NEXT: .LBB61_577: # %cond.load19713416; CHECK-RV64-NEXT: lbu a1, 0(a0)13417; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13418; CHECK-RV64-NEXT: vmv8r.v v16, v813419; CHECK-RV64-NEXT: vmv.s.x v9, a113420; CHECK-RV64-NEXT: li a1, 5113421; CHECK-RV64-NEXT: li a3, 5013422; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13423; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313424; CHECK-RV64-NEXT: addi a0, a0, 113425; CHECK-RV64-NEXT: vmv1r.v v16, v813426; CHECK-RV64-NEXT: vmv8r.v v8, v1613427; CHECK-RV64-NEXT: slli a1, a2, 1213428; CHECK-RV64-NEXT: bltz a1, .LBB61_57813429; CHECK-RV64-NEXT: j .LBB61_5213430; CHECK-RV64-NEXT: .LBB61_578: # %cond.load20113431; CHECK-RV64-NEXT: lbu a1, 0(a0)13432; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13433; CHECK-RV64-NEXT: vmv8r.v v16, v813434; CHECK-RV64-NEXT: vmv.s.x v9, a113435; CHECK-RV64-NEXT: li a1, 5213436; CHECK-RV64-NEXT: li a3, 5113437; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13438; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313439; CHECK-RV64-NEXT: addi a0, a0, 113440; CHECK-RV64-NEXT: vmv1r.v v16, v813441; CHECK-RV64-NEXT: vmv8r.v v8, v1613442; CHECK-RV64-NEXT: slli a1, a2, 1113443; CHECK-RV64-NEXT: bltz a1, .LBB61_57913444; CHECK-RV64-NEXT: j .LBB61_5313445; CHECK-RV64-NEXT: .LBB61_579: # %cond.load20513446; CHECK-RV64-NEXT: lbu a1, 0(a0)13447; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13448; CHECK-RV64-NEXT: vmv8r.v v16, v813449; CHECK-RV64-NEXT: vmv.s.x v9, a113450; CHECK-RV64-NEXT: li a1, 5313451; CHECK-RV64-NEXT: li a3, 5213452; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13453; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313454; CHECK-RV64-NEXT: addi a0, a0, 113455; CHECK-RV64-NEXT: vmv1r.v v16, v813456; CHECK-RV64-NEXT: vmv8r.v v8, v1613457; CHECK-RV64-NEXT: slli a1, a2, 1013458; CHECK-RV64-NEXT: bltz a1, .LBB61_58013459; CHECK-RV64-NEXT: j .LBB61_5413460; CHECK-RV64-NEXT: .LBB61_580: # %cond.load20913461; CHECK-RV64-NEXT: lbu a1, 0(a0)13462; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13463; CHECK-RV64-NEXT: vmv8r.v v16, v813464; CHECK-RV64-NEXT: vmv.s.x v9, a113465; CHECK-RV64-NEXT: li a1, 5413466; CHECK-RV64-NEXT: li a3, 5313467; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13468; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313469; CHECK-RV64-NEXT: addi a0, a0, 113470; CHECK-RV64-NEXT: vmv1r.v v16, v813471; CHECK-RV64-NEXT: vmv8r.v v8, v1613472; CHECK-RV64-NEXT: slli a1, a2, 913473; CHECK-RV64-NEXT: bltz a1, .LBB61_58113474; CHECK-RV64-NEXT: j .LBB61_5513475; CHECK-RV64-NEXT: .LBB61_581: # %cond.load21313476; CHECK-RV64-NEXT: lbu a1, 0(a0)13477; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13478; CHECK-RV64-NEXT: vmv8r.v v16, v813479; CHECK-RV64-NEXT: vmv.s.x v9, a113480; CHECK-RV64-NEXT: li a1, 5513481; CHECK-RV64-NEXT: li a3, 5413482; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13483; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313484; CHECK-RV64-NEXT: addi a0, a0, 113485; CHECK-RV64-NEXT: vmv1r.v v16, v813486; CHECK-RV64-NEXT: vmv8r.v v8, v1613487; CHECK-RV64-NEXT: slli a1, a2, 813488; CHECK-RV64-NEXT: bltz a1, .LBB61_58213489; CHECK-RV64-NEXT: j .LBB61_5613490; CHECK-RV64-NEXT: .LBB61_582: # %cond.load21713491; CHECK-RV64-NEXT: lbu a1, 0(a0)13492; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13493; CHECK-RV64-NEXT: vmv8r.v v16, v813494; CHECK-RV64-NEXT: vmv.s.x v9, a113495; CHECK-RV64-NEXT: li a1, 5613496; CHECK-RV64-NEXT: li a3, 5513497; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13498; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313499; CHECK-RV64-NEXT: addi a0, a0, 113500; CHECK-RV64-NEXT: vmv1r.v v16, v813501; CHECK-RV64-NEXT: vmv8r.v v8, v1613502; CHECK-RV64-NEXT: slli a1, a2, 713503; CHECK-RV64-NEXT: bltz a1, .LBB61_58313504; CHECK-RV64-NEXT: j .LBB61_5713505; CHECK-RV64-NEXT: .LBB61_583: # %cond.load22113506; CHECK-RV64-NEXT: lbu a1, 0(a0)13507; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13508; CHECK-RV64-NEXT: vmv8r.v v16, v813509; CHECK-RV64-NEXT: vmv.s.x v9, a113510; CHECK-RV64-NEXT: li a1, 5713511; CHECK-RV64-NEXT: li a3, 5613512; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13513; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313514; CHECK-RV64-NEXT: addi a0, a0, 113515; CHECK-RV64-NEXT: vmv1r.v v16, v813516; CHECK-RV64-NEXT: vmv8r.v v8, v1613517; CHECK-RV64-NEXT: slli a1, a2, 613518; CHECK-RV64-NEXT: bltz a1, .LBB61_58413519; CHECK-RV64-NEXT: j .LBB61_5813520; CHECK-RV64-NEXT: .LBB61_584: # %cond.load22513521; CHECK-RV64-NEXT: lbu a1, 0(a0)13522; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13523; CHECK-RV64-NEXT: vmv8r.v v16, v813524; CHECK-RV64-NEXT: vmv.s.x v9, a113525; CHECK-RV64-NEXT: li a1, 5813526; CHECK-RV64-NEXT: li a3, 5713527; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13528; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313529; CHECK-RV64-NEXT: addi a0, a0, 113530; CHECK-RV64-NEXT: vmv1r.v v16, v813531; CHECK-RV64-NEXT: vmv8r.v v8, v1613532; CHECK-RV64-NEXT: slli a1, a2, 513533; CHECK-RV64-NEXT: bltz a1, .LBB61_58513534; CHECK-RV64-NEXT: j .LBB61_5913535; CHECK-RV64-NEXT: .LBB61_585: # %cond.load22913536; CHECK-RV64-NEXT: lbu a1, 0(a0)13537; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13538; CHECK-RV64-NEXT: vmv8r.v v16, v813539; CHECK-RV64-NEXT: vmv.s.x v9, a113540; CHECK-RV64-NEXT: li a1, 5913541; CHECK-RV64-NEXT: li a3, 5813542; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13543; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313544; CHECK-RV64-NEXT: addi a0, a0, 113545; CHECK-RV64-NEXT: vmv1r.v v16, v813546; CHECK-RV64-NEXT: vmv8r.v v8, v1613547; CHECK-RV64-NEXT: slli a1, a2, 413548; CHECK-RV64-NEXT: bltz a1, .LBB61_58613549; CHECK-RV64-NEXT: j .LBB61_6013550; CHECK-RV64-NEXT: .LBB61_586: # %cond.load23313551; CHECK-RV64-NEXT: lbu a1, 0(a0)13552; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13553; CHECK-RV64-NEXT: vmv8r.v v16, v813554; CHECK-RV64-NEXT: vmv.s.x v9, a113555; CHECK-RV64-NEXT: li a1, 6013556; CHECK-RV64-NEXT: li a3, 5913557; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13558; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313559; CHECK-RV64-NEXT: addi a0, a0, 113560; CHECK-RV64-NEXT: vmv1r.v v16, v813561; CHECK-RV64-NEXT: vmv8r.v v8, v1613562; CHECK-RV64-NEXT: slli a1, a2, 313563; CHECK-RV64-NEXT: bltz a1, .LBB61_58713564; CHECK-RV64-NEXT: j .LBB61_6113565; CHECK-RV64-NEXT: .LBB61_587: # %cond.load23713566; CHECK-RV64-NEXT: lbu a1, 0(a0)13567; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13568; CHECK-RV64-NEXT: vmv8r.v v16, v813569; CHECK-RV64-NEXT: vmv.s.x v9, a113570; CHECK-RV64-NEXT: li a1, 6113571; CHECK-RV64-NEXT: li a3, 6013572; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m1, tu, ma13573; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313574; CHECK-RV64-NEXT: addi a0, a0, 113575; CHECK-RV64-NEXT: vmv1r.v v16, v813576; CHECK-RV64-NEXT: vmv8r.v v8, v1613577; CHECK-RV64-NEXT: slli a1, a2, 213578; CHECK-RV64-NEXT: bgez a1, .LBB61_102513579; CHECK-RV64-NEXT: j .LBB61_6213580; CHECK-RV64-NEXT: .LBB61_1025: # %cond.load23713581; CHECK-RV64-NEXT: j .LBB61_6313582; CHECK-RV64-NEXT: .LBB61_588: # %cond.load24913583; CHECK-RV64-NEXT: lbu a2, 0(a0)13584; CHECK-RV64-NEXT: vmv8r.v v16, v813585; CHECK-RV64-NEXT: vmv.s.x v9, a213586; CHECK-RV64-NEXT: li a2, 6413587; CHECK-RV64-NEXT: li a3, 6313588; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m1, tu, ma13589; CHECK-RV64-NEXT: vslideup.vx v8, v9, a313590; CHECK-RV64-NEXT: addi a0, a0, 113591; CHECK-RV64-NEXT: vmv1r.v v16, v813592; CHECK-RV64-NEXT: vmv8r.v v8, v1613593; CHECK-RV64-NEXT: andi a2, a1, 113594; CHECK-RV64-NEXT: bnez a2, .LBB61_58913595; CHECK-RV64-NEXT: j .LBB61_6713596; CHECK-RV64-NEXT: .LBB61_589: # %cond.load25313597; CHECK-RV64-NEXT: lbu a2, 0(a0)13598; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13599; CHECK-RV64-NEXT: vmv8r.v v16, v813600; CHECK-RV64-NEXT: vmv.s.x v10, a213601; CHECK-RV64-NEXT: li a2, 6513602; CHECK-RV64-NEXT: li a3, 6413603; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13604; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313605; CHECK-RV64-NEXT: addi a0, a0, 113606; CHECK-RV64-NEXT: vmv2r.v v16, v813607; CHECK-RV64-NEXT: vmv8r.v v8, v1613608; CHECK-RV64-NEXT: andi a2, a1, 213609; CHECK-RV64-NEXT: bnez a2, .LBB61_59013610; CHECK-RV64-NEXT: j .LBB61_6813611; CHECK-RV64-NEXT: .LBB61_590: # %cond.load25713612; CHECK-RV64-NEXT: lbu a2, 0(a0)13613; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13614; CHECK-RV64-NEXT: vmv8r.v v16, v813615; CHECK-RV64-NEXT: vmv.s.x v10, a213616; CHECK-RV64-NEXT: li a2, 6613617; CHECK-RV64-NEXT: li a3, 6513618; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13619; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313620; CHECK-RV64-NEXT: addi a0, a0, 113621; CHECK-RV64-NEXT: vmv2r.v v16, v813622; CHECK-RV64-NEXT: vmv8r.v v8, v1613623; CHECK-RV64-NEXT: andi a2, a1, 413624; CHECK-RV64-NEXT: bnez a2, .LBB61_59113625; CHECK-RV64-NEXT: j .LBB61_6913626; CHECK-RV64-NEXT: .LBB61_591: # %cond.load26113627; CHECK-RV64-NEXT: lbu a2, 0(a0)13628; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13629; CHECK-RV64-NEXT: vmv8r.v v16, v813630; CHECK-RV64-NEXT: vmv.s.x v10, a213631; CHECK-RV64-NEXT: li a2, 6713632; CHECK-RV64-NEXT: li a3, 6613633; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13634; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313635; CHECK-RV64-NEXT: addi a0, a0, 113636; CHECK-RV64-NEXT: vmv2r.v v16, v813637; CHECK-RV64-NEXT: vmv8r.v v8, v1613638; CHECK-RV64-NEXT: andi a2, a1, 813639; CHECK-RV64-NEXT: bnez a2, .LBB61_59213640; CHECK-RV64-NEXT: j .LBB61_7013641; CHECK-RV64-NEXT: .LBB61_592: # %cond.load26513642; CHECK-RV64-NEXT: lbu a2, 0(a0)13643; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13644; CHECK-RV64-NEXT: vmv8r.v v16, v813645; CHECK-RV64-NEXT: vmv.s.x v10, a213646; CHECK-RV64-NEXT: li a2, 6813647; CHECK-RV64-NEXT: li a3, 6713648; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13649; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313650; CHECK-RV64-NEXT: addi a0, a0, 113651; CHECK-RV64-NEXT: vmv2r.v v16, v813652; CHECK-RV64-NEXT: vmv8r.v v8, v1613653; CHECK-RV64-NEXT: andi a2, a1, 1613654; CHECK-RV64-NEXT: bnez a2, .LBB61_59313655; CHECK-RV64-NEXT: j .LBB61_7113656; CHECK-RV64-NEXT: .LBB61_593: # %cond.load26913657; CHECK-RV64-NEXT: lbu a2, 0(a0)13658; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13659; CHECK-RV64-NEXT: vmv8r.v v16, v813660; CHECK-RV64-NEXT: vmv.s.x v10, a213661; CHECK-RV64-NEXT: li a2, 6913662; CHECK-RV64-NEXT: li a3, 6813663; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13664; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313665; CHECK-RV64-NEXT: addi a0, a0, 113666; CHECK-RV64-NEXT: vmv2r.v v16, v813667; CHECK-RV64-NEXT: vmv8r.v v8, v1613668; CHECK-RV64-NEXT: andi a2, a1, 3213669; CHECK-RV64-NEXT: bnez a2, .LBB61_59413670; CHECK-RV64-NEXT: j .LBB61_7213671; CHECK-RV64-NEXT: .LBB61_594: # %cond.load27313672; CHECK-RV64-NEXT: lbu a2, 0(a0)13673; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13674; CHECK-RV64-NEXT: vmv8r.v v16, v813675; CHECK-RV64-NEXT: vmv.s.x v10, a213676; CHECK-RV64-NEXT: li a2, 7013677; CHECK-RV64-NEXT: li a3, 6913678; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13679; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313680; CHECK-RV64-NEXT: addi a0, a0, 113681; CHECK-RV64-NEXT: vmv2r.v v16, v813682; CHECK-RV64-NEXT: vmv8r.v v8, v1613683; CHECK-RV64-NEXT: andi a2, a1, 6413684; CHECK-RV64-NEXT: bnez a2, .LBB61_59513685; CHECK-RV64-NEXT: j .LBB61_7313686; CHECK-RV64-NEXT: .LBB61_595: # %cond.load27713687; CHECK-RV64-NEXT: lbu a2, 0(a0)13688; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13689; CHECK-RV64-NEXT: vmv8r.v v16, v813690; CHECK-RV64-NEXT: vmv.s.x v10, a213691; CHECK-RV64-NEXT: li a2, 7113692; CHECK-RV64-NEXT: li a3, 7013693; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13694; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313695; CHECK-RV64-NEXT: addi a0, a0, 113696; CHECK-RV64-NEXT: vmv2r.v v16, v813697; CHECK-RV64-NEXT: vmv8r.v v8, v1613698; CHECK-RV64-NEXT: andi a2, a1, 12813699; CHECK-RV64-NEXT: bnez a2, .LBB61_59613700; CHECK-RV64-NEXT: j .LBB61_7413701; CHECK-RV64-NEXT: .LBB61_596: # %cond.load28113702; CHECK-RV64-NEXT: lbu a2, 0(a0)13703; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13704; CHECK-RV64-NEXT: vmv8r.v v16, v813705; CHECK-RV64-NEXT: vmv.s.x v10, a213706; CHECK-RV64-NEXT: li a2, 7213707; CHECK-RV64-NEXT: li a3, 7113708; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13709; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313710; CHECK-RV64-NEXT: addi a0, a0, 113711; CHECK-RV64-NEXT: vmv2r.v v16, v813712; CHECK-RV64-NEXT: vmv8r.v v8, v1613713; CHECK-RV64-NEXT: andi a2, a1, 25613714; CHECK-RV64-NEXT: bnez a2, .LBB61_59713715; CHECK-RV64-NEXT: j .LBB61_7513716; CHECK-RV64-NEXT: .LBB61_597: # %cond.load28513717; CHECK-RV64-NEXT: lbu a2, 0(a0)13718; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13719; CHECK-RV64-NEXT: vmv8r.v v16, v813720; CHECK-RV64-NEXT: vmv.s.x v10, a213721; CHECK-RV64-NEXT: li a2, 7313722; CHECK-RV64-NEXT: li a3, 7213723; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13724; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313725; CHECK-RV64-NEXT: addi a0, a0, 113726; CHECK-RV64-NEXT: vmv2r.v v16, v813727; CHECK-RV64-NEXT: vmv8r.v v8, v1613728; CHECK-RV64-NEXT: andi a2, a1, 51213729; CHECK-RV64-NEXT: bnez a2, .LBB61_59813730; CHECK-RV64-NEXT: j .LBB61_7613731; CHECK-RV64-NEXT: .LBB61_598: # %cond.load28913732; CHECK-RV64-NEXT: lbu a2, 0(a0)13733; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13734; CHECK-RV64-NEXT: vmv8r.v v16, v813735; CHECK-RV64-NEXT: vmv.s.x v10, a213736; CHECK-RV64-NEXT: li a2, 7413737; CHECK-RV64-NEXT: li a3, 7313738; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13739; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313740; CHECK-RV64-NEXT: addi a0, a0, 113741; CHECK-RV64-NEXT: vmv2r.v v16, v813742; CHECK-RV64-NEXT: vmv8r.v v8, v1613743; CHECK-RV64-NEXT: andi a2, a1, 102413744; CHECK-RV64-NEXT: bnez a2, .LBB61_59913745; CHECK-RV64-NEXT: j .LBB61_7713746; CHECK-RV64-NEXT: .LBB61_599: # %cond.load29313747; CHECK-RV64-NEXT: lbu a2, 0(a0)13748; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13749; CHECK-RV64-NEXT: vmv8r.v v16, v813750; CHECK-RV64-NEXT: vmv.s.x v10, a213751; CHECK-RV64-NEXT: li a2, 7513752; CHECK-RV64-NEXT: li a3, 7413753; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13754; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313755; CHECK-RV64-NEXT: addi a0, a0, 113756; CHECK-RV64-NEXT: vmv2r.v v16, v813757; CHECK-RV64-NEXT: vmv8r.v v8, v1613758; CHECK-RV64-NEXT: slli a2, a1, 5213759; CHECK-RV64-NEXT: bltz a2, .LBB61_60013760; CHECK-RV64-NEXT: j .LBB61_7813761; CHECK-RV64-NEXT: .LBB61_600: # %cond.load29713762; CHECK-RV64-NEXT: lbu a2, 0(a0)13763; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13764; CHECK-RV64-NEXT: vmv8r.v v16, v813765; CHECK-RV64-NEXT: vmv.s.x v10, a213766; CHECK-RV64-NEXT: li a2, 7613767; CHECK-RV64-NEXT: li a3, 7513768; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13769; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313770; CHECK-RV64-NEXT: addi a0, a0, 113771; CHECK-RV64-NEXT: vmv2r.v v16, v813772; CHECK-RV64-NEXT: vmv8r.v v8, v1613773; CHECK-RV64-NEXT: slli a2, a1, 5113774; CHECK-RV64-NEXT: bltz a2, .LBB61_60113775; CHECK-RV64-NEXT: j .LBB61_7913776; CHECK-RV64-NEXT: .LBB61_601: # %cond.load30113777; CHECK-RV64-NEXT: lbu a2, 0(a0)13778; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13779; CHECK-RV64-NEXT: vmv8r.v v16, v813780; CHECK-RV64-NEXT: vmv.s.x v10, a213781; CHECK-RV64-NEXT: li a2, 7713782; CHECK-RV64-NEXT: li a3, 7613783; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13784; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313785; CHECK-RV64-NEXT: addi a0, a0, 113786; CHECK-RV64-NEXT: vmv2r.v v16, v813787; CHECK-RV64-NEXT: vmv8r.v v8, v1613788; CHECK-RV64-NEXT: slli a2, a1, 5013789; CHECK-RV64-NEXT: bltz a2, .LBB61_60213790; CHECK-RV64-NEXT: j .LBB61_8013791; CHECK-RV64-NEXT: .LBB61_602: # %cond.load30513792; CHECK-RV64-NEXT: lbu a2, 0(a0)13793; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13794; CHECK-RV64-NEXT: vmv8r.v v16, v813795; CHECK-RV64-NEXT: vmv.s.x v10, a213796; CHECK-RV64-NEXT: li a2, 7813797; CHECK-RV64-NEXT: li a3, 7713798; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13799; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313800; CHECK-RV64-NEXT: addi a0, a0, 113801; CHECK-RV64-NEXT: vmv2r.v v16, v813802; CHECK-RV64-NEXT: vmv8r.v v8, v1613803; CHECK-RV64-NEXT: slli a2, a1, 4913804; CHECK-RV64-NEXT: bltz a2, .LBB61_60313805; CHECK-RV64-NEXT: j .LBB61_8113806; CHECK-RV64-NEXT: .LBB61_603: # %cond.load30913807; CHECK-RV64-NEXT: lbu a2, 0(a0)13808; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13809; CHECK-RV64-NEXT: vmv8r.v v16, v813810; CHECK-RV64-NEXT: vmv.s.x v10, a213811; CHECK-RV64-NEXT: li a2, 7913812; CHECK-RV64-NEXT: li a3, 7813813; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13814; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313815; CHECK-RV64-NEXT: addi a0, a0, 113816; CHECK-RV64-NEXT: vmv2r.v v16, v813817; CHECK-RV64-NEXT: vmv8r.v v8, v1613818; CHECK-RV64-NEXT: slli a2, a1, 4813819; CHECK-RV64-NEXT: bltz a2, .LBB61_60413820; CHECK-RV64-NEXT: j .LBB61_8213821; CHECK-RV64-NEXT: .LBB61_604: # %cond.load31313822; CHECK-RV64-NEXT: lbu a2, 0(a0)13823; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13824; CHECK-RV64-NEXT: vmv8r.v v16, v813825; CHECK-RV64-NEXT: vmv.s.x v10, a213826; CHECK-RV64-NEXT: li a2, 8013827; CHECK-RV64-NEXT: li a3, 7913828; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13829; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313830; CHECK-RV64-NEXT: addi a0, a0, 113831; CHECK-RV64-NEXT: vmv2r.v v16, v813832; CHECK-RV64-NEXT: vmv8r.v v8, v1613833; CHECK-RV64-NEXT: slli a2, a1, 4713834; CHECK-RV64-NEXT: bltz a2, .LBB61_60513835; CHECK-RV64-NEXT: j .LBB61_8313836; CHECK-RV64-NEXT: .LBB61_605: # %cond.load31713837; CHECK-RV64-NEXT: lbu a2, 0(a0)13838; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13839; CHECK-RV64-NEXT: vmv8r.v v16, v813840; CHECK-RV64-NEXT: vmv.s.x v10, a213841; CHECK-RV64-NEXT: li a2, 8113842; CHECK-RV64-NEXT: li a3, 8013843; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13844; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313845; CHECK-RV64-NEXT: addi a0, a0, 113846; CHECK-RV64-NEXT: vmv2r.v v16, v813847; CHECK-RV64-NEXT: vmv8r.v v8, v1613848; CHECK-RV64-NEXT: slli a2, a1, 4613849; CHECK-RV64-NEXT: bltz a2, .LBB61_60613850; CHECK-RV64-NEXT: j .LBB61_8413851; CHECK-RV64-NEXT: .LBB61_606: # %cond.load32113852; CHECK-RV64-NEXT: lbu a2, 0(a0)13853; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13854; CHECK-RV64-NEXT: vmv8r.v v16, v813855; CHECK-RV64-NEXT: vmv.s.x v10, a213856; CHECK-RV64-NEXT: li a2, 8213857; CHECK-RV64-NEXT: li a3, 8113858; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13859; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313860; CHECK-RV64-NEXT: addi a0, a0, 113861; CHECK-RV64-NEXT: vmv2r.v v16, v813862; CHECK-RV64-NEXT: vmv8r.v v8, v1613863; CHECK-RV64-NEXT: slli a2, a1, 4513864; CHECK-RV64-NEXT: bltz a2, .LBB61_60713865; CHECK-RV64-NEXT: j .LBB61_8513866; CHECK-RV64-NEXT: .LBB61_607: # %cond.load32513867; CHECK-RV64-NEXT: lbu a2, 0(a0)13868; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13869; CHECK-RV64-NEXT: vmv8r.v v16, v813870; CHECK-RV64-NEXT: vmv.s.x v10, a213871; CHECK-RV64-NEXT: li a2, 8313872; CHECK-RV64-NEXT: li a3, 8213873; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13874; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313875; CHECK-RV64-NEXT: addi a0, a0, 113876; CHECK-RV64-NEXT: vmv2r.v v16, v813877; CHECK-RV64-NEXT: vmv8r.v v8, v1613878; CHECK-RV64-NEXT: slli a2, a1, 4413879; CHECK-RV64-NEXT: bltz a2, .LBB61_60813880; CHECK-RV64-NEXT: j .LBB61_8613881; CHECK-RV64-NEXT: .LBB61_608: # %cond.load32913882; CHECK-RV64-NEXT: lbu a2, 0(a0)13883; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13884; CHECK-RV64-NEXT: vmv8r.v v16, v813885; CHECK-RV64-NEXT: vmv.s.x v10, a213886; CHECK-RV64-NEXT: li a2, 8413887; CHECK-RV64-NEXT: li a3, 8313888; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13889; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313890; CHECK-RV64-NEXT: addi a0, a0, 113891; CHECK-RV64-NEXT: vmv2r.v v16, v813892; CHECK-RV64-NEXT: vmv8r.v v8, v1613893; CHECK-RV64-NEXT: slli a2, a1, 4313894; CHECK-RV64-NEXT: bltz a2, .LBB61_60913895; CHECK-RV64-NEXT: j .LBB61_8713896; CHECK-RV64-NEXT: .LBB61_609: # %cond.load33313897; CHECK-RV64-NEXT: lbu a2, 0(a0)13898; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13899; CHECK-RV64-NEXT: vmv8r.v v16, v813900; CHECK-RV64-NEXT: vmv.s.x v10, a213901; CHECK-RV64-NEXT: li a2, 8513902; CHECK-RV64-NEXT: li a3, 8413903; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13904; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313905; CHECK-RV64-NEXT: addi a0, a0, 113906; CHECK-RV64-NEXT: vmv2r.v v16, v813907; CHECK-RV64-NEXT: vmv8r.v v8, v1613908; CHECK-RV64-NEXT: slli a2, a1, 4213909; CHECK-RV64-NEXT: bltz a2, .LBB61_61013910; CHECK-RV64-NEXT: j .LBB61_8813911; CHECK-RV64-NEXT: .LBB61_610: # %cond.load33713912; CHECK-RV64-NEXT: lbu a2, 0(a0)13913; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13914; CHECK-RV64-NEXT: vmv8r.v v16, v813915; CHECK-RV64-NEXT: vmv.s.x v10, a213916; CHECK-RV64-NEXT: li a2, 8613917; CHECK-RV64-NEXT: li a3, 8513918; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13919; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313920; CHECK-RV64-NEXT: addi a0, a0, 113921; CHECK-RV64-NEXT: vmv2r.v v16, v813922; CHECK-RV64-NEXT: vmv8r.v v8, v1613923; CHECK-RV64-NEXT: slli a2, a1, 4113924; CHECK-RV64-NEXT: bltz a2, .LBB61_61113925; CHECK-RV64-NEXT: j .LBB61_8913926; CHECK-RV64-NEXT: .LBB61_611: # %cond.load34113927; CHECK-RV64-NEXT: lbu a2, 0(a0)13928; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13929; CHECK-RV64-NEXT: vmv8r.v v16, v813930; CHECK-RV64-NEXT: vmv.s.x v10, a213931; CHECK-RV64-NEXT: li a2, 8713932; CHECK-RV64-NEXT: li a3, 8613933; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13934; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313935; CHECK-RV64-NEXT: addi a0, a0, 113936; CHECK-RV64-NEXT: vmv2r.v v16, v813937; CHECK-RV64-NEXT: vmv8r.v v8, v1613938; CHECK-RV64-NEXT: slli a2, a1, 4013939; CHECK-RV64-NEXT: bltz a2, .LBB61_61213940; CHECK-RV64-NEXT: j .LBB61_9013941; CHECK-RV64-NEXT: .LBB61_612: # %cond.load34513942; CHECK-RV64-NEXT: lbu a2, 0(a0)13943; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13944; CHECK-RV64-NEXT: vmv8r.v v16, v813945; CHECK-RV64-NEXT: vmv.s.x v10, a213946; CHECK-RV64-NEXT: li a2, 8813947; CHECK-RV64-NEXT: li a3, 8713948; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13949; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313950; CHECK-RV64-NEXT: addi a0, a0, 113951; CHECK-RV64-NEXT: vmv2r.v v16, v813952; CHECK-RV64-NEXT: vmv8r.v v8, v1613953; CHECK-RV64-NEXT: slli a2, a1, 3913954; CHECK-RV64-NEXT: bltz a2, .LBB61_61313955; CHECK-RV64-NEXT: j .LBB61_9113956; CHECK-RV64-NEXT: .LBB61_613: # %cond.load34913957; CHECK-RV64-NEXT: lbu a2, 0(a0)13958; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13959; CHECK-RV64-NEXT: vmv8r.v v16, v813960; CHECK-RV64-NEXT: vmv.s.x v10, a213961; CHECK-RV64-NEXT: li a2, 8913962; CHECK-RV64-NEXT: li a3, 8813963; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13964; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313965; CHECK-RV64-NEXT: addi a0, a0, 113966; CHECK-RV64-NEXT: vmv2r.v v16, v813967; CHECK-RV64-NEXT: vmv8r.v v8, v1613968; CHECK-RV64-NEXT: slli a2, a1, 3813969; CHECK-RV64-NEXT: bltz a2, .LBB61_61413970; CHECK-RV64-NEXT: j .LBB61_9213971; CHECK-RV64-NEXT: .LBB61_614: # %cond.load35313972; CHECK-RV64-NEXT: lbu a2, 0(a0)13973; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13974; CHECK-RV64-NEXT: vmv8r.v v16, v813975; CHECK-RV64-NEXT: vmv.s.x v10, a213976; CHECK-RV64-NEXT: li a2, 9013977; CHECK-RV64-NEXT: li a3, 8913978; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13979; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313980; CHECK-RV64-NEXT: addi a0, a0, 113981; CHECK-RV64-NEXT: vmv2r.v v16, v813982; CHECK-RV64-NEXT: vmv8r.v v8, v1613983; CHECK-RV64-NEXT: slli a2, a1, 3713984; CHECK-RV64-NEXT: bltz a2, .LBB61_61513985; CHECK-RV64-NEXT: j .LBB61_9313986; CHECK-RV64-NEXT: .LBB61_615: # %cond.load35713987; CHECK-RV64-NEXT: lbu a2, 0(a0)13988; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma13989; CHECK-RV64-NEXT: vmv8r.v v16, v813990; CHECK-RV64-NEXT: vmv.s.x v10, a213991; CHECK-RV64-NEXT: li a2, 9113992; CHECK-RV64-NEXT: li a3, 9013993; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma13994; CHECK-RV64-NEXT: vslideup.vx v8, v10, a313995; CHECK-RV64-NEXT: addi a0, a0, 113996; CHECK-RV64-NEXT: vmv2r.v v16, v813997; CHECK-RV64-NEXT: vmv8r.v v8, v1613998; CHECK-RV64-NEXT: slli a2, a1, 3613999; CHECK-RV64-NEXT: bltz a2, .LBB61_61614000; CHECK-RV64-NEXT: j .LBB61_9414001; CHECK-RV64-NEXT: .LBB61_616: # %cond.load36114002; CHECK-RV64-NEXT: lbu a2, 0(a0)14003; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14004; CHECK-RV64-NEXT: vmv8r.v v16, v814005; CHECK-RV64-NEXT: vmv.s.x v10, a214006; CHECK-RV64-NEXT: li a2, 9214007; CHECK-RV64-NEXT: li a3, 9114008; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14009; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314010; CHECK-RV64-NEXT: addi a0, a0, 114011; CHECK-RV64-NEXT: vmv2r.v v16, v814012; CHECK-RV64-NEXT: vmv8r.v v8, v1614013; CHECK-RV64-NEXT: slli a2, a1, 3514014; CHECK-RV64-NEXT: bltz a2, .LBB61_61714015; CHECK-RV64-NEXT: j .LBB61_9514016; CHECK-RV64-NEXT: .LBB61_617: # %cond.load36514017; CHECK-RV64-NEXT: lbu a2, 0(a0)14018; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14019; CHECK-RV64-NEXT: vmv8r.v v16, v814020; CHECK-RV64-NEXT: vmv.s.x v10, a214021; CHECK-RV64-NEXT: li a2, 9314022; CHECK-RV64-NEXT: li a3, 9214023; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14024; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314025; CHECK-RV64-NEXT: addi a0, a0, 114026; CHECK-RV64-NEXT: vmv2r.v v16, v814027; CHECK-RV64-NEXT: vmv8r.v v8, v1614028; CHECK-RV64-NEXT: slli a2, a1, 3414029; CHECK-RV64-NEXT: bltz a2, .LBB61_61814030; CHECK-RV64-NEXT: j .LBB61_9614031; CHECK-RV64-NEXT: .LBB61_618: # %cond.load36914032; CHECK-RV64-NEXT: lbu a2, 0(a0)14033; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14034; CHECK-RV64-NEXT: vmv8r.v v16, v814035; CHECK-RV64-NEXT: vmv.s.x v10, a214036; CHECK-RV64-NEXT: li a2, 9414037; CHECK-RV64-NEXT: li a3, 9314038; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14039; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314040; CHECK-RV64-NEXT: addi a0, a0, 114041; CHECK-RV64-NEXT: vmv2r.v v16, v814042; CHECK-RV64-NEXT: vmv8r.v v8, v1614043; CHECK-RV64-NEXT: slli a2, a1, 3314044; CHECK-RV64-NEXT: bltz a2, .LBB61_61914045; CHECK-RV64-NEXT: j .LBB61_9714046; CHECK-RV64-NEXT: .LBB61_619: # %cond.load37314047; CHECK-RV64-NEXT: lbu a2, 0(a0)14048; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14049; CHECK-RV64-NEXT: vmv8r.v v16, v814050; CHECK-RV64-NEXT: vmv.s.x v10, a214051; CHECK-RV64-NEXT: li a2, 9514052; CHECK-RV64-NEXT: li a3, 9414053; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14054; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314055; CHECK-RV64-NEXT: addi a0, a0, 114056; CHECK-RV64-NEXT: vmv2r.v v16, v814057; CHECK-RV64-NEXT: vmv8r.v v8, v1614058; CHECK-RV64-NEXT: slli a2, a1, 3214059; CHECK-RV64-NEXT: bltz a2, .LBB61_62014060; CHECK-RV64-NEXT: j .LBB61_9814061; CHECK-RV64-NEXT: .LBB61_620: # %cond.load37714062; CHECK-RV64-NEXT: lbu a2, 0(a0)14063; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14064; CHECK-RV64-NEXT: vmv8r.v v16, v814065; CHECK-RV64-NEXT: vmv.s.x v10, a214066; CHECK-RV64-NEXT: li a2, 9614067; CHECK-RV64-NEXT: li a3, 9514068; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14069; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314070; CHECK-RV64-NEXT: addi a0, a0, 114071; CHECK-RV64-NEXT: vmv2r.v v16, v814072; CHECK-RV64-NEXT: vmv8r.v v8, v1614073; CHECK-RV64-NEXT: slli a2, a1, 3114074; CHECK-RV64-NEXT: bltz a2, .LBB61_62114075; CHECK-RV64-NEXT: j .LBB61_9914076; CHECK-RV64-NEXT: .LBB61_621: # %cond.load38114077; CHECK-RV64-NEXT: lbu a2, 0(a0)14078; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14079; CHECK-RV64-NEXT: vmv8r.v v16, v814080; CHECK-RV64-NEXT: vmv.s.x v10, a214081; CHECK-RV64-NEXT: li a2, 9714082; CHECK-RV64-NEXT: li a3, 9614083; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14084; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314085; CHECK-RV64-NEXT: addi a0, a0, 114086; CHECK-RV64-NEXT: vmv2r.v v16, v814087; CHECK-RV64-NEXT: vmv8r.v v8, v1614088; CHECK-RV64-NEXT: slli a2, a1, 3014089; CHECK-RV64-NEXT: bltz a2, .LBB61_62214090; CHECK-RV64-NEXT: j .LBB61_10014091; CHECK-RV64-NEXT: .LBB61_622: # %cond.load38514092; CHECK-RV64-NEXT: lbu a2, 0(a0)14093; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14094; CHECK-RV64-NEXT: vmv8r.v v16, v814095; CHECK-RV64-NEXT: vmv.s.x v10, a214096; CHECK-RV64-NEXT: li a2, 9814097; CHECK-RV64-NEXT: li a3, 9714098; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14099; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314100; CHECK-RV64-NEXT: addi a0, a0, 114101; CHECK-RV64-NEXT: vmv2r.v v16, v814102; CHECK-RV64-NEXT: vmv8r.v v8, v1614103; CHECK-RV64-NEXT: slli a2, a1, 2914104; CHECK-RV64-NEXT: bltz a2, .LBB61_62314105; CHECK-RV64-NEXT: j .LBB61_10114106; CHECK-RV64-NEXT: .LBB61_623: # %cond.load38914107; CHECK-RV64-NEXT: lbu a2, 0(a0)14108; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14109; CHECK-RV64-NEXT: vmv8r.v v16, v814110; CHECK-RV64-NEXT: vmv.s.x v10, a214111; CHECK-RV64-NEXT: li a2, 9914112; CHECK-RV64-NEXT: li a3, 9814113; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14114; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314115; CHECK-RV64-NEXT: addi a0, a0, 114116; CHECK-RV64-NEXT: vmv2r.v v16, v814117; CHECK-RV64-NEXT: vmv8r.v v8, v1614118; CHECK-RV64-NEXT: slli a2, a1, 2814119; CHECK-RV64-NEXT: bltz a2, .LBB61_62414120; CHECK-RV64-NEXT: j .LBB61_10214121; CHECK-RV64-NEXT: .LBB61_624: # %cond.load39314122; CHECK-RV64-NEXT: lbu a2, 0(a0)14123; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14124; CHECK-RV64-NEXT: vmv8r.v v16, v814125; CHECK-RV64-NEXT: vmv.s.x v10, a214126; CHECK-RV64-NEXT: li a2, 10014127; CHECK-RV64-NEXT: li a3, 9914128; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14129; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314130; CHECK-RV64-NEXT: addi a0, a0, 114131; CHECK-RV64-NEXT: vmv2r.v v16, v814132; CHECK-RV64-NEXT: vmv8r.v v8, v1614133; CHECK-RV64-NEXT: slli a2, a1, 2714134; CHECK-RV64-NEXT: bltz a2, .LBB61_62514135; CHECK-RV64-NEXT: j .LBB61_10314136; CHECK-RV64-NEXT: .LBB61_625: # %cond.load39714137; CHECK-RV64-NEXT: lbu a2, 0(a0)14138; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14139; CHECK-RV64-NEXT: vmv8r.v v16, v814140; CHECK-RV64-NEXT: vmv.s.x v10, a214141; CHECK-RV64-NEXT: li a2, 10114142; CHECK-RV64-NEXT: li a3, 10014143; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14144; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314145; CHECK-RV64-NEXT: addi a0, a0, 114146; CHECK-RV64-NEXT: vmv2r.v v16, v814147; CHECK-RV64-NEXT: vmv8r.v v8, v1614148; CHECK-RV64-NEXT: slli a2, a1, 2614149; CHECK-RV64-NEXT: bltz a2, .LBB61_62614150; CHECK-RV64-NEXT: j .LBB61_10414151; CHECK-RV64-NEXT: .LBB61_626: # %cond.load40114152; CHECK-RV64-NEXT: lbu a2, 0(a0)14153; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14154; CHECK-RV64-NEXT: vmv8r.v v16, v814155; CHECK-RV64-NEXT: vmv.s.x v10, a214156; CHECK-RV64-NEXT: li a2, 10214157; CHECK-RV64-NEXT: li a3, 10114158; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14159; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314160; CHECK-RV64-NEXT: addi a0, a0, 114161; CHECK-RV64-NEXT: vmv2r.v v16, v814162; CHECK-RV64-NEXT: vmv8r.v v8, v1614163; CHECK-RV64-NEXT: slli a2, a1, 2514164; CHECK-RV64-NEXT: bltz a2, .LBB61_62714165; CHECK-RV64-NEXT: j .LBB61_10514166; CHECK-RV64-NEXT: .LBB61_627: # %cond.load40514167; CHECK-RV64-NEXT: lbu a2, 0(a0)14168; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14169; CHECK-RV64-NEXT: vmv8r.v v16, v814170; CHECK-RV64-NEXT: vmv.s.x v10, a214171; CHECK-RV64-NEXT: li a2, 10314172; CHECK-RV64-NEXT: li a3, 10214173; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14174; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314175; CHECK-RV64-NEXT: addi a0, a0, 114176; CHECK-RV64-NEXT: vmv2r.v v16, v814177; CHECK-RV64-NEXT: vmv8r.v v8, v1614178; CHECK-RV64-NEXT: slli a2, a1, 2414179; CHECK-RV64-NEXT: bltz a2, .LBB61_62814180; CHECK-RV64-NEXT: j .LBB61_10614181; CHECK-RV64-NEXT: .LBB61_628: # %cond.load40914182; CHECK-RV64-NEXT: lbu a2, 0(a0)14183; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14184; CHECK-RV64-NEXT: vmv8r.v v16, v814185; CHECK-RV64-NEXT: vmv.s.x v10, a214186; CHECK-RV64-NEXT: li a2, 10414187; CHECK-RV64-NEXT: li a3, 10314188; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14189; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314190; CHECK-RV64-NEXT: addi a0, a0, 114191; CHECK-RV64-NEXT: vmv2r.v v16, v814192; CHECK-RV64-NEXT: vmv8r.v v8, v1614193; CHECK-RV64-NEXT: slli a2, a1, 2314194; CHECK-RV64-NEXT: bltz a2, .LBB61_62914195; CHECK-RV64-NEXT: j .LBB61_10714196; CHECK-RV64-NEXT: .LBB61_629: # %cond.load41314197; CHECK-RV64-NEXT: lbu a2, 0(a0)14198; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14199; CHECK-RV64-NEXT: vmv8r.v v16, v814200; CHECK-RV64-NEXT: vmv.s.x v10, a214201; CHECK-RV64-NEXT: li a2, 10514202; CHECK-RV64-NEXT: li a3, 10414203; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14204; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314205; CHECK-RV64-NEXT: addi a0, a0, 114206; CHECK-RV64-NEXT: vmv2r.v v16, v814207; CHECK-RV64-NEXT: vmv8r.v v8, v1614208; CHECK-RV64-NEXT: slli a2, a1, 2214209; CHECK-RV64-NEXT: bltz a2, .LBB61_63014210; CHECK-RV64-NEXT: j .LBB61_10814211; CHECK-RV64-NEXT: .LBB61_630: # %cond.load41714212; CHECK-RV64-NEXT: lbu a2, 0(a0)14213; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14214; CHECK-RV64-NEXT: vmv8r.v v16, v814215; CHECK-RV64-NEXT: vmv.s.x v10, a214216; CHECK-RV64-NEXT: li a2, 10614217; CHECK-RV64-NEXT: li a3, 10514218; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14219; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314220; CHECK-RV64-NEXT: addi a0, a0, 114221; CHECK-RV64-NEXT: vmv2r.v v16, v814222; CHECK-RV64-NEXT: vmv8r.v v8, v1614223; CHECK-RV64-NEXT: slli a2, a1, 2114224; CHECK-RV64-NEXT: bltz a2, .LBB61_63114225; CHECK-RV64-NEXT: j .LBB61_10914226; CHECK-RV64-NEXT: .LBB61_631: # %cond.load42114227; CHECK-RV64-NEXT: lbu a2, 0(a0)14228; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14229; CHECK-RV64-NEXT: vmv8r.v v16, v814230; CHECK-RV64-NEXT: vmv.s.x v10, a214231; CHECK-RV64-NEXT: li a2, 10714232; CHECK-RV64-NEXT: li a3, 10614233; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14234; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314235; CHECK-RV64-NEXT: addi a0, a0, 114236; CHECK-RV64-NEXT: vmv2r.v v16, v814237; CHECK-RV64-NEXT: vmv8r.v v8, v1614238; CHECK-RV64-NEXT: slli a2, a1, 2014239; CHECK-RV64-NEXT: bltz a2, .LBB61_63214240; CHECK-RV64-NEXT: j .LBB61_11014241; CHECK-RV64-NEXT: .LBB61_632: # %cond.load42514242; CHECK-RV64-NEXT: lbu a2, 0(a0)14243; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14244; CHECK-RV64-NEXT: vmv8r.v v16, v814245; CHECK-RV64-NEXT: vmv.s.x v10, a214246; CHECK-RV64-NEXT: li a2, 10814247; CHECK-RV64-NEXT: li a3, 10714248; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14249; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314250; CHECK-RV64-NEXT: addi a0, a0, 114251; CHECK-RV64-NEXT: vmv2r.v v16, v814252; CHECK-RV64-NEXT: vmv8r.v v8, v1614253; CHECK-RV64-NEXT: slli a2, a1, 1914254; CHECK-RV64-NEXT: bltz a2, .LBB61_63314255; CHECK-RV64-NEXT: j .LBB61_11114256; CHECK-RV64-NEXT: .LBB61_633: # %cond.load42914257; CHECK-RV64-NEXT: lbu a2, 0(a0)14258; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14259; CHECK-RV64-NEXT: vmv8r.v v16, v814260; CHECK-RV64-NEXT: vmv.s.x v10, a214261; CHECK-RV64-NEXT: li a2, 10914262; CHECK-RV64-NEXT: li a3, 10814263; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14264; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314265; CHECK-RV64-NEXT: addi a0, a0, 114266; CHECK-RV64-NEXT: vmv2r.v v16, v814267; CHECK-RV64-NEXT: vmv8r.v v8, v1614268; CHECK-RV64-NEXT: slli a2, a1, 1814269; CHECK-RV64-NEXT: bltz a2, .LBB61_63414270; CHECK-RV64-NEXT: j .LBB61_11214271; CHECK-RV64-NEXT: .LBB61_634: # %cond.load43314272; CHECK-RV64-NEXT: lbu a2, 0(a0)14273; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14274; CHECK-RV64-NEXT: vmv8r.v v16, v814275; CHECK-RV64-NEXT: vmv.s.x v10, a214276; CHECK-RV64-NEXT: li a2, 11014277; CHECK-RV64-NEXT: li a3, 10914278; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14279; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314280; CHECK-RV64-NEXT: addi a0, a0, 114281; CHECK-RV64-NEXT: vmv2r.v v16, v814282; CHECK-RV64-NEXT: vmv8r.v v8, v1614283; CHECK-RV64-NEXT: slli a2, a1, 1714284; CHECK-RV64-NEXT: bltz a2, .LBB61_63514285; CHECK-RV64-NEXT: j .LBB61_11314286; CHECK-RV64-NEXT: .LBB61_635: # %cond.load43714287; CHECK-RV64-NEXT: lbu a2, 0(a0)14288; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14289; CHECK-RV64-NEXT: vmv8r.v v16, v814290; CHECK-RV64-NEXT: vmv.s.x v10, a214291; CHECK-RV64-NEXT: li a2, 11114292; CHECK-RV64-NEXT: li a3, 11014293; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14294; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314295; CHECK-RV64-NEXT: addi a0, a0, 114296; CHECK-RV64-NEXT: vmv2r.v v16, v814297; CHECK-RV64-NEXT: vmv8r.v v8, v1614298; CHECK-RV64-NEXT: slli a2, a1, 1614299; CHECK-RV64-NEXT: bltz a2, .LBB61_63614300; CHECK-RV64-NEXT: j .LBB61_11414301; CHECK-RV64-NEXT: .LBB61_636: # %cond.load44114302; CHECK-RV64-NEXT: lbu a2, 0(a0)14303; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14304; CHECK-RV64-NEXT: vmv8r.v v16, v814305; CHECK-RV64-NEXT: vmv.s.x v10, a214306; CHECK-RV64-NEXT: li a2, 11214307; CHECK-RV64-NEXT: li a3, 11114308; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14309; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314310; CHECK-RV64-NEXT: addi a0, a0, 114311; CHECK-RV64-NEXT: vmv2r.v v16, v814312; CHECK-RV64-NEXT: vmv8r.v v8, v1614313; CHECK-RV64-NEXT: slli a2, a1, 1514314; CHECK-RV64-NEXT: bltz a2, .LBB61_63714315; CHECK-RV64-NEXT: j .LBB61_11514316; CHECK-RV64-NEXT: .LBB61_637: # %cond.load44514317; CHECK-RV64-NEXT: lbu a2, 0(a0)14318; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14319; CHECK-RV64-NEXT: vmv8r.v v16, v814320; CHECK-RV64-NEXT: vmv.s.x v10, a214321; CHECK-RV64-NEXT: li a2, 11314322; CHECK-RV64-NEXT: li a3, 11214323; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14324; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314325; CHECK-RV64-NEXT: addi a0, a0, 114326; CHECK-RV64-NEXT: vmv2r.v v16, v814327; CHECK-RV64-NEXT: vmv8r.v v8, v1614328; CHECK-RV64-NEXT: slli a2, a1, 1414329; CHECK-RV64-NEXT: bltz a2, .LBB61_63814330; CHECK-RV64-NEXT: j .LBB61_11614331; CHECK-RV64-NEXT: .LBB61_638: # %cond.load44914332; CHECK-RV64-NEXT: lbu a2, 0(a0)14333; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14334; CHECK-RV64-NEXT: vmv8r.v v16, v814335; CHECK-RV64-NEXT: vmv.s.x v10, a214336; CHECK-RV64-NEXT: li a2, 11414337; CHECK-RV64-NEXT: li a3, 11314338; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14339; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314340; CHECK-RV64-NEXT: addi a0, a0, 114341; CHECK-RV64-NEXT: vmv2r.v v16, v814342; CHECK-RV64-NEXT: vmv8r.v v8, v1614343; CHECK-RV64-NEXT: slli a2, a1, 1314344; CHECK-RV64-NEXT: bltz a2, .LBB61_63914345; CHECK-RV64-NEXT: j .LBB61_11714346; CHECK-RV64-NEXT: .LBB61_639: # %cond.load45314347; CHECK-RV64-NEXT: lbu a2, 0(a0)14348; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14349; CHECK-RV64-NEXT: vmv8r.v v16, v814350; CHECK-RV64-NEXT: vmv.s.x v10, a214351; CHECK-RV64-NEXT: li a2, 11514352; CHECK-RV64-NEXT: li a3, 11414353; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14354; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314355; CHECK-RV64-NEXT: addi a0, a0, 114356; CHECK-RV64-NEXT: vmv2r.v v16, v814357; CHECK-RV64-NEXT: vmv8r.v v8, v1614358; CHECK-RV64-NEXT: slli a2, a1, 1214359; CHECK-RV64-NEXT: bltz a2, .LBB61_64014360; CHECK-RV64-NEXT: j .LBB61_11814361; CHECK-RV64-NEXT: .LBB61_640: # %cond.load45714362; CHECK-RV64-NEXT: lbu a2, 0(a0)14363; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14364; CHECK-RV64-NEXT: vmv8r.v v16, v814365; CHECK-RV64-NEXT: vmv.s.x v10, a214366; CHECK-RV64-NEXT: li a2, 11614367; CHECK-RV64-NEXT: li a3, 11514368; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14369; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314370; CHECK-RV64-NEXT: addi a0, a0, 114371; CHECK-RV64-NEXT: vmv2r.v v16, v814372; CHECK-RV64-NEXT: vmv8r.v v8, v1614373; CHECK-RV64-NEXT: slli a2, a1, 1114374; CHECK-RV64-NEXT: bltz a2, .LBB61_64114375; CHECK-RV64-NEXT: j .LBB61_11914376; CHECK-RV64-NEXT: .LBB61_641: # %cond.load46114377; CHECK-RV64-NEXT: lbu a2, 0(a0)14378; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14379; CHECK-RV64-NEXT: vmv8r.v v16, v814380; CHECK-RV64-NEXT: vmv.s.x v10, a214381; CHECK-RV64-NEXT: li a2, 11714382; CHECK-RV64-NEXT: li a3, 11614383; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14384; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314385; CHECK-RV64-NEXT: addi a0, a0, 114386; CHECK-RV64-NEXT: vmv2r.v v16, v814387; CHECK-RV64-NEXT: vmv8r.v v8, v1614388; CHECK-RV64-NEXT: slli a2, a1, 1014389; CHECK-RV64-NEXT: bltz a2, .LBB61_64214390; CHECK-RV64-NEXT: j .LBB61_12014391; CHECK-RV64-NEXT: .LBB61_642: # %cond.load46514392; CHECK-RV64-NEXT: lbu a2, 0(a0)14393; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14394; CHECK-RV64-NEXT: vmv8r.v v16, v814395; CHECK-RV64-NEXT: vmv.s.x v10, a214396; CHECK-RV64-NEXT: li a2, 11814397; CHECK-RV64-NEXT: li a3, 11714398; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14399; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314400; CHECK-RV64-NEXT: addi a0, a0, 114401; CHECK-RV64-NEXT: vmv2r.v v16, v814402; CHECK-RV64-NEXT: vmv8r.v v8, v1614403; CHECK-RV64-NEXT: slli a2, a1, 914404; CHECK-RV64-NEXT: bltz a2, .LBB61_64314405; CHECK-RV64-NEXT: j .LBB61_12114406; CHECK-RV64-NEXT: .LBB61_643: # %cond.load46914407; CHECK-RV64-NEXT: lbu a2, 0(a0)14408; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14409; CHECK-RV64-NEXT: vmv8r.v v16, v814410; CHECK-RV64-NEXT: vmv.s.x v10, a214411; CHECK-RV64-NEXT: li a2, 11914412; CHECK-RV64-NEXT: li a3, 11814413; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14414; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314415; CHECK-RV64-NEXT: addi a0, a0, 114416; CHECK-RV64-NEXT: vmv2r.v v16, v814417; CHECK-RV64-NEXT: vmv8r.v v8, v1614418; CHECK-RV64-NEXT: slli a2, a1, 814419; CHECK-RV64-NEXT: bltz a2, .LBB61_64414420; CHECK-RV64-NEXT: j .LBB61_12214421; CHECK-RV64-NEXT: .LBB61_644: # %cond.load47314422; CHECK-RV64-NEXT: lbu a2, 0(a0)14423; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14424; CHECK-RV64-NEXT: vmv8r.v v16, v814425; CHECK-RV64-NEXT: vmv.s.x v10, a214426; CHECK-RV64-NEXT: li a2, 12014427; CHECK-RV64-NEXT: li a3, 11914428; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14429; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314430; CHECK-RV64-NEXT: addi a0, a0, 114431; CHECK-RV64-NEXT: vmv2r.v v16, v814432; CHECK-RV64-NEXT: vmv8r.v v8, v1614433; CHECK-RV64-NEXT: slli a2, a1, 714434; CHECK-RV64-NEXT: bltz a2, .LBB61_64514435; CHECK-RV64-NEXT: j .LBB61_12314436; CHECK-RV64-NEXT: .LBB61_645: # %cond.load47714437; CHECK-RV64-NEXT: lbu a2, 0(a0)14438; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14439; CHECK-RV64-NEXT: vmv8r.v v16, v814440; CHECK-RV64-NEXT: vmv.s.x v10, a214441; CHECK-RV64-NEXT: li a2, 12114442; CHECK-RV64-NEXT: li a3, 12014443; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14444; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314445; CHECK-RV64-NEXT: addi a0, a0, 114446; CHECK-RV64-NEXT: vmv2r.v v16, v814447; CHECK-RV64-NEXT: vmv8r.v v8, v1614448; CHECK-RV64-NEXT: slli a2, a1, 614449; CHECK-RV64-NEXT: bltz a2, .LBB61_64614450; CHECK-RV64-NEXT: j .LBB61_12414451; CHECK-RV64-NEXT: .LBB61_646: # %cond.load48114452; CHECK-RV64-NEXT: lbu a2, 0(a0)14453; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14454; CHECK-RV64-NEXT: vmv8r.v v16, v814455; CHECK-RV64-NEXT: vmv.s.x v10, a214456; CHECK-RV64-NEXT: li a2, 12214457; CHECK-RV64-NEXT: li a3, 12114458; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14459; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314460; CHECK-RV64-NEXT: addi a0, a0, 114461; CHECK-RV64-NEXT: vmv2r.v v16, v814462; CHECK-RV64-NEXT: vmv8r.v v8, v1614463; CHECK-RV64-NEXT: slli a2, a1, 514464; CHECK-RV64-NEXT: bltz a2, .LBB61_64714465; CHECK-RV64-NEXT: j .LBB61_12514466; CHECK-RV64-NEXT: .LBB61_647: # %cond.load48514467; CHECK-RV64-NEXT: lbu a2, 0(a0)14468; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14469; CHECK-RV64-NEXT: vmv8r.v v16, v814470; CHECK-RV64-NEXT: vmv.s.x v10, a214471; CHECK-RV64-NEXT: li a2, 12314472; CHECK-RV64-NEXT: li a3, 12214473; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14474; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314475; CHECK-RV64-NEXT: addi a0, a0, 114476; CHECK-RV64-NEXT: vmv2r.v v16, v814477; CHECK-RV64-NEXT: vmv8r.v v8, v1614478; CHECK-RV64-NEXT: slli a2, a1, 414479; CHECK-RV64-NEXT: bltz a2, .LBB61_64814480; CHECK-RV64-NEXT: j .LBB61_12614481; CHECK-RV64-NEXT: .LBB61_648: # %cond.load48914482; CHECK-RV64-NEXT: lbu a2, 0(a0)14483; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14484; CHECK-RV64-NEXT: vmv8r.v v16, v814485; CHECK-RV64-NEXT: vmv.s.x v10, a214486; CHECK-RV64-NEXT: li a2, 12414487; CHECK-RV64-NEXT: li a3, 12314488; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14489; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314490; CHECK-RV64-NEXT: addi a0, a0, 114491; CHECK-RV64-NEXT: vmv2r.v v16, v814492; CHECK-RV64-NEXT: vmv8r.v v8, v1614493; CHECK-RV64-NEXT: slli a2, a1, 314494; CHECK-RV64-NEXT: bltz a2, .LBB61_64914495; CHECK-RV64-NEXT: j .LBB61_12714496; CHECK-RV64-NEXT: .LBB61_649: # %cond.load49314497; CHECK-RV64-NEXT: lbu a2, 0(a0)14498; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14499; CHECK-RV64-NEXT: vmv8r.v v16, v814500; CHECK-RV64-NEXT: vmv.s.x v10, a214501; CHECK-RV64-NEXT: li a2, 12514502; CHECK-RV64-NEXT: li a3, 12414503; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m2, tu, ma14504; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314505; CHECK-RV64-NEXT: addi a0, a0, 114506; CHECK-RV64-NEXT: vmv2r.v v16, v814507; CHECK-RV64-NEXT: vmv8r.v v8, v1614508; CHECK-RV64-NEXT: slli a2, a1, 214509; CHECK-RV64-NEXT: bgez a2, .LBB61_102614510; CHECK-RV64-NEXT: j .LBB61_12814511; CHECK-RV64-NEXT: .LBB61_1026: # %cond.load49314512; CHECK-RV64-NEXT: j .LBB61_12914513; CHECK-RV64-NEXT: .LBB61_650: # %cond.load50514514; CHECK-RV64-NEXT: lbu a1, 0(a0)14515; CHECK-RV64-NEXT: vmv8r.v v16, v814516; CHECK-RV64-NEXT: vmv.s.x v10, a114517; CHECK-RV64-NEXT: li a1, 12814518; CHECK-RV64-NEXT: li a3, 12714519; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m2, tu, ma14520; CHECK-RV64-NEXT: vslideup.vx v8, v10, a314521; CHECK-RV64-NEXT: addi a0, a0, 114522; CHECK-RV64-NEXT: vmv2r.v v16, v814523; CHECK-RV64-NEXT: vmv8r.v v8, v1614524; CHECK-RV64-NEXT: andi a1, a2, 114525; CHECK-RV64-NEXT: bnez a1, .LBB61_65114526; CHECK-RV64-NEXT: j .LBB61_13314527; CHECK-RV64-NEXT: .LBB61_651: # %cond.load50914528; CHECK-RV64-NEXT: lbu a1, 0(a0)14529; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14530; CHECK-RV64-NEXT: vmv8r.v v16, v814531; CHECK-RV64-NEXT: vmv.s.x v12, a114532; CHECK-RV64-NEXT: li a1, 12914533; CHECK-RV64-NEXT: li a3, 12814534; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14535; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314536; CHECK-RV64-NEXT: addi a0, a0, 114537; CHECK-RV64-NEXT: vmv4r.v v16, v814538; CHECK-RV64-NEXT: vmv8r.v v8, v1614539; CHECK-RV64-NEXT: andi a1, a2, 214540; CHECK-RV64-NEXT: bnez a1, .LBB61_65214541; CHECK-RV64-NEXT: j .LBB61_13414542; CHECK-RV64-NEXT: .LBB61_652: # %cond.load51314543; CHECK-RV64-NEXT: lbu a1, 0(a0)14544; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14545; CHECK-RV64-NEXT: vmv8r.v v16, v814546; CHECK-RV64-NEXT: vmv.s.x v12, a114547; CHECK-RV64-NEXT: li a1, 13014548; CHECK-RV64-NEXT: li a3, 12914549; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14550; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314551; CHECK-RV64-NEXT: addi a0, a0, 114552; CHECK-RV64-NEXT: vmv4r.v v16, v814553; CHECK-RV64-NEXT: vmv8r.v v8, v1614554; CHECK-RV64-NEXT: andi a1, a2, 414555; CHECK-RV64-NEXT: bnez a1, .LBB61_65314556; CHECK-RV64-NEXT: j .LBB61_13514557; CHECK-RV64-NEXT: .LBB61_653: # %cond.load51714558; CHECK-RV64-NEXT: lbu a1, 0(a0)14559; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14560; CHECK-RV64-NEXT: vmv8r.v v16, v814561; CHECK-RV64-NEXT: vmv.s.x v12, a114562; CHECK-RV64-NEXT: li a1, 13114563; CHECK-RV64-NEXT: li a3, 13014564; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14565; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314566; CHECK-RV64-NEXT: addi a0, a0, 114567; CHECK-RV64-NEXT: vmv4r.v v16, v814568; CHECK-RV64-NEXT: vmv8r.v v8, v1614569; CHECK-RV64-NEXT: andi a1, a2, 814570; CHECK-RV64-NEXT: bnez a1, .LBB61_65414571; CHECK-RV64-NEXT: j .LBB61_13614572; CHECK-RV64-NEXT: .LBB61_654: # %cond.load52114573; CHECK-RV64-NEXT: lbu a1, 0(a0)14574; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14575; CHECK-RV64-NEXT: vmv8r.v v16, v814576; CHECK-RV64-NEXT: vmv.s.x v12, a114577; CHECK-RV64-NEXT: li a1, 13214578; CHECK-RV64-NEXT: li a3, 13114579; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14580; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314581; CHECK-RV64-NEXT: addi a0, a0, 114582; CHECK-RV64-NEXT: vmv4r.v v16, v814583; CHECK-RV64-NEXT: vmv8r.v v8, v1614584; CHECK-RV64-NEXT: andi a1, a2, 1614585; CHECK-RV64-NEXT: bnez a1, .LBB61_65514586; CHECK-RV64-NEXT: j .LBB61_13714587; CHECK-RV64-NEXT: .LBB61_655: # %cond.load52514588; CHECK-RV64-NEXT: lbu a1, 0(a0)14589; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14590; CHECK-RV64-NEXT: vmv8r.v v16, v814591; CHECK-RV64-NEXT: vmv.s.x v12, a114592; CHECK-RV64-NEXT: li a1, 13314593; CHECK-RV64-NEXT: li a3, 13214594; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14595; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314596; CHECK-RV64-NEXT: addi a0, a0, 114597; CHECK-RV64-NEXT: vmv4r.v v16, v814598; CHECK-RV64-NEXT: vmv8r.v v8, v1614599; CHECK-RV64-NEXT: andi a1, a2, 3214600; CHECK-RV64-NEXT: bnez a1, .LBB61_65614601; CHECK-RV64-NEXT: j .LBB61_13814602; CHECK-RV64-NEXT: .LBB61_656: # %cond.load52914603; CHECK-RV64-NEXT: lbu a1, 0(a0)14604; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14605; CHECK-RV64-NEXT: vmv8r.v v16, v814606; CHECK-RV64-NEXT: vmv.s.x v12, a114607; CHECK-RV64-NEXT: li a1, 13414608; CHECK-RV64-NEXT: li a3, 13314609; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14610; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314611; CHECK-RV64-NEXT: addi a0, a0, 114612; CHECK-RV64-NEXT: vmv4r.v v16, v814613; CHECK-RV64-NEXT: vmv8r.v v8, v1614614; CHECK-RV64-NEXT: andi a1, a2, 6414615; CHECK-RV64-NEXT: bnez a1, .LBB61_65714616; CHECK-RV64-NEXT: j .LBB61_13914617; CHECK-RV64-NEXT: .LBB61_657: # %cond.load53314618; CHECK-RV64-NEXT: lbu a1, 0(a0)14619; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14620; CHECK-RV64-NEXT: vmv8r.v v16, v814621; CHECK-RV64-NEXT: vmv.s.x v12, a114622; CHECK-RV64-NEXT: li a1, 13514623; CHECK-RV64-NEXT: li a3, 13414624; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14625; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314626; CHECK-RV64-NEXT: addi a0, a0, 114627; CHECK-RV64-NEXT: vmv4r.v v16, v814628; CHECK-RV64-NEXT: vmv8r.v v8, v1614629; CHECK-RV64-NEXT: andi a1, a2, 12814630; CHECK-RV64-NEXT: bnez a1, .LBB61_65814631; CHECK-RV64-NEXT: j .LBB61_14014632; CHECK-RV64-NEXT: .LBB61_658: # %cond.load53714633; CHECK-RV64-NEXT: lbu a1, 0(a0)14634; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14635; CHECK-RV64-NEXT: vmv8r.v v16, v814636; CHECK-RV64-NEXT: vmv.s.x v12, a114637; CHECK-RV64-NEXT: li a1, 13614638; CHECK-RV64-NEXT: li a3, 13514639; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14640; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314641; CHECK-RV64-NEXT: addi a0, a0, 114642; CHECK-RV64-NEXT: vmv4r.v v16, v814643; CHECK-RV64-NEXT: vmv8r.v v8, v1614644; CHECK-RV64-NEXT: andi a1, a2, 25614645; CHECK-RV64-NEXT: bnez a1, .LBB61_65914646; CHECK-RV64-NEXT: j .LBB61_14114647; CHECK-RV64-NEXT: .LBB61_659: # %cond.load54114648; CHECK-RV64-NEXT: lbu a1, 0(a0)14649; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14650; CHECK-RV64-NEXT: vmv8r.v v16, v814651; CHECK-RV64-NEXT: vmv.s.x v12, a114652; CHECK-RV64-NEXT: li a1, 13714653; CHECK-RV64-NEXT: li a3, 13614654; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14655; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314656; CHECK-RV64-NEXT: addi a0, a0, 114657; CHECK-RV64-NEXT: vmv4r.v v16, v814658; CHECK-RV64-NEXT: vmv8r.v v8, v1614659; CHECK-RV64-NEXT: andi a1, a2, 51214660; CHECK-RV64-NEXT: bnez a1, .LBB61_66014661; CHECK-RV64-NEXT: j .LBB61_14214662; CHECK-RV64-NEXT: .LBB61_660: # %cond.load54514663; CHECK-RV64-NEXT: lbu a1, 0(a0)14664; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14665; CHECK-RV64-NEXT: vmv8r.v v16, v814666; CHECK-RV64-NEXT: vmv.s.x v12, a114667; CHECK-RV64-NEXT: li a1, 13814668; CHECK-RV64-NEXT: li a3, 13714669; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14670; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314671; CHECK-RV64-NEXT: addi a0, a0, 114672; CHECK-RV64-NEXT: vmv4r.v v16, v814673; CHECK-RV64-NEXT: vmv8r.v v8, v1614674; CHECK-RV64-NEXT: andi a1, a2, 102414675; CHECK-RV64-NEXT: bnez a1, .LBB61_66114676; CHECK-RV64-NEXT: j .LBB61_14314677; CHECK-RV64-NEXT: .LBB61_661: # %cond.load54914678; CHECK-RV64-NEXT: lbu a1, 0(a0)14679; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14680; CHECK-RV64-NEXT: vmv8r.v v16, v814681; CHECK-RV64-NEXT: vmv.s.x v12, a114682; CHECK-RV64-NEXT: li a1, 13914683; CHECK-RV64-NEXT: li a3, 13814684; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14685; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314686; CHECK-RV64-NEXT: addi a0, a0, 114687; CHECK-RV64-NEXT: vmv4r.v v16, v814688; CHECK-RV64-NEXT: vmv8r.v v8, v1614689; CHECK-RV64-NEXT: slli a1, a2, 5214690; CHECK-RV64-NEXT: bltz a1, .LBB61_66214691; CHECK-RV64-NEXT: j .LBB61_14414692; CHECK-RV64-NEXT: .LBB61_662: # %cond.load55314693; CHECK-RV64-NEXT: lbu a1, 0(a0)14694; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14695; CHECK-RV64-NEXT: vmv8r.v v16, v814696; CHECK-RV64-NEXT: vmv.s.x v12, a114697; CHECK-RV64-NEXT: li a1, 14014698; CHECK-RV64-NEXT: li a3, 13914699; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14700; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314701; CHECK-RV64-NEXT: addi a0, a0, 114702; CHECK-RV64-NEXT: vmv4r.v v16, v814703; CHECK-RV64-NEXT: vmv8r.v v8, v1614704; CHECK-RV64-NEXT: slli a1, a2, 5114705; CHECK-RV64-NEXT: bltz a1, .LBB61_66314706; CHECK-RV64-NEXT: j .LBB61_14514707; CHECK-RV64-NEXT: .LBB61_663: # %cond.load55714708; CHECK-RV64-NEXT: lbu a1, 0(a0)14709; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14710; CHECK-RV64-NEXT: vmv8r.v v16, v814711; CHECK-RV64-NEXT: vmv.s.x v12, a114712; CHECK-RV64-NEXT: li a1, 14114713; CHECK-RV64-NEXT: li a3, 14014714; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14715; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314716; CHECK-RV64-NEXT: addi a0, a0, 114717; CHECK-RV64-NEXT: vmv4r.v v16, v814718; CHECK-RV64-NEXT: vmv8r.v v8, v1614719; CHECK-RV64-NEXT: slli a1, a2, 5014720; CHECK-RV64-NEXT: bltz a1, .LBB61_66414721; CHECK-RV64-NEXT: j .LBB61_14614722; CHECK-RV64-NEXT: .LBB61_664: # %cond.load56114723; CHECK-RV64-NEXT: lbu a1, 0(a0)14724; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14725; CHECK-RV64-NEXT: vmv8r.v v16, v814726; CHECK-RV64-NEXT: vmv.s.x v12, a114727; CHECK-RV64-NEXT: li a1, 14214728; CHECK-RV64-NEXT: li a3, 14114729; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14730; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314731; CHECK-RV64-NEXT: addi a0, a0, 114732; CHECK-RV64-NEXT: vmv4r.v v16, v814733; CHECK-RV64-NEXT: vmv8r.v v8, v1614734; CHECK-RV64-NEXT: slli a1, a2, 4914735; CHECK-RV64-NEXT: bltz a1, .LBB61_66514736; CHECK-RV64-NEXT: j .LBB61_14714737; CHECK-RV64-NEXT: .LBB61_665: # %cond.load56514738; CHECK-RV64-NEXT: lbu a1, 0(a0)14739; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14740; CHECK-RV64-NEXT: vmv8r.v v16, v814741; CHECK-RV64-NEXT: vmv.s.x v12, a114742; CHECK-RV64-NEXT: li a1, 14314743; CHECK-RV64-NEXT: li a3, 14214744; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14745; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314746; CHECK-RV64-NEXT: addi a0, a0, 114747; CHECK-RV64-NEXT: vmv4r.v v16, v814748; CHECK-RV64-NEXT: vmv8r.v v8, v1614749; CHECK-RV64-NEXT: slli a1, a2, 4814750; CHECK-RV64-NEXT: bltz a1, .LBB61_66614751; CHECK-RV64-NEXT: j .LBB61_14814752; CHECK-RV64-NEXT: .LBB61_666: # %cond.load56914753; CHECK-RV64-NEXT: lbu a1, 0(a0)14754; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14755; CHECK-RV64-NEXT: vmv8r.v v16, v814756; CHECK-RV64-NEXT: vmv.s.x v12, a114757; CHECK-RV64-NEXT: li a1, 14414758; CHECK-RV64-NEXT: li a3, 14314759; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14760; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314761; CHECK-RV64-NEXT: addi a0, a0, 114762; CHECK-RV64-NEXT: vmv4r.v v16, v814763; CHECK-RV64-NEXT: vmv8r.v v8, v1614764; CHECK-RV64-NEXT: slli a1, a2, 4714765; CHECK-RV64-NEXT: bltz a1, .LBB61_66714766; CHECK-RV64-NEXT: j .LBB61_14914767; CHECK-RV64-NEXT: .LBB61_667: # %cond.load57314768; CHECK-RV64-NEXT: lbu a1, 0(a0)14769; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14770; CHECK-RV64-NEXT: vmv8r.v v16, v814771; CHECK-RV64-NEXT: vmv.s.x v12, a114772; CHECK-RV64-NEXT: li a1, 14514773; CHECK-RV64-NEXT: li a3, 14414774; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14775; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314776; CHECK-RV64-NEXT: addi a0, a0, 114777; CHECK-RV64-NEXT: vmv4r.v v16, v814778; CHECK-RV64-NEXT: vmv8r.v v8, v1614779; CHECK-RV64-NEXT: slli a1, a2, 4614780; CHECK-RV64-NEXT: bltz a1, .LBB61_66814781; CHECK-RV64-NEXT: j .LBB61_15014782; CHECK-RV64-NEXT: .LBB61_668: # %cond.load57714783; CHECK-RV64-NEXT: lbu a1, 0(a0)14784; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14785; CHECK-RV64-NEXT: vmv8r.v v16, v814786; CHECK-RV64-NEXT: vmv.s.x v12, a114787; CHECK-RV64-NEXT: li a1, 14614788; CHECK-RV64-NEXT: li a3, 14514789; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14790; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314791; CHECK-RV64-NEXT: addi a0, a0, 114792; CHECK-RV64-NEXT: vmv4r.v v16, v814793; CHECK-RV64-NEXT: vmv8r.v v8, v1614794; CHECK-RV64-NEXT: slli a1, a2, 4514795; CHECK-RV64-NEXT: bltz a1, .LBB61_66914796; CHECK-RV64-NEXT: j .LBB61_15114797; CHECK-RV64-NEXT: .LBB61_669: # %cond.load58114798; CHECK-RV64-NEXT: lbu a1, 0(a0)14799; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14800; CHECK-RV64-NEXT: vmv8r.v v16, v814801; CHECK-RV64-NEXT: vmv.s.x v12, a114802; CHECK-RV64-NEXT: li a1, 14714803; CHECK-RV64-NEXT: li a3, 14614804; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14805; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314806; CHECK-RV64-NEXT: addi a0, a0, 114807; CHECK-RV64-NEXT: vmv4r.v v16, v814808; CHECK-RV64-NEXT: vmv8r.v v8, v1614809; CHECK-RV64-NEXT: slli a1, a2, 4414810; CHECK-RV64-NEXT: bltz a1, .LBB61_67014811; CHECK-RV64-NEXT: j .LBB61_15214812; CHECK-RV64-NEXT: .LBB61_670: # %cond.load58514813; CHECK-RV64-NEXT: lbu a1, 0(a0)14814; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14815; CHECK-RV64-NEXT: vmv8r.v v16, v814816; CHECK-RV64-NEXT: vmv.s.x v12, a114817; CHECK-RV64-NEXT: li a1, 14814818; CHECK-RV64-NEXT: li a3, 14714819; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14820; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314821; CHECK-RV64-NEXT: addi a0, a0, 114822; CHECK-RV64-NEXT: vmv4r.v v16, v814823; CHECK-RV64-NEXT: vmv8r.v v8, v1614824; CHECK-RV64-NEXT: slli a1, a2, 4314825; CHECK-RV64-NEXT: bltz a1, .LBB61_67114826; CHECK-RV64-NEXT: j .LBB61_15314827; CHECK-RV64-NEXT: .LBB61_671: # %cond.load58914828; CHECK-RV64-NEXT: lbu a1, 0(a0)14829; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14830; CHECK-RV64-NEXT: vmv8r.v v16, v814831; CHECK-RV64-NEXT: vmv.s.x v12, a114832; CHECK-RV64-NEXT: li a1, 14914833; CHECK-RV64-NEXT: li a3, 14814834; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14835; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314836; CHECK-RV64-NEXT: addi a0, a0, 114837; CHECK-RV64-NEXT: vmv4r.v v16, v814838; CHECK-RV64-NEXT: vmv8r.v v8, v1614839; CHECK-RV64-NEXT: slli a1, a2, 4214840; CHECK-RV64-NEXT: bltz a1, .LBB61_67214841; CHECK-RV64-NEXT: j .LBB61_15414842; CHECK-RV64-NEXT: .LBB61_672: # %cond.load59314843; CHECK-RV64-NEXT: lbu a1, 0(a0)14844; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14845; CHECK-RV64-NEXT: vmv8r.v v16, v814846; CHECK-RV64-NEXT: vmv.s.x v12, a114847; CHECK-RV64-NEXT: li a1, 15014848; CHECK-RV64-NEXT: li a3, 14914849; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14850; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314851; CHECK-RV64-NEXT: addi a0, a0, 114852; CHECK-RV64-NEXT: vmv4r.v v16, v814853; CHECK-RV64-NEXT: vmv8r.v v8, v1614854; CHECK-RV64-NEXT: slli a1, a2, 4114855; CHECK-RV64-NEXT: bltz a1, .LBB61_67314856; CHECK-RV64-NEXT: j .LBB61_15514857; CHECK-RV64-NEXT: .LBB61_673: # %cond.load59714858; CHECK-RV64-NEXT: lbu a1, 0(a0)14859; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14860; CHECK-RV64-NEXT: vmv8r.v v16, v814861; CHECK-RV64-NEXT: vmv.s.x v12, a114862; CHECK-RV64-NEXT: li a1, 15114863; CHECK-RV64-NEXT: li a3, 15014864; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14865; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314866; CHECK-RV64-NEXT: addi a0, a0, 114867; CHECK-RV64-NEXT: vmv4r.v v16, v814868; CHECK-RV64-NEXT: vmv8r.v v8, v1614869; CHECK-RV64-NEXT: slli a1, a2, 4014870; CHECK-RV64-NEXT: bltz a1, .LBB61_67414871; CHECK-RV64-NEXT: j .LBB61_15614872; CHECK-RV64-NEXT: .LBB61_674: # %cond.load60114873; CHECK-RV64-NEXT: lbu a1, 0(a0)14874; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14875; CHECK-RV64-NEXT: vmv8r.v v16, v814876; CHECK-RV64-NEXT: vmv.s.x v12, a114877; CHECK-RV64-NEXT: li a1, 15214878; CHECK-RV64-NEXT: li a3, 15114879; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14880; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314881; CHECK-RV64-NEXT: addi a0, a0, 114882; CHECK-RV64-NEXT: vmv4r.v v16, v814883; CHECK-RV64-NEXT: vmv8r.v v8, v1614884; CHECK-RV64-NEXT: slli a1, a2, 3914885; CHECK-RV64-NEXT: bltz a1, .LBB61_67514886; CHECK-RV64-NEXT: j .LBB61_15714887; CHECK-RV64-NEXT: .LBB61_675: # %cond.load60514888; CHECK-RV64-NEXT: lbu a1, 0(a0)14889; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14890; CHECK-RV64-NEXT: vmv8r.v v16, v814891; CHECK-RV64-NEXT: vmv.s.x v12, a114892; CHECK-RV64-NEXT: li a1, 15314893; CHECK-RV64-NEXT: li a3, 15214894; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14895; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314896; CHECK-RV64-NEXT: addi a0, a0, 114897; CHECK-RV64-NEXT: vmv4r.v v16, v814898; CHECK-RV64-NEXT: vmv8r.v v8, v1614899; CHECK-RV64-NEXT: slli a1, a2, 3814900; CHECK-RV64-NEXT: bltz a1, .LBB61_67614901; CHECK-RV64-NEXT: j .LBB61_15814902; CHECK-RV64-NEXT: .LBB61_676: # %cond.load60914903; CHECK-RV64-NEXT: lbu a1, 0(a0)14904; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14905; CHECK-RV64-NEXT: vmv8r.v v16, v814906; CHECK-RV64-NEXT: vmv.s.x v12, a114907; CHECK-RV64-NEXT: li a1, 15414908; CHECK-RV64-NEXT: li a3, 15314909; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14910; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314911; CHECK-RV64-NEXT: addi a0, a0, 114912; CHECK-RV64-NEXT: vmv4r.v v16, v814913; CHECK-RV64-NEXT: vmv8r.v v8, v1614914; CHECK-RV64-NEXT: slli a1, a2, 3714915; CHECK-RV64-NEXT: bltz a1, .LBB61_67714916; CHECK-RV64-NEXT: j .LBB61_15914917; CHECK-RV64-NEXT: .LBB61_677: # %cond.load61314918; CHECK-RV64-NEXT: lbu a1, 0(a0)14919; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14920; CHECK-RV64-NEXT: vmv8r.v v16, v814921; CHECK-RV64-NEXT: vmv.s.x v12, a114922; CHECK-RV64-NEXT: li a1, 15514923; CHECK-RV64-NEXT: li a3, 15414924; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14925; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314926; CHECK-RV64-NEXT: addi a0, a0, 114927; CHECK-RV64-NEXT: vmv4r.v v16, v814928; CHECK-RV64-NEXT: vmv8r.v v8, v1614929; CHECK-RV64-NEXT: slli a1, a2, 3614930; CHECK-RV64-NEXT: bltz a1, .LBB61_67814931; CHECK-RV64-NEXT: j .LBB61_16014932; CHECK-RV64-NEXT: .LBB61_678: # %cond.load61714933; CHECK-RV64-NEXT: lbu a1, 0(a0)14934; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14935; CHECK-RV64-NEXT: vmv8r.v v16, v814936; CHECK-RV64-NEXT: vmv.s.x v12, a114937; CHECK-RV64-NEXT: li a1, 15614938; CHECK-RV64-NEXT: li a3, 15514939; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14940; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314941; CHECK-RV64-NEXT: addi a0, a0, 114942; CHECK-RV64-NEXT: vmv4r.v v16, v814943; CHECK-RV64-NEXT: vmv8r.v v8, v1614944; CHECK-RV64-NEXT: slli a1, a2, 3514945; CHECK-RV64-NEXT: bltz a1, .LBB61_67914946; CHECK-RV64-NEXT: j .LBB61_16114947; CHECK-RV64-NEXT: .LBB61_679: # %cond.load62114948; CHECK-RV64-NEXT: lbu a1, 0(a0)14949; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14950; CHECK-RV64-NEXT: vmv8r.v v16, v814951; CHECK-RV64-NEXT: vmv.s.x v12, a114952; CHECK-RV64-NEXT: li a1, 15714953; CHECK-RV64-NEXT: li a3, 15614954; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14955; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314956; CHECK-RV64-NEXT: addi a0, a0, 114957; CHECK-RV64-NEXT: vmv4r.v v16, v814958; CHECK-RV64-NEXT: vmv8r.v v8, v1614959; CHECK-RV64-NEXT: slli a1, a2, 3414960; CHECK-RV64-NEXT: bltz a1, .LBB61_68014961; CHECK-RV64-NEXT: j .LBB61_16214962; CHECK-RV64-NEXT: .LBB61_680: # %cond.load62514963; CHECK-RV64-NEXT: lbu a1, 0(a0)14964; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14965; CHECK-RV64-NEXT: vmv8r.v v16, v814966; CHECK-RV64-NEXT: vmv.s.x v12, a114967; CHECK-RV64-NEXT: li a1, 15814968; CHECK-RV64-NEXT: li a3, 15714969; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14970; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314971; CHECK-RV64-NEXT: addi a0, a0, 114972; CHECK-RV64-NEXT: vmv4r.v v16, v814973; CHECK-RV64-NEXT: vmv8r.v v8, v1614974; CHECK-RV64-NEXT: slli a1, a2, 3314975; CHECK-RV64-NEXT: bltz a1, .LBB61_68114976; CHECK-RV64-NEXT: j .LBB61_16314977; CHECK-RV64-NEXT: .LBB61_681: # %cond.load62914978; CHECK-RV64-NEXT: lbu a1, 0(a0)14979; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14980; CHECK-RV64-NEXT: vmv8r.v v16, v814981; CHECK-RV64-NEXT: vmv.s.x v12, a114982; CHECK-RV64-NEXT: li a1, 15914983; CHECK-RV64-NEXT: li a3, 15814984; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma14985; CHECK-RV64-NEXT: vslideup.vx v8, v12, a314986; CHECK-RV64-NEXT: addi a0, a0, 114987; CHECK-RV64-NEXT: vmv4r.v v16, v814988; CHECK-RV64-NEXT: vmv8r.v v8, v1614989; CHECK-RV64-NEXT: slli a1, a2, 3214990; CHECK-RV64-NEXT: bltz a1, .LBB61_68214991; CHECK-RV64-NEXT: j .LBB61_16414992; CHECK-RV64-NEXT: .LBB61_682: # %cond.load63314993; CHECK-RV64-NEXT: lbu a1, 0(a0)14994; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma14995; CHECK-RV64-NEXT: vmv8r.v v16, v814996; CHECK-RV64-NEXT: vmv.s.x v12, a114997; CHECK-RV64-NEXT: li a1, 16014998; CHECK-RV64-NEXT: li a3, 15914999; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15000; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315001; CHECK-RV64-NEXT: addi a0, a0, 115002; CHECK-RV64-NEXT: vmv4r.v v16, v815003; CHECK-RV64-NEXT: vmv8r.v v8, v1615004; CHECK-RV64-NEXT: slli a1, a2, 3115005; CHECK-RV64-NEXT: bltz a1, .LBB61_68315006; CHECK-RV64-NEXT: j .LBB61_16515007; CHECK-RV64-NEXT: .LBB61_683: # %cond.load63715008; CHECK-RV64-NEXT: lbu a1, 0(a0)15009; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15010; CHECK-RV64-NEXT: vmv8r.v v16, v815011; CHECK-RV64-NEXT: vmv.s.x v12, a115012; CHECK-RV64-NEXT: li a1, 16115013; CHECK-RV64-NEXT: li a3, 16015014; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15015; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315016; CHECK-RV64-NEXT: addi a0, a0, 115017; CHECK-RV64-NEXT: vmv4r.v v16, v815018; CHECK-RV64-NEXT: vmv8r.v v8, v1615019; CHECK-RV64-NEXT: slli a1, a2, 3015020; CHECK-RV64-NEXT: bltz a1, .LBB61_68415021; CHECK-RV64-NEXT: j .LBB61_16615022; CHECK-RV64-NEXT: .LBB61_684: # %cond.load64115023; CHECK-RV64-NEXT: lbu a1, 0(a0)15024; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15025; CHECK-RV64-NEXT: vmv8r.v v16, v815026; CHECK-RV64-NEXT: vmv.s.x v12, a115027; CHECK-RV64-NEXT: li a1, 16215028; CHECK-RV64-NEXT: li a3, 16115029; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15030; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315031; CHECK-RV64-NEXT: addi a0, a0, 115032; CHECK-RV64-NEXT: vmv4r.v v16, v815033; CHECK-RV64-NEXT: vmv8r.v v8, v1615034; CHECK-RV64-NEXT: slli a1, a2, 2915035; CHECK-RV64-NEXT: bltz a1, .LBB61_68515036; CHECK-RV64-NEXT: j .LBB61_16715037; CHECK-RV64-NEXT: .LBB61_685: # %cond.load64515038; CHECK-RV64-NEXT: lbu a1, 0(a0)15039; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15040; CHECK-RV64-NEXT: vmv8r.v v16, v815041; CHECK-RV64-NEXT: vmv.s.x v12, a115042; CHECK-RV64-NEXT: li a1, 16315043; CHECK-RV64-NEXT: li a3, 16215044; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15045; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315046; CHECK-RV64-NEXT: addi a0, a0, 115047; CHECK-RV64-NEXT: vmv4r.v v16, v815048; CHECK-RV64-NEXT: vmv8r.v v8, v1615049; CHECK-RV64-NEXT: slli a1, a2, 2815050; CHECK-RV64-NEXT: bltz a1, .LBB61_68615051; CHECK-RV64-NEXT: j .LBB61_16815052; CHECK-RV64-NEXT: .LBB61_686: # %cond.load64915053; CHECK-RV64-NEXT: lbu a1, 0(a0)15054; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15055; CHECK-RV64-NEXT: vmv8r.v v16, v815056; CHECK-RV64-NEXT: vmv.s.x v12, a115057; CHECK-RV64-NEXT: li a1, 16415058; CHECK-RV64-NEXT: li a3, 16315059; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15060; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315061; CHECK-RV64-NEXT: addi a0, a0, 115062; CHECK-RV64-NEXT: vmv4r.v v16, v815063; CHECK-RV64-NEXT: vmv8r.v v8, v1615064; CHECK-RV64-NEXT: slli a1, a2, 2715065; CHECK-RV64-NEXT: bltz a1, .LBB61_68715066; CHECK-RV64-NEXT: j .LBB61_16915067; CHECK-RV64-NEXT: .LBB61_687: # %cond.load65315068; CHECK-RV64-NEXT: lbu a1, 0(a0)15069; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15070; CHECK-RV64-NEXT: vmv8r.v v16, v815071; CHECK-RV64-NEXT: vmv.s.x v12, a115072; CHECK-RV64-NEXT: li a1, 16515073; CHECK-RV64-NEXT: li a3, 16415074; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15075; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315076; CHECK-RV64-NEXT: addi a0, a0, 115077; CHECK-RV64-NEXT: vmv4r.v v16, v815078; CHECK-RV64-NEXT: vmv8r.v v8, v1615079; CHECK-RV64-NEXT: slli a1, a2, 2615080; CHECK-RV64-NEXT: bltz a1, .LBB61_68815081; CHECK-RV64-NEXT: j .LBB61_17015082; CHECK-RV64-NEXT: .LBB61_688: # %cond.load65715083; CHECK-RV64-NEXT: lbu a1, 0(a0)15084; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15085; CHECK-RV64-NEXT: vmv8r.v v16, v815086; CHECK-RV64-NEXT: vmv.s.x v12, a115087; CHECK-RV64-NEXT: li a1, 16615088; CHECK-RV64-NEXT: li a3, 16515089; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15090; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315091; CHECK-RV64-NEXT: addi a0, a0, 115092; CHECK-RV64-NEXT: vmv4r.v v16, v815093; CHECK-RV64-NEXT: vmv8r.v v8, v1615094; CHECK-RV64-NEXT: slli a1, a2, 2515095; CHECK-RV64-NEXT: bltz a1, .LBB61_68915096; CHECK-RV64-NEXT: j .LBB61_17115097; CHECK-RV64-NEXT: .LBB61_689: # %cond.load66115098; CHECK-RV64-NEXT: lbu a1, 0(a0)15099; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15100; CHECK-RV64-NEXT: vmv8r.v v16, v815101; CHECK-RV64-NEXT: vmv.s.x v12, a115102; CHECK-RV64-NEXT: li a1, 16715103; CHECK-RV64-NEXT: li a3, 16615104; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15105; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315106; CHECK-RV64-NEXT: addi a0, a0, 115107; CHECK-RV64-NEXT: vmv4r.v v16, v815108; CHECK-RV64-NEXT: vmv8r.v v8, v1615109; CHECK-RV64-NEXT: slli a1, a2, 2415110; CHECK-RV64-NEXT: bltz a1, .LBB61_69015111; CHECK-RV64-NEXT: j .LBB61_17215112; CHECK-RV64-NEXT: .LBB61_690: # %cond.load66515113; CHECK-RV64-NEXT: lbu a1, 0(a0)15114; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15115; CHECK-RV64-NEXT: vmv8r.v v16, v815116; CHECK-RV64-NEXT: vmv.s.x v12, a115117; CHECK-RV64-NEXT: li a1, 16815118; CHECK-RV64-NEXT: li a3, 16715119; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15120; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315121; CHECK-RV64-NEXT: addi a0, a0, 115122; CHECK-RV64-NEXT: vmv4r.v v16, v815123; CHECK-RV64-NEXT: vmv8r.v v8, v1615124; CHECK-RV64-NEXT: slli a1, a2, 2315125; CHECK-RV64-NEXT: bltz a1, .LBB61_69115126; CHECK-RV64-NEXT: j .LBB61_17315127; CHECK-RV64-NEXT: .LBB61_691: # %cond.load66915128; CHECK-RV64-NEXT: lbu a1, 0(a0)15129; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15130; CHECK-RV64-NEXT: vmv8r.v v16, v815131; CHECK-RV64-NEXT: vmv.s.x v12, a115132; CHECK-RV64-NEXT: li a1, 16915133; CHECK-RV64-NEXT: li a3, 16815134; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15135; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315136; CHECK-RV64-NEXT: addi a0, a0, 115137; CHECK-RV64-NEXT: vmv4r.v v16, v815138; CHECK-RV64-NEXT: vmv8r.v v8, v1615139; CHECK-RV64-NEXT: slli a1, a2, 2215140; CHECK-RV64-NEXT: bltz a1, .LBB61_69215141; CHECK-RV64-NEXT: j .LBB61_17415142; CHECK-RV64-NEXT: .LBB61_692: # %cond.load67315143; CHECK-RV64-NEXT: lbu a1, 0(a0)15144; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15145; CHECK-RV64-NEXT: vmv8r.v v16, v815146; CHECK-RV64-NEXT: vmv.s.x v12, a115147; CHECK-RV64-NEXT: li a1, 17015148; CHECK-RV64-NEXT: li a3, 16915149; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15150; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315151; CHECK-RV64-NEXT: addi a0, a0, 115152; CHECK-RV64-NEXT: vmv4r.v v16, v815153; CHECK-RV64-NEXT: vmv8r.v v8, v1615154; CHECK-RV64-NEXT: slli a1, a2, 2115155; CHECK-RV64-NEXT: bltz a1, .LBB61_69315156; CHECK-RV64-NEXT: j .LBB61_17515157; CHECK-RV64-NEXT: .LBB61_693: # %cond.load67715158; CHECK-RV64-NEXT: lbu a1, 0(a0)15159; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15160; CHECK-RV64-NEXT: vmv8r.v v16, v815161; CHECK-RV64-NEXT: vmv.s.x v12, a115162; CHECK-RV64-NEXT: li a1, 17115163; CHECK-RV64-NEXT: li a3, 17015164; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15165; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315166; CHECK-RV64-NEXT: addi a0, a0, 115167; CHECK-RV64-NEXT: vmv4r.v v16, v815168; CHECK-RV64-NEXT: vmv8r.v v8, v1615169; CHECK-RV64-NEXT: slli a1, a2, 2015170; CHECK-RV64-NEXT: bltz a1, .LBB61_69415171; CHECK-RV64-NEXT: j .LBB61_17615172; CHECK-RV64-NEXT: .LBB61_694: # %cond.load68115173; CHECK-RV64-NEXT: lbu a1, 0(a0)15174; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15175; CHECK-RV64-NEXT: vmv8r.v v16, v815176; CHECK-RV64-NEXT: vmv.s.x v12, a115177; CHECK-RV64-NEXT: li a1, 17215178; CHECK-RV64-NEXT: li a3, 17115179; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15180; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315181; CHECK-RV64-NEXT: addi a0, a0, 115182; CHECK-RV64-NEXT: vmv4r.v v16, v815183; CHECK-RV64-NEXT: vmv8r.v v8, v1615184; CHECK-RV64-NEXT: slli a1, a2, 1915185; CHECK-RV64-NEXT: bltz a1, .LBB61_69515186; CHECK-RV64-NEXT: j .LBB61_17715187; CHECK-RV64-NEXT: .LBB61_695: # %cond.load68515188; CHECK-RV64-NEXT: lbu a1, 0(a0)15189; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15190; CHECK-RV64-NEXT: vmv8r.v v16, v815191; CHECK-RV64-NEXT: vmv.s.x v12, a115192; CHECK-RV64-NEXT: li a1, 17315193; CHECK-RV64-NEXT: li a3, 17215194; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15195; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315196; CHECK-RV64-NEXT: addi a0, a0, 115197; CHECK-RV64-NEXT: vmv4r.v v16, v815198; CHECK-RV64-NEXT: vmv8r.v v8, v1615199; CHECK-RV64-NEXT: slli a1, a2, 1815200; CHECK-RV64-NEXT: bltz a1, .LBB61_69615201; CHECK-RV64-NEXT: j .LBB61_17815202; CHECK-RV64-NEXT: .LBB61_696: # %cond.load68915203; CHECK-RV64-NEXT: lbu a1, 0(a0)15204; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15205; CHECK-RV64-NEXT: vmv8r.v v16, v815206; CHECK-RV64-NEXT: vmv.s.x v12, a115207; CHECK-RV64-NEXT: li a1, 17415208; CHECK-RV64-NEXT: li a3, 17315209; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15210; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315211; CHECK-RV64-NEXT: addi a0, a0, 115212; CHECK-RV64-NEXT: vmv4r.v v16, v815213; CHECK-RV64-NEXT: vmv8r.v v8, v1615214; CHECK-RV64-NEXT: slli a1, a2, 1715215; CHECK-RV64-NEXT: bltz a1, .LBB61_69715216; CHECK-RV64-NEXT: j .LBB61_17915217; CHECK-RV64-NEXT: .LBB61_697: # %cond.load69315218; CHECK-RV64-NEXT: lbu a1, 0(a0)15219; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15220; CHECK-RV64-NEXT: vmv8r.v v16, v815221; CHECK-RV64-NEXT: vmv.s.x v12, a115222; CHECK-RV64-NEXT: li a1, 17515223; CHECK-RV64-NEXT: li a3, 17415224; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15225; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315226; CHECK-RV64-NEXT: addi a0, a0, 115227; CHECK-RV64-NEXT: vmv4r.v v16, v815228; CHECK-RV64-NEXT: vmv8r.v v8, v1615229; CHECK-RV64-NEXT: slli a1, a2, 1615230; CHECK-RV64-NEXT: bltz a1, .LBB61_69815231; CHECK-RV64-NEXT: j .LBB61_18015232; CHECK-RV64-NEXT: .LBB61_698: # %cond.load69715233; CHECK-RV64-NEXT: lbu a1, 0(a0)15234; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15235; CHECK-RV64-NEXT: vmv8r.v v16, v815236; CHECK-RV64-NEXT: vmv.s.x v12, a115237; CHECK-RV64-NEXT: li a1, 17615238; CHECK-RV64-NEXT: li a3, 17515239; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15240; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315241; CHECK-RV64-NEXT: addi a0, a0, 115242; CHECK-RV64-NEXT: vmv4r.v v16, v815243; CHECK-RV64-NEXT: vmv8r.v v8, v1615244; CHECK-RV64-NEXT: slli a1, a2, 1515245; CHECK-RV64-NEXT: bltz a1, .LBB61_69915246; CHECK-RV64-NEXT: j .LBB61_18115247; CHECK-RV64-NEXT: .LBB61_699: # %cond.load70115248; CHECK-RV64-NEXT: lbu a1, 0(a0)15249; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15250; CHECK-RV64-NEXT: vmv8r.v v16, v815251; CHECK-RV64-NEXT: vmv.s.x v12, a115252; CHECK-RV64-NEXT: li a1, 17715253; CHECK-RV64-NEXT: li a3, 17615254; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15255; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315256; CHECK-RV64-NEXT: addi a0, a0, 115257; CHECK-RV64-NEXT: vmv4r.v v16, v815258; CHECK-RV64-NEXT: vmv8r.v v8, v1615259; CHECK-RV64-NEXT: slli a1, a2, 1415260; CHECK-RV64-NEXT: bltz a1, .LBB61_70015261; CHECK-RV64-NEXT: j .LBB61_18215262; CHECK-RV64-NEXT: .LBB61_700: # %cond.load70515263; CHECK-RV64-NEXT: lbu a1, 0(a0)15264; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15265; CHECK-RV64-NEXT: vmv8r.v v16, v815266; CHECK-RV64-NEXT: vmv.s.x v12, a115267; CHECK-RV64-NEXT: li a1, 17815268; CHECK-RV64-NEXT: li a3, 17715269; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15270; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315271; CHECK-RV64-NEXT: addi a0, a0, 115272; CHECK-RV64-NEXT: vmv4r.v v16, v815273; CHECK-RV64-NEXT: vmv8r.v v8, v1615274; CHECK-RV64-NEXT: slli a1, a2, 1315275; CHECK-RV64-NEXT: bltz a1, .LBB61_70115276; CHECK-RV64-NEXT: j .LBB61_18315277; CHECK-RV64-NEXT: .LBB61_701: # %cond.load70915278; CHECK-RV64-NEXT: lbu a1, 0(a0)15279; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15280; CHECK-RV64-NEXT: vmv8r.v v16, v815281; CHECK-RV64-NEXT: vmv.s.x v12, a115282; CHECK-RV64-NEXT: li a1, 17915283; CHECK-RV64-NEXT: li a3, 17815284; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15285; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315286; CHECK-RV64-NEXT: addi a0, a0, 115287; CHECK-RV64-NEXT: vmv4r.v v16, v815288; CHECK-RV64-NEXT: vmv8r.v v8, v1615289; CHECK-RV64-NEXT: slli a1, a2, 1215290; CHECK-RV64-NEXT: bltz a1, .LBB61_70215291; CHECK-RV64-NEXT: j .LBB61_18415292; CHECK-RV64-NEXT: .LBB61_702: # %cond.load71315293; CHECK-RV64-NEXT: lbu a1, 0(a0)15294; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15295; CHECK-RV64-NEXT: vmv8r.v v16, v815296; CHECK-RV64-NEXT: vmv.s.x v12, a115297; CHECK-RV64-NEXT: li a1, 18015298; CHECK-RV64-NEXT: li a3, 17915299; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15300; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315301; CHECK-RV64-NEXT: addi a0, a0, 115302; CHECK-RV64-NEXT: vmv4r.v v16, v815303; CHECK-RV64-NEXT: vmv8r.v v8, v1615304; CHECK-RV64-NEXT: slli a1, a2, 1115305; CHECK-RV64-NEXT: bltz a1, .LBB61_70315306; CHECK-RV64-NEXT: j .LBB61_18515307; CHECK-RV64-NEXT: .LBB61_703: # %cond.load71715308; CHECK-RV64-NEXT: lbu a1, 0(a0)15309; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15310; CHECK-RV64-NEXT: vmv8r.v v16, v815311; CHECK-RV64-NEXT: vmv.s.x v12, a115312; CHECK-RV64-NEXT: li a1, 18115313; CHECK-RV64-NEXT: li a3, 18015314; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15315; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315316; CHECK-RV64-NEXT: addi a0, a0, 115317; CHECK-RV64-NEXT: vmv4r.v v16, v815318; CHECK-RV64-NEXT: vmv8r.v v8, v1615319; CHECK-RV64-NEXT: slli a1, a2, 1015320; CHECK-RV64-NEXT: bltz a1, .LBB61_70415321; CHECK-RV64-NEXT: j .LBB61_18615322; CHECK-RV64-NEXT: .LBB61_704: # %cond.load72115323; CHECK-RV64-NEXT: lbu a1, 0(a0)15324; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15325; CHECK-RV64-NEXT: vmv8r.v v16, v815326; CHECK-RV64-NEXT: vmv.s.x v12, a115327; CHECK-RV64-NEXT: li a1, 18215328; CHECK-RV64-NEXT: li a3, 18115329; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15330; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315331; CHECK-RV64-NEXT: addi a0, a0, 115332; CHECK-RV64-NEXT: vmv4r.v v16, v815333; CHECK-RV64-NEXT: vmv8r.v v8, v1615334; CHECK-RV64-NEXT: slli a1, a2, 915335; CHECK-RV64-NEXT: bltz a1, .LBB61_70515336; CHECK-RV64-NEXT: j .LBB61_18715337; CHECK-RV64-NEXT: .LBB61_705: # %cond.load72515338; CHECK-RV64-NEXT: lbu a1, 0(a0)15339; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15340; CHECK-RV64-NEXT: vmv8r.v v16, v815341; CHECK-RV64-NEXT: vmv.s.x v12, a115342; CHECK-RV64-NEXT: li a1, 18315343; CHECK-RV64-NEXT: li a3, 18215344; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15345; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315346; CHECK-RV64-NEXT: addi a0, a0, 115347; CHECK-RV64-NEXT: vmv4r.v v16, v815348; CHECK-RV64-NEXT: vmv8r.v v8, v1615349; CHECK-RV64-NEXT: slli a1, a2, 815350; CHECK-RV64-NEXT: bltz a1, .LBB61_70615351; CHECK-RV64-NEXT: j .LBB61_18815352; CHECK-RV64-NEXT: .LBB61_706: # %cond.load72915353; CHECK-RV64-NEXT: lbu a1, 0(a0)15354; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15355; CHECK-RV64-NEXT: vmv8r.v v16, v815356; CHECK-RV64-NEXT: vmv.s.x v12, a115357; CHECK-RV64-NEXT: li a1, 18415358; CHECK-RV64-NEXT: li a3, 18315359; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15360; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315361; CHECK-RV64-NEXT: addi a0, a0, 115362; CHECK-RV64-NEXT: vmv4r.v v16, v815363; CHECK-RV64-NEXT: vmv8r.v v8, v1615364; CHECK-RV64-NEXT: slli a1, a2, 715365; CHECK-RV64-NEXT: bltz a1, .LBB61_70715366; CHECK-RV64-NEXT: j .LBB61_18915367; CHECK-RV64-NEXT: .LBB61_707: # %cond.load73315368; CHECK-RV64-NEXT: lbu a1, 0(a0)15369; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15370; CHECK-RV64-NEXT: vmv8r.v v16, v815371; CHECK-RV64-NEXT: vmv.s.x v12, a115372; CHECK-RV64-NEXT: li a1, 18515373; CHECK-RV64-NEXT: li a3, 18415374; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15375; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315376; CHECK-RV64-NEXT: addi a0, a0, 115377; CHECK-RV64-NEXT: vmv4r.v v16, v815378; CHECK-RV64-NEXT: vmv8r.v v8, v1615379; CHECK-RV64-NEXT: slli a1, a2, 615380; CHECK-RV64-NEXT: bltz a1, .LBB61_70815381; CHECK-RV64-NEXT: j .LBB61_19015382; CHECK-RV64-NEXT: .LBB61_708: # %cond.load73715383; CHECK-RV64-NEXT: lbu a1, 0(a0)15384; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15385; CHECK-RV64-NEXT: vmv8r.v v16, v815386; CHECK-RV64-NEXT: vmv.s.x v12, a115387; CHECK-RV64-NEXT: li a1, 18615388; CHECK-RV64-NEXT: li a3, 18515389; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15390; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315391; CHECK-RV64-NEXT: addi a0, a0, 115392; CHECK-RV64-NEXT: vmv4r.v v16, v815393; CHECK-RV64-NEXT: vmv8r.v v8, v1615394; CHECK-RV64-NEXT: slli a1, a2, 515395; CHECK-RV64-NEXT: bltz a1, .LBB61_70915396; CHECK-RV64-NEXT: j .LBB61_19115397; CHECK-RV64-NEXT: .LBB61_709: # %cond.load74115398; CHECK-RV64-NEXT: lbu a1, 0(a0)15399; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15400; CHECK-RV64-NEXT: vmv8r.v v16, v815401; CHECK-RV64-NEXT: vmv.s.x v12, a115402; CHECK-RV64-NEXT: li a1, 18715403; CHECK-RV64-NEXT: li a3, 18615404; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15405; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315406; CHECK-RV64-NEXT: addi a0, a0, 115407; CHECK-RV64-NEXT: vmv4r.v v16, v815408; CHECK-RV64-NEXT: vmv8r.v v8, v1615409; CHECK-RV64-NEXT: slli a1, a2, 415410; CHECK-RV64-NEXT: bltz a1, .LBB61_71015411; CHECK-RV64-NEXT: j .LBB61_19215412; CHECK-RV64-NEXT: .LBB61_710: # %cond.load74515413; CHECK-RV64-NEXT: lbu a1, 0(a0)15414; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15415; CHECK-RV64-NEXT: vmv8r.v v16, v815416; CHECK-RV64-NEXT: vmv.s.x v12, a115417; CHECK-RV64-NEXT: li a1, 18815418; CHECK-RV64-NEXT: li a3, 18715419; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15420; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315421; CHECK-RV64-NEXT: addi a0, a0, 115422; CHECK-RV64-NEXT: vmv4r.v v16, v815423; CHECK-RV64-NEXT: vmv8r.v v8, v1615424; CHECK-RV64-NEXT: slli a1, a2, 315425; CHECK-RV64-NEXT: bltz a1, .LBB61_71115426; CHECK-RV64-NEXT: j .LBB61_19315427; CHECK-RV64-NEXT: .LBB61_711: # %cond.load74915428; CHECK-RV64-NEXT: lbu a1, 0(a0)15429; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15430; CHECK-RV64-NEXT: vmv8r.v v16, v815431; CHECK-RV64-NEXT: vmv.s.x v12, a115432; CHECK-RV64-NEXT: li a1, 18915433; CHECK-RV64-NEXT: li a3, 18815434; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma15435; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315436; CHECK-RV64-NEXT: addi a0, a0, 115437; CHECK-RV64-NEXT: vmv4r.v v16, v815438; CHECK-RV64-NEXT: vmv8r.v v8, v1615439; CHECK-RV64-NEXT: slli a1, a2, 215440; CHECK-RV64-NEXT: bgez a1, .LBB61_102715441; CHECK-RV64-NEXT: j .LBB61_19415442; CHECK-RV64-NEXT: .LBB61_1027: # %cond.load74915443; CHECK-RV64-NEXT: j .LBB61_19515444; CHECK-RV64-NEXT: .LBB61_712: # %cond.load76115445; CHECK-RV64-NEXT: lbu a2, 0(a0)15446; CHECK-RV64-NEXT: vmv8r.v v16, v815447; CHECK-RV64-NEXT: vmv.s.x v12, a215448; CHECK-RV64-NEXT: li a2, 19215449; CHECK-RV64-NEXT: li a3, 19115450; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15451; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315452; CHECK-RV64-NEXT: addi a0, a0, 115453; CHECK-RV64-NEXT: vmv4r.v v16, v815454; CHECK-RV64-NEXT: vmv8r.v v8, v1615455; CHECK-RV64-NEXT: andi a2, a1, 115456; CHECK-RV64-NEXT: bnez a2, .LBB61_71315457; CHECK-RV64-NEXT: j .LBB61_19915458; CHECK-RV64-NEXT: .LBB61_713: # %cond.load76515459; CHECK-RV64-NEXT: lbu a2, 0(a0)15460; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15461; CHECK-RV64-NEXT: vmv8r.v v16, v815462; CHECK-RV64-NEXT: vmv.s.x v12, a215463; CHECK-RV64-NEXT: li a2, 19315464; CHECK-RV64-NEXT: li a3, 19215465; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15466; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315467; CHECK-RV64-NEXT: addi a0, a0, 115468; CHECK-RV64-NEXT: vmv4r.v v16, v815469; CHECK-RV64-NEXT: vmv8r.v v8, v1615470; CHECK-RV64-NEXT: andi a2, a1, 215471; CHECK-RV64-NEXT: bnez a2, .LBB61_71415472; CHECK-RV64-NEXT: j .LBB61_20015473; CHECK-RV64-NEXT: .LBB61_714: # %cond.load76915474; CHECK-RV64-NEXT: lbu a2, 0(a0)15475; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15476; CHECK-RV64-NEXT: vmv8r.v v16, v815477; CHECK-RV64-NEXT: vmv.s.x v12, a215478; CHECK-RV64-NEXT: li a2, 19415479; CHECK-RV64-NEXT: li a3, 19315480; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15481; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315482; CHECK-RV64-NEXT: addi a0, a0, 115483; CHECK-RV64-NEXT: vmv4r.v v16, v815484; CHECK-RV64-NEXT: vmv8r.v v8, v1615485; CHECK-RV64-NEXT: andi a2, a1, 415486; CHECK-RV64-NEXT: bnez a2, .LBB61_71515487; CHECK-RV64-NEXT: j .LBB61_20115488; CHECK-RV64-NEXT: .LBB61_715: # %cond.load77315489; CHECK-RV64-NEXT: lbu a2, 0(a0)15490; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15491; CHECK-RV64-NEXT: vmv8r.v v16, v815492; CHECK-RV64-NEXT: vmv.s.x v12, a215493; CHECK-RV64-NEXT: li a2, 19515494; CHECK-RV64-NEXT: li a3, 19415495; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15496; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315497; CHECK-RV64-NEXT: addi a0, a0, 115498; CHECK-RV64-NEXT: vmv4r.v v16, v815499; CHECK-RV64-NEXT: vmv8r.v v8, v1615500; CHECK-RV64-NEXT: andi a2, a1, 815501; CHECK-RV64-NEXT: bnez a2, .LBB61_71615502; CHECK-RV64-NEXT: j .LBB61_20215503; CHECK-RV64-NEXT: .LBB61_716: # %cond.load77715504; CHECK-RV64-NEXT: lbu a2, 0(a0)15505; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15506; CHECK-RV64-NEXT: vmv8r.v v16, v815507; CHECK-RV64-NEXT: vmv.s.x v12, a215508; CHECK-RV64-NEXT: li a2, 19615509; CHECK-RV64-NEXT: li a3, 19515510; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15511; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315512; CHECK-RV64-NEXT: addi a0, a0, 115513; CHECK-RV64-NEXT: vmv4r.v v16, v815514; CHECK-RV64-NEXT: vmv8r.v v8, v1615515; CHECK-RV64-NEXT: andi a2, a1, 1615516; CHECK-RV64-NEXT: bnez a2, .LBB61_71715517; CHECK-RV64-NEXT: j .LBB61_20315518; CHECK-RV64-NEXT: .LBB61_717: # %cond.load78115519; CHECK-RV64-NEXT: lbu a2, 0(a0)15520; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15521; CHECK-RV64-NEXT: vmv8r.v v16, v815522; CHECK-RV64-NEXT: vmv.s.x v12, a215523; CHECK-RV64-NEXT: li a2, 19715524; CHECK-RV64-NEXT: li a3, 19615525; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15526; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315527; CHECK-RV64-NEXT: addi a0, a0, 115528; CHECK-RV64-NEXT: vmv4r.v v16, v815529; CHECK-RV64-NEXT: vmv8r.v v8, v1615530; CHECK-RV64-NEXT: andi a2, a1, 3215531; CHECK-RV64-NEXT: bnez a2, .LBB61_71815532; CHECK-RV64-NEXT: j .LBB61_20415533; CHECK-RV64-NEXT: .LBB61_718: # %cond.load78515534; CHECK-RV64-NEXT: lbu a2, 0(a0)15535; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15536; CHECK-RV64-NEXT: vmv8r.v v16, v815537; CHECK-RV64-NEXT: vmv.s.x v12, a215538; CHECK-RV64-NEXT: li a2, 19815539; CHECK-RV64-NEXT: li a3, 19715540; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15541; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315542; CHECK-RV64-NEXT: addi a0, a0, 115543; CHECK-RV64-NEXT: vmv4r.v v16, v815544; CHECK-RV64-NEXT: vmv8r.v v8, v1615545; CHECK-RV64-NEXT: andi a2, a1, 6415546; CHECK-RV64-NEXT: bnez a2, .LBB61_71915547; CHECK-RV64-NEXT: j .LBB61_20515548; CHECK-RV64-NEXT: .LBB61_719: # %cond.load78915549; CHECK-RV64-NEXT: lbu a2, 0(a0)15550; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15551; CHECK-RV64-NEXT: vmv8r.v v16, v815552; CHECK-RV64-NEXT: vmv.s.x v12, a215553; CHECK-RV64-NEXT: li a2, 19915554; CHECK-RV64-NEXT: li a3, 19815555; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15556; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315557; CHECK-RV64-NEXT: addi a0, a0, 115558; CHECK-RV64-NEXT: vmv4r.v v16, v815559; CHECK-RV64-NEXT: vmv8r.v v8, v1615560; CHECK-RV64-NEXT: andi a2, a1, 12815561; CHECK-RV64-NEXT: bnez a2, .LBB61_72015562; CHECK-RV64-NEXT: j .LBB61_20615563; CHECK-RV64-NEXT: .LBB61_720: # %cond.load79315564; CHECK-RV64-NEXT: lbu a2, 0(a0)15565; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15566; CHECK-RV64-NEXT: vmv8r.v v16, v815567; CHECK-RV64-NEXT: vmv.s.x v12, a215568; CHECK-RV64-NEXT: li a2, 20015569; CHECK-RV64-NEXT: li a3, 19915570; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15571; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315572; CHECK-RV64-NEXT: addi a0, a0, 115573; CHECK-RV64-NEXT: vmv4r.v v16, v815574; CHECK-RV64-NEXT: vmv8r.v v8, v1615575; CHECK-RV64-NEXT: andi a2, a1, 25615576; CHECK-RV64-NEXT: bnez a2, .LBB61_72115577; CHECK-RV64-NEXT: j .LBB61_20715578; CHECK-RV64-NEXT: .LBB61_721: # %cond.load79715579; CHECK-RV64-NEXT: lbu a2, 0(a0)15580; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15581; CHECK-RV64-NEXT: vmv8r.v v16, v815582; CHECK-RV64-NEXT: vmv.s.x v12, a215583; CHECK-RV64-NEXT: li a2, 20115584; CHECK-RV64-NEXT: li a3, 20015585; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15586; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315587; CHECK-RV64-NEXT: addi a0, a0, 115588; CHECK-RV64-NEXT: vmv4r.v v16, v815589; CHECK-RV64-NEXT: vmv8r.v v8, v1615590; CHECK-RV64-NEXT: andi a2, a1, 51215591; CHECK-RV64-NEXT: bnez a2, .LBB61_72215592; CHECK-RV64-NEXT: j .LBB61_20815593; CHECK-RV64-NEXT: .LBB61_722: # %cond.load80115594; CHECK-RV64-NEXT: lbu a2, 0(a0)15595; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15596; CHECK-RV64-NEXT: vmv8r.v v16, v815597; CHECK-RV64-NEXT: vmv.s.x v12, a215598; CHECK-RV64-NEXT: li a2, 20215599; CHECK-RV64-NEXT: li a3, 20115600; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15601; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315602; CHECK-RV64-NEXT: addi a0, a0, 115603; CHECK-RV64-NEXT: vmv4r.v v16, v815604; CHECK-RV64-NEXT: vmv8r.v v8, v1615605; CHECK-RV64-NEXT: andi a2, a1, 102415606; CHECK-RV64-NEXT: bnez a2, .LBB61_72315607; CHECK-RV64-NEXT: j .LBB61_20915608; CHECK-RV64-NEXT: .LBB61_723: # %cond.load80515609; CHECK-RV64-NEXT: lbu a2, 0(a0)15610; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15611; CHECK-RV64-NEXT: vmv8r.v v16, v815612; CHECK-RV64-NEXT: vmv.s.x v12, a215613; CHECK-RV64-NEXT: li a2, 20315614; CHECK-RV64-NEXT: li a3, 20215615; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15616; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315617; CHECK-RV64-NEXT: addi a0, a0, 115618; CHECK-RV64-NEXT: vmv4r.v v16, v815619; CHECK-RV64-NEXT: vmv8r.v v8, v1615620; CHECK-RV64-NEXT: slli a2, a1, 5215621; CHECK-RV64-NEXT: bltz a2, .LBB61_72415622; CHECK-RV64-NEXT: j .LBB61_21015623; CHECK-RV64-NEXT: .LBB61_724: # %cond.load80915624; CHECK-RV64-NEXT: lbu a2, 0(a0)15625; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15626; CHECK-RV64-NEXT: vmv8r.v v16, v815627; CHECK-RV64-NEXT: vmv.s.x v12, a215628; CHECK-RV64-NEXT: li a2, 20415629; CHECK-RV64-NEXT: li a3, 20315630; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15631; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315632; CHECK-RV64-NEXT: addi a0, a0, 115633; CHECK-RV64-NEXT: vmv4r.v v16, v815634; CHECK-RV64-NEXT: vmv8r.v v8, v1615635; CHECK-RV64-NEXT: slli a2, a1, 5115636; CHECK-RV64-NEXT: bltz a2, .LBB61_72515637; CHECK-RV64-NEXT: j .LBB61_21115638; CHECK-RV64-NEXT: .LBB61_725: # %cond.load81315639; CHECK-RV64-NEXT: lbu a2, 0(a0)15640; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15641; CHECK-RV64-NEXT: vmv8r.v v16, v815642; CHECK-RV64-NEXT: vmv.s.x v12, a215643; CHECK-RV64-NEXT: li a2, 20515644; CHECK-RV64-NEXT: li a3, 20415645; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15646; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315647; CHECK-RV64-NEXT: addi a0, a0, 115648; CHECK-RV64-NEXT: vmv4r.v v16, v815649; CHECK-RV64-NEXT: vmv8r.v v8, v1615650; CHECK-RV64-NEXT: slli a2, a1, 5015651; CHECK-RV64-NEXT: bltz a2, .LBB61_72615652; CHECK-RV64-NEXT: j .LBB61_21215653; CHECK-RV64-NEXT: .LBB61_726: # %cond.load81715654; CHECK-RV64-NEXT: lbu a2, 0(a0)15655; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15656; CHECK-RV64-NEXT: vmv8r.v v16, v815657; CHECK-RV64-NEXT: vmv.s.x v12, a215658; CHECK-RV64-NEXT: li a2, 20615659; CHECK-RV64-NEXT: li a3, 20515660; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15661; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315662; CHECK-RV64-NEXT: addi a0, a0, 115663; CHECK-RV64-NEXT: vmv4r.v v16, v815664; CHECK-RV64-NEXT: vmv8r.v v8, v1615665; CHECK-RV64-NEXT: slli a2, a1, 4915666; CHECK-RV64-NEXT: bltz a2, .LBB61_72715667; CHECK-RV64-NEXT: j .LBB61_21315668; CHECK-RV64-NEXT: .LBB61_727: # %cond.load82115669; CHECK-RV64-NEXT: lbu a2, 0(a0)15670; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15671; CHECK-RV64-NEXT: vmv8r.v v16, v815672; CHECK-RV64-NEXT: vmv.s.x v12, a215673; CHECK-RV64-NEXT: li a2, 20715674; CHECK-RV64-NEXT: li a3, 20615675; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15676; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315677; CHECK-RV64-NEXT: addi a0, a0, 115678; CHECK-RV64-NEXT: vmv4r.v v16, v815679; CHECK-RV64-NEXT: vmv8r.v v8, v1615680; CHECK-RV64-NEXT: slli a2, a1, 4815681; CHECK-RV64-NEXT: bltz a2, .LBB61_72815682; CHECK-RV64-NEXT: j .LBB61_21415683; CHECK-RV64-NEXT: .LBB61_728: # %cond.load82515684; CHECK-RV64-NEXT: lbu a2, 0(a0)15685; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15686; CHECK-RV64-NEXT: vmv8r.v v16, v815687; CHECK-RV64-NEXT: vmv.s.x v12, a215688; CHECK-RV64-NEXT: li a2, 20815689; CHECK-RV64-NEXT: li a3, 20715690; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15691; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315692; CHECK-RV64-NEXT: addi a0, a0, 115693; CHECK-RV64-NEXT: vmv4r.v v16, v815694; CHECK-RV64-NEXT: vmv8r.v v8, v1615695; CHECK-RV64-NEXT: slli a2, a1, 4715696; CHECK-RV64-NEXT: bltz a2, .LBB61_72915697; CHECK-RV64-NEXT: j .LBB61_21515698; CHECK-RV64-NEXT: .LBB61_729: # %cond.load82915699; CHECK-RV64-NEXT: lbu a2, 0(a0)15700; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15701; CHECK-RV64-NEXT: vmv8r.v v16, v815702; CHECK-RV64-NEXT: vmv.s.x v12, a215703; CHECK-RV64-NEXT: li a2, 20915704; CHECK-RV64-NEXT: li a3, 20815705; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15706; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315707; CHECK-RV64-NEXT: addi a0, a0, 115708; CHECK-RV64-NEXT: vmv4r.v v16, v815709; CHECK-RV64-NEXT: vmv8r.v v8, v1615710; CHECK-RV64-NEXT: slli a2, a1, 4615711; CHECK-RV64-NEXT: bltz a2, .LBB61_73015712; CHECK-RV64-NEXT: j .LBB61_21615713; CHECK-RV64-NEXT: .LBB61_730: # %cond.load83315714; CHECK-RV64-NEXT: lbu a2, 0(a0)15715; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15716; CHECK-RV64-NEXT: vmv8r.v v16, v815717; CHECK-RV64-NEXT: vmv.s.x v12, a215718; CHECK-RV64-NEXT: li a2, 21015719; CHECK-RV64-NEXT: li a3, 20915720; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15721; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315722; CHECK-RV64-NEXT: addi a0, a0, 115723; CHECK-RV64-NEXT: vmv4r.v v16, v815724; CHECK-RV64-NEXT: vmv8r.v v8, v1615725; CHECK-RV64-NEXT: slli a2, a1, 4515726; CHECK-RV64-NEXT: bltz a2, .LBB61_73115727; CHECK-RV64-NEXT: j .LBB61_21715728; CHECK-RV64-NEXT: .LBB61_731: # %cond.load83715729; CHECK-RV64-NEXT: lbu a2, 0(a0)15730; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15731; CHECK-RV64-NEXT: vmv8r.v v16, v815732; CHECK-RV64-NEXT: vmv.s.x v12, a215733; CHECK-RV64-NEXT: li a2, 21115734; CHECK-RV64-NEXT: li a3, 21015735; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15736; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315737; CHECK-RV64-NEXT: addi a0, a0, 115738; CHECK-RV64-NEXT: vmv4r.v v16, v815739; CHECK-RV64-NEXT: vmv8r.v v8, v1615740; CHECK-RV64-NEXT: slli a2, a1, 4415741; CHECK-RV64-NEXT: bltz a2, .LBB61_73215742; CHECK-RV64-NEXT: j .LBB61_21815743; CHECK-RV64-NEXT: .LBB61_732: # %cond.load84115744; CHECK-RV64-NEXT: lbu a2, 0(a0)15745; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15746; CHECK-RV64-NEXT: vmv8r.v v16, v815747; CHECK-RV64-NEXT: vmv.s.x v12, a215748; CHECK-RV64-NEXT: li a2, 21215749; CHECK-RV64-NEXT: li a3, 21115750; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15751; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315752; CHECK-RV64-NEXT: addi a0, a0, 115753; CHECK-RV64-NEXT: vmv4r.v v16, v815754; CHECK-RV64-NEXT: vmv8r.v v8, v1615755; CHECK-RV64-NEXT: slli a2, a1, 4315756; CHECK-RV64-NEXT: bltz a2, .LBB61_73315757; CHECK-RV64-NEXT: j .LBB61_21915758; CHECK-RV64-NEXT: .LBB61_733: # %cond.load84515759; CHECK-RV64-NEXT: lbu a2, 0(a0)15760; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15761; CHECK-RV64-NEXT: vmv8r.v v16, v815762; CHECK-RV64-NEXT: vmv.s.x v12, a215763; CHECK-RV64-NEXT: li a2, 21315764; CHECK-RV64-NEXT: li a3, 21215765; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15766; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315767; CHECK-RV64-NEXT: addi a0, a0, 115768; CHECK-RV64-NEXT: vmv4r.v v16, v815769; CHECK-RV64-NEXT: vmv8r.v v8, v1615770; CHECK-RV64-NEXT: slli a2, a1, 4215771; CHECK-RV64-NEXT: bltz a2, .LBB61_73415772; CHECK-RV64-NEXT: j .LBB61_22015773; CHECK-RV64-NEXT: .LBB61_734: # %cond.load84915774; CHECK-RV64-NEXT: lbu a2, 0(a0)15775; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15776; CHECK-RV64-NEXT: vmv8r.v v16, v815777; CHECK-RV64-NEXT: vmv.s.x v12, a215778; CHECK-RV64-NEXT: li a2, 21415779; CHECK-RV64-NEXT: li a3, 21315780; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15781; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315782; CHECK-RV64-NEXT: addi a0, a0, 115783; CHECK-RV64-NEXT: vmv4r.v v16, v815784; CHECK-RV64-NEXT: vmv8r.v v8, v1615785; CHECK-RV64-NEXT: slli a2, a1, 4115786; CHECK-RV64-NEXT: bltz a2, .LBB61_73515787; CHECK-RV64-NEXT: j .LBB61_22115788; CHECK-RV64-NEXT: .LBB61_735: # %cond.load85315789; CHECK-RV64-NEXT: lbu a2, 0(a0)15790; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15791; CHECK-RV64-NEXT: vmv8r.v v16, v815792; CHECK-RV64-NEXT: vmv.s.x v12, a215793; CHECK-RV64-NEXT: li a2, 21515794; CHECK-RV64-NEXT: li a3, 21415795; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15796; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315797; CHECK-RV64-NEXT: addi a0, a0, 115798; CHECK-RV64-NEXT: vmv4r.v v16, v815799; CHECK-RV64-NEXT: vmv8r.v v8, v1615800; CHECK-RV64-NEXT: slli a2, a1, 4015801; CHECK-RV64-NEXT: bltz a2, .LBB61_73615802; CHECK-RV64-NEXT: j .LBB61_22215803; CHECK-RV64-NEXT: .LBB61_736: # %cond.load85715804; CHECK-RV64-NEXT: lbu a2, 0(a0)15805; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15806; CHECK-RV64-NEXT: vmv8r.v v16, v815807; CHECK-RV64-NEXT: vmv.s.x v12, a215808; CHECK-RV64-NEXT: li a2, 21615809; CHECK-RV64-NEXT: li a3, 21515810; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15811; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315812; CHECK-RV64-NEXT: addi a0, a0, 115813; CHECK-RV64-NEXT: vmv4r.v v16, v815814; CHECK-RV64-NEXT: vmv8r.v v8, v1615815; CHECK-RV64-NEXT: slli a2, a1, 3915816; CHECK-RV64-NEXT: bltz a2, .LBB61_73715817; CHECK-RV64-NEXT: j .LBB61_22315818; CHECK-RV64-NEXT: .LBB61_737: # %cond.load86115819; CHECK-RV64-NEXT: lbu a2, 0(a0)15820; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15821; CHECK-RV64-NEXT: vmv8r.v v16, v815822; CHECK-RV64-NEXT: vmv.s.x v12, a215823; CHECK-RV64-NEXT: li a2, 21715824; CHECK-RV64-NEXT: li a3, 21615825; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15826; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315827; CHECK-RV64-NEXT: addi a0, a0, 115828; CHECK-RV64-NEXT: vmv4r.v v16, v815829; CHECK-RV64-NEXT: vmv8r.v v8, v1615830; CHECK-RV64-NEXT: slli a2, a1, 3815831; CHECK-RV64-NEXT: bltz a2, .LBB61_73815832; CHECK-RV64-NEXT: j .LBB61_22415833; CHECK-RV64-NEXT: .LBB61_738: # %cond.load86515834; CHECK-RV64-NEXT: lbu a2, 0(a0)15835; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15836; CHECK-RV64-NEXT: vmv8r.v v16, v815837; CHECK-RV64-NEXT: vmv.s.x v12, a215838; CHECK-RV64-NEXT: li a2, 21815839; CHECK-RV64-NEXT: li a3, 21715840; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15841; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315842; CHECK-RV64-NEXT: addi a0, a0, 115843; CHECK-RV64-NEXT: vmv4r.v v16, v815844; CHECK-RV64-NEXT: vmv8r.v v8, v1615845; CHECK-RV64-NEXT: slli a2, a1, 3715846; CHECK-RV64-NEXT: bltz a2, .LBB61_73915847; CHECK-RV64-NEXT: j .LBB61_22515848; CHECK-RV64-NEXT: .LBB61_739: # %cond.load86915849; CHECK-RV64-NEXT: lbu a2, 0(a0)15850; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15851; CHECK-RV64-NEXT: vmv8r.v v16, v815852; CHECK-RV64-NEXT: vmv.s.x v12, a215853; CHECK-RV64-NEXT: li a2, 21915854; CHECK-RV64-NEXT: li a3, 21815855; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15856; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315857; CHECK-RV64-NEXT: addi a0, a0, 115858; CHECK-RV64-NEXT: vmv4r.v v16, v815859; CHECK-RV64-NEXT: vmv8r.v v8, v1615860; CHECK-RV64-NEXT: slli a2, a1, 3615861; CHECK-RV64-NEXT: bltz a2, .LBB61_74015862; CHECK-RV64-NEXT: j .LBB61_22615863; CHECK-RV64-NEXT: .LBB61_740: # %cond.load87315864; CHECK-RV64-NEXT: lbu a2, 0(a0)15865; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15866; CHECK-RV64-NEXT: vmv8r.v v16, v815867; CHECK-RV64-NEXT: vmv.s.x v12, a215868; CHECK-RV64-NEXT: li a2, 22015869; CHECK-RV64-NEXT: li a3, 21915870; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15871; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315872; CHECK-RV64-NEXT: addi a0, a0, 115873; CHECK-RV64-NEXT: vmv4r.v v16, v815874; CHECK-RV64-NEXT: vmv8r.v v8, v1615875; CHECK-RV64-NEXT: slli a2, a1, 3515876; CHECK-RV64-NEXT: bltz a2, .LBB61_74115877; CHECK-RV64-NEXT: j .LBB61_22715878; CHECK-RV64-NEXT: .LBB61_741: # %cond.load87715879; CHECK-RV64-NEXT: lbu a2, 0(a0)15880; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15881; CHECK-RV64-NEXT: vmv8r.v v16, v815882; CHECK-RV64-NEXT: vmv.s.x v12, a215883; CHECK-RV64-NEXT: li a2, 22115884; CHECK-RV64-NEXT: li a3, 22015885; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15886; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315887; CHECK-RV64-NEXT: addi a0, a0, 115888; CHECK-RV64-NEXT: vmv4r.v v16, v815889; CHECK-RV64-NEXT: vmv8r.v v8, v1615890; CHECK-RV64-NEXT: slli a2, a1, 3415891; CHECK-RV64-NEXT: bltz a2, .LBB61_74215892; CHECK-RV64-NEXT: j .LBB61_22815893; CHECK-RV64-NEXT: .LBB61_742: # %cond.load88115894; CHECK-RV64-NEXT: lbu a2, 0(a0)15895; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15896; CHECK-RV64-NEXT: vmv8r.v v16, v815897; CHECK-RV64-NEXT: vmv.s.x v12, a215898; CHECK-RV64-NEXT: li a2, 22215899; CHECK-RV64-NEXT: li a3, 22115900; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15901; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315902; CHECK-RV64-NEXT: addi a0, a0, 115903; CHECK-RV64-NEXT: vmv4r.v v16, v815904; CHECK-RV64-NEXT: vmv8r.v v8, v1615905; CHECK-RV64-NEXT: slli a2, a1, 3315906; CHECK-RV64-NEXT: bltz a2, .LBB61_74315907; CHECK-RV64-NEXT: j .LBB61_22915908; CHECK-RV64-NEXT: .LBB61_743: # %cond.load88515909; CHECK-RV64-NEXT: lbu a2, 0(a0)15910; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15911; CHECK-RV64-NEXT: vmv8r.v v16, v815912; CHECK-RV64-NEXT: vmv.s.x v12, a215913; CHECK-RV64-NEXT: li a2, 22315914; CHECK-RV64-NEXT: li a3, 22215915; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15916; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315917; CHECK-RV64-NEXT: addi a0, a0, 115918; CHECK-RV64-NEXT: vmv4r.v v16, v815919; CHECK-RV64-NEXT: vmv8r.v v8, v1615920; CHECK-RV64-NEXT: slli a2, a1, 3215921; CHECK-RV64-NEXT: bltz a2, .LBB61_74415922; CHECK-RV64-NEXT: j .LBB61_23015923; CHECK-RV64-NEXT: .LBB61_744: # %cond.load88915924; CHECK-RV64-NEXT: lbu a2, 0(a0)15925; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15926; CHECK-RV64-NEXT: vmv8r.v v16, v815927; CHECK-RV64-NEXT: vmv.s.x v12, a215928; CHECK-RV64-NEXT: li a2, 22415929; CHECK-RV64-NEXT: li a3, 22315930; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15931; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315932; CHECK-RV64-NEXT: addi a0, a0, 115933; CHECK-RV64-NEXT: vmv4r.v v16, v815934; CHECK-RV64-NEXT: vmv8r.v v8, v1615935; CHECK-RV64-NEXT: slli a2, a1, 3115936; CHECK-RV64-NEXT: bltz a2, .LBB61_74515937; CHECK-RV64-NEXT: j .LBB61_23115938; CHECK-RV64-NEXT: .LBB61_745: # %cond.load89315939; CHECK-RV64-NEXT: lbu a2, 0(a0)15940; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15941; CHECK-RV64-NEXT: vmv8r.v v16, v815942; CHECK-RV64-NEXT: vmv.s.x v12, a215943; CHECK-RV64-NEXT: li a2, 22515944; CHECK-RV64-NEXT: li a3, 22415945; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15946; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315947; CHECK-RV64-NEXT: addi a0, a0, 115948; CHECK-RV64-NEXT: vmv4r.v v16, v815949; CHECK-RV64-NEXT: vmv8r.v v8, v1615950; CHECK-RV64-NEXT: slli a2, a1, 3015951; CHECK-RV64-NEXT: bltz a2, .LBB61_74615952; CHECK-RV64-NEXT: j .LBB61_23215953; CHECK-RV64-NEXT: .LBB61_746: # %cond.load89715954; CHECK-RV64-NEXT: lbu a2, 0(a0)15955; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15956; CHECK-RV64-NEXT: vmv8r.v v16, v815957; CHECK-RV64-NEXT: vmv.s.x v12, a215958; CHECK-RV64-NEXT: li a2, 22615959; CHECK-RV64-NEXT: li a3, 22515960; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15961; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315962; CHECK-RV64-NEXT: addi a0, a0, 115963; CHECK-RV64-NEXT: vmv4r.v v16, v815964; CHECK-RV64-NEXT: vmv8r.v v8, v1615965; CHECK-RV64-NEXT: slli a2, a1, 2915966; CHECK-RV64-NEXT: bltz a2, .LBB61_74715967; CHECK-RV64-NEXT: j .LBB61_23315968; CHECK-RV64-NEXT: .LBB61_747: # %cond.load90115969; CHECK-RV64-NEXT: lbu a2, 0(a0)15970; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15971; CHECK-RV64-NEXT: vmv8r.v v16, v815972; CHECK-RV64-NEXT: vmv.s.x v12, a215973; CHECK-RV64-NEXT: li a2, 22715974; CHECK-RV64-NEXT: li a3, 22615975; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15976; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315977; CHECK-RV64-NEXT: addi a0, a0, 115978; CHECK-RV64-NEXT: vmv4r.v v16, v815979; CHECK-RV64-NEXT: vmv8r.v v8, v1615980; CHECK-RV64-NEXT: slli a2, a1, 2815981; CHECK-RV64-NEXT: bltz a2, .LBB61_74815982; CHECK-RV64-NEXT: j .LBB61_23415983; CHECK-RV64-NEXT: .LBB61_748: # %cond.load90515984; CHECK-RV64-NEXT: lbu a2, 0(a0)15985; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma15986; CHECK-RV64-NEXT: vmv8r.v v16, v815987; CHECK-RV64-NEXT: vmv.s.x v12, a215988; CHECK-RV64-NEXT: li a2, 22815989; CHECK-RV64-NEXT: li a3, 22715990; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma15991; CHECK-RV64-NEXT: vslideup.vx v8, v12, a315992; CHECK-RV64-NEXT: addi a0, a0, 115993; CHECK-RV64-NEXT: vmv4r.v v16, v815994; CHECK-RV64-NEXT: vmv8r.v v8, v1615995; CHECK-RV64-NEXT: slli a2, a1, 2715996; CHECK-RV64-NEXT: bltz a2, .LBB61_74915997; CHECK-RV64-NEXT: j .LBB61_23515998; CHECK-RV64-NEXT: .LBB61_749: # %cond.load90915999; CHECK-RV64-NEXT: lbu a2, 0(a0)16000; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16001; CHECK-RV64-NEXT: vmv8r.v v16, v816002; CHECK-RV64-NEXT: vmv.s.x v12, a216003; CHECK-RV64-NEXT: li a2, 22916004; CHECK-RV64-NEXT: li a3, 22816005; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16006; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316007; CHECK-RV64-NEXT: addi a0, a0, 116008; CHECK-RV64-NEXT: vmv4r.v v16, v816009; CHECK-RV64-NEXT: vmv8r.v v8, v1616010; CHECK-RV64-NEXT: slli a2, a1, 2616011; CHECK-RV64-NEXT: bltz a2, .LBB61_75016012; CHECK-RV64-NEXT: j .LBB61_23616013; CHECK-RV64-NEXT: .LBB61_750: # %cond.load91316014; CHECK-RV64-NEXT: lbu a2, 0(a0)16015; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16016; CHECK-RV64-NEXT: vmv8r.v v16, v816017; CHECK-RV64-NEXT: vmv.s.x v12, a216018; CHECK-RV64-NEXT: li a2, 23016019; CHECK-RV64-NEXT: li a3, 22916020; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16021; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316022; CHECK-RV64-NEXT: addi a0, a0, 116023; CHECK-RV64-NEXT: vmv4r.v v16, v816024; CHECK-RV64-NEXT: vmv8r.v v8, v1616025; CHECK-RV64-NEXT: slli a2, a1, 2516026; CHECK-RV64-NEXT: bltz a2, .LBB61_75116027; CHECK-RV64-NEXT: j .LBB61_23716028; CHECK-RV64-NEXT: .LBB61_751: # %cond.load91716029; CHECK-RV64-NEXT: lbu a2, 0(a0)16030; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16031; CHECK-RV64-NEXT: vmv8r.v v16, v816032; CHECK-RV64-NEXT: vmv.s.x v12, a216033; CHECK-RV64-NEXT: li a2, 23116034; CHECK-RV64-NEXT: li a3, 23016035; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16036; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316037; CHECK-RV64-NEXT: addi a0, a0, 116038; CHECK-RV64-NEXT: vmv4r.v v16, v816039; CHECK-RV64-NEXT: vmv8r.v v8, v1616040; CHECK-RV64-NEXT: slli a2, a1, 2416041; CHECK-RV64-NEXT: bltz a2, .LBB61_75216042; CHECK-RV64-NEXT: j .LBB61_23816043; CHECK-RV64-NEXT: .LBB61_752: # %cond.load92116044; CHECK-RV64-NEXT: lbu a2, 0(a0)16045; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16046; CHECK-RV64-NEXT: vmv8r.v v16, v816047; CHECK-RV64-NEXT: vmv.s.x v12, a216048; CHECK-RV64-NEXT: li a2, 23216049; CHECK-RV64-NEXT: li a3, 23116050; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16051; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316052; CHECK-RV64-NEXT: addi a0, a0, 116053; CHECK-RV64-NEXT: vmv4r.v v16, v816054; CHECK-RV64-NEXT: vmv8r.v v8, v1616055; CHECK-RV64-NEXT: slli a2, a1, 2316056; CHECK-RV64-NEXT: bltz a2, .LBB61_75316057; CHECK-RV64-NEXT: j .LBB61_23916058; CHECK-RV64-NEXT: .LBB61_753: # %cond.load92516059; CHECK-RV64-NEXT: lbu a2, 0(a0)16060; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16061; CHECK-RV64-NEXT: vmv8r.v v16, v816062; CHECK-RV64-NEXT: vmv.s.x v12, a216063; CHECK-RV64-NEXT: li a2, 23316064; CHECK-RV64-NEXT: li a3, 23216065; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16066; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316067; CHECK-RV64-NEXT: addi a0, a0, 116068; CHECK-RV64-NEXT: vmv4r.v v16, v816069; CHECK-RV64-NEXT: vmv8r.v v8, v1616070; CHECK-RV64-NEXT: slli a2, a1, 2216071; CHECK-RV64-NEXT: bltz a2, .LBB61_75416072; CHECK-RV64-NEXT: j .LBB61_24016073; CHECK-RV64-NEXT: .LBB61_754: # %cond.load92916074; CHECK-RV64-NEXT: lbu a2, 0(a0)16075; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16076; CHECK-RV64-NEXT: vmv8r.v v16, v816077; CHECK-RV64-NEXT: vmv.s.x v12, a216078; CHECK-RV64-NEXT: li a2, 23416079; CHECK-RV64-NEXT: li a3, 23316080; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16081; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316082; CHECK-RV64-NEXT: addi a0, a0, 116083; CHECK-RV64-NEXT: vmv4r.v v16, v816084; CHECK-RV64-NEXT: vmv8r.v v8, v1616085; CHECK-RV64-NEXT: slli a2, a1, 2116086; CHECK-RV64-NEXT: bltz a2, .LBB61_75516087; CHECK-RV64-NEXT: j .LBB61_24116088; CHECK-RV64-NEXT: .LBB61_755: # %cond.load93316089; CHECK-RV64-NEXT: lbu a2, 0(a0)16090; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16091; CHECK-RV64-NEXT: vmv8r.v v16, v816092; CHECK-RV64-NEXT: vmv.s.x v12, a216093; CHECK-RV64-NEXT: li a2, 23516094; CHECK-RV64-NEXT: li a3, 23416095; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16096; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316097; CHECK-RV64-NEXT: addi a0, a0, 116098; CHECK-RV64-NEXT: vmv4r.v v16, v816099; CHECK-RV64-NEXT: vmv8r.v v8, v1616100; CHECK-RV64-NEXT: slli a2, a1, 2016101; CHECK-RV64-NEXT: bltz a2, .LBB61_75616102; CHECK-RV64-NEXT: j .LBB61_24216103; CHECK-RV64-NEXT: .LBB61_756: # %cond.load93716104; CHECK-RV64-NEXT: lbu a2, 0(a0)16105; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16106; CHECK-RV64-NEXT: vmv8r.v v16, v816107; CHECK-RV64-NEXT: vmv.s.x v12, a216108; CHECK-RV64-NEXT: li a2, 23616109; CHECK-RV64-NEXT: li a3, 23516110; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16111; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316112; CHECK-RV64-NEXT: addi a0, a0, 116113; CHECK-RV64-NEXT: vmv4r.v v16, v816114; CHECK-RV64-NEXT: vmv8r.v v8, v1616115; CHECK-RV64-NEXT: slli a2, a1, 1916116; CHECK-RV64-NEXT: bltz a2, .LBB61_75716117; CHECK-RV64-NEXT: j .LBB61_24316118; CHECK-RV64-NEXT: .LBB61_757: # %cond.load94116119; CHECK-RV64-NEXT: lbu a2, 0(a0)16120; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16121; CHECK-RV64-NEXT: vmv8r.v v16, v816122; CHECK-RV64-NEXT: vmv.s.x v12, a216123; CHECK-RV64-NEXT: li a2, 23716124; CHECK-RV64-NEXT: li a3, 23616125; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16126; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316127; CHECK-RV64-NEXT: addi a0, a0, 116128; CHECK-RV64-NEXT: vmv4r.v v16, v816129; CHECK-RV64-NEXT: vmv8r.v v8, v1616130; CHECK-RV64-NEXT: slli a2, a1, 1816131; CHECK-RV64-NEXT: bltz a2, .LBB61_75816132; CHECK-RV64-NEXT: j .LBB61_24416133; CHECK-RV64-NEXT: .LBB61_758: # %cond.load94516134; CHECK-RV64-NEXT: lbu a2, 0(a0)16135; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16136; CHECK-RV64-NEXT: vmv8r.v v16, v816137; CHECK-RV64-NEXT: vmv.s.x v12, a216138; CHECK-RV64-NEXT: li a2, 23816139; CHECK-RV64-NEXT: li a3, 23716140; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16141; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316142; CHECK-RV64-NEXT: addi a0, a0, 116143; CHECK-RV64-NEXT: vmv4r.v v16, v816144; CHECK-RV64-NEXT: vmv8r.v v8, v1616145; CHECK-RV64-NEXT: slli a2, a1, 1716146; CHECK-RV64-NEXT: bltz a2, .LBB61_75916147; CHECK-RV64-NEXT: j .LBB61_24516148; CHECK-RV64-NEXT: .LBB61_759: # %cond.load94916149; CHECK-RV64-NEXT: lbu a2, 0(a0)16150; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16151; CHECK-RV64-NEXT: vmv8r.v v16, v816152; CHECK-RV64-NEXT: vmv.s.x v12, a216153; CHECK-RV64-NEXT: li a2, 23916154; CHECK-RV64-NEXT: li a3, 23816155; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16156; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316157; CHECK-RV64-NEXT: addi a0, a0, 116158; CHECK-RV64-NEXT: vmv4r.v v16, v816159; CHECK-RV64-NEXT: vmv8r.v v8, v1616160; CHECK-RV64-NEXT: slli a2, a1, 1616161; CHECK-RV64-NEXT: bltz a2, .LBB61_76016162; CHECK-RV64-NEXT: j .LBB61_24616163; CHECK-RV64-NEXT: .LBB61_760: # %cond.load95316164; CHECK-RV64-NEXT: lbu a2, 0(a0)16165; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16166; CHECK-RV64-NEXT: vmv8r.v v16, v816167; CHECK-RV64-NEXT: vmv.s.x v12, a216168; CHECK-RV64-NEXT: li a2, 24016169; CHECK-RV64-NEXT: li a3, 23916170; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16171; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316172; CHECK-RV64-NEXT: addi a0, a0, 116173; CHECK-RV64-NEXT: vmv4r.v v16, v816174; CHECK-RV64-NEXT: vmv8r.v v8, v1616175; CHECK-RV64-NEXT: slli a2, a1, 1516176; CHECK-RV64-NEXT: bltz a2, .LBB61_76116177; CHECK-RV64-NEXT: j .LBB61_24716178; CHECK-RV64-NEXT: .LBB61_761: # %cond.load95716179; CHECK-RV64-NEXT: lbu a2, 0(a0)16180; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16181; CHECK-RV64-NEXT: vmv8r.v v16, v816182; CHECK-RV64-NEXT: vmv.s.x v12, a216183; CHECK-RV64-NEXT: li a2, 24116184; CHECK-RV64-NEXT: li a3, 24016185; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16186; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316187; CHECK-RV64-NEXT: addi a0, a0, 116188; CHECK-RV64-NEXT: vmv4r.v v16, v816189; CHECK-RV64-NEXT: vmv8r.v v8, v1616190; CHECK-RV64-NEXT: slli a2, a1, 1416191; CHECK-RV64-NEXT: bltz a2, .LBB61_76216192; CHECK-RV64-NEXT: j .LBB61_24816193; CHECK-RV64-NEXT: .LBB61_762: # %cond.load96116194; CHECK-RV64-NEXT: lbu a2, 0(a0)16195; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16196; CHECK-RV64-NEXT: vmv8r.v v16, v816197; CHECK-RV64-NEXT: vmv.s.x v12, a216198; CHECK-RV64-NEXT: li a2, 24216199; CHECK-RV64-NEXT: li a3, 24116200; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16201; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316202; CHECK-RV64-NEXT: addi a0, a0, 116203; CHECK-RV64-NEXT: vmv4r.v v16, v816204; CHECK-RV64-NEXT: vmv8r.v v8, v1616205; CHECK-RV64-NEXT: slli a2, a1, 1316206; CHECK-RV64-NEXT: bltz a2, .LBB61_76316207; CHECK-RV64-NEXT: j .LBB61_24916208; CHECK-RV64-NEXT: .LBB61_763: # %cond.load96516209; CHECK-RV64-NEXT: lbu a2, 0(a0)16210; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16211; CHECK-RV64-NEXT: vmv8r.v v16, v816212; CHECK-RV64-NEXT: vmv.s.x v12, a216213; CHECK-RV64-NEXT: li a2, 24316214; CHECK-RV64-NEXT: li a3, 24216215; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16216; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316217; CHECK-RV64-NEXT: addi a0, a0, 116218; CHECK-RV64-NEXT: vmv4r.v v16, v816219; CHECK-RV64-NEXT: vmv8r.v v8, v1616220; CHECK-RV64-NEXT: slli a2, a1, 1216221; CHECK-RV64-NEXT: bltz a2, .LBB61_76416222; CHECK-RV64-NEXT: j .LBB61_25016223; CHECK-RV64-NEXT: .LBB61_764: # %cond.load96916224; CHECK-RV64-NEXT: lbu a2, 0(a0)16225; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16226; CHECK-RV64-NEXT: vmv8r.v v16, v816227; CHECK-RV64-NEXT: vmv.s.x v12, a216228; CHECK-RV64-NEXT: li a2, 24416229; CHECK-RV64-NEXT: li a3, 24316230; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16231; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316232; CHECK-RV64-NEXT: addi a0, a0, 116233; CHECK-RV64-NEXT: vmv4r.v v16, v816234; CHECK-RV64-NEXT: vmv8r.v v8, v1616235; CHECK-RV64-NEXT: slli a2, a1, 1116236; CHECK-RV64-NEXT: bltz a2, .LBB61_76516237; CHECK-RV64-NEXT: j .LBB61_25116238; CHECK-RV64-NEXT: .LBB61_765: # %cond.load97316239; CHECK-RV64-NEXT: lbu a2, 0(a0)16240; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16241; CHECK-RV64-NEXT: vmv8r.v v16, v816242; CHECK-RV64-NEXT: vmv.s.x v12, a216243; CHECK-RV64-NEXT: li a2, 24516244; CHECK-RV64-NEXT: li a3, 24416245; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16246; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316247; CHECK-RV64-NEXT: addi a0, a0, 116248; CHECK-RV64-NEXT: vmv4r.v v16, v816249; CHECK-RV64-NEXT: vmv8r.v v8, v1616250; CHECK-RV64-NEXT: slli a2, a1, 1016251; CHECK-RV64-NEXT: bltz a2, .LBB61_76616252; CHECK-RV64-NEXT: j .LBB61_25216253; CHECK-RV64-NEXT: .LBB61_766: # %cond.load97716254; CHECK-RV64-NEXT: lbu a2, 0(a0)16255; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16256; CHECK-RV64-NEXT: vmv8r.v v16, v816257; CHECK-RV64-NEXT: vmv.s.x v12, a216258; CHECK-RV64-NEXT: li a2, 24616259; CHECK-RV64-NEXT: li a3, 24516260; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16261; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316262; CHECK-RV64-NEXT: addi a0, a0, 116263; CHECK-RV64-NEXT: vmv4r.v v16, v816264; CHECK-RV64-NEXT: vmv8r.v v8, v1616265; CHECK-RV64-NEXT: slli a2, a1, 916266; CHECK-RV64-NEXT: bltz a2, .LBB61_76716267; CHECK-RV64-NEXT: j .LBB61_25316268; CHECK-RV64-NEXT: .LBB61_767: # %cond.load98116269; CHECK-RV64-NEXT: lbu a2, 0(a0)16270; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16271; CHECK-RV64-NEXT: vmv8r.v v16, v816272; CHECK-RV64-NEXT: vmv.s.x v12, a216273; CHECK-RV64-NEXT: li a2, 24716274; CHECK-RV64-NEXT: li a3, 24616275; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16276; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316277; CHECK-RV64-NEXT: addi a0, a0, 116278; CHECK-RV64-NEXT: vmv4r.v v16, v816279; CHECK-RV64-NEXT: vmv8r.v v8, v1616280; CHECK-RV64-NEXT: slli a2, a1, 816281; CHECK-RV64-NEXT: bltz a2, .LBB61_76816282; CHECK-RV64-NEXT: j .LBB61_25416283; CHECK-RV64-NEXT: .LBB61_768: # %cond.load98516284; CHECK-RV64-NEXT: lbu a2, 0(a0)16285; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16286; CHECK-RV64-NEXT: vmv8r.v v16, v816287; CHECK-RV64-NEXT: vmv.s.x v12, a216288; CHECK-RV64-NEXT: li a2, 24816289; CHECK-RV64-NEXT: li a3, 24716290; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16291; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316292; CHECK-RV64-NEXT: addi a0, a0, 116293; CHECK-RV64-NEXT: vmv4r.v v16, v816294; CHECK-RV64-NEXT: vmv8r.v v8, v1616295; CHECK-RV64-NEXT: slli a2, a1, 716296; CHECK-RV64-NEXT: bltz a2, .LBB61_76916297; CHECK-RV64-NEXT: j .LBB61_25516298; CHECK-RV64-NEXT: .LBB61_769: # %cond.load98916299; CHECK-RV64-NEXT: lbu a2, 0(a0)16300; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16301; CHECK-RV64-NEXT: vmv8r.v v16, v816302; CHECK-RV64-NEXT: vmv.s.x v12, a216303; CHECK-RV64-NEXT: li a2, 24916304; CHECK-RV64-NEXT: li a3, 24816305; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16306; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316307; CHECK-RV64-NEXT: addi a0, a0, 116308; CHECK-RV64-NEXT: vmv4r.v v16, v816309; CHECK-RV64-NEXT: vmv8r.v v8, v1616310; CHECK-RV64-NEXT: slli a2, a1, 616311; CHECK-RV64-NEXT: bltz a2, .LBB61_77016312; CHECK-RV64-NEXT: j .LBB61_25616313; CHECK-RV64-NEXT: .LBB61_770: # %cond.load99316314; CHECK-RV64-NEXT: lbu a2, 0(a0)16315; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16316; CHECK-RV64-NEXT: vmv8r.v v16, v816317; CHECK-RV64-NEXT: vmv.s.x v12, a216318; CHECK-RV64-NEXT: li a2, 25016319; CHECK-RV64-NEXT: li a3, 24916320; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16321; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316322; CHECK-RV64-NEXT: addi a0, a0, 116323; CHECK-RV64-NEXT: vmv4r.v v16, v816324; CHECK-RV64-NEXT: vmv8r.v v8, v1616325; CHECK-RV64-NEXT: slli a2, a1, 516326; CHECK-RV64-NEXT: bltz a2, .LBB61_77116327; CHECK-RV64-NEXT: j .LBB61_25716328; CHECK-RV64-NEXT: .LBB61_771: # %cond.load99716329; CHECK-RV64-NEXT: lbu a2, 0(a0)16330; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16331; CHECK-RV64-NEXT: vmv8r.v v16, v816332; CHECK-RV64-NEXT: vmv.s.x v12, a216333; CHECK-RV64-NEXT: li a2, 25116334; CHECK-RV64-NEXT: li a3, 25016335; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16336; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316337; CHECK-RV64-NEXT: addi a0, a0, 116338; CHECK-RV64-NEXT: vmv4r.v v16, v816339; CHECK-RV64-NEXT: vmv8r.v v8, v1616340; CHECK-RV64-NEXT: slli a2, a1, 416341; CHECK-RV64-NEXT: bltz a2, .LBB61_77216342; CHECK-RV64-NEXT: j .LBB61_25816343; CHECK-RV64-NEXT: .LBB61_772: # %cond.load100116344; CHECK-RV64-NEXT: lbu a2, 0(a0)16345; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16346; CHECK-RV64-NEXT: vmv8r.v v16, v816347; CHECK-RV64-NEXT: vmv.s.x v12, a216348; CHECK-RV64-NEXT: li a2, 25216349; CHECK-RV64-NEXT: li a3, 25116350; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16351; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316352; CHECK-RV64-NEXT: addi a0, a0, 116353; CHECK-RV64-NEXT: vmv4r.v v16, v816354; CHECK-RV64-NEXT: vmv8r.v v8, v1616355; CHECK-RV64-NEXT: slli a2, a1, 316356; CHECK-RV64-NEXT: bltz a2, .LBB61_77316357; CHECK-RV64-NEXT: j .LBB61_25916358; CHECK-RV64-NEXT: .LBB61_773: # %cond.load100516359; CHECK-RV64-NEXT: lbu a2, 0(a0)16360; CHECK-RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma16361; CHECK-RV64-NEXT: vmv8r.v v16, v816362; CHECK-RV64-NEXT: vmv.s.x v12, a216363; CHECK-RV64-NEXT: li a2, 25316364; CHECK-RV64-NEXT: li a3, 25216365; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m4, tu, ma16366; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316367; CHECK-RV64-NEXT: addi a0, a0, 116368; CHECK-RV64-NEXT: vmv4r.v v16, v816369; CHECK-RV64-NEXT: vmv8r.v v8, v1616370; CHECK-RV64-NEXT: slli a2, a1, 216371; CHECK-RV64-NEXT: bgez a2, .LBB61_102816372; CHECK-RV64-NEXT: j .LBB61_26016373; CHECK-RV64-NEXT: .LBB61_1028: # %cond.load100516374; CHECK-RV64-NEXT: j .LBB61_26116375; CHECK-RV64-NEXT: .LBB61_774: # %cond.load101716376; CHECK-RV64-NEXT: lbu a1, 0(a0)16377; CHECK-RV64-NEXT: vmv8r.v v16, v816378; CHECK-RV64-NEXT: vmv.s.x v12, a116379; CHECK-RV64-NEXT: li a1, 25616380; CHECK-RV64-NEXT: li a3, 25516381; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m4, tu, ma16382; CHECK-RV64-NEXT: vslideup.vx v8, v12, a316383; CHECK-RV64-NEXT: addi a0, a0, 116384; CHECK-RV64-NEXT: vmv4r.v v16, v816385; CHECK-RV64-NEXT: vmv8r.v v8, v1616386; CHECK-RV64-NEXT: andi a1, a2, 116387; CHECK-RV64-NEXT: bnez a1, .LBB61_77516388; CHECK-RV64-NEXT: j .LBB61_26516389; CHECK-RV64-NEXT: .LBB61_775: # %cond.load102116390; CHECK-RV64-NEXT: lbu a1, 0(a0)16391; CHECK-RV64-NEXT: li a3, 51216392; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16393; CHECK-RV64-NEXT: vmv.s.x v16, a116394; CHECK-RV64-NEXT: li a1, 25716395; CHECK-RV64-NEXT: li a3, 25616396; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16397; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316398; CHECK-RV64-NEXT: addi a0, a0, 116399; CHECK-RV64-NEXT: andi a1, a2, 216400; CHECK-RV64-NEXT: bnez a1, .LBB61_77616401; CHECK-RV64-NEXT: j .LBB61_26616402; CHECK-RV64-NEXT: .LBB61_776: # %cond.load102516403; CHECK-RV64-NEXT: lbu a1, 0(a0)16404; CHECK-RV64-NEXT: li a3, 51216405; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16406; CHECK-RV64-NEXT: vmv.s.x v16, a116407; CHECK-RV64-NEXT: li a1, 25816408; CHECK-RV64-NEXT: li a3, 25716409; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16410; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316411; CHECK-RV64-NEXT: addi a0, a0, 116412; CHECK-RV64-NEXT: andi a1, a2, 416413; CHECK-RV64-NEXT: bnez a1, .LBB61_77716414; CHECK-RV64-NEXT: j .LBB61_26716415; CHECK-RV64-NEXT: .LBB61_777: # %cond.load102916416; CHECK-RV64-NEXT: lbu a1, 0(a0)16417; CHECK-RV64-NEXT: li a3, 51216418; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16419; CHECK-RV64-NEXT: vmv.s.x v16, a116420; CHECK-RV64-NEXT: li a1, 25916421; CHECK-RV64-NEXT: li a3, 25816422; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16423; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316424; CHECK-RV64-NEXT: addi a0, a0, 116425; CHECK-RV64-NEXT: andi a1, a2, 816426; CHECK-RV64-NEXT: bnez a1, .LBB61_77816427; CHECK-RV64-NEXT: j .LBB61_26816428; CHECK-RV64-NEXT: .LBB61_778: # %cond.load103316429; CHECK-RV64-NEXT: lbu a1, 0(a0)16430; CHECK-RV64-NEXT: li a3, 51216431; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16432; CHECK-RV64-NEXT: vmv.s.x v16, a116433; CHECK-RV64-NEXT: li a1, 26016434; CHECK-RV64-NEXT: li a3, 25916435; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16436; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316437; CHECK-RV64-NEXT: addi a0, a0, 116438; CHECK-RV64-NEXT: andi a1, a2, 1616439; CHECK-RV64-NEXT: bnez a1, .LBB61_77916440; CHECK-RV64-NEXT: j .LBB61_26916441; CHECK-RV64-NEXT: .LBB61_779: # %cond.load103716442; CHECK-RV64-NEXT: lbu a1, 0(a0)16443; CHECK-RV64-NEXT: li a3, 51216444; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16445; CHECK-RV64-NEXT: vmv.s.x v16, a116446; CHECK-RV64-NEXT: li a1, 26116447; CHECK-RV64-NEXT: li a3, 26016448; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16449; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316450; CHECK-RV64-NEXT: addi a0, a0, 116451; CHECK-RV64-NEXT: andi a1, a2, 3216452; CHECK-RV64-NEXT: bnez a1, .LBB61_78016453; CHECK-RV64-NEXT: j .LBB61_27016454; CHECK-RV64-NEXT: .LBB61_780: # %cond.load104116455; CHECK-RV64-NEXT: lbu a1, 0(a0)16456; CHECK-RV64-NEXT: li a3, 51216457; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16458; CHECK-RV64-NEXT: vmv.s.x v16, a116459; CHECK-RV64-NEXT: li a1, 26216460; CHECK-RV64-NEXT: li a3, 26116461; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16462; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316463; CHECK-RV64-NEXT: addi a0, a0, 116464; CHECK-RV64-NEXT: andi a1, a2, 6416465; CHECK-RV64-NEXT: bnez a1, .LBB61_78116466; CHECK-RV64-NEXT: j .LBB61_27116467; CHECK-RV64-NEXT: .LBB61_781: # %cond.load104516468; CHECK-RV64-NEXT: lbu a1, 0(a0)16469; CHECK-RV64-NEXT: li a3, 51216470; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16471; CHECK-RV64-NEXT: vmv.s.x v16, a116472; CHECK-RV64-NEXT: li a1, 26316473; CHECK-RV64-NEXT: li a3, 26216474; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16475; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316476; CHECK-RV64-NEXT: addi a0, a0, 116477; CHECK-RV64-NEXT: andi a1, a2, 12816478; CHECK-RV64-NEXT: bnez a1, .LBB61_78216479; CHECK-RV64-NEXT: j .LBB61_27216480; CHECK-RV64-NEXT: .LBB61_782: # %cond.load104916481; CHECK-RV64-NEXT: lbu a1, 0(a0)16482; CHECK-RV64-NEXT: li a3, 51216483; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16484; CHECK-RV64-NEXT: vmv.s.x v16, a116485; CHECK-RV64-NEXT: li a1, 26416486; CHECK-RV64-NEXT: li a3, 26316487; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16488; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316489; CHECK-RV64-NEXT: addi a0, a0, 116490; CHECK-RV64-NEXT: andi a1, a2, 25616491; CHECK-RV64-NEXT: bnez a1, .LBB61_78316492; CHECK-RV64-NEXT: j .LBB61_27316493; CHECK-RV64-NEXT: .LBB61_783: # %cond.load105316494; CHECK-RV64-NEXT: lbu a1, 0(a0)16495; CHECK-RV64-NEXT: li a3, 51216496; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16497; CHECK-RV64-NEXT: vmv.s.x v16, a116498; CHECK-RV64-NEXT: li a1, 26516499; CHECK-RV64-NEXT: li a3, 26416500; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16501; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316502; CHECK-RV64-NEXT: addi a0, a0, 116503; CHECK-RV64-NEXT: andi a1, a2, 51216504; CHECK-RV64-NEXT: bnez a1, .LBB61_78416505; CHECK-RV64-NEXT: j .LBB61_27416506; CHECK-RV64-NEXT: .LBB61_784: # %cond.load105716507; CHECK-RV64-NEXT: lbu a1, 0(a0)16508; CHECK-RV64-NEXT: li a3, 51216509; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16510; CHECK-RV64-NEXT: vmv.s.x v16, a116511; CHECK-RV64-NEXT: li a1, 26616512; CHECK-RV64-NEXT: li a3, 26516513; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16514; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316515; CHECK-RV64-NEXT: addi a0, a0, 116516; CHECK-RV64-NEXT: andi a1, a2, 102416517; CHECK-RV64-NEXT: bnez a1, .LBB61_78516518; CHECK-RV64-NEXT: j .LBB61_27516519; CHECK-RV64-NEXT: .LBB61_785: # %cond.load106116520; CHECK-RV64-NEXT: lbu a1, 0(a0)16521; CHECK-RV64-NEXT: li a3, 51216522; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16523; CHECK-RV64-NEXT: vmv.s.x v16, a116524; CHECK-RV64-NEXT: li a1, 26716525; CHECK-RV64-NEXT: li a3, 26616526; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16527; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316528; CHECK-RV64-NEXT: addi a0, a0, 116529; CHECK-RV64-NEXT: slli a1, a2, 5216530; CHECK-RV64-NEXT: bltz a1, .LBB61_78616531; CHECK-RV64-NEXT: j .LBB61_27616532; CHECK-RV64-NEXT: .LBB61_786: # %cond.load106516533; CHECK-RV64-NEXT: lbu a1, 0(a0)16534; CHECK-RV64-NEXT: li a3, 51216535; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16536; CHECK-RV64-NEXT: vmv.s.x v16, a116537; CHECK-RV64-NEXT: li a1, 26816538; CHECK-RV64-NEXT: li a3, 26716539; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16540; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316541; CHECK-RV64-NEXT: addi a0, a0, 116542; CHECK-RV64-NEXT: slli a1, a2, 5116543; CHECK-RV64-NEXT: bltz a1, .LBB61_78716544; CHECK-RV64-NEXT: j .LBB61_27716545; CHECK-RV64-NEXT: .LBB61_787: # %cond.load106916546; CHECK-RV64-NEXT: lbu a1, 0(a0)16547; CHECK-RV64-NEXT: li a3, 51216548; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16549; CHECK-RV64-NEXT: vmv.s.x v16, a116550; CHECK-RV64-NEXT: li a1, 26916551; CHECK-RV64-NEXT: li a3, 26816552; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16553; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316554; CHECK-RV64-NEXT: addi a0, a0, 116555; CHECK-RV64-NEXT: slli a1, a2, 5016556; CHECK-RV64-NEXT: bltz a1, .LBB61_78816557; CHECK-RV64-NEXT: j .LBB61_27816558; CHECK-RV64-NEXT: .LBB61_788: # %cond.load107316559; CHECK-RV64-NEXT: lbu a1, 0(a0)16560; CHECK-RV64-NEXT: li a3, 51216561; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16562; CHECK-RV64-NEXT: vmv.s.x v16, a116563; CHECK-RV64-NEXT: li a1, 27016564; CHECK-RV64-NEXT: li a3, 26916565; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16566; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316567; CHECK-RV64-NEXT: addi a0, a0, 116568; CHECK-RV64-NEXT: slli a1, a2, 4916569; CHECK-RV64-NEXT: bltz a1, .LBB61_78916570; CHECK-RV64-NEXT: j .LBB61_27916571; CHECK-RV64-NEXT: .LBB61_789: # %cond.load107716572; CHECK-RV64-NEXT: lbu a1, 0(a0)16573; CHECK-RV64-NEXT: li a3, 51216574; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16575; CHECK-RV64-NEXT: vmv.s.x v16, a116576; CHECK-RV64-NEXT: li a1, 27116577; CHECK-RV64-NEXT: li a3, 27016578; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16579; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316580; CHECK-RV64-NEXT: addi a0, a0, 116581; CHECK-RV64-NEXT: slli a1, a2, 4816582; CHECK-RV64-NEXT: bltz a1, .LBB61_79016583; CHECK-RV64-NEXT: j .LBB61_28016584; CHECK-RV64-NEXT: .LBB61_790: # %cond.load108116585; CHECK-RV64-NEXT: lbu a1, 0(a0)16586; CHECK-RV64-NEXT: li a3, 51216587; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16588; CHECK-RV64-NEXT: vmv.s.x v16, a116589; CHECK-RV64-NEXT: li a1, 27216590; CHECK-RV64-NEXT: li a3, 27116591; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16592; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316593; CHECK-RV64-NEXT: addi a0, a0, 116594; CHECK-RV64-NEXT: slli a1, a2, 4716595; CHECK-RV64-NEXT: bltz a1, .LBB61_79116596; CHECK-RV64-NEXT: j .LBB61_28116597; CHECK-RV64-NEXT: .LBB61_791: # %cond.load108516598; CHECK-RV64-NEXT: lbu a1, 0(a0)16599; CHECK-RV64-NEXT: li a3, 51216600; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16601; CHECK-RV64-NEXT: vmv.s.x v16, a116602; CHECK-RV64-NEXT: li a1, 27316603; CHECK-RV64-NEXT: li a3, 27216604; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16605; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316606; CHECK-RV64-NEXT: addi a0, a0, 116607; CHECK-RV64-NEXT: slli a1, a2, 4616608; CHECK-RV64-NEXT: bltz a1, .LBB61_79216609; CHECK-RV64-NEXT: j .LBB61_28216610; CHECK-RV64-NEXT: .LBB61_792: # %cond.load108916611; CHECK-RV64-NEXT: lbu a1, 0(a0)16612; CHECK-RV64-NEXT: li a3, 51216613; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16614; CHECK-RV64-NEXT: vmv.s.x v16, a116615; CHECK-RV64-NEXT: li a1, 27416616; CHECK-RV64-NEXT: li a3, 27316617; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16618; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316619; CHECK-RV64-NEXT: addi a0, a0, 116620; CHECK-RV64-NEXT: slli a1, a2, 4516621; CHECK-RV64-NEXT: bltz a1, .LBB61_79316622; CHECK-RV64-NEXT: j .LBB61_28316623; CHECK-RV64-NEXT: .LBB61_793: # %cond.load109316624; CHECK-RV64-NEXT: lbu a1, 0(a0)16625; CHECK-RV64-NEXT: li a3, 51216626; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16627; CHECK-RV64-NEXT: vmv.s.x v16, a116628; CHECK-RV64-NEXT: li a1, 27516629; CHECK-RV64-NEXT: li a3, 27416630; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16631; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316632; CHECK-RV64-NEXT: addi a0, a0, 116633; CHECK-RV64-NEXT: slli a1, a2, 4416634; CHECK-RV64-NEXT: bltz a1, .LBB61_79416635; CHECK-RV64-NEXT: j .LBB61_28416636; CHECK-RV64-NEXT: .LBB61_794: # %cond.load109716637; CHECK-RV64-NEXT: lbu a1, 0(a0)16638; CHECK-RV64-NEXT: li a3, 51216639; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16640; CHECK-RV64-NEXT: vmv.s.x v16, a116641; CHECK-RV64-NEXT: li a1, 27616642; CHECK-RV64-NEXT: li a3, 27516643; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16644; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316645; CHECK-RV64-NEXT: addi a0, a0, 116646; CHECK-RV64-NEXT: slli a1, a2, 4316647; CHECK-RV64-NEXT: bltz a1, .LBB61_79516648; CHECK-RV64-NEXT: j .LBB61_28516649; CHECK-RV64-NEXT: .LBB61_795: # %cond.load110116650; CHECK-RV64-NEXT: lbu a1, 0(a0)16651; CHECK-RV64-NEXT: li a3, 51216652; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16653; CHECK-RV64-NEXT: vmv.s.x v16, a116654; CHECK-RV64-NEXT: li a1, 27716655; CHECK-RV64-NEXT: li a3, 27616656; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16657; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316658; CHECK-RV64-NEXT: addi a0, a0, 116659; CHECK-RV64-NEXT: slli a1, a2, 4216660; CHECK-RV64-NEXT: bltz a1, .LBB61_79616661; CHECK-RV64-NEXT: j .LBB61_28616662; CHECK-RV64-NEXT: .LBB61_796: # %cond.load110516663; CHECK-RV64-NEXT: lbu a1, 0(a0)16664; CHECK-RV64-NEXT: li a3, 51216665; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16666; CHECK-RV64-NEXT: vmv.s.x v16, a116667; CHECK-RV64-NEXT: li a1, 27816668; CHECK-RV64-NEXT: li a3, 27716669; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16670; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316671; CHECK-RV64-NEXT: addi a0, a0, 116672; CHECK-RV64-NEXT: slli a1, a2, 4116673; CHECK-RV64-NEXT: bltz a1, .LBB61_79716674; CHECK-RV64-NEXT: j .LBB61_28716675; CHECK-RV64-NEXT: .LBB61_797: # %cond.load110916676; CHECK-RV64-NEXT: lbu a1, 0(a0)16677; CHECK-RV64-NEXT: li a3, 51216678; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16679; CHECK-RV64-NEXT: vmv.s.x v16, a116680; CHECK-RV64-NEXT: li a1, 27916681; CHECK-RV64-NEXT: li a3, 27816682; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16683; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316684; CHECK-RV64-NEXT: addi a0, a0, 116685; CHECK-RV64-NEXT: slli a1, a2, 4016686; CHECK-RV64-NEXT: bltz a1, .LBB61_79816687; CHECK-RV64-NEXT: j .LBB61_28816688; CHECK-RV64-NEXT: .LBB61_798: # %cond.load111316689; CHECK-RV64-NEXT: lbu a1, 0(a0)16690; CHECK-RV64-NEXT: li a3, 51216691; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16692; CHECK-RV64-NEXT: vmv.s.x v16, a116693; CHECK-RV64-NEXT: li a1, 28016694; CHECK-RV64-NEXT: li a3, 27916695; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16696; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316697; CHECK-RV64-NEXT: addi a0, a0, 116698; CHECK-RV64-NEXT: slli a1, a2, 3916699; CHECK-RV64-NEXT: bltz a1, .LBB61_79916700; CHECK-RV64-NEXT: j .LBB61_28916701; CHECK-RV64-NEXT: .LBB61_799: # %cond.load111716702; CHECK-RV64-NEXT: lbu a1, 0(a0)16703; CHECK-RV64-NEXT: li a3, 51216704; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16705; CHECK-RV64-NEXT: vmv.s.x v16, a116706; CHECK-RV64-NEXT: li a1, 28116707; CHECK-RV64-NEXT: li a3, 28016708; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16709; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316710; CHECK-RV64-NEXT: addi a0, a0, 116711; CHECK-RV64-NEXT: slli a1, a2, 3816712; CHECK-RV64-NEXT: bltz a1, .LBB61_80016713; CHECK-RV64-NEXT: j .LBB61_29016714; CHECK-RV64-NEXT: .LBB61_800: # %cond.load112116715; CHECK-RV64-NEXT: lbu a1, 0(a0)16716; CHECK-RV64-NEXT: li a3, 51216717; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16718; CHECK-RV64-NEXT: vmv.s.x v16, a116719; CHECK-RV64-NEXT: li a1, 28216720; CHECK-RV64-NEXT: li a3, 28116721; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16722; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316723; CHECK-RV64-NEXT: addi a0, a0, 116724; CHECK-RV64-NEXT: slli a1, a2, 3716725; CHECK-RV64-NEXT: bltz a1, .LBB61_80116726; CHECK-RV64-NEXT: j .LBB61_29116727; CHECK-RV64-NEXT: .LBB61_801: # %cond.load112516728; CHECK-RV64-NEXT: lbu a1, 0(a0)16729; CHECK-RV64-NEXT: li a3, 51216730; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16731; CHECK-RV64-NEXT: vmv.s.x v16, a116732; CHECK-RV64-NEXT: li a1, 28316733; CHECK-RV64-NEXT: li a3, 28216734; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16735; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316736; CHECK-RV64-NEXT: addi a0, a0, 116737; CHECK-RV64-NEXT: slli a1, a2, 3616738; CHECK-RV64-NEXT: bltz a1, .LBB61_80216739; CHECK-RV64-NEXT: j .LBB61_29216740; CHECK-RV64-NEXT: .LBB61_802: # %cond.load112916741; CHECK-RV64-NEXT: lbu a1, 0(a0)16742; CHECK-RV64-NEXT: li a3, 51216743; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16744; CHECK-RV64-NEXT: vmv.s.x v16, a116745; CHECK-RV64-NEXT: li a1, 28416746; CHECK-RV64-NEXT: li a3, 28316747; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16748; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316749; CHECK-RV64-NEXT: addi a0, a0, 116750; CHECK-RV64-NEXT: slli a1, a2, 3516751; CHECK-RV64-NEXT: bltz a1, .LBB61_80316752; CHECK-RV64-NEXT: j .LBB61_29316753; CHECK-RV64-NEXT: .LBB61_803: # %cond.load113316754; CHECK-RV64-NEXT: lbu a1, 0(a0)16755; CHECK-RV64-NEXT: li a3, 51216756; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16757; CHECK-RV64-NEXT: vmv.s.x v16, a116758; CHECK-RV64-NEXT: li a1, 28516759; CHECK-RV64-NEXT: li a3, 28416760; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16761; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316762; CHECK-RV64-NEXT: addi a0, a0, 116763; CHECK-RV64-NEXT: slli a1, a2, 3416764; CHECK-RV64-NEXT: bltz a1, .LBB61_80416765; CHECK-RV64-NEXT: j .LBB61_29416766; CHECK-RV64-NEXT: .LBB61_804: # %cond.load113716767; CHECK-RV64-NEXT: lbu a1, 0(a0)16768; CHECK-RV64-NEXT: li a3, 51216769; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16770; CHECK-RV64-NEXT: vmv.s.x v16, a116771; CHECK-RV64-NEXT: li a1, 28616772; CHECK-RV64-NEXT: li a3, 28516773; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16774; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316775; CHECK-RV64-NEXT: addi a0, a0, 116776; CHECK-RV64-NEXT: slli a1, a2, 3316777; CHECK-RV64-NEXT: bltz a1, .LBB61_80516778; CHECK-RV64-NEXT: j .LBB61_29516779; CHECK-RV64-NEXT: .LBB61_805: # %cond.load114116780; CHECK-RV64-NEXT: lbu a1, 0(a0)16781; CHECK-RV64-NEXT: li a3, 51216782; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16783; CHECK-RV64-NEXT: vmv.s.x v16, a116784; CHECK-RV64-NEXT: li a1, 28716785; CHECK-RV64-NEXT: li a3, 28616786; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16787; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316788; CHECK-RV64-NEXT: addi a0, a0, 116789; CHECK-RV64-NEXT: slli a1, a2, 3216790; CHECK-RV64-NEXT: bltz a1, .LBB61_80616791; CHECK-RV64-NEXT: j .LBB61_29616792; CHECK-RV64-NEXT: .LBB61_806: # %cond.load114516793; CHECK-RV64-NEXT: lbu a1, 0(a0)16794; CHECK-RV64-NEXT: li a3, 51216795; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16796; CHECK-RV64-NEXT: vmv.s.x v16, a116797; CHECK-RV64-NEXT: li a1, 28816798; CHECK-RV64-NEXT: li a3, 28716799; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16800; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316801; CHECK-RV64-NEXT: addi a0, a0, 116802; CHECK-RV64-NEXT: slli a1, a2, 3116803; CHECK-RV64-NEXT: bltz a1, .LBB61_80716804; CHECK-RV64-NEXT: j .LBB61_29716805; CHECK-RV64-NEXT: .LBB61_807: # %cond.load114916806; CHECK-RV64-NEXT: lbu a1, 0(a0)16807; CHECK-RV64-NEXT: li a3, 51216808; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16809; CHECK-RV64-NEXT: vmv.s.x v16, a116810; CHECK-RV64-NEXT: li a1, 28916811; CHECK-RV64-NEXT: li a3, 28816812; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16813; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316814; CHECK-RV64-NEXT: addi a0, a0, 116815; CHECK-RV64-NEXT: slli a1, a2, 3016816; CHECK-RV64-NEXT: bltz a1, .LBB61_80816817; CHECK-RV64-NEXT: j .LBB61_29816818; CHECK-RV64-NEXT: .LBB61_808: # %cond.load115316819; CHECK-RV64-NEXT: lbu a1, 0(a0)16820; CHECK-RV64-NEXT: li a3, 51216821; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16822; CHECK-RV64-NEXT: vmv.s.x v16, a116823; CHECK-RV64-NEXT: li a1, 29016824; CHECK-RV64-NEXT: li a3, 28916825; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16826; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316827; CHECK-RV64-NEXT: addi a0, a0, 116828; CHECK-RV64-NEXT: slli a1, a2, 2916829; CHECK-RV64-NEXT: bltz a1, .LBB61_80916830; CHECK-RV64-NEXT: j .LBB61_29916831; CHECK-RV64-NEXT: .LBB61_809: # %cond.load115716832; CHECK-RV64-NEXT: lbu a1, 0(a0)16833; CHECK-RV64-NEXT: li a3, 51216834; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16835; CHECK-RV64-NEXT: vmv.s.x v16, a116836; CHECK-RV64-NEXT: li a1, 29116837; CHECK-RV64-NEXT: li a3, 29016838; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16839; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316840; CHECK-RV64-NEXT: addi a0, a0, 116841; CHECK-RV64-NEXT: slli a1, a2, 2816842; CHECK-RV64-NEXT: bltz a1, .LBB61_81016843; CHECK-RV64-NEXT: j .LBB61_30016844; CHECK-RV64-NEXT: .LBB61_810: # %cond.load116116845; CHECK-RV64-NEXT: lbu a1, 0(a0)16846; CHECK-RV64-NEXT: li a3, 51216847; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16848; CHECK-RV64-NEXT: vmv.s.x v16, a116849; CHECK-RV64-NEXT: li a1, 29216850; CHECK-RV64-NEXT: li a3, 29116851; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16852; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316853; CHECK-RV64-NEXT: addi a0, a0, 116854; CHECK-RV64-NEXT: slli a1, a2, 2716855; CHECK-RV64-NEXT: bltz a1, .LBB61_81116856; CHECK-RV64-NEXT: j .LBB61_30116857; CHECK-RV64-NEXT: .LBB61_811: # %cond.load116516858; CHECK-RV64-NEXT: lbu a1, 0(a0)16859; CHECK-RV64-NEXT: li a3, 51216860; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16861; CHECK-RV64-NEXT: vmv.s.x v16, a116862; CHECK-RV64-NEXT: li a1, 29316863; CHECK-RV64-NEXT: li a3, 29216864; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16865; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316866; CHECK-RV64-NEXT: addi a0, a0, 116867; CHECK-RV64-NEXT: slli a1, a2, 2616868; CHECK-RV64-NEXT: bltz a1, .LBB61_81216869; CHECK-RV64-NEXT: j .LBB61_30216870; CHECK-RV64-NEXT: .LBB61_812: # %cond.load116916871; CHECK-RV64-NEXT: lbu a1, 0(a0)16872; CHECK-RV64-NEXT: li a3, 51216873; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16874; CHECK-RV64-NEXT: vmv.s.x v16, a116875; CHECK-RV64-NEXT: li a1, 29416876; CHECK-RV64-NEXT: li a3, 29316877; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16878; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316879; CHECK-RV64-NEXT: addi a0, a0, 116880; CHECK-RV64-NEXT: slli a1, a2, 2516881; CHECK-RV64-NEXT: bltz a1, .LBB61_81316882; CHECK-RV64-NEXT: j .LBB61_30316883; CHECK-RV64-NEXT: .LBB61_813: # %cond.load117316884; CHECK-RV64-NEXT: lbu a1, 0(a0)16885; CHECK-RV64-NEXT: li a3, 51216886; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16887; CHECK-RV64-NEXT: vmv.s.x v16, a116888; CHECK-RV64-NEXT: li a1, 29516889; CHECK-RV64-NEXT: li a3, 29416890; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16891; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316892; CHECK-RV64-NEXT: addi a0, a0, 116893; CHECK-RV64-NEXT: slli a1, a2, 2416894; CHECK-RV64-NEXT: bltz a1, .LBB61_81416895; CHECK-RV64-NEXT: j .LBB61_30416896; CHECK-RV64-NEXT: .LBB61_814: # %cond.load117716897; CHECK-RV64-NEXT: lbu a1, 0(a0)16898; CHECK-RV64-NEXT: li a3, 51216899; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16900; CHECK-RV64-NEXT: vmv.s.x v16, a116901; CHECK-RV64-NEXT: li a1, 29616902; CHECK-RV64-NEXT: li a3, 29516903; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16904; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316905; CHECK-RV64-NEXT: addi a0, a0, 116906; CHECK-RV64-NEXT: slli a1, a2, 2316907; CHECK-RV64-NEXT: bltz a1, .LBB61_81516908; CHECK-RV64-NEXT: j .LBB61_30516909; CHECK-RV64-NEXT: .LBB61_815: # %cond.load118116910; CHECK-RV64-NEXT: lbu a1, 0(a0)16911; CHECK-RV64-NEXT: li a3, 51216912; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16913; CHECK-RV64-NEXT: vmv.s.x v16, a116914; CHECK-RV64-NEXT: li a1, 29716915; CHECK-RV64-NEXT: li a3, 29616916; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16917; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316918; CHECK-RV64-NEXT: addi a0, a0, 116919; CHECK-RV64-NEXT: slli a1, a2, 2216920; CHECK-RV64-NEXT: bltz a1, .LBB61_81616921; CHECK-RV64-NEXT: j .LBB61_30616922; CHECK-RV64-NEXT: .LBB61_816: # %cond.load118516923; CHECK-RV64-NEXT: lbu a1, 0(a0)16924; CHECK-RV64-NEXT: li a3, 51216925; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16926; CHECK-RV64-NEXT: vmv.s.x v16, a116927; CHECK-RV64-NEXT: li a1, 29816928; CHECK-RV64-NEXT: li a3, 29716929; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16930; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316931; CHECK-RV64-NEXT: addi a0, a0, 116932; CHECK-RV64-NEXT: slli a1, a2, 2116933; CHECK-RV64-NEXT: bltz a1, .LBB61_81716934; CHECK-RV64-NEXT: j .LBB61_30716935; CHECK-RV64-NEXT: .LBB61_817: # %cond.load118916936; CHECK-RV64-NEXT: lbu a1, 0(a0)16937; CHECK-RV64-NEXT: li a3, 51216938; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16939; CHECK-RV64-NEXT: vmv.s.x v16, a116940; CHECK-RV64-NEXT: li a1, 29916941; CHECK-RV64-NEXT: li a3, 29816942; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16943; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316944; CHECK-RV64-NEXT: addi a0, a0, 116945; CHECK-RV64-NEXT: slli a1, a2, 2016946; CHECK-RV64-NEXT: bltz a1, .LBB61_81816947; CHECK-RV64-NEXT: j .LBB61_30816948; CHECK-RV64-NEXT: .LBB61_818: # %cond.load119316949; CHECK-RV64-NEXT: lbu a1, 0(a0)16950; CHECK-RV64-NEXT: li a3, 51216951; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16952; CHECK-RV64-NEXT: vmv.s.x v16, a116953; CHECK-RV64-NEXT: li a1, 30016954; CHECK-RV64-NEXT: li a3, 29916955; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16956; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316957; CHECK-RV64-NEXT: addi a0, a0, 116958; CHECK-RV64-NEXT: slli a1, a2, 1916959; CHECK-RV64-NEXT: bltz a1, .LBB61_81916960; CHECK-RV64-NEXT: j .LBB61_30916961; CHECK-RV64-NEXT: .LBB61_819: # %cond.load119716962; CHECK-RV64-NEXT: lbu a1, 0(a0)16963; CHECK-RV64-NEXT: li a3, 51216964; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16965; CHECK-RV64-NEXT: vmv.s.x v16, a116966; CHECK-RV64-NEXT: li a1, 30116967; CHECK-RV64-NEXT: li a3, 30016968; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16969; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316970; CHECK-RV64-NEXT: addi a0, a0, 116971; CHECK-RV64-NEXT: slli a1, a2, 1816972; CHECK-RV64-NEXT: bltz a1, .LBB61_82016973; CHECK-RV64-NEXT: j .LBB61_31016974; CHECK-RV64-NEXT: .LBB61_820: # %cond.load120116975; CHECK-RV64-NEXT: lbu a1, 0(a0)16976; CHECK-RV64-NEXT: li a3, 51216977; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16978; CHECK-RV64-NEXT: vmv.s.x v16, a116979; CHECK-RV64-NEXT: li a1, 30216980; CHECK-RV64-NEXT: li a3, 30116981; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16982; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316983; CHECK-RV64-NEXT: addi a0, a0, 116984; CHECK-RV64-NEXT: slli a1, a2, 1716985; CHECK-RV64-NEXT: bltz a1, .LBB61_82116986; CHECK-RV64-NEXT: j .LBB61_31116987; CHECK-RV64-NEXT: .LBB61_821: # %cond.load120516988; CHECK-RV64-NEXT: lbu a1, 0(a0)16989; CHECK-RV64-NEXT: li a3, 51216990; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma16991; CHECK-RV64-NEXT: vmv.s.x v16, a116992; CHECK-RV64-NEXT: li a1, 30316993; CHECK-RV64-NEXT: li a3, 30216994; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma16995; CHECK-RV64-NEXT: vslideup.vx v8, v16, a316996; CHECK-RV64-NEXT: addi a0, a0, 116997; CHECK-RV64-NEXT: slli a1, a2, 1616998; CHECK-RV64-NEXT: bltz a1, .LBB61_82216999; CHECK-RV64-NEXT: j .LBB61_31217000; CHECK-RV64-NEXT: .LBB61_822: # %cond.load120917001; CHECK-RV64-NEXT: lbu a1, 0(a0)17002; CHECK-RV64-NEXT: li a3, 51217003; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17004; CHECK-RV64-NEXT: vmv.s.x v16, a117005; CHECK-RV64-NEXT: li a1, 30417006; CHECK-RV64-NEXT: li a3, 30317007; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17008; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317009; CHECK-RV64-NEXT: addi a0, a0, 117010; CHECK-RV64-NEXT: slli a1, a2, 1517011; CHECK-RV64-NEXT: bltz a1, .LBB61_82317012; CHECK-RV64-NEXT: j .LBB61_31317013; CHECK-RV64-NEXT: .LBB61_823: # %cond.load121317014; CHECK-RV64-NEXT: lbu a1, 0(a0)17015; CHECK-RV64-NEXT: li a3, 51217016; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17017; CHECK-RV64-NEXT: vmv.s.x v16, a117018; CHECK-RV64-NEXT: li a1, 30517019; CHECK-RV64-NEXT: li a3, 30417020; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17021; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317022; CHECK-RV64-NEXT: addi a0, a0, 117023; CHECK-RV64-NEXT: slli a1, a2, 1417024; CHECK-RV64-NEXT: bltz a1, .LBB61_82417025; CHECK-RV64-NEXT: j .LBB61_31417026; CHECK-RV64-NEXT: .LBB61_824: # %cond.load121717027; CHECK-RV64-NEXT: lbu a1, 0(a0)17028; CHECK-RV64-NEXT: li a3, 51217029; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17030; CHECK-RV64-NEXT: vmv.s.x v16, a117031; CHECK-RV64-NEXT: li a1, 30617032; CHECK-RV64-NEXT: li a3, 30517033; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17034; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317035; CHECK-RV64-NEXT: addi a0, a0, 117036; CHECK-RV64-NEXT: slli a1, a2, 1317037; CHECK-RV64-NEXT: bltz a1, .LBB61_82517038; CHECK-RV64-NEXT: j .LBB61_31517039; CHECK-RV64-NEXT: .LBB61_825: # %cond.load122117040; CHECK-RV64-NEXT: lbu a1, 0(a0)17041; CHECK-RV64-NEXT: li a3, 51217042; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17043; CHECK-RV64-NEXT: vmv.s.x v16, a117044; CHECK-RV64-NEXT: li a1, 30717045; CHECK-RV64-NEXT: li a3, 30617046; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17047; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317048; CHECK-RV64-NEXT: addi a0, a0, 117049; CHECK-RV64-NEXT: slli a1, a2, 1217050; CHECK-RV64-NEXT: bltz a1, .LBB61_82617051; CHECK-RV64-NEXT: j .LBB61_31617052; CHECK-RV64-NEXT: .LBB61_826: # %cond.load122517053; CHECK-RV64-NEXT: lbu a1, 0(a0)17054; CHECK-RV64-NEXT: li a3, 51217055; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17056; CHECK-RV64-NEXT: vmv.s.x v16, a117057; CHECK-RV64-NEXT: li a1, 30817058; CHECK-RV64-NEXT: li a3, 30717059; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17060; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317061; CHECK-RV64-NEXT: addi a0, a0, 117062; CHECK-RV64-NEXT: slli a1, a2, 1117063; CHECK-RV64-NEXT: bltz a1, .LBB61_82717064; CHECK-RV64-NEXT: j .LBB61_31717065; CHECK-RV64-NEXT: .LBB61_827: # %cond.load122917066; CHECK-RV64-NEXT: lbu a1, 0(a0)17067; CHECK-RV64-NEXT: li a3, 51217068; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17069; CHECK-RV64-NEXT: vmv.s.x v16, a117070; CHECK-RV64-NEXT: li a1, 30917071; CHECK-RV64-NEXT: li a3, 30817072; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17073; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317074; CHECK-RV64-NEXT: addi a0, a0, 117075; CHECK-RV64-NEXT: slli a1, a2, 1017076; CHECK-RV64-NEXT: bltz a1, .LBB61_82817077; CHECK-RV64-NEXT: j .LBB61_31817078; CHECK-RV64-NEXT: .LBB61_828: # %cond.load123317079; CHECK-RV64-NEXT: lbu a1, 0(a0)17080; CHECK-RV64-NEXT: li a3, 51217081; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17082; CHECK-RV64-NEXT: vmv.s.x v16, a117083; CHECK-RV64-NEXT: li a1, 31017084; CHECK-RV64-NEXT: li a3, 30917085; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17086; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317087; CHECK-RV64-NEXT: addi a0, a0, 117088; CHECK-RV64-NEXT: slli a1, a2, 917089; CHECK-RV64-NEXT: bltz a1, .LBB61_82917090; CHECK-RV64-NEXT: j .LBB61_31917091; CHECK-RV64-NEXT: .LBB61_829: # %cond.load123717092; CHECK-RV64-NEXT: lbu a1, 0(a0)17093; CHECK-RV64-NEXT: li a3, 51217094; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17095; CHECK-RV64-NEXT: vmv.s.x v16, a117096; CHECK-RV64-NEXT: li a1, 31117097; CHECK-RV64-NEXT: li a3, 31017098; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17099; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317100; CHECK-RV64-NEXT: addi a0, a0, 117101; CHECK-RV64-NEXT: slli a1, a2, 817102; CHECK-RV64-NEXT: bltz a1, .LBB61_83017103; CHECK-RV64-NEXT: j .LBB61_32017104; CHECK-RV64-NEXT: .LBB61_830: # %cond.load124117105; CHECK-RV64-NEXT: lbu a1, 0(a0)17106; CHECK-RV64-NEXT: li a3, 51217107; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17108; CHECK-RV64-NEXT: vmv.s.x v16, a117109; CHECK-RV64-NEXT: li a1, 31217110; CHECK-RV64-NEXT: li a3, 31117111; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17112; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317113; CHECK-RV64-NEXT: addi a0, a0, 117114; CHECK-RV64-NEXT: slli a1, a2, 717115; CHECK-RV64-NEXT: bltz a1, .LBB61_83117116; CHECK-RV64-NEXT: j .LBB61_32117117; CHECK-RV64-NEXT: .LBB61_831: # %cond.load124517118; CHECK-RV64-NEXT: lbu a1, 0(a0)17119; CHECK-RV64-NEXT: li a3, 51217120; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17121; CHECK-RV64-NEXT: vmv.s.x v16, a117122; CHECK-RV64-NEXT: li a1, 31317123; CHECK-RV64-NEXT: li a3, 31217124; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17125; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317126; CHECK-RV64-NEXT: addi a0, a0, 117127; CHECK-RV64-NEXT: slli a1, a2, 617128; CHECK-RV64-NEXT: bltz a1, .LBB61_83217129; CHECK-RV64-NEXT: j .LBB61_32217130; CHECK-RV64-NEXT: .LBB61_832: # %cond.load124917131; CHECK-RV64-NEXT: lbu a1, 0(a0)17132; CHECK-RV64-NEXT: li a3, 51217133; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17134; CHECK-RV64-NEXT: vmv.s.x v16, a117135; CHECK-RV64-NEXT: li a1, 31417136; CHECK-RV64-NEXT: li a3, 31317137; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17138; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317139; CHECK-RV64-NEXT: addi a0, a0, 117140; CHECK-RV64-NEXT: slli a1, a2, 517141; CHECK-RV64-NEXT: bltz a1, .LBB61_83317142; CHECK-RV64-NEXT: j .LBB61_32317143; CHECK-RV64-NEXT: .LBB61_833: # %cond.load125317144; CHECK-RV64-NEXT: lbu a1, 0(a0)17145; CHECK-RV64-NEXT: li a3, 51217146; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17147; CHECK-RV64-NEXT: vmv.s.x v16, a117148; CHECK-RV64-NEXT: li a1, 31517149; CHECK-RV64-NEXT: li a3, 31417150; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17151; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317152; CHECK-RV64-NEXT: addi a0, a0, 117153; CHECK-RV64-NEXT: slli a1, a2, 417154; CHECK-RV64-NEXT: bltz a1, .LBB61_83417155; CHECK-RV64-NEXT: j .LBB61_32417156; CHECK-RV64-NEXT: .LBB61_834: # %cond.load125717157; CHECK-RV64-NEXT: lbu a1, 0(a0)17158; CHECK-RV64-NEXT: li a3, 51217159; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17160; CHECK-RV64-NEXT: vmv.s.x v16, a117161; CHECK-RV64-NEXT: li a1, 31617162; CHECK-RV64-NEXT: li a3, 31517163; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17164; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317165; CHECK-RV64-NEXT: addi a0, a0, 117166; CHECK-RV64-NEXT: slli a1, a2, 317167; CHECK-RV64-NEXT: bltz a1, .LBB61_83517168; CHECK-RV64-NEXT: j .LBB61_32517169; CHECK-RV64-NEXT: .LBB61_835: # %cond.load126117170; CHECK-RV64-NEXT: lbu a1, 0(a0)17171; CHECK-RV64-NEXT: li a3, 51217172; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17173; CHECK-RV64-NEXT: vmv.s.x v16, a117174; CHECK-RV64-NEXT: li a1, 31717175; CHECK-RV64-NEXT: li a3, 31617176; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17177; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317178; CHECK-RV64-NEXT: addi a0, a0, 117179; CHECK-RV64-NEXT: slli a1, a2, 217180; CHECK-RV64-NEXT: bgez a1, .LBB61_102917181; CHECK-RV64-NEXT: j .LBB61_32617182; CHECK-RV64-NEXT: .LBB61_1029: # %cond.load126117183; CHECK-RV64-NEXT: j .LBB61_32717184; CHECK-RV64-NEXT: .LBB61_836: # %cond.load127317185; CHECK-RV64-NEXT: lbu a2, 0(a0)17186; CHECK-RV64-NEXT: vmv.s.x v16, a217187; CHECK-RV64-NEXT: li a2, 32017188; CHECK-RV64-NEXT: li a3, 31917189; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17190; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317191; CHECK-RV64-NEXT: addi a0, a0, 117192; CHECK-RV64-NEXT: andi a2, a1, 117193; CHECK-RV64-NEXT: bnez a2, .LBB61_83717194; CHECK-RV64-NEXT: j .LBB61_33117195; CHECK-RV64-NEXT: .LBB61_837: # %cond.load127717196; CHECK-RV64-NEXT: lbu a2, 0(a0)17197; CHECK-RV64-NEXT: li a3, 51217198; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17199; CHECK-RV64-NEXT: vmv.s.x v16, a217200; CHECK-RV64-NEXT: li a2, 32117201; CHECK-RV64-NEXT: li a3, 32017202; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17203; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317204; CHECK-RV64-NEXT: addi a0, a0, 117205; CHECK-RV64-NEXT: andi a2, a1, 217206; CHECK-RV64-NEXT: bnez a2, .LBB61_83817207; CHECK-RV64-NEXT: j .LBB61_33217208; CHECK-RV64-NEXT: .LBB61_838: # %cond.load128117209; CHECK-RV64-NEXT: lbu a2, 0(a0)17210; CHECK-RV64-NEXT: li a3, 51217211; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17212; CHECK-RV64-NEXT: vmv.s.x v16, a217213; CHECK-RV64-NEXT: li a2, 32217214; CHECK-RV64-NEXT: li a3, 32117215; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17216; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317217; CHECK-RV64-NEXT: addi a0, a0, 117218; CHECK-RV64-NEXT: andi a2, a1, 417219; CHECK-RV64-NEXT: bnez a2, .LBB61_83917220; CHECK-RV64-NEXT: j .LBB61_33317221; CHECK-RV64-NEXT: .LBB61_839: # %cond.load128517222; CHECK-RV64-NEXT: lbu a2, 0(a0)17223; CHECK-RV64-NEXT: li a3, 51217224; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17225; CHECK-RV64-NEXT: vmv.s.x v16, a217226; CHECK-RV64-NEXT: li a2, 32317227; CHECK-RV64-NEXT: li a3, 32217228; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17229; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317230; CHECK-RV64-NEXT: addi a0, a0, 117231; CHECK-RV64-NEXT: andi a2, a1, 817232; CHECK-RV64-NEXT: bnez a2, .LBB61_84017233; CHECK-RV64-NEXT: j .LBB61_33417234; CHECK-RV64-NEXT: .LBB61_840: # %cond.load128917235; CHECK-RV64-NEXT: lbu a2, 0(a0)17236; CHECK-RV64-NEXT: li a3, 51217237; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17238; CHECK-RV64-NEXT: vmv.s.x v16, a217239; CHECK-RV64-NEXT: li a2, 32417240; CHECK-RV64-NEXT: li a3, 32317241; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17242; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317243; CHECK-RV64-NEXT: addi a0, a0, 117244; CHECK-RV64-NEXT: andi a2, a1, 1617245; CHECK-RV64-NEXT: bnez a2, .LBB61_84117246; CHECK-RV64-NEXT: j .LBB61_33517247; CHECK-RV64-NEXT: .LBB61_841: # %cond.load129317248; CHECK-RV64-NEXT: lbu a2, 0(a0)17249; CHECK-RV64-NEXT: li a3, 51217250; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17251; CHECK-RV64-NEXT: vmv.s.x v16, a217252; CHECK-RV64-NEXT: li a2, 32517253; CHECK-RV64-NEXT: li a3, 32417254; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17255; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317256; CHECK-RV64-NEXT: addi a0, a0, 117257; CHECK-RV64-NEXT: andi a2, a1, 3217258; CHECK-RV64-NEXT: bnez a2, .LBB61_84217259; CHECK-RV64-NEXT: j .LBB61_33617260; CHECK-RV64-NEXT: .LBB61_842: # %cond.load129717261; CHECK-RV64-NEXT: lbu a2, 0(a0)17262; CHECK-RV64-NEXT: li a3, 51217263; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17264; CHECK-RV64-NEXT: vmv.s.x v16, a217265; CHECK-RV64-NEXT: li a2, 32617266; CHECK-RV64-NEXT: li a3, 32517267; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17268; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317269; CHECK-RV64-NEXT: addi a0, a0, 117270; CHECK-RV64-NEXT: andi a2, a1, 6417271; CHECK-RV64-NEXT: bnez a2, .LBB61_84317272; CHECK-RV64-NEXT: j .LBB61_33717273; CHECK-RV64-NEXT: .LBB61_843: # %cond.load130117274; CHECK-RV64-NEXT: lbu a2, 0(a0)17275; CHECK-RV64-NEXT: li a3, 51217276; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17277; CHECK-RV64-NEXT: vmv.s.x v16, a217278; CHECK-RV64-NEXT: li a2, 32717279; CHECK-RV64-NEXT: li a3, 32617280; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17281; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317282; CHECK-RV64-NEXT: addi a0, a0, 117283; CHECK-RV64-NEXT: andi a2, a1, 12817284; CHECK-RV64-NEXT: bnez a2, .LBB61_84417285; CHECK-RV64-NEXT: j .LBB61_33817286; CHECK-RV64-NEXT: .LBB61_844: # %cond.load130517287; CHECK-RV64-NEXT: lbu a2, 0(a0)17288; CHECK-RV64-NEXT: li a3, 51217289; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17290; CHECK-RV64-NEXT: vmv.s.x v16, a217291; CHECK-RV64-NEXT: li a2, 32817292; CHECK-RV64-NEXT: li a3, 32717293; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17294; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317295; CHECK-RV64-NEXT: addi a0, a0, 117296; CHECK-RV64-NEXT: andi a2, a1, 25617297; CHECK-RV64-NEXT: bnez a2, .LBB61_84517298; CHECK-RV64-NEXT: j .LBB61_33917299; CHECK-RV64-NEXT: .LBB61_845: # %cond.load130917300; CHECK-RV64-NEXT: lbu a2, 0(a0)17301; CHECK-RV64-NEXT: li a3, 51217302; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17303; CHECK-RV64-NEXT: vmv.s.x v16, a217304; CHECK-RV64-NEXT: li a2, 32917305; CHECK-RV64-NEXT: li a3, 32817306; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17307; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317308; CHECK-RV64-NEXT: addi a0, a0, 117309; CHECK-RV64-NEXT: andi a2, a1, 51217310; CHECK-RV64-NEXT: bnez a2, .LBB61_84617311; CHECK-RV64-NEXT: j .LBB61_34017312; CHECK-RV64-NEXT: .LBB61_846: # %cond.load131317313; CHECK-RV64-NEXT: lbu a2, 0(a0)17314; CHECK-RV64-NEXT: li a3, 51217315; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17316; CHECK-RV64-NEXT: vmv.s.x v16, a217317; CHECK-RV64-NEXT: li a2, 33017318; CHECK-RV64-NEXT: li a3, 32917319; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17320; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317321; CHECK-RV64-NEXT: addi a0, a0, 117322; CHECK-RV64-NEXT: andi a2, a1, 102417323; CHECK-RV64-NEXT: bnez a2, .LBB61_84717324; CHECK-RV64-NEXT: j .LBB61_34117325; CHECK-RV64-NEXT: .LBB61_847: # %cond.load131717326; CHECK-RV64-NEXT: lbu a2, 0(a0)17327; CHECK-RV64-NEXT: li a3, 51217328; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17329; CHECK-RV64-NEXT: vmv.s.x v16, a217330; CHECK-RV64-NEXT: li a2, 33117331; CHECK-RV64-NEXT: li a3, 33017332; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17333; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317334; CHECK-RV64-NEXT: addi a0, a0, 117335; CHECK-RV64-NEXT: slli a2, a1, 5217336; CHECK-RV64-NEXT: bltz a2, .LBB61_84817337; CHECK-RV64-NEXT: j .LBB61_34217338; CHECK-RV64-NEXT: .LBB61_848: # %cond.load132117339; CHECK-RV64-NEXT: lbu a2, 0(a0)17340; CHECK-RV64-NEXT: li a3, 51217341; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17342; CHECK-RV64-NEXT: vmv.s.x v16, a217343; CHECK-RV64-NEXT: li a2, 33217344; CHECK-RV64-NEXT: li a3, 33117345; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17346; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317347; CHECK-RV64-NEXT: addi a0, a0, 117348; CHECK-RV64-NEXT: slli a2, a1, 5117349; CHECK-RV64-NEXT: bltz a2, .LBB61_84917350; CHECK-RV64-NEXT: j .LBB61_34317351; CHECK-RV64-NEXT: .LBB61_849: # %cond.load132517352; CHECK-RV64-NEXT: lbu a2, 0(a0)17353; CHECK-RV64-NEXT: li a3, 51217354; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17355; CHECK-RV64-NEXT: vmv.s.x v16, a217356; CHECK-RV64-NEXT: li a2, 33317357; CHECK-RV64-NEXT: li a3, 33217358; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17359; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317360; CHECK-RV64-NEXT: addi a0, a0, 117361; CHECK-RV64-NEXT: slli a2, a1, 5017362; CHECK-RV64-NEXT: bltz a2, .LBB61_85017363; CHECK-RV64-NEXT: j .LBB61_34417364; CHECK-RV64-NEXT: .LBB61_850: # %cond.load132917365; CHECK-RV64-NEXT: lbu a2, 0(a0)17366; CHECK-RV64-NEXT: li a3, 51217367; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17368; CHECK-RV64-NEXT: vmv.s.x v16, a217369; CHECK-RV64-NEXT: li a2, 33417370; CHECK-RV64-NEXT: li a3, 33317371; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17372; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317373; CHECK-RV64-NEXT: addi a0, a0, 117374; CHECK-RV64-NEXT: slli a2, a1, 4917375; CHECK-RV64-NEXT: bltz a2, .LBB61_85117376; CHECK-RV64-NEXT: j .LBB61_34517377; CHECK-RV64-NEXT: .LBB61_851: # %cond.load133317378; CHECK-RV64-NEXT: lbu a2, 0(a0)17379; CHECK-RV64-NEXT: li a3, 51217380; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17381; CHECK-RV64-NEXT: vmv.s.x v16, a217382; CHECK-RV64-NEXT: li a2, 33517383; CHECK-RV64-NEXT: li a3, 33417384; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17385; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317386; CHECK-RV64-NEXT: addi a0, a0, 117387; CHECK-RV64-NEXT: slli a2, a1, 4817388; CHECK-RV64-NEXT: bltz a2, .LBB61_85217389; CHECK-RV64-NEXT: j .LBB61_34617390; CHECK-RV64-NEXT: .LBB61_852: # %cond.load133717391; CHECK-RV64-NEXT: lbu a2, 0(a0)17392; CHECK-RV64-NEXT: li a3, 51217393; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17394; CHECK-RV64-NEXT: vmv.s.x v16, a217395; CHECK-RV64-NEXT: li a2, 33617396; CHECK-RV64-NEXT: li a3, 33517397; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17398; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317399; CHECK-RV64-NEXT: addi a0, a0, 117400; CHECK-RV64-NEXT: slli a2, a1, 4717401; CHECK-RV64-NEXT: bltz a2, .LBB61_85317402; CHECK-RV64-NEXT: j .LBB61_34717403; CHECK-RV64-NEXT: .LBB61_853: # %cond.load134117404; CHECK-RV64-NEXT: lbu a2, 0(a0)17405; CHECK-RV64-NEXT: li a3, 51217406; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17407; CHECK-RV64-NEXT: vmv.s.x v16, a217408; CHECK-RV64-NEXT: li a2, 33717409; CHECK-RV64-NEXT: li a3, 33617410; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17411; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317412; CHECK-RV64-NEXT: addi a0, a0, 117413; CHECK-RV64-NEXT: slli a2, a1, 4617414; CHECK-RV64-NEXT: bltz a2, .LBB61_85417415; CHECK-RV64-NEXT: j .LBB61_34817416; CHECK-RV64-NEXT: .LBB61_854: # %cond.load134517417; CHECK-RV64-NEXT: lbu a2, 0(a0)17418; CHECK-RV64-NEXT: li a3, 51217419; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17420; CHECK-RV64-NEXT: vmv.s.x v16, a217421; CHECK-RV64-NEXT: li a2, 33817422; CHECK-RV64-NEXT: li a3, 33717423; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17424; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317425; CHECK-RV64-NEXT: addi a0, a0, 117426; CHECK-RV64-NEXT: slli a2, a1, 4517427; CHECK-RV64-NEXT: bltz a2, .LBB61_85517428; CHECK-RV64-NEXT: j .LBB61_34917429; CHECK-RV64-NEXT: .LBB61_855: # %cond.load134917430; CHECK-RV64-NEXT: lbu a2, 0(a0)17431; CHECK-RV64-NEXT: li a3, 51217432; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17433; CHECK-RV64-NEXT: vmv.s.x v16, a217434; CHECK-RV64-NEXT: li a2, 33917435; CHECK-RV64-NEXT: li a3, 33817436; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17437; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317438; CHECK-RV64-NEXT: addi a0, a0, 117439; CHECK-RV64-NEXT: slli a2, a1, 4417440; CHECK-RV64-NEXT: bltz a2, .LBB61_85617441; CHECK-RV64-NEXT: j .LBB61_35017442; CHECK-RV64-NEXT: .LBB61_856: # %cond.load135317443; CHECK-RV64-NEXT: lbu a2, 0(a0)17444; CHECK-RV64-NEXT: li a3, 51217445; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17446; CHECK-RV64-NEXT: vmv.s.x v16, a217447; CHECK-RV64-NEXT: li a2, 34017448; CHECK-RV64-NEXT: li a3, 33917449; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17450; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317451; CHECK-RV64-NEXT: addi a0, a0, 117452; CHECK-RV64-NEXT: slli a2, a1, 4317453; CHECK-RV64-NEXT: bltz a2, .LBB61_85717454; CHECK-RV64-NEXT: j .LBB61_35117455; CHECK-RV64-NEXT: .LBB61_857: # %cond.load135717456; CHECK-RV64-NEXT: lbu a2, 0(a0)17457; CHECK-RV64-NEXT: li a3, 51217458; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17459; CHECK-RV64-NEXT: vmv.s.x v16, a217460; CHECK-RV64-NEXT: li a2, 34117461; CHECK-RV64-NEXT: li a3, 34017462; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17463; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317464; CHECK-RV64-NEXT: addi a0, a0, 117465; CHECK-RV64-NEXT: slli a2, a1, 4217466; CHECK-RV64-NEXT: bltz a2, .LBB61_85817467; CHECK-RV64-NEXT: j .LBB61_35217468; CHECK-RV64-NEXT: .LBB61_858: # %cond.load136117469; CHECK-RV64-NEXT: lbu a2, 0(a0)17470; CHECK-RV64-NEXT: li a3, 51217471; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17472; CHECK-RV64-NEXT: vmv.s.x v16, a217473; CHECK-RV64-NEXT: li a2, 34217474; CHECK-RV64-NEXT: li a3, 34117475; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17476; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317477; CHECK-RV64-NEXT: addi a0, a0, 117478; CHECK-RV64-NEXT: slli a2, a1, 4117479; CHECK-RV64-NEXT: bltz a2, .LBB61_85917480; CHECK-RV64-NEXT: j .LBB61_35317481; CHECK-RV64-NEXT: .LBB61_859: # %cond.load136517482; CHECK-RV64-NEXT: lbu a2, 0(a0)17483; CHECK-RV64-NEXT: li a3, 51217484; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17485; CHECK-RV64-NEXT: vmv.s.x v16, a217486; CHECK-RV64-NEXT: li a2, 34317487; CHECK-RV64-NEXT: li a3, 34217488; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17489; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317490; CHECK-RV64-NEXT: addi a0, a0, 117491; CHECK-RV64-NEXT: slli a2, a1, 4017492; CHECK-RV64-NEXT: bltz a2, .LBB61_86017493; CHECK-RV64-NEXT: j .LBB61_35417494; CHECK-RV64-NEXT: .LBB61_860: # %cond.load136917495; CHECK-RV64-NEXT: lbu a2, 0(a0)17496; CHECK-RV64-NEXT: li a3, 51217497; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17498; CHECK-RV64-NEXT: vmv.s.x v16, a217499; CHECK-RV64-NEXT: li a2, 34417500; CHECK-RV64-NEXT: li a3, 34317501; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17502; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317503; CHECK-RV64-NEXT: addi a0, a0, 117504; CHECK-RV64-NEXT: slli a2, a1, 3917505; CHECK-RV64-NEXT: bltz a2, .LBB61_86117506; CHECK-RV64-NEXT: j .LBB61_35517507; CHECK-RV64-NEXT: .LBB61_861: # %cond.load137317508; CHECK-RV64-NEXT: lbu a2, 0(a0)17509; CHECK-RV64-NEXT: li a3, 51217510; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17511; CHECK-RV64-NEXT: vmv.s.x v16, a217512; CHECK-RV64-NEXT: li a2, 34517513; CHECK-RV64-NEXT: li a3, 34417514; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17515; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317516; CHECK-RV64-NEXT: addi a0, a0, 117517; CHECK-RV64-NEXT: slli a2, a1, 3817518; CHECK-RV64-NEXT: bltz a2, .LBB61_86217519; CHECK-RV64-NEXT: j .LBB61_35617520; CHECK-RV64-NEXT: .LBB61_862: # %cond.load137717521; CHECK-RV64-NEXT: lbu a2, 0(a0)17522; CHECK-RV64-NEXT: li a3, 51217523; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17524; CHECK-RV64-NEXT: vmv.s.x v16, a217525; CHECK-RV64-NEXT: li a2, 34617526; CHECK-RV64-NEXT: li a3, 34517527; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17528; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317529; CHECK-RV64-NEXT: addi a0, a0, 117530; CHECK-RV64-NEXT: slli a2, a1, 3717531; CHECK-RV64-NEXT: bltz a2, .LBB61_86317532; CHECK-RV64-NEXT: j .LBB61_35717533; CHECK-RV64-NEXT: .LBB61_863: # %cond.load138117534; CHECK-RV64-NEXT: lbu a2, 0(a0)17535; CHECK-RV64-NEXT: li a3, 51217536; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17537; CHECK-RV64-NEXT: vmv.s.x v16, a217538; CHECK-RV64-NEXT: li a2, 34717539; CHECK-RV64-NEXT: li a3, 34617540; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17541; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317542; CHECK-RV64-NEXT: addi a0, a0, 117543; CHECK-RV64-NEXT: slli a2, a1, 3617544; CHECK-RV64-NEXT: bltz a2, .LBB61_86417545; CHECK-RV64-NEXT: j .LBB61_35817546; CHECK-RV64-NEXT: .LBB61_864: # %cond.load138517547; CHECK-RV64-NEXT: lbu a2, 0(a0)17548; CHECK-RV64-NEXT: li a3, 51217549; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17550; CHECK-RV64-NEXT: vmv.s.x v16, a217551; CHECK-RV64-NEXT: li a2, 34817552; CHECK-RV64-NEXT: li a3, 34717553; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17554; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317555; CHECK-RV64-NEXT: addi a0, a0, 117556; CHECK-RV64-NEXT: slli a2, a1, 3517557; CHECK-RV64-NEXT: bltz a2, .LBB61_86517558; CHECK-RV64-NEXT: j .LBB61_35917559; CHECK-RV64-NEXT: .LBB61_865: # %cond.load138917560; CHECK-RV64-NEXT: lbu a2, 0(a0)17561; CHECK-RV64-NEXT: li a3, 51217562; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17563; CHECK-RV64-NEXT: vmv.s.x v16, a217564; CHECK-RV64-NEXT: li a2, 34917565; CHECK-RV64-NEXT: li a3, 34817566; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17567; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317568; CHECK-RV64-NEXT: addi a0, a0, 117569; CHECK-RV64-NEXT: slli a2, a1, 3417570; CHECK-RV64-NEXT: bltz a2, .LBB61_86617571; CHECK-RV64-NEXT: j .LBB61_36017572; CHECK-RV64-NEXT: .LBB61_866: # %cond.load139317573; CHECK-RV64-NEXT: lbu a2, 0(a0)17574; CHECK-RV64-NEXT: li a3, 51217575; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17576; CHECK-RV64-NEXT: vmv.s.x v16, a217577; CHECK-RV64-NEXT: li a2, 35017578; CHECK-RV64-NEXT: li a3, 34917579; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17580; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317581; CHECK-RV64-NEXT: addi a0, a0, 117582; CHECK-RV64-NEXT: slli a2, a1, 3317583; CHECK-RV64-NEXT: bltz a2, .LBB61_86717584; CHECK-RV64-NEXT: j .LBB61_36117585; CHECK-RV64-NEXT: .LBB61_867: # %cond.load139717586; CHECK-RV64-NEXT: lbu a2, 0(a0)17587; CHECK-RV64-NEXT: li a3, 51217588; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17589; CHECK-RV64-NEXT: vmv.s.x v16, a217590; CHECK-RV64-NEXT: li a2, 35117591; CHECK-RV64-NEXT: li a3, 35017592; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17593; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317594; CHECK-RV64-NEXT: addi a0, a0, 117595; CHECK-RV64-NEXT: slli a2, a1, 3217596; CHECK-RV64-NEXT: bltz a2, .LBB61_86817597; CHECK-RV64-NEXT: j .LBB61_36217598; CHECK-RV64-NEXT: .LBB61_868: # %cond.load140117599; CHECK-RV64-NEXT: lbu a2, 0(a0)17600; CHECK-RV64-NEXT: li a3, 51217601; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17602; CHECK-RV64-NEXT: vmv.s.x v16, a217603; CHECK-RV64-NEXT: li a2, 35217604; CHECK-RV64-NEXT: li a3, 35117605; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17606; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317607; CHECK-RV64-NEXT: addi a0, a0, 117608; CHECK-RV64-NEXT: slli a2, a1, 3117609; CHECK-RV64-NEXT: bltz a2, .LBB61_86917610; CHECK-RV64-NEXT: j .LBB61_36317611; CHECK-RV64-NEXT: .LBB61_869: # %cond.load140517612; CHECK-RV64-NEXT: lbu a2, 0(a0)17613; CHECK-RV64-NEXT: li a3, 51217614; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17615; CHECK-RV64-NEXT: vmv.s.x v16, a217616; CHECK-RV64-NEXT: li a2, 35317617; CHECK-RV64-NEXT: li a3, 35217618; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17619; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317620; CHECK-RV64-NEXT: addi a0, a0, 117621; CHECK-RV64-NEXT: slli a2, a1, 3017622; CHECK-RV64-NEXT: bltz a2, .LBB61_87017623; CHECK-RV64-NEXT: j .LBB61_36417624; CHECK-RV64-NEXT: .LBB61_870: # %cond.load140917625; CHECK-RV64-NEXT: lbu a2, 0(a0)17626; CHECK-RV64-NEXT: li a3, 51217627; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17628; CHECK-RV64-NEXT: vmv.s.x v16, a217629; CHECK-RV64-NEXT: li a2, 35417630; CHECK-RV64-NEXT: li a3, 35317631; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17632; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317633; CHECK-RV64-NEXT: addi a0, a0, 117634; CHECK-RV64-NEXT: slli a2, a1, 2917635; CHECK-RV64-NEXT: bltz a2, .LBB61_87117636; CHECK-RV64-NEXT: j .LBB61_36517637; CHECK-RV64-NEXT: .LBB61_871: # %cond.load141317638; CHECK-RV64-NEXT: lbu a2, 0(a0)17639; CHECK-RV64-NEXT: li a3, 51217640; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17641; CHECK-RV64-NEXT: vmv.s.x v16, a217642; CHECK-RV64-NEXT: li a2, 35517643; CHECK-RV64-NEXT: li a3, 35417644; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17645; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317646; CHECK-RV64-NEXT: addi a0, a0, 117647; CHECK-RV64-NEXT: slli a2, a1, 2817648; CHECK-RV64-NEXT: bltz a2, .LBB61_87217649; CHECK-RV64-NEXT: j .LBB61_36617650; CHECK-RV64-NEXT: .LBB61_872: # %cond.load141717651; CHECK-RV64-NEXT: lbu a2, 0(a0)17652; CHECK-RV64-NEXT: li a3, 51217653; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17654; CHECK-RV64-NEXT: vmv.s.x v16, a217655; CHECK-RV64-NEXT: li a2, 35617656; CHECK-RV64-NEXT: li a3, 35517657; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17658; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317659; CHECK-RV64-NEXT: addi a0, a0, 117660; CHECK-RV64-NEXT: slli a2, a1, 2717661; CHECK-RV64-NEXT: bltz a2, .LBB61_87317662; CHECK-RV64-NEXT: j .LBB61_36717663; CHECK-RV64-NEXT: .LBB61_873: # %cond.load142117664; CHECK-RV64-NEXT: lbu a2, 0(a0)17665; CHECK-RV64-NEXT: li a3, 51217666; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17667; CHECK-RV64-NEXT: vmv.s.x v16, a217668; CHECK-RV64-NEXT: li a2, 35717669; CHECK-RV64-NEXT: li a3, 35617670; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17671; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317672; CHECK-RV64-NEXT: addi a0, a0, 117673; CHECK-RV64-NEXT: slli a2, a1, 2617674; CHECK-RV64-NEXT: bltz a2, .LBB61_87417675; CHECK-RV64-NEXT: j .LBB61_36817676; CHECK-RV64-NEXT: .LBB61_874: # %cond.load142517677; CHECK-RV64-NEXT: lbu a2, 0(a0)17678; CHECK-RV64-NEXT: li a3, 51217679; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17680; CHECK-RV64-NEXT: vmv.s.x v16, a217681; CHECK-RV64-NEXT: li a2, 35817682; CHECK-RV64-NEXT: li a3, 35717683; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17684; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317685; CHECK-RV64-NEXT: addi a0, a0, 117686; CHECK-RV64-NEXT: slli a2, a1, 2517687; CHECK-RV64-NEXT: bltz a2, .LBB61_87517688; CHECK-RV64-NEXT: j .LBB61_36917689; CHECK-RV64-NEXT: .LBB61_875: # %cond.load142917690; CHECK-RV64-NEXT: lbu a2, 0(a0)17691; CHECK-RV64-NEXT: li a3, 51217692; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17693; CHECK-RV64-NEXT: vmv.s.x v16, a217694; CHECK-RV64-NEXT: li a2, 35917695; CHECK-RV64-NEXT: li a3, 35817696; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17697; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317698; CHECK-RV64-NEXT: addi a0, a0, 117699; CHECK-RV64-NEXT: slli a2, a1, 2417700; CHECK-RV64-NEXT: bltz a2, .LBB61_87617701; CHECK-RV64-NEXT: j .LBB61_37017702; CHECK-RV64-NEXT: .LBB61_876: # %cond.load143317703; CHECK-RV64-NEXT: lbu a2, 0(a0)17704; CHECK-RV64-NEXT: li a3, 51217705; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17706; CHECK-RV64-NEXT: vmv.s.x v16, a217707; CHECK-RV64-NEXT: li a2, 36017708; CHECK-RV64-NEXT: li a3, 35917709; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17710; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317711; CHECK-RV64-NEXT: addi a0, a0, 117712; CHECK-RV64-NEXT: slli a2, a1, 2317713; CHECK-RV64-NEXT: bltz a2, .LBB61_87717714; CHECK-RV64-NEXT: j .LBB61_37117715; CHECK-RV64-NEXT: .LBB61_877: # %cond.load143717716; CHECK-RV64-NEXT: lbu a2, 0(a0)17717; CHECK-RV64-NEXT: li a3, 51217718; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17719; CHECK-RV64-NEXT: vmv.s.x v16, a217720; CHECK-RV64-NEXT: li a2, 36117721; CHECK-RV64-NEXT: li a3, 36017722; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17723; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317724; CHECK-RV64-NEXT: addi a0, a0, 117725; CHECK-RV64-NEXT: slli a2, a1, 2217726; CHECK-RV64-NEXT: bltz a2, .LBB61_87817727; CHECK-RV64-NEXT: j .LBB61_37217728; CHECK-RV64-NEXT: .LBB61_878: # %cond.load144117729; CHECK-RV64-NEXT: lbu a2, 0(a0)17730; CHECK-RV64-NEXT: li a3, 51217731; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17732; CHECK-RV64-NEXT: vmv.s.x v16, a217733; CHECK-RV64-NEXT: li a2, 36217734; CHECK-RV64-NEXT: li a3, 36117735; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17736; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317737; CHECK-RV64-NEXT: addi a0, a0, 117738; CHECK-RV64-NEXT: slli a2, a1, 2117739; CHECK-RV64-NEXT: bltz a2, .LBB61_87917740; CHECK-RV64-NEXT: j .LBB61_37317741; CHECK-RV64-NEXT: .LBB61_879: # %cond.load144517742; CHECK-RV64-NEXT: lbu a2, 0(a0)17743; CHECK-RV64-NEXT: li a3, 51217744; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17745; CHECK-RV64-NEXT: vmv.s.x v16, a217746; CHECK-RV64-NEXT: li a2, 36317747; CHECK-RV64-NEXT: li a3, 36217748; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17749; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317750; CHECK-RV64-NEXT: addi a0, a0, 117751; CHECK-RV64-NEXT: slli a2, a1, 2017752; CHECK-RV64-NEXT: bltz a2, .LBB61_88017753; CHECK-RV64-NEXT: j .LBB61_37417754; CHECK-RV64-NEXT: .LBB61_880: # %cond.load144917755; CHECK-RV64-NEXT: lbu a2, 0(a0)17756; CHECK-RV64-NEXT: li a3, 51217757; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17758; CHECK-RV64-NEXT: vmv.s.x v16, a217759; CHECK-RV64-NEXT: li a2, 36417760; CHECK-RV64-NEXT: li a3, 36317761; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17762; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317763; CHECK-RV64-NEXT: addi a0, a0, 117764; CHECK-RV64-NEXT: slli a2, a1, 1917765; CHECK-RV64-NEXT: bltz a2, .LBB61_88117766; CHECK-RV64-NEXT: j .LBB61_37517767; CHECK-RV64-NEXT: .LBB61_881: # %cond.load145317768; CHECK-RV64-NEXT: lbu a2, 0(a0)17769; CHECK-RV64-NEXT: li a3, 51217770; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17771; CHECK-RV64-NEXT: vmv.s.x v16, a217772; CHECK-RV64-NEXT: li a2, 36517773; CHECK-RV64-NEXT: li a3, 36417774; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17775; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317776; CHECK-RV64-NEXT: addi a0, a0, 117777; CHECK-RV64-NEXT: slli a2, a1, 1817778; CHECK-RV64-NEXT: bltz a2, .LBB61_88217779; CHECK-RV64-NEXT: j .LBB61_37617780; CHECK-RV64-NEXT: .LBB61_882: # %cond.load145717781; CHECK-RV64-NEXT: lbu a2, 0(a0)17782; CHECK-RV64-NEXT: li a3, 51217783; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17784; CHECK-RV64-NEXT: vmv.s.x v16, a217785; CHECK-RV64-NEXT: li a2, 36617786; CHECK-RV64-NEXT: li a3, 36517787; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17788; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317789; CHECK-RV64-NEXT: addi a0, a0, 117790; CHECK-RV64-NEXT: slli a2, a1, 1717791; CHECK-RV64-NEXT: bltz a2, .LBB61_88317792; CHECK-RV64-NEXT: j .LBB61_37717793; CHECK-RV64-NEXT: .LBB61_883: # %cond.load146117794; CHECK-RV64-NEXT: lbu a2, 0(a0)17795; CHECK-RV64-NEXT: li a3, 51217796; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17797; CHECK-RV64-NEXT: vmv.s.x v16, a217798; CHECK-RV64-NEXT: li a2, 36717799; CHECK-RV64-NEXT: li a3, 36617800; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17801; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317802; CHECK-RV64-NEXT: addi a0, a0, 117803; CHECK-RV64-NEXT: slli a2, a1, 1617804; CHECK-RV64-NEXT: bltz a2, .LBB61_88417805; CHECK-RV64-NEXT: j .LBB61_37817806; CHECK-RV64-NEXT: .LBB61_884: # %cond.load146517807; CHECK-RV64-NEXT: lbu a2, 0(a0)17808; CHECK-RV64-NEXT: li a3, 51217809; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17810; CHECK-RV64-NEXT: vmv.s.x v16, a217811; CHECK-RV64-NEXT: li a2, 36817812; CHECK-RV64-NEXT: li a3, 36717813; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17814; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317815; CHECK-RV64-NEXT: addi a0, a0, 117816; CHECK-RV64-NEXT: slli a2, a1, 1517817; CHECK-RV64-NEXT: bltz a2, .LBB61_88517818; CHECK-RV64-NEXT: j .LBB61_37917819; CHECK-RV64-NEXT: .LBB61_885: # %cond.load146917820; CHECK-RV64-NEXT: lbu a2, 0(a0)17821; CHECK-RV64-NEXT: li a3, 51217822; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17823; CHECK-RV64-NEXT: vmv.s.x v16, a217824; CHECK-RV64-NEXT: li a2, 36917825; CHECK-RV64-NEXT: li a3, 36817826; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17827; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317828; CHECK-RV64-NEXT: addi a0, a0, 117829; CHECK-RV64-NEXT: slli a2, a1, 1417830; CHECK-RV64-NEXT: bltz a2, .LBB61_88617831; CHECK-RV64-NEXT: j .LBB61_38017832; CHECK-RV64-NEXT: .LBB61_886: # %cond.load147317833; CHECK-RV64-NEXT: lbu a2, 0(a0)17834; CHECK-RV64-NEXT: li a3, 51217835; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17836; CHECK-RV64-NEXT: vmv.s.x v16, a217837; CHECK-RV64-NEXT: li a2, 37017838; CHECK-RV64-NEXT: li a3, 36917839; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17840; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317841; CHECK-RV64-NEXT: addi a0, a0, 117842; CHECK-RV64-NEXT: slli a2, a1, 1317843; CHECK-RV64-NEXT: bltz a2, .LBB61_88717844; CHECK-RV64-NEXT: j .LBB61_38117845; CHECK-RV64-NEXT: .LBB61_887: # %cond.load147717846; CHECK-RV64-NEXT: lbu a2, 0(a0)17847; CHECK-RV64-NEXT: li a3, 51217848; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17849; CHECK-RV64-NEXT: vmv.s.x v16, a217850; CHECK-RV64-NEXT: li a2, 37117851; CHECK-RV64-NEXT: li a3, 37017852; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17853; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317854; CHECK-RV64-NEXT: addi a0, a0, 117855; CHECK-RV64-NEXT: slli a2, a1, 1217856; CHECK-RV64-NEXT: bltz a2, .LBB61_88817857; CHECK-RV64-NEXT: j .LBB61_38217858; CHECK-RV64-NEXT: .LBB61_888: # %cond.load148117859; CHECK-RV64-NEXT: lbu a2, 0(a0)17860; CHECK-RV64-NEXT: li a3, 51217861; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17862; CHECK-RV64-NEXT: vmv.s.x v16, a217863; CHECK-RV64-NEXT: li a2, 37217864; CHECK-RV64-NEXT: li a3, 37117865; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17866; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317867; CHECK-RV64-NEXT: addi a0, a0, 117868; CHECK-RV64-NEXT: slli a2, a1, 1117869; CHECK-RV64-NEXT: bltz a2, .LBB61_88917870; CHECK-RV64-NEXT: j .LBB61_38317871; CHECK-RV64-NEXT: .LBB61_889: # %cond.load148517872; CHECK-RV64-NEXT: lbu a2, 0(a0)17873; CHECK-RV64-NEXT: li a3, 51217874; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17875; CHECK-RV64-NEXT: vmv.s.x v16, a217876; CHECK-RV64-NEXT: li a2, 37317877; CHECK-RV64-NEXT: li a3, 37217878; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17879; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317880; CHECK-RV64-NEXT: addi a0, a0, 117881; CHECK-RV64-NEXT: slli a2, a1, 1017882; CHECK-RV64-NEXT: bltz a2, .LBB61_89017883; CHECK-RV64-NEXT: j .LBB61_38417884; CHECK-RV64-NEXT: .LBB61_890: # %cond.load148917885; CHECK-RV64-NEXT: lbu a2, 0(a0)17886; CHECK-RV64-NEXT: li a3, 51217887; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17888; CHECK-RV64-NEXT: vmv.s.x v16, a217889; CHECK-RV64-NEXT: li a2, 37417890; CHECK-RV64-NEXT: li a3, 37317891; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17892; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317893; CHECK-RV64-NEXT: addi a0, a0, 117894; CHECK-RV64-NEXT: slli a2, a1, 917895; CHECK-RV64-NEXT: bltz a2, .LBB61_89117896; CHECK-RV64-NEXT: j .LBB61_38517897; CHECK-RV64-NEXT: .LBB61_891: # %cond.load149317898; CHECK-RV64-NEXT: lbu a2, 0(a0)17899; CHECK-RV64-NEXT: li a3, 51217900; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17901; CHECK-RV64-NEXT: vmv.s.x v16, a217902; CHECK-RV64-NEXT: li a2, 37517903; CHECK-RV64-NEXT: li a3, 37417904; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17905; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317906; CHECK-RV64-NEXT: addi a0, a0, 117907; CHECK-RV64-NEXT: slli a2, a1, 817908; CHECK-RV64-NEXT: bltz a2, .LBB61_89217909; CHECK-RV64-NEXT: j .LBB61_38617910; CHECK-RV64-NEXT: .LBB61_892: # %cond.load149717911; CHECK-RV64-NEXT: lbu a2, 0(a0)17912; CHECK-RV64-NEXT: li a3, 51217913; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17914; CHECK-RV64-NEXT: vmv.s.x v16, a217915; CHECK-RV64-NEXT: li a2, 37617916; CHECK-RV64-NEXT: li a3, 37517917; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17918; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317919; CHECK-RV64-NEXT: addi a0, a0, 117920; CHECK-RV64-NEXT: slli a2, a1, 717921; CHECK-RV64-NEXT: bltz a2, .LBB61_89317922; CHECK-RV64-NEXT: j .LBB61_38717923; CHECK-RV64-NEXT: .LBB61_893: # %cond.load150117924; CHECK-RV64-NEXT: lbu a2, 0(a0)17925; CHECK-RV64-NEXT: li a3, 51217926; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17927; CHECK-RV64-NEXT: vmv.s.x v16, a217928; CHECK-RV64-NEXT: li a2, 37717929; CHECK-RV64-NEXT: li a3, 37617930; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17931; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317932; CHECK-RV64-NEXT: addi a0, a0, 117933; CHECK-RV64-NEXT: slli a2, a1, 617934; CHECK-RV64-NEXT: bltz a2, .LBB61_89417935; CHECK-RV64-NEXT: j .LBB61_38817936; CHECK-RV64-NEXT: .LBB61_894: # %cond.load150517937; CHECK-RV64-NEXT: lbu a2, 0(a0)17938; CHECK-RV64-NEXT: li a3, 51217939; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17940; CHECK-RV64-NEXT: vmv.s.x v16, a217941; CHECK-RV64-NEXT: li a2, 37817942; CHECK-RV64-NEXT: li a3, 37717943; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17944; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317945; CHECK-RV64-NEXT: addi a0, a0, 117946; CHECK-RV64-NEXT: slli a2, a1, 517947; CHECK-RV64-NEXT: bltz a2, .LBB61_89517948; CHECK-RV64-NEXT: j .LBB61_38917949; CHECK-RV64-NEXT: .LBB61_895: # %cond.load150917950; CHECK-RV64-NEXT: lbu a2, 0(a0)17951; CHECK-RV64-NEXT: li a3, 51217952; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17953; CHECK-RV64-NEXT: vmv.s.x v16, a217954; CHECK-RV64-NEXT: li a2, 37917955; CHECK-RV64-NEXT: li a3, 37817956; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17957; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317958; CHECK-RV64-NEXT: addi a0, a0, 117959; CHECK-RV64-NEXT: slli a2, a1, 417960; CHECK-RV64-NEXT: bltz a2, .LBB61_89617961; CHECK-RV64-NEXT: j .LBB61_39017962; CHECK-RV64-NEXT: .LBB61_896: # %cond.load151317963; CHECK-RV64-NEXT: lbu a2, 0(a0)17964; CHECK-RV64-NEXT: li a3, 51217965; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17966; CHECK-RV64-NEXT: vmv.s.x v16, a217967; CHECK-RV64-NEXT: li a2, 38017968; CHECK-RV64-NEXT: li a3, 37917969; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17970; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317971; CHECK-RV64-NEXT: addi a0, a0, 117972; CHECK-RV64-NEXT: slli a2, a1, 317973; CHECK-RV64-NEXT: bltz a2, .LBB61_89717974; CHECK-RV64-NEXT: j .LBB61_39117975; CHECK-RV64-NEXT: .LBB61_897: # %cond.load151717976; CHECK-RV64-NEXT: lbu a2, 0(a0)17977; CHECK-RV64-NEXT: li a3, 51217978; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma17979; CHECK-RV64-NEXT: vmv.s.x v16, a217980; CHECK-RV64-NEXT: li a2, 38117981; CHECK-RV64-NEXT: li a3, 38017982; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma17983; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317984; CHECK-RV64-NEXT: addi a0, a0, 117985; CHECK-RV64-NEXT: slli a2, a1, 217986; CHECK-RV64-NEXT: bgez a2, .LBB61_103017987; CHECK-RV64-NEXT: j .LBB61_39217988; CHECK-RV64-NEXT: .LBB61_1030: # %cond.load151717989; CHECK-RV64-NEXT: j .LBB61_39317990; CHECK-RV64-NEXT: .LBB61_898: # %cond.load152917991; CHECK-RV64-NEXT: lbu a1, 0(a0)17992; CHECK-RV64-NEXT: vmv.s.x v16, a117993; CHECK-RV64-NEXT: li a1, 38417994; CHECK-RV64-NEXT: li a3, 38317995; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma17996; CHECK-RV64-NEXT: vslideup.vx v8, v16, a317997; CHECK-RV64-NEXT: addi a0, a0, 117998; CHECK-RV64-NEXT: andi a1, a2, 117999; CHECK-RV64-NEXT: bnez a1, .LBB61_89918000; CHECK-RV64-NEXT: j .LBB61_39718001; CHECK-RV64-NEXT: .LBB61_899: # %cond.load153318002; CHECK-RV64-NEXT: lbu a1, 0(a0)18003; CHECK-RV64-NEXT: li a3, 51218004; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18005; CHECK-RV64-NEXT: vmv.s.x v16, a118006; CHECK-RV64-NEXT: li a1, 38518007; CHECK-RV64-NEXT: li a3, 38418008; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18009; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318010; CHECK-RV64-NEXT: addi a0, a0, 118011; CHECK-RV64-NEXT: andi a1, a2, 218012; CHECK-RV64-NEXT: bnez a1, .LBB61_90018013; CHECK-RV64-NEXT: j .LBB61_39818014; CHECK-RV64-NEXT: .LBB61_900: # %cond.load153718015; CHECK-RV64-NEXT: lbu a1, 0(a0)18016; CHECK-RV64-NEXT: li a3, 51218017; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18018; CHECK-RV64-NEXT: vmv.s.x v16, a118019; CHECK-RV64-NEXT: li a1, 38618020; CHECK-RV64-NEXT: li a3, 38518021; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18022; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318023; CHECK-RV64-NEXT: addi a0, a0, 118024; CHECK-RV64-NEXT: andi a1, a2, 418025; CHECK-RV64-NEXT: bnez a1, .LBB61_90118026; CHECK-RV64-NEXT: j .LBB61_39918027; CHECK-RV64-NEXT: .LBB61_901: # %cond.load154118028; CHECK-RV64-NEXT: lbu a1, 0(a0)18029; CHECK-RV64-NEXT: li a3, 51218030; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18031; CHECK-RV64-NEXT: vmv.s.x v16, a118032; CHECK-RV64-NEXT: li a1, 38718033; CHECK-RV64-NEXT: li a3, 38618034; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18035; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318036; CHECK-RV64-NEXT: addi a0, a0, 118037; CHECK-RV64-NEXT: andi a1, a2, 818038; CHECK-RV64-NEXT: bnez a1, .LBB61_90218039; CHECK-RV64-NEXT: j .LBB61_40018040; CHECK-RV64-NEXT: .LBB61_902: # %cond.load154518041; CHECK-RV64-NEXT: lbu a1, 0(a0)18042; CHECK-RV64-NEXT: li a3, 51218043; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18044; CHECK-RV64-NEXT: vmv.s.x v16, a118045; CHECK-RV64-NEXT: li a1, 38818046; CHECK-RV64-NEXT: li a3, 38718047; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18048; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318049; CHECK-RV64-NEXT: addi a0, a0, 118050; CHECK-RV64-NEXT: andi a1, a2, 1618051; CHECK-RV64-NEXT: bnez a1, .LBB61_90318052; CHECK-RV64-NEXT: j .LBB61_40118053; CHECK-RV64-NEXT: .LBB61_903: # %cond.load154918054; CHECK-RV64-NEXT: lbu a1, 0(a0)18055; CHECK-RV64-NEXT: li a3, 51218056; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18057; CHECK-RV64-NEXT: vmv.s.x v16, a118058; CHECK-RV64-NEXT: li a1, 38918059; CHECK-RV64-NEXT: li a3, 38818060; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18061; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318062; CHECK-RV64-NEXT: addi a0, a0, 118063; CHECK-RV64-NEXT: andi a1, a2, 3218064; CHECK-RV64-NEXT: bnez a1, .LBB61_90418065; CHECK-RV64-NEXT: j .LBB61_40218066; CHECK-RV64-NEXT: .LBB61_904: # %cond.load155318067; CHECK-RV64-NEXT: lbu a1, 0(a0)18068; CHECK-RV64-NEXT: li a3, 51218069; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18070; CHECK-RV64-NEXT: vmv.s.x v16, a118071; CHECK-RV64-NEXT: li a1, 39018072; CHECK-RV64-NEXT: li a3, 38918073; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18074; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318075; CHECK-RV64-NEXT: addi a0, a0, 118076; CHECK-RV64-NEXT: andi a1, a2, 6418077; CHECK-RV64-NEXT: bnez a1, .LBB61_90518078; CHECK-RV64-NEXT: j .LBB61_40318079; CHECK-RV64-NEXT: .LBB61_905: # %cond.load155718080; CHECK-RV64-NEXT: lbu a1, 0(a0)18081; CHECK-RV64-NEXT: li a3, 51218082; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18083; CHECK-RV64-NEXT: vmv.s.x v16, a118084; CHECK-RV64-NEXT: li a1, 39118085; CHECK-RV64-NEXT: li a3, 39018086; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18087; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318088; CHECK-RV64-NEXT: addi a0, a0, 118089; CHECK-RV64-NEXT: andi a1, a2, 12818090; CHECK-RV64-NEXT: bnez a1, .LBB61_90618091; CHECK-RV64-NEXT: j .LBB61_40418092; CHECK-RV64-NEXT: .LBB61_906: # %cond.load156118093; CHECK-RV64-NEXT: lbu a1, 0(a0)18094; CHECK-RV64-NEXT: li a3, 51218095; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18096; CHECK-RV64-NEXT: vmv.s.x v16, a118097; CHECK-RV64-NEXT: li a1, 39218098; CHECK-RV64-NEXT: li a3, 39118099; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18100; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318101; CHECK-RV64-NEXT: addi a0, a0, 118102; CHECK-RV64-NEXT: andi a1, a2, 25618103; CHECK-RV64-NEXT: bnez a1, .LBB61_90718104; CHECK-RV64-NEXT: j .LBB61_40518105; CHECK-RV64-NEXT: .LBB61_907: # %cond.load156518106; CHECK-RV64-NEXT: lbu a1, 0(a0)18107; CHECK-RV64-NEXT: li a3, 51218108; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18109; CHECK-RV64-NEXT: vmv.s.x v16, a118110; CHECK-RV64-NEXT: li a1, 39318111; CHECK-RV64-NEXT: li a3, 39218112; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18113; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318114; CHECK-RV64-NEXT: addi a0, a0, 118115; CHECK-RV64-NEXT: andi a1, a2, 51218116; CHECK-RV64-NEXT: bnez a1, .LBB61_90818117; CHECK-RV64-NEXT: j .LBB61_40618118; CHECK-RV64-NEXT: .LBB61_908: # %cond.load156918119; CHECK-RV64-NEXT: lbu a1, 0(a0)18120; CHECK-RV64-NEXT: li a3, 51218121; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18122; CHECK-RV64-NEXT: vmv.s.x v16, a118123; CHECK-RV64-NEXT: li a1, 39418124; CHECK-RV64-NEXT: li a3, 39318125; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18126; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318127; CHECK-RV64-NEXT: addi a0, a0, 118128; CHECK-RV64-NEXT: andi a1, a2, 102418129; CHECK-RV64-NEXT: bnez a1, .LBB61_90918130; CHECK-RV64-NEXT: j .LBB61_40718131; CHECK-RV64-NEXT: .LBB61_909: # %cond.load157318132; CHECK-RV64-NEXT: lbu a1, 0(a0)18133; CHECK-RV64-NEXT: li a3, 51218134; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18135; CHECK-RV64-NEXT: vmv.s.x v16, a118136; CHECK-RV64-NEXT: li a1, 39518137; CHECK-RV64-NEXT: li a3, 39418138; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18139; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318140; CHECK-RV64-NEXT: addi a0, a0, 118141; CHECK-RV64-NEXT: slli a1, a2, 5218142; CHECK-RV64-NEXT: bltz a1, .LBB61_91018143; CHECK-RV64-NEXT: j .LBB61_40818144; CHECK-RV64-NEXT: .LBB61_910: # %cond.load157718145; CHECK-RV64-NEXT: lbu a1, 0(a0)18146; CHECK-RV64-NEXT: li a3, 51218147; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18148; CHECK-RV64-NEXT: vmv.s.x v16, a118149; CHECK-RV64-NEXT: li a1, 39618150; CHECK-RV64-NEXT: li a3, 39518151; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18152; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318153; CHECK-RV64-NEXT: addi a0, a0, 118154; CHECK-RV64-NEXT: slli a1, a2, 5118155; CHECK-RV64-NEXT: bltz a1, .LBB61_91118156; CHECK-RV64-NEXT: j .LBB61_40918157; CHECK-RV64-NEXT: .LBB61_911: # %cond.load158118158; CHECK-RV64-NEXT: lbu a1, 0(a0)18159; CHECK-RV64-NEXT: li a3, 51218160; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18161; CHECK-RV64-NEXT: vmv.s.x v16, a118162; CHECK-RV64-NEXT: li a1, 39718163; CHECK-RV64-NEXT: li a3, 39618164; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18165; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318166; CHECK-RV64-NEXT: addi a0, a0, 118167; CHECK-RV64-NEXT: slli a1, a2, 5018168; CHECK-RV64-NEXT: bltz a1, .LBB61_91218169; CHECK-RV64-NEXT: j .LBB61_41018170; CHECK-RV64-NEXT: .LBB61_912: # %cond.load158518171; CHECK-RV64-NEXT: lbu a1, 0(a0)18172; CHECK-RV64-NEXT: li a3, 51218173; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18174; CHECK-RV64-NEXT: vmv.s.x v16, a118175; CHECK-RV64-NEXT: li a1, 39818176; CHECK-RV64-NEXT: li a3, 39718177; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18178; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318179; CHECK-RV64-NEXT: addi a0, a0, 118180; CHECK-RV64-NEXT: slli a1, a2, 4918181; CHECK-RV64-NEXT: bltz a1, .LBB61_91318182; CHECK-RV64-NEXT: j .LBB61_41118183; CHECK-RV64-NEXT: .LBB61_913: # %cond.load158918184; CHECK-RV64-NEXT: lbu a1, 0(a0)18185; CHECK-RV64-NEXT: li a3, 51218186; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18187; CHECK-RV64-NEXT: vmv.s.x v16, a118188; CHECK-RV64-NEXT: li a1, 39918189; CHECK-RV64-NEXT: li a3, 39818190; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18191; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318192; CHECK-RV64-NEXT: addi a0, a0, 118193; CHECK-RV64-NEXT: slli a1, a2, 4818194; CHECK-RV64-NEXT: bltz a1, .LBB61_91418195; CHECK-RV64-NEXT: j .LBB61_41218196; CHECK-RV64-NEXT: .LBB61_914: # %cond.load159318197; CHECK-RV64-NEXT: lbu a1, 0(a0)18198; CHECK-RV64-NEXT: li a3, 51218199; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18200; CHECK-RV64-NEXT: vmv.s.x v16, a118201; CHECK-RV64-NEXT: li a1, 40018202; CHECK-RV64-NEXT: li a3, 39918203; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18204; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318205; CHECK-RV64-NEXT: addi a0, a0, 118206; CHECK-RV64-NEXT: slli a1, a2, 4718207; CHECK-RV64-NEXT: bltz a1, .LBB61_91518208; CHECK-RV64-NEXT: j .LBB61_41318209; CHECK-RV64-NEXT: .LBB61_915: # %cond.load159718210; CHECK-RV64-NEXT: lbu a1, 0(a0)18211; CHECK-RV64-NEXT: li a3, 51218212; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18213; CHECK-RV64-NEXT: vmv.s.x v16, a118214; CHECK-RV64-NEXT: li a1, 40118215; CHECK-RV64-NEXT: li a3, 40018216; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18217; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318218; CHECK-RV64-NEXT: addi a0, a0, 118219; CHECK-RV64-NEXT: slli a1, a2, 4618220; CHECK-RV64-NEXT: bltz a1, .LBB61_91618221; CHECK-RV64-NEXT: j .LBB61_41418222; CHECK-RV64-NEXT: .LBB61_916: # %cond.load160118223; CHECK-RV64-NEXT: lbu a1, 0(a0)18224; CHECK-RV64-NEXT: li a3, 51218225; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18226; CHECK-RV64-NEXT: vmv.s.x v16, a118227; CHECK-RV64-NEXT: li a1, 40218228; CHECK-RV64-NEXT: li a3, 40118229; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18230; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318231; CHECK-RV64-NEXT: addi a0, a0, 118232; CHECK-RV64-NEXT: slli a1, a2, 4518233; CHECK-RV64-NEXT: bltz a1, .LBB61_91718234; CHECK-RV64-NEXT: j .LBB61_41518235; CHECK-RV64-NEXT: .LBB61_917: # %cond.load160518236; CHECK-RV64-NEXT: lbu a1, 0(a0)18237; CHECK-RV64-NEXT: li a3, 51218238; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18239; CHECK-RV64-NEXT: vmv.s.x v16, a118240; CHECK-RV64-NEXT: li a1, 40318241; CHECK-RV64-NEXT: li a3, 40218242; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18243; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318244; CHECK-RV64-NEXT: addi a0, a0, 118245; CHECK-RV64-NEXT: slli a1, a2, 4418246; CHECK-RV64-NEXT: bltz a1, .LBB61_91818247; CHECK-RV64-NEXT: j .LBB61_41618248; CHECK-RV64-NEXT: .LBB61_918: # %cond.load160918249; CHECK-RV64-NEXT: lbu a1, 0(a0)18250; CHECK-RV64-NEXT: li a3, 51218251; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18252; CHECK-RV64-NEXT: vmv.s.x v16, a118253; CHECK-RV64-NEXT: li a1, 40418254; CHECK-RV64-NEXT: li a3, 40318255; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18256; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318257; CHECK-RV64-NEXT: addi a0, a0, 118258; CHECK-RV64-NEXT: slli a1, a2, 4318259; CHECK-RV64-NEXT: bltz a1, .LBB61_91918260; CHECK-RV64-NEXT: j .LBB61_41718261; CHECK-RV64-NEXT: .LBB61_919: # %cond.load161318262; CHECK-RV64-NEXT: lbu a1, 0(a0)18263; CHECK-RV64-NEXT: li a3, 51218264; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18265; CHECK-RV64-NEXT: vmv.s.x v16, a118266; CHECK-RV64-NEXT: li a1, 40518267; CHECK-RV64-NEXT: li a3, 40418268; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18269; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318270; CHECK-RV64-NEXT: addi a0, a0, 118271; CHECK-RV64-NEXT: slli a1, a2, 4218272; CHECK-RV64-NEXT: bltz a1, .LBB61_92018273; CHECK-RV64-NEXT: j .LBB61_41818274; CHECK-RV64-NEXT: .LBB61_920: # %cond.load161718275; CHECK-RV64-NEXT: lbu a1, 0(a0)18276; CHECK-RV64-NEXT: li a3, 51218277; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18278; CHECK-RV64-NEXT: vmv.s.x v16, a118279; CHECK-RV64-NEXT: li a1, 40618280; CHECK-RV64-NEXT: li a3, 40518281; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18282; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318283; CHECK-RV64-NEXT: addi a0, a0, 118284; CHECK-RV64-NEXT: slli a1, a2, 4118285; CHECK-RV64-NEXT: bltz a1, .LBB61_92118286; CHECK-RV64-NEXT: j .LBB61_41918287; CHECK-RV64-NEXT: .LBB61_921: # %cond.load162118288; CHECK-RV64-NEXT: lbu a1, 0(a0)18289; CHECK-RV64-NEXT: li a3, 51218290; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18291; CHECK-RV64-NEXT: vmv.s.x v16, a118292; CHECK-RV64-NEXT: li a1, 40718293; CHECK-RV64-NEXT: li a3, 40618294; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18295; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318296; CHECK-RV64-NEXT: addi a0, a0, 118297; CHECK-RV64-NEXT: slli a1, a2, 4018298; CHECK-RV64-NEXT: bltz a1, .LBB61_92218299; CHECK-RV64-NEXT: j .LBB61_42018300; CHECK-RV64-NEXT: .LBB61_922: # %cond.load162518301; CHECK-RV64-NEXT: lbu a1, 0(a0)18302; CHECK-RV64-NEXT: li a3, 51218303; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18304; CHECK-RV64-NEXT: vmv.s.x v16, a118305; CHECK-RV64-NEXT: li a1, 40818306; CHECK-RV64-NEXT: li a3, 40718307; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18308; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318309; CHECK-RV64-NEXT: addi a0, a0, 118310; CHECK-RV64-NEXT: slli a1, a2, 3918311; CHECK-RV64-NEXT: bltz a1, .LBB61_92318312; CHECK-RV64-NEXT: j .LBB61_42118313; CHECK-RV64-NEXT: .LBB61_923: # %cond.load162918314; CHECK-RV64-NEXT: lbu a1, 0(a0)18315; CHECK-RV64-NEXT: li a3, 51218316; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18317; CHECK-RV64-NEXT: vmv.s.x v16, a118318; CHECK-RV64-NEXT: li a1, 40918319; CHECK-RV64-NEXT: li a3, 40818320; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18321; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318322; CHECK-RV64-NEXT: addi a0, a0, 118323; CHECK-RV64-NEXT: slli a1, a2, 3818324; CHECK-RV64-NEXT: bltz a1, .LBB61_92418325; CHECK-RV64-NEXT: j .LBB61_42218326; CHECK-RV64-NEXT: .LBB61_924: # %cond.load163318327; CHECK-RV64-NEXT: lbu a1, 0(a0)18328; CHECK-RV64-NEXT: li a3, 51218329; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18330; CHECK-RV64-NEXT: vmv.s.x v16, a118331; CHECK-RV64-NEXT: li a1, 41018332; CHECK-RV64-NEXT: li a3, 40918333; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18334; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318335; CHECK-RV64-NEXT: addi a0, a0, 118336; CHECK-RV64-NEXT: slli a1, a2, 3718337; CHECK-RV64-NEXT: bltz a1, .LBB61_92518338; CHECK-RV64-NEXT: j .LBB61_42318339; CHECK-RV64-NEXT: .LBB61_925: # %cond.load163718340; CHECK-RV64-NEXT: lbu a1, 0(a0)18341; CHECK-RV64-NEXT: li a3, 51218342; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18343; CHECK-RV64-NEXT: vmv.s.x v16, a118344; CHECK-RV64-NEXT: li a1, 41118345; CHECK-RV64-NEXT: li a3, 41018346; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18347; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318348; CHECK-RV64-NEXT: addi a0, a0, 118349; CHECK-RV64-NEXT: slli a1, a2, 3618350; CHECK-RV64-NEXT: bltz a1, .LBB61_92618351; CHECK-RV64-NEXT: j .LBB61_42418352; CHECK-RV64-NEXT: .LBB61_926: # %cond.load164118353; CHECK-RV64-NEXT: lbu a1, 0(a0)18354; CHECK-RV64-NEXT: li a3, 51218355; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18356; CHECK-RV64-NEXT: vmv.s.x v16, a118357; CHECK-RV64-NEXT: li a1, 41218358; CHECK-RV64-NEXT: li a3, 41118359; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18360; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318361; CHECK-RV64-NEXT: addi a0, a0, 118362; CHECK-RV64-NEXT: slli a1, a2, 3518363; CHECK-RV64-NEXT: bltz a1, .LBB61_92718364; CHECK-RV64-NEXT: j .LBB61_42518365; CHECK-RV64-NEXT: .LBB61_927: # %cond.load164518366; CHECK-RV64-NEXT: lbu a1, 0(a0)18367; CHECK-RV64-NEXT: li a3, 51218368; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18369; CHECK-RV64-NEXT: vmv.s.x v16, a118370; CHECK-RV64-NEXT: li a1, 41318371; CHECK-RV64-NEXT: li a3, 41218372; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18373; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318374; CHECK-RV64-NEXT: addi a0, a0, 118375; CHECK-RV64-NEXT: slli a1, a2, 3418376; CHECK-RV64-NEXT: bltz a1, .LBB61_92818377; CHECK-RV64-NEXT: j .LBB61_42618378; CHECK-RV64-NEXT: .LBB61_928: # %cond.load164918379; CHECK-RV64-NEXT: lbu a1, 0(a0)18380; CHECK-RV64-NEXT: li a3, 51218381; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18382; CHECK-RV64-NEXT: vmv.s.x v16, a118383; CHECK-RV64-NEXT: li a1, 41418384; CHECK-RV64-NEXT: li a3, 41318385; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18386; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318387; CHECK-RV64-NEXT: addi a0, a0, 118388; CHECK-RV64-NEXT: slli a1, a2, 3318389; CHECK-RV64-NEXT: bltz a1, .LBB61_92918390; CHECK-RV64-NEXT: j .LBB61_42718391; CHECK-RV64-NEXT: .LBB61_929: # %cond.load165318392; CHECK-RV64-NEXT: lbu a1, 0(a0)18393; CHECK-RV64-NEXT: li a3, 51218394; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18395; CHECK-RV64-NEXT: vmv.s.x v16, a118396; CHECK-RV64-NEXT: li a1, 41518397; CHECK-RV64-NEXT: li a3, 41418398; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18399; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318400; CHECK-RV64-NEXT: addi a0, a0, 118401; CHECK-RV64-NEXT: slli a1, a2, 3218402; CHECK-RV64-NEXT: bltz a1, .LBB61_93018403; CHECK-RV64-NEXT: j .LBB61_42818404; CHECK-RV64-NEXT: .LBB61_930: # %cond.load165718405; CHECK-RV64-NEXT: lbu a1, 0(a0)18406; CHECK-RV64-NEXT: li a3, 51218407; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18408; CHECK-RV64-NEXT: vmv.s.x v16, a118409; CHECK-RV64-NEXT: li a1, 41618410; CHECK-RV64-NEXT: li a3, 41518411; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18412; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318413; CHECK-RV64-NEXT: addi a0, a0, 118414; CHECK-RV64-NEXT: slli a1, a2, 3118415; CHECK-RV64-NEXT: bltz a1, .LBB61_93118416; CHECK-RV64-NEXT: j .LBB61_42918417; CHECK-RV64-NEXT: .LBB61_931: # %cond.load166118418; CHECK-RV64-NEXT: lbu a1, 0(a0)18419; CHECK-RV64-NEXT: li a3, 51218420; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18421; CHECK-RV64-NEXT: vmv.s.x v16, a118422; CHECK-RV64-NEXT: li a1, 41718423; CHECK-RV64-NEXT: li a3, 41618424; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18425; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318426; CHECK-RV64-NEXT: addi a0, a0, 118427; CHECK-RV64-NEXT: slli a1, a2, 3018428; CHECK-RV64-NEXT: bltz a1, .LBB61_93218429; CHECK-RV64-NEXT: j .LBB61_43018430; CHECK-RV64-NEXT: .LBB61_932: # %cond.load166518431; CHECK-RV64-NEXT: lbu a1, 0(a0)18432; CHECK-RV64-NEXT: li a3, 51218433; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18434; CHECK-RV64-NEXT: vmv.s.x v16, a118435; CHECK-RV64-NEXT: li a1, 41818436; CHECK-RV64-NEXT: li a3, 41718437; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18438; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318439; CHECK-RV64-NEXT: addi a0, a0, 118440; CHECK-RV64-NEXT: slli a1, a2, 2918441; CHECK-RV64-NEXT: bltz a1, .LBB61_93318442; CHECK-RV64-NEXT: j .LBB61_43118443; CHECK-RV64-NEXT: .LBB61_933: # %cond.load166918444; CHECK-RV64-NEXT: lbu a1, 0(a0)18445; CHECK-RV64-NEXT: li a3, 51218446; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18447; CHECK-RV64-NEXT: vmv.s.x v16, a118448; CHECK-RV64-NEXT: li a1, 41918449; CHECK-RV64-NEXT: li a3, 41818450; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18451; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318452; CHECK-RV64-NEXT: addi a0, a0, 118453; CHECK-RV64-NEXT: slli a1, a2, 2818454; CHECK-RV64-NEXT: bltz a1, .LBB61_93418455; CHECK-RV64-NEXT: j .LBB61_43218456; CHECK-RV64-NEXT: .LBB61_934: # %cond.load167318457; CHECK-RV64-NEXT: lbu a1, 0(a0)18458; CHECK-RV64-NEXT: li a3, 51218459; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18460; CHECK-RV64-NEXT: vmv.s.x v16, a118461; CHECK-RV64-NEXT: li a1, 42018462; CHECK-RV64-NEXT: li a3, 41918463; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18464; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318465; CHECK-RV64-NEXT: addi a0, a0, 118466; CHECK-RV64-NEXT: slli a1, a2, 2718467; CHECK-RV64-NEXT: bltz a1, .LBB61_93518468; CHECK-RV64-NEXT: j .LBB61_43318469; CHECK-RV64-NEXT: .LBB61_935: # %cond.load167718470; CHECK-RV64-NEXT: lbu a1, 0(a0)18471; CHECK-RV64-NEXT: li a3, 51218472; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18473; CHECK-RV64-NEXT: vmv.s.x v16, a118474; CHECK-RV64-NEXT: li a1, 42118475; CHECK-RV64-NEXT: li a3, 42018476; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18477; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318478; CHECK-RV64-NEXT: addi a0, a0, 118479; CHECK-RV64-NEXT: slli a1, a2, 2618480; CHECK-RV64-NEXT: bltz a1, .LBB61_93618481; CHECK-RV64-NEXT: j .LBB61_43418482; CHECK-RV64-NEXT: .LBB61_936: # %cond.load168118483; CHECK-RV64-NEXT: lbu a1, 0(a0)18484; CHECK-RV64-NEXT: li a3, 51218485; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18486; CHECK-RV64-NEXT: vmv.s.x v16, a118487; CHECK-RV64-NEXT: li a1, 42218488; CHECK-RV64-NEXT: li a3, 42118489; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18490; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318491; CHECK-RV64-NEXT: addi a0, a0, 118492; CHECK-RV64-NEXT: slli a1, a2, 2518493; CHECK-RV64-NEXT: bltz a1, .LBB61_93718494; CHECK-RV64-NEXT: j .LBB61_43518495; CHECK-RV64-NEXT: .LBB61_937: # %cond.load168518496; CHECK-RV64-NEXT: lbu a1, 0(a0)18497; CHECK-RV64-NEXT: li a3, 51218498; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18499; CHECK-RV64-NEXT: vmv.s.x v16, a118500; CHECK-RV64-NEXT: li a1, 42318501; CHECK-RV64-NEXT: li a3, 42218502; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18503; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318504; CHECK-RV64-NEXT: addi a0, a0, 118505; CHECK-RV64-NEXT: slli a1, a2, 2418506; CHECK-RV64-NEXT: bltz a1, .LBB61_93818507; CHECK-RV64-NEXT: j .LBB61_43618508; CHECK-RV64-NEXT: .LBB61_938: # %cond.load168918509; CHECK-RV64-NEXT: lbu a1, 0(a0)18510; CHECK-RV64-NEXT: li a3, 51218511; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18512; CHECK-RV64-NEXT: vmv.s.x v16, a118513; CHECK-RV64-NEXT: li a1, 42418514; CHECK-RV64-NEXT: li a3, 42318515; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18516; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318517; CHECK-RV64-NEXT: addi a0, a0, 118518; CHECK-RV64-NEXT: slli a1, a2, 2318519; CHECK-RV64-NEXT: bltz a1, .LBB61_93918520; CHECK-RV64-NEXT: j .LBB61_43718521; CHECK-RV64-NEXT: .LBB61_939: # %cond.load169318522; CHECK-RV64-NEXT: lbu a1, 0(a0)18523; CHECK-RV64-NEXT: li a3, 51218524; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18525; CHECK-RV64-NEXT: vmv.s.x v16, a118526; CHECK-RV64-NEXT: li a1, 42518527; CHECK-RV64-NEXT: li a3, 42418528; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18529; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318530; CHECK-RV64-NEXT: addi a0, a0, 118531; CHECK-RV64-NEXT: slli a1, a2, 2218532; CHECK-RV64-NEXT: bltz a1, .LBB61_94018533; CHECK-RV64-NEXT: j .LBB61_43818534; CHECK-RV64-NEXT: .LBB61_940: # %cond.load169718535; CHECK-RV64-NEXT: lbu a1, 0(a0)18536; CHECK-RV64-NEXT: li a3, 51218537; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18538; CHECK-RV64-NEXT: vmv.s.x v16, a118539; CHECK-RV64-NEXT: li a1, 42618540; CHECK-RV64-NEXT: li a3, 42518541; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18542; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318543; CHECK-RV64-NEXT: addi a0, a0, 118544; CHECK-RV64-NEXT: slli a1, a2, 2118545; CHECK-RV64-NEXT: bltz a1, .LBB61_94118546; CHECK-RV64-NEXT: j .LBB61_43918547; CHECK-RV64-NEXT: .LBB61_941: # %cond.load170118548; CHECK-RV64-NEXT: lbu a1, 0(a0)18549; CHECK-RV64-NEXT: li a3, 51218550; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18551; CHECK-RV64-NEXT: vmv.s.x v16, a118552; CHECK-RV64-NEXT: li a1, 42718553; CHECK-RV64-NEXT: li a3, 42618554; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18555; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318556; CHECK-RV64-NEXT: addi a0, a0, 118557; CHECK-RV64-NEXT: slli a1, a2, 2018558; CHECK-RV64-NEXT: bltz a1, .LBB61_94218559; CHECK-RV64-NEXT: j .LBB61_44018560; CHECK-RV64-NEXT: .LBB61_942: # %cond.load170518561; CHECK-RV64-NEXT: lbu a1, 0(a0)18562; CHECK-RV64-NEXT: li a3, 51218563; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18564; CHECK-RV64-NEXT: vmv.s.x v16, a118565; CHECK-RV64-NEXT: li a1, 42818566; CHECK-RV64-NEXT: li a3, 42718567; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18568; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318569; CHECK-RV64-NEXT: addi a0, a0, 118570; CHECK-RV64-NEXT: slli a1, a2, 1918571; CHECK-RV64-NEXT: bltz a1, .LBB61_94318572; CHECK-RV64-NEXT: j .LBB61_44118573; CHECK-RV64-NEXT: .LBB61_943: # %cond.load170918574; CHECK-RV64-NEXT: lbu a1, 0(a0)18575; CHECK-RV64-NEXT: li a3, 51218576; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18577; CHECK-RV64-NEXT: vmv.s.x v16, a118578; CHECK-RV64-NEXT: li a1, 42918579; CHECK-RV64-NEXT: li a3, 42818580; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18581; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318582; CHECK-RV64-NEXT: addi a0, a0, 118583; CHECK-RV64-NEXT: slli a1, a2, 1818584; CHECK-RV64-NEXT: bltz a1, .LBB61_94418585; CHECK-RV64-NEXT: j .LBB61_44218586; CHECK-RV64-NEXT: .LBB61_944: # %cond.load171318587; CHECK-RV64-NEXT: lbu a1, 0(a0)18588; CHECK-RV64-NEXT: li a3, 51218589; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18590; CHECK-RV64-NEXT: vmv.s.x v16, a118591; CHECK-RV64-NEXT: li a1, 43018592; CHECK-RV64-NEXT: li a3, 42918593; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18594; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318595; CHECK-RV64-NEXT: addi a0, a0, 118596; CHECK-RV64-NEXT: slli a1, a2, 1718597; CHECK-RV64-NEXT: bltz a1, .LBB61_94518598; CHECK-RV64-NEXT: j .LBB61_44318599; CHECK-RV64-NEXT: .LBB61_945: # %cond.load171718600; CHECK-RV64-NEXT: lbu a1, 0(a0)18601; CHECK-RV64-NEXT: li a3, 51218602; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18603; CHECK-RV64-NEXT: vmv.s.x v16, a118604; CHECK-RV64-NEXT: li a1, 43118605; CHECK-RV64-NEXT: li a3, 43018606; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18607; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318608; CHECK-RV64-NEXT: addi a0, a0, 118609; CHECK-RV64-NEXT: slli a1, a2, 1618610; CHECK-RV64-NEXT: bltz a1, .LBB61_94618611; CHECK-RV64-NEXT: j .LBB61_44418612; CHECK-RV64-NEXT: .LBB61_946: # %cond.load172118613; CHECK-RV64-NEXT: lbu a1, 0(a0)18614; CHECK-RV64-NEXT: li a3, 51218615; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18616; CHECK-RV64-NEXT: vmv.s.x v16, a118617; CHECK-RV64-NEXT: li a1, 43218618; CHECK-RV64-NEXT: li a3, 43118619; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18620; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318621; CHECK-RV64-NEXT: addi a0, a0, 118622; CHECK-RV64-NEXT: slli a1, a2, 1518623; CHECK-RV64-NEXT: bltz a1, .LBB61_94718624; CHECK-RV64-NEXT: j .LBB61_44518625; CHECK-RV64-NEXT: .LBB61_947: # %cond.load172518626; CHECK-RV64-NEXT: lbu a1, 0(a0)18627; CHECK-RV64-NEXT: li a3, 51218628; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18629; CHECK-RV64-NEXT: vmv.s.x v16, a118630; CHECK-RV64-NEXT: li a1, 43318631; CHECK-RV64-NEXT: li a3, 43218632; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18633; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318634; CHECK-RV64-NEXT: addi a0, a0, 118635; CHECK-RV64-NEXT: slli a1, a2, 1418636; CHECK-RV64-NEXT: bltz a1, .LBB61_94818637; CHECK-RV64-NEXT: j .LBB61_44618638; CHECK-RV64-NEXT: .LBB61_948: # %cond.load172918639; CHECK-RV64-NEXT: lbu a1, 0(a0)18640; CHECK-RV64-NEXT: li a3, 51218641; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18642; CHECK-RV64-NEXT: vmv.s.x v16, a118643; CHECK-RV64-NEXT: li a1, 43418644; CHECK-RV64-NEXT: li a3, 43318645; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18646; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318647; CHECK-RV64-NEXT: addi a0, a0, 118648; CHECK-RV64-NEXT: slli a1, a2, 1318649; CHECK-RV64-NEXT: bltz a1, .LBB61_94918650; CHECK-RV64-NEXT: j .LBB61_44718651; CHECK-RV64-NEXT: .LBB61_949: # %cond.load173318652; CHECK-RV64-NEXT: lbu a1, 0(a0)18653; CHECK-RV64-NEXT: li a3, 51218654; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18655; CHECK-RV64-NEXT: vmv.s.x v16, a118656; CHECK-RV64-NEXT: li a1, 43518657; CHECK-RV64-NEXT: li a3, 43418658; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18659; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318660; CHECK-RV64-NEXT: addi a0, a0, 118661; CHECK-RV64-NEXT: slli a1, a2, 1218662; CHECK-RV64-NEXT: bltz a1, .LBB61_95018663; CHECK-RV64-NEXT: j .LBB61_44818664; CHECK-RV64-NEXT: .LBB61_950: # %cond.load173718665; CHECK-RV64-NEXT: lbu a1, 0(a0)18666; CHECK-RV64-NEXT: li a3, 51218667; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18668; CHECK-RV64-NEXT: vmv.s.x v16, a118669; CHECK-RV64-NEXT: li a1, 43618670; CHECK-RV64-NEXT: li a3, 43518671; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18672; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318673; CHECK-RV64-NEXT: addi a0, a0, 118674; CHECK-RV64-NEXT: slli a1, a2, 1118675; CHECK-RV64-NEXT: bltz a1, .LBB61_95118676; CHECK-RV64-NEXT: j .LBB61_44918677; CHECK-RV64-NEXT: .LBB61_951: # %cond.load174118678; CHECK-RV64-NEXT: lbu a1, 0(a0)18679; CHECK-RV64-NEXT: li a3, 51218680; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18681; CHECK-RV64-NEXT: vmv.s.x v16, a118682; CHECK-RV64-NEXT: li a1, 43718683; CHECK-RV64-NEXT: li a3, 43618684; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18685; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318686; CHECK-RV64-NEXT: addi a0, a0, 118687; CHECK-RV64-NEXT: slli a1, a2, 1018688; CHECK-RV64-NEXT: bltz a1, .LBB61_95218689; CHECK-RV64-NEXT: j .LBB61_45018690; CHECK-RV64-NEXT: .LBB61_952: # %cond.load174518691; CHECK-RV64-NEXT: lbu a1, 0(a0)18692; CHECK-RV64-NEXT: li a3, 51218693; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18694; CHECK-RV64-NEXT: vmv.s.x v16, a118695; CHECK-RV64-NEXT: li a1, 43818696; CHECK-RV64-NEXT: li a3, 43718697; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18698; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318699; CHECK-RV64-NEXT: addi a0, a0, 118700; CHECK-RV64-NEXT: slli a1, a2, 918701; CHECK-RV64-NEXT: bltz a1, .LBB61_95318702; CHECK-RV64-NEXT: j .LBB61_45118703; CHECK-RV64-NEXT: .LBB61_953: # %cond.load174918704; CHECK-RV64-NEXT: lbu a1, 0(a0)18705; CHECK-RV64-NEXT: li a3, 51218706; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18707; CHECK-RV64-NEXT: vmv.s.x v16, a118708; CHECK-RV64-NEXT: li a1, 43918709; CHECK-RV64-NEXT: li a3, 43818710; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18711; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318712; CHECK-RV64-NEXT: addi a0, a0, 118713; CHECK-RV64-NEXT: slli a1, a2, 818714; CHECK-RV64-NEXT: bltz a1, .LBB61_95418715; CHECK-RV64-NEXT: j .LBB61_45218716; CHECK-RV64-NEXT: .LBB61_954: # %cond.load175318717; CHECK-RV64-NEXT: lbu a1, 0(a0)18718; CHECK-RV64-NEXT: li a3, 51218719; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18720; CHECK-RV64-NEXT: vmv.s.x v16, a118721; CHECK-RV64-NEXT: li a1, 44018722; CHECK-RV64-NEXT: li a3, 43918723; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18724; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318725; CHECK-RV64-NEXT: addi a0, a0, 118726; CHECK-RV64-NEXT: slli a1, a2, 718727; CHECK-RV64-NEXT: bltz a1, .LBB61_95518728; CHECK-RV64-NEXT: j .LBB61_45318729; CHECK-RV64-NEXT: .LBB61_955: # %cond.load175718730; CHECK-RV64-NEXT: lbu a1, 0(a0)18731; CHECK-RV64-NEXT: li a3, 51218732; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18733; CHECK-RV64-NEXT: vmv.s.x v16, a118734; CHECK-RV64-NEXT: li a1, 44118735; CHECK-RV64-NEXT: li a3, 44018736; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18737; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318738; CHECK-RV64-NEXT: addi a0, a0, 118739; CHECK-RV64-NEXT: slli a1, a2, 618740; CHECK-RV64-NEXT: bltz a1, .LBB61_95618741; CHECK-RV64-NEXT: j .LBB61_45418742; CHECK-RV64-NEXT: .LBB61_956: # %cond.load176118743; CHECK-RV64-NEXT: lbu a1, 0(a0)18744; CHECK-RV64-NEXT: li a3, 51218745; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18746; CHECK-RV64-NEXT: vmv.s.x v16, a118747; CHECK-RV64-NEXT: li a1, 44218748; CHECK-RV64-NEXT: li a3, 44118749; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18750; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318751; CHECK-RV64-NEXT: addi a0, a0, 118752; CHECK-RV64-NEXT: slli a1, a2, 518753; CHECK-RV64-NEXT: bltz a1, .LBB61_95718754; CHECK-RV64-NEXT: j .LBB61_45518755; CHECK-RV64-NEXT: .LBB61_957: # %cond.load176518756; CHECK-RV64-NEXT: lbu a1, 0(a0)18757; CHECK-RV64-NEXT: li a3, 51218758; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18759; CHECK-RV64-NEXT: vmv.s.x v16, a118760; CHECK-RV64-NEXT: li a1, 44318761; CHECK-RV64-NEXT: li a3, 44218762; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18763; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318764; CHECK-RV64-NEXT: addi a0, a0, 118765; CHECK-RV64-NEXT: slli a1, a2, 418766; CHECK-RV64-NEXT: bltz a1, .LBB61_95818767; CHECK-RV64-NEXT: j .LBB61_45618768; CHECK-RV64-NEXT: .LBB61_958: # %cond.load176918769; CHECK-RV64-NEXT: lbu a1, 0(a0)18770; CHECK-RV64-NEXT: li a3, 51218771; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18772; CHECK-RV64-NEXT: vmv.s.x v16, a118773; CHECK-RV64-NEXT: li a1, 44418774; CHECK-RV64-NEXT: li a3, 44318775; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18776; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318777; CHECK-RV64-NEXT: addi a0, a0, 118778; CHECK-RV64-NEXT: slli a1, a2, 318779; CHECK-RV64-NEXT: bltz a1, .LBB61_95918780; CHECK-RV64-NEXT: j .LBB61_45718781; CHECK-RV64-NEXT: .LBB61_959: # %cond.load177318782; CHECK-RV64-NEXT: lbu a1, 0(a0)18783; CHECK-RV64-NEXT: li a3, 51218784; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18785; CHECK-RV64-NEXT: vmv.s.x v16, a118786; CHECK-RV64-NEXT: li a1, 44518787; CHECK-RV64-NEXT: li a3, 44418788; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, tu, ma18789; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318790; CHECK-RV64-NEXT: addi a0, a0, 118791; CHECK-RV64-NEXT: slli a1, a2, 218792; CHECK-RV64-NEXT: bgez a1, .LBB61_103118793; CHECK-RV64-NEXT: j .LBB61_45818794; CHECK-RV64-NEXT: .LBB61_1031: # %cond.load177318795; CHECK-RV64-NEXT: j .LBB61_45918796; CHECK-RV64-NEXT: .LBB61_960: # %cond.load178518797; CHECK-RV64-NEXT: lbu a2, 0(a0)18798; CHECK-RV64-NEXT: vmv.s.x v16, a218799; CHECK-RV64-NEXT: li a2, 44818800; CHECK-RV64-NEXT: li a3, 44718801; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18802; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318803; CHECK-RV64-NEXT: addi a0, a0, 118804; CHECK-RV64-NEXT: andi a2, a1, 118805; CHECK-RV64-NEXT: bnez a2, .LBB61_96118806; CHECK-RV64-NEXT: j .LBB61_46318807; CHECK-RV64-NEXT: .LBB61_961: # %cond.load178918808; CHECK-RV64-NEXT: lbu a2, 0(a0)18809; CHECK-RV64-NEXT: li a3, 51218810; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18811; CHECK-RV64-NEXT: vmv.s.x v16, a218812; CHECK-RV64-NEXT: li a2, 44918813; CHECK-RV64-NEXT: li a3, 44818814; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18815; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318816; CHECK-RV64-NEXT: addi a0, a0, 118817; CHECK-RV64-NEXT: andi a2, a1, 218818; CHECK-RV64-NEXT: bnez a2, .LBB61_96218819; CHECK-RV64-NEXT: j .LBB61_46418820; CHECK-RV64-NEXT: .LBB61_962: # %cond.load179318821; CHECK-RV64-NEXT: lbu a2, 0(a0)18822; CHECK-RV64-NEXT: li a3, 51218823; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18824; CHECK-RV64-NEXT: vmv.s.x v16, a218825; CHECK-RV64-NEXT: li a2, 45018826; CHECK-RV64-NEXT: li a3, 44918827; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18828; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318829; CHECK-RV64-NEXT: addi a0, a0, 118830; CHECK-RV64-NEXT: andi a2, a1, 418831; CHECK-RV64-NEXT: bnez a2, .LBB61_96318832; CHECK-RV64-NEXT: j .LBB61_46518833; CHECK-RV64-NEXT: .LBB61_963: # %cond.load179718834; CHECK-RV64-NEXT: lbu a2, 0(a0)18835; CHECK-RV64-NEXT: li a3, 51218836; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18837; CHECK-RV64-NEXT: vmv.s.x v16, a218838; CHECK-RV64-NEXT: li a2, 45118839; CHECK-RV64-NEXT: li a3, 45018840; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18841; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318842; CHECK-RV64-NEXT: addi a0, a0, 118843; CHECK-RV64-NEXT: andi a2, a1, 818844; CHECK-RV64-NEXT: bnez a2, .LBB61_96418845; CHECK-RV64-NEXT: j .LBB61_46618846; CHECK-RV64-NEXT: .LBB61_964: # %cond.load180118847; CHECK-RV64-NEXT: lbu a2, 0(a0)18848; CHECK-RV64-NEXT: li a3, 51218849; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18850; CHECK-RV64-NEXT: vmv.s.x v16, a218851; CHECK-RV64-NEXT: li a2, 45218852; CHECK-RV64-NEXT: li a3, 45118853; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18854; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318855; CHECK-RV64-NEXT: addi a0, a0, 118856; CHECK-RV64-NEXT: andi a2, a1, 1618857; CHECK-RV64-NEXT: bnez a2, .LBB61_96518858; CHECK-RV64-NEXT: j .LBB61_46718859; CHECK-RV64-NEXT: .LBB61_965: # %cond.load180518860; CHECK-RV64-NEXT: lbu a2, 0(a0)18861; CHECK-RV64-NEXT: li a3, 51218862; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18863; CHECK-RV64-NEXT: vmv.s.x v16, a218864; CHECK-RV64-NEXT: li a2, 45318865; CHECK-RV64-NEXT: li a3, 45218866; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18867; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318868; CHECK-RV64-NEXT: addi a0, a0, 118869; CHECK-RV64-NEXT: andi a2, a1, 3218870; CHECK-RV64-NEXT: bnez a2, .LBB61_96618871; CHECK-RV64-NEXT: j .LBB61_46818872; CHECK-RV64-NEXT: .LBB61_966: # %cond.load180918873; CHECK-RV64-NEXT: lbu a2, 0(a0)18874; CHECK-RV64-NEXT: li a3, 51218875; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18876; CHECK-RV64-NEXT: vmv.s.x v16, a218877; CHECK-RV64-NEXT: li a2, 45418878; CHECK-RV64-NEXT: li a3, 45318879; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18880; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318881; CHECK-RV64-NEXT: addi a0, a0, 118882; CHECK-RV64-NEXT: andi a2, a1, 6418883; CHECK-RV64-NEXT: bnez a2, .LBB61_96718884; CHECK-RV64-NEXT: j .LBB61_46918885; CHECK-RV64-NEXT: .LBB61_967: # %cond.load181318886; CHECK-RV64-NEXT: lbu a2, 0(a0)18887; CHECK-RV64-NEXT: li a3, 51218888; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18889; CHECK-RV64-NEXT: vmv.s.x v16, a218890; CHECK-RV64-NEXT: li a2, 45518891; CHECK-RV64-NEXT: li a3, 45418892; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18893; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318894; CHECK-RV64-NEXT: addi a0, a0, 118895; CHECK-RV64-NEXT: andi a2, a1, 12818896; CHECK-RV64-NEXT: bnez a2, .LBB61_96818897; CHECK-RV64-NEXT: j .LBB61_47018898; CHECK-RV64-NEXT: .LBB61_968: # %cond.load181718899; CHECK-RV64-NEXT: lbu a2, 0(a0)18900; CHECK-RV64-NEXT: li a3, 51218901; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18902; CHECK-RV64-NEXT: vmv.s.x v16, a218903; CHECK-RV64-NEXT: li a2, 45618904; CHECK-RV64-NEXT: li a3, 45518905; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18906; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318907; CHECK-RV64-NEXT: addi a0, a0, 118908; CHECK-RV64-NEXT: andi a2, a1, 25618909; CHECK-RV64-NEXT: bnez a2, .LBB61_96918910; CHECK-RV64-NEXT: j .LBB61_47118911; CHECK-RV64-NEXT: .LBB61_969: # %cond.load182118912; CHECK-RV64-NEXT: lbu a2, 0(a0)18913; CHECK-RV64-NEXT: li a3, 51218914; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18915; CHECK-RV64-NEXT: vmv.s.x v16, a218916; CHECK-RV64-NEXT: li a2, 45718917; CHECK-RV64-NEXT: li a3, 45618918; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18919; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318920; CHECK-RV64-NEXT: addi a0, a0, 118921; CHECK-RV64-NEXT: andi a2, a1, 51218922; CHECK-RV64-NEXT: bnez a2, .LBB61_97018923; CHECK-RV64-NEXT: j .LBB61_47218924; CHECK-RV64-NEXT: .LBB61_970: # %cond.load182518925; CHECK-RV64-NEXT: lbu a2, 0(a0)18926; CHECK-RV64-NEXT: li a3, 51218927; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18928; CHECK-RV64-NEXT: vmv.s.x v16, a218929; CHECK-RV64-NEXT: li a2, 45818930; CHECK-RV64-NEXT: li a3, 45718931; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18932; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318933; CHECK-RV64-NEXT: addi a0, a0, 118934; CHECK-RV64-NEXT: andi a2, a1, 102418935; CHECK-RV64-NEXT: bnez a2, .LBB61_97118936; CHECK-RV64-NEXT: j .LBB61_47318937; CHECK-RV64-NEXT: .LBB61_971: # %cond.load182918938; CHECK-RV64-NEXT: lbu a2, 0(a0)18939; CHECK-RV64-NEXT: li a3, 51218940; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18941; CHECK-RV64-NEXT: vmv.s.x v16, a218942; CHECK-RV64-NEXT: li a2, 45918943; CHECK-RV64-NEXT: li a3, 45818944; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18945; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318946; CHECK-RV64-NEXT: addi a0, a0, 118947; CHECK-RV64-NEXT: slli a2, a1, 5218948; CHECK-RV64-NEXT: bltz a2, .LBB61_97218949; CHECK-RV64-NEXT: j .LBB61_47418950; CHECK-RV64-NEXT: .LBB61_972: # %cond.load183318951; CHECK-RV64-NEXT: lbu a2, 0(a0)18952; CHECK-RV64-NEXT: li a3, 51218953; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18954; CHECK-RV64-NEXT: vmv.s.x v16, a218955; CHECK-RV64-NEXT: li a2, 46018956; CHECK-RV64-NEXT: li a3, 45918957; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18958; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318959; CHECK-RV64-NEXT: addi a0, a0, 118960; CHECK-RV64-NEXT: slli a2, a1, 5118961; CHECK-RV64-NEXT: bltz a2, .LBB61_97318962; CHECK-RV64-NEXT: j .LBB61_47518963; CHECK-RV64-NEXT: .LBB61_973: # %cond.load183718964; CHECK-RV64-NEXT: lbu a2, 0(a0)18965; CHECK-RV64-NEXT: li a3, 51218966; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18967; CHECK-RV64-NEXT: vmv.s.x v16, a218968; CHECK-RV64-NEXT: li a2, 46118969; CHECK-RV64-NEXT: li a3, 46018970; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18971; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318972; CHECK-RV64-NEXT: addi a0, a0, 118973; CHECK-RV64-NEXT: slli a2, a1, 5018974; CHECK-RV64-NEXT: bltz a2, .LBB61_97418975; CHECK-RV64-NEXT: j .LBB61_47618976; CHECK-RV64-NEXT: .LBB61_974: # %cond.load184118977; CHECK-RV64-NEXT: lbu a2, 0(a0)18978; CHECK-RV64-NEXT: li a3, 51218979; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18980; CHECK-RV64-NEXT: vmv.s.x v16, a218981; CHECK-RV64-NEXT: li a2, 46218982; CHECK-RV64-NEXT: li a3, 46118983; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18984; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318985; CHECK-RV64-NEXT: addi a0, a0, 118986; CHECK-RV64-NEXT: slli a2, a1, 4918987; CHECK-RV64-NEXT: bltz a2, .LBB61_97518988; CHECK-RV64-NEXT: j .LBB61_47718989; CHECK-RV64-NEXT: .LBB61_975: # %cond.load184518990; CHECK-RV64-NEXT: lbu a2, 0(a0)18991; CHECK-RV64-NEXT: li a3, 51218992; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma18993; CHECK-RV64-NEXT: vmv.s.x v16, a218994; CHECK-RV64-NEXT: li a2, 46318995; CHECK-RV64-NEXT: li a3, 46218996; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma18997; CHECK-RV64-NEXT: vslideup.vx v8, v16, a318998; CHECK-RV64-NEXT: addi a0, a0, 118999; CHECK-RV64-NEXT: slli a2, a1, 4819000; CHECK-RV64-NEXT: bltz a2, .LBB61_97619001; CHECK-RV64-NEXT: j .LBB61_47819002; CHECK-RV64-NEXT: .LBB61_976: # %cond.load184919003; CHECK-RV64-NEXT: lbu a2, 0(a0)19004; CHECK-RV64-NEXT: li a3, 51219005; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19006; CHECK-RV64-NEXT: vmv.s.x v16, a219007; CHECK-RV64-NEXT: li a2, 46419008; CHECK-RV64-NEXT: li a3, 46319009; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19010; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319011; CHECK-RV64-NEXT: addi a0, a0, 119012; CHECK-RV64-NEXT: slli a2, a1, 4719013; CHECK-RV64-NEXT: bltz a2, .LBB61_97719014; CHECK-RV64-NEXT: j .LBB61_47919015; CHECK-RV64-NEXT: .LBB61_977: # %cond.load185319016; CHECK-RV64-NEXT: lbu a2, 0(a0)19017; CHECK-RV64-NEXT: li a3, 51219018; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19019; CHECK-RV64-NEXT: vmv.s.x v16, a219020; CHECK-RV64-NEXT: li a2, 46519021; CHECK-RV64-NEXT: li a3, 46419022; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19023; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319024; CHECK-RV64-NEXT: addi a0, a0, 119025; CHECK-RV64-NEXT: slli a2, a1, 4619026; CHECK-RV64-NEXT: bltz a2, .LBB61_97819027; CHECK-RV64-NEXT: j .LBB61_48019028; CHECK-RV64-NEXT: .LBB61_978: # %cond.load185719029; CHECK-RV64-NEXT: lbu a2, 0(a0)19030; CHECK-RV64-NEXT: li a3, 51219031; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19032; CHECK-RV64-NEXT: vmv.s.x v16, a219033; CHECK-RV64-NEXT: li a2, 46619034; CHECK-RV64-NEXT: li a3, 46519035; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19036; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319037; CHECK-RV64-NEXT: addi a0, a0, 119038; CHECK-RV64-NEXT: slli a2, a1, 4519039; CHECK-RV64-NEXT: bltz a2, .LBB61_97919040; CHECK-RV64-NEXT: j .LBB61_48119041; CHECK-RV64-NEXT: .LBB61_979: # %cond.load186119042; CHECK-RV64-NEXT: lbu a2, 0(a0)19043; CHECK-RV64-NEXT: li a3, 51219044; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19045; CHECK-RV64-NEXT: vmv.s.x v16, a219046; CHECK-RV64-NEXT: li a2, 46719047; CHECK-RV64-NEXT: li a3, 46619048; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19049; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319050; CHECK-RV64-NEXT: addi a0, a0, 119051; CHECK-RV64-NEXT: slli a2, a1, 4419052; CHECK-RV64-NEXT: bltz a2, .LBB61_98019053; CHECK-RV64-NEXT: j .LBB61_48219054; CHECK-RV64-NEXT: .LBB61_980: # %cond.load186519055; CHECK-RV64-NEXT: lbu a2, 0(a0)19056; CHECK-RV64-NEXT: li a3, 51219057; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19058; CHECK-RV64-NEXT: vmv.s.x v16, a219059; CHECK-RV64-NEXT: li a2, 46819060; CHECK-RV64-NEXT: li a3, 46719061; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19062; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319063; CHECK-RV64-NEXT: addi a0, a0, 119064; CHECK-RV64-NEXT: slli a2, a1, 4319065; CHECK-RV64-NEXT: bltz a2, .LBB61_98119066; CHECK-RV64-NEXT: j .LBB61_48319067; CHECK-RV64-NEXT: .LBB61_981: # %cond.load186919068; CHECK-RV64-NEXT: lbu a2, 0(a0)19069; CHECK-RV64-NEXT: li a3, 51219070; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19071; CHECK-RV64-NEXT: vmv.s.x v16, a219072; CHECK-RV64-NEXT: li a2, 46919073; CHECK-RV64-NEXT: li a3, 46819074; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19075; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319076; CHECK-RV64-NEXT: addi a0, a0, 119077; CHECK-RV64-NEXT: slli a2, a1, 4219078; CHECK-RV64-NEXT: bltz a2, .LBB61_98219079; CHECK-RV64-NEXT: j .LBB61_48419080; CHECK-RV64-NEXT: .LBB61_982: # %cond.load187319081; CHECK-RV64-NEXT: lbu a2, 0(a0)19082; CHECK-RV64-NEXT: li a3, 51219083; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19084; CHECK-RV64-NEXT: vmv.s.x v16, a219085; CHECK-RV64-NEXT: li a2, 47019086; CHECK-RV64-NEXT: li a3, 46919087; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19088; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319089; CHECK-RV64-NEXT: addi a0, a0, 119090; CHECK-RV64-NEXT: slli a2, a1, 4119091; CHECK-RV64-NEXT: bltz a2, .LBB61_98319092; CHECK-RV64-NEXT: j .LBB61_48519093; CHECK-RV64-NEXT: .LBB61_983: # %cond.load187719094; CHECK-RV64-NEXT: lbu a2, 0(a0)19095; CHECK-RV64-NEXT: li a3, 51219096; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19097; CHECK-RV64-NEXT: vmv.s.x v16, a219098; CHECK-RV64-NEXT: li a2, 47119099; CHECK-RV64-NEXT: li a3, 47019100; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19101; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319102; CHECK-RV64-NEXT: addi a0, a0, 119103; CHECK-RV64-NEXT: slli a2, a1, 4019104; CHECK-RV64-NEXT: bltz a2, .LBB61_98419105; CHECK-RV64-NEXT: j .LBB61_48619106; CHECK-RV64-NEXT: .LBB61_984: # %cond.load188119107; CHECK-RV64-NEXT: lbu a2, 0(a0)19108; CHECK-RV64-NEXT: li a3, 51219109; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19110; CHECK-RV64-NEXT: vmv.s.x v16, a219111; CHECK-RV64-NEXT: li a2, 47219112; CHECK-RV64-NEXT: li a3, 47119113; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19114; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319115; CHECK-RV64-NEXT: addi a0, a0, 119116; CHECK-RV64-NEXT: slli a2, a1, 3919117; CHECK-RV64-NEXT: bltz a2, .LBB61_98519118; CHECK-RV64-NEXT: j .LBB61_48719119; CHECK-RV64-NEXT: .LBB61_985: # %cond.load188519120; CHECK-RV64-NEXT: lbu a2, 0(a0)19121; CHECK-RV64-NEXT: li a3, 51219122; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19123; CHECK-RV64-NEXT: vmv.s.x v16, a219124; CHECK-RV64-NEXT: li a2, 47319125; CHECK-RV64-NEXT: li a3, 47219126; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19127; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319128; CHECK-RV64-NEXT: addi a0, a0, 119129; CHECK-RV64-NEXT: slli a2, a1, 3819130; CHECK-RV64-NEXT: bltz a2, .LBB61_98619131; CHECK-RV64-NEXT: j .LBB61_48819132; CHECK-RV64-NEXT: .LBB61_986: # %cond.load188919133; CHECK-RV64-NEXT: lbu a2, 0(a0)19134; CHECK-RV64-NEXT: li a3, 51219135; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19136; CHECK-RV64-NEXT: vmv.s.x v16, a219137; CHECK-RV64-NEXT: li a2, 47419138; CHECK-RV64-NEXT: li a3, 47319139; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19140; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319141; CHECK-RV64-NEXT: addi a0, a0, 119142; CHECK-RV64-NEXT: slli a2, a1, 3719143; CHECK-RV64-NEXT: bltz a2, .LBB61_98719144; CHECK-RV64-NEXT: j .LBB61_48919145; CHECK-RV64-NEXT: .LBB61_987: # %cond.load189319146; CHECK-RV64-NEXT: lbu a2, 0(a0)19147; CHECK-RV64-NEXT: li a3, 51219148; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19149; CHECK-RV64-NEXT: vmv.s.x v16, a219150; CHECK-RV64-NEXT: li a2, 47519151; CHECK-RV64-NEXT: li a3, 47419152; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19153; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319154; CHECK-RV64-NEXT: addi a0, a0, 119155; CHECK-RV64-NEXT: slli a2, a1, 3619156; CHECK-RV64-NEXT: bltz a2, .LBB61_98819157; CHECK-RV64-NEXT: j .LBB61_49019158; CHECK-RV64-NEXT: .LBB61_988: # %cond.load189719159; CHECK-RV64-NEXT: lbu a2, 0(a0)19160; CHECK-RV64-NEXT: li a3, 51219161; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19162; CHECK-RV64-NEXT: vmv.s.x v16, a219163; CHECK-RV64-NEXT: li a2, 47619164; CHECK-RV64-NEXT: li a3, 47519165; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19166; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319167; CHECK-RV64-NEXT: addi a0, a0, 119168; CHECK-RV64-NEXT: slli a2, a1, 3519169; CHECK-RV64-NEXT: bltz a2, .LBB61_98919170; CHECK-RV64-NEXT: j .LBB61_49119171; CHECK-RV64-NEXT: .LBB61_989: # %cond.load190119172; CHECK-RV64-NEXT: lbu a2, 0(a0)19173; CHECK-RV64-NEXT: li a3, 51219174; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19175; CHECK-RV64-NEXT: vmv.s.x v16, a219176; CHECK-RV64-NEXT: li a2, 47719177; CHECK-RV64-NEXT: li a3, 47619178; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19179; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319180; CHECK-RV64-NEXT: addi a0, a0, 119181; CHECK-RV64-NEXT: slli a2, a1, 3419182; CHECK-RV64-NEXT: bltz a2, .LBB61_99019183; CHECK-RV64-NEXT: j .LBB61_49219184; CHECK-RV64-NEXT: .LBB61_990: # %cond.load190519185; CHECK-RV64-NEXT: lbu a2, 0(a0)19186; CHECK-RV64-NEXT: li a3, 51219187; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19188; CHECK-RV64-NEXT: vmv.s.x v16, a219189; CHECK-RV64-NEXT: li a2, 47819190; CHECK-RV64-NEXT: li a3, 47719191; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19192; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319193; CHECK-RV64-NEXT: addi a0, a0, 119194; CHECK-RV64-NEXT: slli a2, a1, 3319195; CHECK-RV64-NEXT: bltz a2, .LBB61_99119196; CHECK-RV64-NEXT: j .LBB61_49319197; CHECK-RV64-NEXT: .LBB61_991: # %cond.load190919198; CHECK-RV64-NEXT: lbu a2, 0(a0)19199; CHECK-RV64-NEXT: li a3, 51219200; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19201; CHECK-RV64-NEXT: vmv.s.x v16, a219202; CHECK-RV64-NEXT: li a2, 47919203; CHECK-RV64-NEXT: li a3, 47819204; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19205; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319206; CHECK-RV64-NEXT: addi a0, a0, 119207; CHECK-RV64-NEXT: slli a2, a1, 3219208; CHECK-RV64-NEXT: bltz a2, .LBB61_99219209; CHECK-RV64-NEXT: j .LBB61_49419210; CHECK-RV64-NEXT: .LBB61_992: # %cond.load191319211; CHECK-RV64-NEXT: lbu a2, 0(a0)19212; CHECK-RV64-NEXT: li a3, 51219213; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19214; CHECK-RV64-NEXT: vmv.s.x v16, a219215; CHECK-RV64-NEXT: li a2, 48019216; CHECK-RV64-NEXT: li a3, 47919217; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19218; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319219; CHECK-RV64-NEXT: addi a0, a0, 119220; CHECK-RV64-NEXT: slli a2, a1, 3119221; CHECK-RV64-NEXT: bltz a2, .LBB61_99319222; CHECK-RV64-NEXT: j .LBB61_49519223; CHECK-RV64-NEXT: .LBB61_993: # %cond.load191719224; CHECK-RV64-NEXT: lbu a2, 0(a0)19225; CHECK-RV64-NEXT: li a3, 51219226; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19227; CHECK-RV64-NEXT: vmv.s.x v16, a219228; CHECK-RV64-NEXT: li a2, 48119229; CHECK-RV64-NEXT: li a3, 48019230; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19231; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319232; CHECK-RV64-NEXT: addi a0, a0, 119233; CHECK-RV64-NEXT: slli a2, a1, 3019234; CHECK-RV64-NEXT: bltz a2, .LBB61_99419235; CHECK-RV64-NEXT: j .LBB61_49619236; CHECK-RV64-NEXT: .LBB61_994: # %cond.load192119237; CHECK-RV64-NEXT: lbu a2, 0(a0)19238; CHECK-RV64-NEXT: li a3, 51219239; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19240; CHECK-RV64-NEXT: vmv.s.x v16, a219241; CHECK-RV64-NEXT: li a2, 48219242; CHECK-RV64-NEXT: li a3, 48119243; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19244; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319245; CHECK-RV64-NEXT: addi a0, a0, 119246; CHECK-RV64-NEXT: slli a2, a1, 2919247; CHECK-RV64-NEXT: bltz a2, .LBB61_99519248; CHECK-RV64-NEXT: j .LBB61_49719249; CHECK-RV64-NEXT: .LBB61_995: # %cond.load192519250; CHECK-RV64-NEXT: lbu a2, 0(a0)19251; CHECK-RV64-NEXT: li a3, 51219252; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19253; CHECK-RV64-NEXT: vmv.s.x v16, a219254; CHECK-RV64-NEXT: li a2, 48319255; CHECK-RV64-NEXT: li a3, 48219256; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19257; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319258; CHECK-RV64-NEXT: addi a0, a0, 119259; CHECK-RV64-NEXT: slli a2, a1, 2819260; CHECK-RV64-NEXT: bltz a2, .LBB61_99619261; CHECK-RV64-NEXT: j .LBB61_49819262; CHECK-RV64-NEXT: .LBB61_996: # %cond.load192919263; CHECK-RV64-NEXT: lbu a2, 0(a0)19264; CHECK-RV64-NEXT: li a3, 51219265; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19266; CHECK-RV64-NEXT: vmv.s.x v16, a219267; CHECK-RV64-NEXT: li a2, 48419268; CHECK-RV64-NEXT: li a3, 48319269; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19270; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319271; CHECK-RV64-NEXT: addi a0, a0, 119272; CHECK-RV64-NEXT: slli a2, a1, 2719273; CHECK-RV64-NEXT: bltz a2, .LBB61_99719274; CHECK-RV64-NEXT: j .LBB61_49919275; CHECK-RV64-NEXT: .LBB61_997: # %cond.load193319276; CHECK-RV64-NEXT: lbu a2, 0(a0)19277; CHECK-RV64-NEXT: li a3, 51219278; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19279; CHECK-RV64-NEXT: vmv.s.x v16, a219280; CHECK-RV64-NEXT: li a2, 48519281; CHECK-RV64-NEXT: li a3, 48419282; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19283; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319284; CHECK-RV64-NEXT: addi a0, a0, 119285; CHECK-RV64-NEXT: slli a2, a1, 2619286; CHECK-RV64-NEXT: bltz a2, .LBB61_99819287; CHECK-RV64-NEXT: j .LBB61_50019288; CHECK-RV64-NEXT: .LBB61_998: # %cond.load193719289; CHECK-RV64-NEXT: lbu a2, 0(a0)19290; CHECK-RV64-NEXT: li a3, 51219291; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19292; CHECK-RV64-NEXT: vmv.s.x v16, a219293; CHECK-RV64-NEXT: li a2, 48619294; CHECK-RV64-NEXT: li a3, 48519295; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19296; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319297; CHECK-RV64-NEXT: addi a0, a0, 119298; CHECK-RV64-NEXT: slli a2, a1, 2519299; CHECK-RV64-NEXT: bltz a2, .LBB61_99919300; CHECK-RV64-NEXT: j .LBB61_50119301; CHECK-RV64-NEXT: .LBB61_999: # %cond.load194119302; CHECK-RV64-NEXT: lbu a2, 0(a0)19303; CHECK-RV64-NEXT: li a3, 51219304; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19305; CHECK-RV64-NEXT: vmv.s.x v16, a219306; CHECK-RV64-NEXT: li a2, 48719307; CHECK-RV64-NEXT: li a3, 48619308; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19309; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319310; CHECK-RV64-NEXT: addi a0, a0, 119311; CHECK-RV64-NEXT: slli a2, a1, 2419312; CHECK-RV64-NEXT: bltz a2, .LBB61_100019313; CHECK-RV64-NEXT: j .LBB61_50219314; CHECK-RV64-NEXT: .LBB61_1000: # %cond.load194519315; CHECK-RV64-NEXT: lbu a2, 0(a0)19316; CHECK-RV64-NEXT: li a3, 51219317; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19318; CHECK-RV64-NEXT: vmv.s.x v16, a219319; CHECK-RV64-NEXT: li a2, 48819320; CHECK-RV64-NEXT: li a3, 48719321; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19322; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319323; CHECK-RV64-NEXT: addi a0, a0, 119324; CHECK-RV64-NEXT: slli a2, a1, 2319325; CHECK-RV64-NEXT: bltz a2, .LBB61_100119326; CHECK-RV64-NEXT: j .LBB61_50319327; CHECK-RV64-NEXT: .LBB61_1001: # %cond.load194919328; CHECK-RV64-NEXT: lbu a2, 0(a0)19329; CHECK-RV64-NEXT: li a3, 51219330; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19331; CHECK-RV64-NEXT: vmv.s.x v16, a219332; CHECK-RV64-NEXT: li a2, 48919333; CHECK-RV64-NEXT: li a3, 48819334; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19335; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319336; CHECK-RV64-NEXT: addi a0, a0, 119337; CHECK-RV64-NEXT: slli a2, a1, 2219338; CHECK-RV64-NEXT: bltz a2, .LBB61_100219339; CHECK-RV64-NEXT: j .LBB61_50419340; CHECK-RV64-NEXT: .LBB61_1002: # %cond.load195319341; CHECK-RV64-NEXT: lbu a2, 0(a0)19342; CHECK-RV64-NEXT: li a3, 51219343; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19344; CHECK-RV64-NEXT: vmv.s.x v16, a219345; CHECK-RV64-NEXT: li a2, 49019346; CHECK-RV64-NEXT: li a3, 48919347; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19348; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319349; CHECK-RV64-NEXT: addi a0, a0, 119350; CHECK-RV64-NEXT: slli a2, a1, 2119351; CHECK-RV64-NEXT: bltz a2, .LBB61_100319352; CHECK-RV64-NEXT: j .LBB61_50519353; CHECK-RV64-NEXT: .LBB61_1003: # %cond.load195719354; CHECK-RV64-NEXT: lbu a2, 0(a0)19355; CHECK-RV64-NEXT: li a3, 51219356; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19357; CHECK-RV64-NEXT: vmv.s.x v16, a219358; CHECK-RV64-NEXT: li a2, 49119359; CHECK-RV64-NEXT: li a3, 49019360; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19361; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319362; CHECK-RV64-NEXT: addi a0, a0, 119363; CHECK-RV64-NEXT: slli a2, a1, 2019364; CHECK-RV64-NEXT: bltz a2, .LBB61_100419365; CHECK-RV64-NEXT: j .LBB61_50619366; CHECK-RV64-NEXT: .LBB61_1004: # %cond.load196119367; CHECK-RV64-NEXT: lbu a2, 0(a0)19368; CHECK-RV64-NEXT: li a3, 51219369; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19370; CHECK-RV64-NEXT: vmv.s.x v16, a219371; CHECK-RV64-NEXT: li a2, 49219372; CHECK-RV64-NEXT: li a3, 49119373; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19374; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319375; CHECK-RV64-NEXT: addi a0, a0, 119376; CHECK-RV64-NEXT: slli a2, a1, 1919377; CHECK-RV64-NEXT: bltz a2, .LBB61_100519378; CHECK-RV64-NEXT: j .LBB61_50719379; CHECK-RV64-NEXT: .LBB61_1005: # %cond.load196519380; CHECK-RV64-NEXT: lbu a2, 0(a0)19381; CHECK-RV64-NEXT: li a3, 51219382; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19383; CHECK-RV64-NEXT: vmv.s.x v16, a219384; CHECK-RV64-NEXT: li a2, 49319385; CHECK-RV64-NEXT: li a3, 49219386; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19387; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319388; CHECK-RV64-NEXT: addi a0, a0, 119389; CHECK-RV64-NEXT: slli a2, a1, 1819390; CHECK-RV64-NEXT: bltz a2, .LBB61_100619391; CHECK-RV64-NEXT: j .LBB61_50819392; CHECK-RV64-NEXT: .LBB61_1006: # %cond.load196919393; CHECK-RV64-NEXT: lbu a2, 0(a0)19394; CHECK-RV64-NEXT: li a3, 51219395; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19396; CHECK-RV64-NEXT: vmv.s.x v16, a219397; CHECK-RV64-NEXT: li a2, 49419398; CHECK-RV64-NEXT: li a3, 49319399; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19400; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319401; CHECK-RV64-NEXT: addi a0, a0, 119402; CHECK-RV64-NEXT: slli a2, a1, 1719403; CHECK-RV64-NEXT: bltz a2, .LBB61_100719404; CHECK-RV64-NEXT: j .LBB61_50919405; CHECK-RV64-NEXT: .LBB61_1007: # %cond.load197319406; CHECK-RV64-NEXT: lbu a2, 0(a0)19407; CHECK-RV64-NEXT: li a3, 51219408; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19409; CHECK-RV64-NEXT: vmv.s.x v16, a219410; CHECK-RV64-NEXT: li a2, 49519411; CHECK-RV64-NEXT: li a3, 49419412; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19413; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319414; CHECK-RV64-NEXT: addi a0, a0, 119415; CHECK-RV64-NEXT: slli a2, a1, 1619416; CHECK-RV64-NEXT: bltz a2, .LBB61_100819417; CHECK-RV64-NEXT: j .LBB61_51019418; CHECK-RV64-NEXT: .LBB61_1008: # %cond.load197719419; CHECK-RV64-NEXT: lbu a2, 0(a0)19420; CHECK-RV64-NEXT: li a3, 51219421; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19422; CHECK-RV64-NEXT: vmv.s.x v16, a219423; CHECK-RV64-NEXT: li a2, 49619424; CHECK-RV64-NEXT: li a3, 49519425; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19426; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319427; CHECK-RV64-NEXT: addi a0, a0, 119428; CHECK-RV64-NEXT: slli a2, a1, 1519429; CHECK-RV64-NEXT: bltz a2, .LBB61_100919430; CHECK-RV64-NEXT: j .LBB61_51119431; CHECK-RV64-NEXT: .LBB61_1009: # %cond.load198119432; CHECK-RV64-NEXT: lbu a2, 0(a0)19433; CHECK-RV64-NEXT: li a3, 51219434; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19435; CHECK-RV64-NEXT: vmv.s.x v16, a219436; CHECK-RV64-NEXT: li a2, 49719437; CHECK-RV64-NEXT: li a3, 49619438; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19439; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319440; CHECK-RV64-NEXT: addi a0, a0, 119441; CHECK-RV64-NEXT: slli a2, a1, 1419442; CHECK-RV64-NEXT: bltz a2, .LBB61_101019443; CHECK-RV64-NEXT: j .LBB61_51219444; CHECK-RV64-NEXT: .LBB61_1010: # %cond.load198519445; CHECK-RV64-NEXT: lbu a2, 0(a0)19446; CHECK-RV64-NEXT: li a3, 51219447; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19448; CHECK-RV64-NEXT: vmv.s.x v16, a219449; CHECK-RV64-NEXT: li a2, 49819450; CHECK-RV64-NEXT: li a3, 49719451; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19452; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319453; CHECK-RV64-NEXT: addi a0, a0, 119454; CHECK-RV64-NEXT: slli a2, a1, 1319455; CHECK-RV64-NEXT: bltz a2, .LBB61_101119456; CHECK-RV64-NEXT: j .LBB61_51319457; CHECK-RV64-NEXT: .LBB61_1011: # %cond.load198919458; CHECK-RV64-NEXT: lbu a2, 0(a0)19459; CHECK-RV64-NEXT: li a3, 51219460; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19461; CHECK-RV64-NEXT: vmv.s.x v16, a219462; CHECK-RV64-NEXT: li a2, 49919463; CHECK-RV64-NEXT: li a3, 49819464; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19465; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319466; CHECK-RV64-NEXT: addi a0, a0, 119467; CHECK-RV64-NEXT: slli a2, a1, 1219468; CHECK-RV64-NEXT: bltz a2, .LBB61_101219469; CHECK-RV64-NEXT: j .LBB61_51419470; CHECK-RV64-NEXT: .LBB61_1012: # %cond.load199319471; CHECK-RV64-NEXT: lbu a2, 0(a0)19472; CHECK-RV64-NEXT: li a3, 51219473; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19474; CHECK-RV64-NEXT: vmv.s.x v16, a219475; CHECK-RV64-NEXT: li a2, 50019476; CHECK-RV64-NEXT: li a3, 49919477; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19478; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319479; CHECK-RV64-NEXT: addi a0, a0, 119480; CHECK-RV64-NEXT: slli a2, a1, 1119481; CHECK-RV64-NEXT: bltz a2, .LBB61_101319482; CHECK-RV64-NEXT: j .LBB61_51519483; CHECK-RV64-NEXT: .LBB61_1013: # %cond.load199719484; CHECK-RV64-NEXT: lbu a2, 0(a0)19485; CHECK-RV64-NEXT: li a3, 51219486; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19487; CHECK-RV64-NEXT: vmv.s.x v16, a219488; CHECK-RV64-NEXT: li a2, 50119489; CHECK-RV64-NEXT: li a3, 50019490; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19491; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319492; CHECK-RV64-NEXT: addi a0, a0, 119493; CHECK-RV64-NEXT: slli a2, a1, 1019494; CHECK-RV64-NEXT: bltz a2, .LBB61_101419495; CHECK-RV64-NEXT: j .LBB61_51619496; CHECK-RV64-NEXT: .LBB61_1014: # %cond.load200119497; CHECK-RV64-NEXT: lbu a2, 0(a0)19498; CHECK-RV64-NEXT: li a3, 51219499; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19500; CHECK-RV64-NEXT: vmv.s.x v16, a219501; CHECK-RV64-NEXT: li a2, 50219502; CHECK-RV64-NEXT: li a3, 50119503; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19504; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319505; CHECK-RV64-NEXT: addi a0, a0, 119506; CHECK-RV64-NEXT: slli a2, a1, 919507; CHECK-RV64-NEXT: bltz a2, .LBB61_101519508; CHECK-RV64-NEXT: j .LBB61_51719509; CHECK-RV64-NEXT: .LBB61_1015: # %cond.load200519510; CHECK-RV64-NEXT: lbu a2, 0(a0)19511; CHECK-RV64-NEXT: li a3, 51219512; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19513; CHECK-RV64-NEXT: vmv.s.x v16, a219514; CHECK-RV64-NEXT: li a2, 50319515; CHECK-RV64-NEXT: li a3, 50219516; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19517; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319518; CHECK-RV64-NEXT: addi a0, a0, 119519; CHECK-RV64-NEXT: slli a2, a1, 819520; CHECK-RV64-NEXT: bltz a2, .LBB61_101619521; CHECK-RV64-NEXT: j .LBB61_51819522; CHECK-RV64-NEXT: .LBB61_1016: # %cond.load200919523; CHECK-RV64-NEXT: lbu a2, 0(a0)19524; CHECK-RV64-NEXT: li a3, 51219525; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19526; CHECK-RV64-NEXT: vmv.s.x v16, a219527; CHECK-RV64-NEXT: li a2, 50419528; CHECK-RV64-NEXT: li a3, 50319529; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19530; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319531; CHECK-RV64-NEXT: addi a0, a0, 119532; CHECK-RV64-NEXT: slli a2, a1, 719533; CHECK-RV64-NEXT: bltz a2, .LBB61_101719534; CHECK-RV64-NEXT: j .LBB61_51919535; CHECK-RV64-NEXT: .LBB61_1017: # %cond.load201319536; CHECK-RV64-NEXT: lbu a2, 0(a0)19537; CHECK-RV64-NEXT: li a3, 51219538; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19539; CHECK-RV64-NEXT: vmv.s.x v16, a219540; CHECK-RV64-NEXT: li a2, 50519541; CHECK-RV64-NEXT: li a3, 50419542; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19543; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319544; CHECK-RV64-NEXT: addi a0, a0, 119545; CHECK-RV64-NEXT: slli a2, a1, 619546; CHECK-RV64-NEXT: bltz a2, .LBB61_101819547; CHECK-RV64-NEXT: j .LBB61_52019548; CHECK-RV64-NEXT: .LBB61_1018: # %cond.load201719549; CHECK-RV64-NEXT: lbu a2, 0(a0)19550; CHECK-RV64-NEXT: li a3, 51219551; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19552; CHECK-RV64-NEXT: vmv.s.x v16, a219553; CHECK-RV64-NEXT: li a2, 50619554; CHECK-RV64-NEXT: li a3, 50519555; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19556; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319557; CHECK-RV64-NEXT: addi a0, a0, 119558; CHECK-RV64-NEXT: slli a2, a1, 519559; CHECK-RV64-NEXT: bltz a2, .LBB61_101919560; CHECK-RV64-NEXT: j .LBB61_52119561; CHECK-RV64-NEXT: .LBB61_1019: # %cond.load202119562; CHECK-RV64-NEXT: lbu a2, 0(a0)19563; CHECK-RV64-NEXT: li a3, 51219564; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19565; CHECK-RV64-NEXT: vmv.s.x v16, a219566; CHECK-RV64-NEXT: li a2, 50719567; CHECK-RV64-NEXT: li a3, 50619568; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19569; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319570; CHECK-RV64-NEXT: addi a0, a0, 119571; CHECK-RV64-NEXT: slli a2, a1, 419572; CHECK-RV64-NEXT: bltz a2, .LBB61_102019573; CHECK-RV64-NEXT: j .LBB61_52219574; CHECK-RV64-NEXT: .LBB61_1020: # %cond.load202519575; CHECK-RV64-NEXT: lbu a2, 0(a0)19576; CHECK-RV64-NEXT: li a3, 51219577; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19578; CHECK-RV64-NEXT: vmv.s.x v16, a219579; CHECK-RV64-NEXT: li a2, 50819580; CHECK-RV64-NEXT: li a3, 50719581; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19582; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319583; CHECK-RV64-NEXT: addi a0, a0, 119584; CHECK-RV64-NEXT: slli a2, a1, 319585; CHECK-RV64-NEXT: bltz a2, .LBB61_102119586; CHECK-RV64-NEXT: j .LBB61_52319587; CHECK-RV64-NEXT: .LBB61_1021: # %cond.load202919588; CHECK-RV64-NEXT: lbu a2, 0(a0)19589; CHECK-RV64-NEXT: li a3, 51219590; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19591; CHECK-RV64-NEXT: vmv.s.x v16, a219592; CHECK-RV64-NEXT: li a2, 50919593; CHECK-RV64-NEXT: li a3, 50819594; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19595; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319596; CHECK-RV64-NEXT: addi a0, a0, 119597; CHECK-RV64-NEXT: slli a2, a1, 219598; CHECK-RV64-NEXT: bltz a2, .LBB61_102219599; CHECK-RV64-NEXT: j .LBB61_52419600; CHECK-RV64-NEXT: .LBB61_1022: # %cond.load203319601; CHECK-RV64-NEXT: lbu a2, 0(a0)19602; CHECK-RV64-NEXT: li a3, 51219603; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19604; CHECK-RV64-NEXT: vmv.s.x v16, a219605; CHECK-RV64-NEXT: li a2, 51019606; CHECK-RV64-NEXT: li a3, 50919607; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19608; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319609; CHECK-RV64-NEXT: addi a0, a0, 119610; CHECK-RV64-NEXT: slli a2, a1, 119611; CHECK-RV64-NEXT: bltz a2, .LBB61_102319612; CHECK-RV64-NEXT: j .LBB61_52519613; CHECK-RV64-NEXT: .LBB61_1023: # %cond.load203719614; CHECK-RV64-NEXT: lbu a2, 0(a0)19615; CHECK-RV64-NEXT: li a3, 51219616; CHECK-RV64-NEXT: vsetvli zero, a3, e8, m1, ta, ma19617; CHECK-RV64-NEXT: vmv.s.x v16, a219618; CHECK-RV64-NEXT: li a2, 51119619; CHECK-RV64-NEXT: li a3, 51019620; CHECK-RV64-NEXT: vsetvli zero, a2, e8, m8, tu, ma19621; CHECK-RV64-NEXT: vslideup.vx v8, v16, a319622; CHECK-RV64-NEXT: addi a0, a0, 119623; CHECK-RV64-NEXT: bltz a1, .LBB61_102419624; CHECK-RV64-NEXT: j .LBB61_52619625; CHECK-RV64-NEXT: .LBB61_1024: # %cond.load204119626; CHECK-RV64-NEXT: lbu a0, 0(a0)19627; CHECK-RV64-NEXT: li a1, 51219628; CHECK-RV64-NEXT: vsetvli zero, a1, e8, m8, ta, ma19629; CHECK-RV64-NEXT: vmv.s.x v16, a019630; CHECK-RV64-NEXT: li a0, 51119631; CHECK-RV64-NEXT: vslideup.vx v8, v16, a019632; CHECK-RV64-NEXT: ret19633 %res = call <512 x i8> @llvm.masked.expandload.v512i8(ptr align 1 %base, <512 x i1> %mask, <512 x i8> %passthru)19634 ret <512 x i8> %res19635}19636