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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+d,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,NOZFMIN,ZVFH3; RUN: llc -mtriple=riscv64 -mattr=+v,+d,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,NOZFMIN,ZVFH4; RUN: llc -mtriple=riscv32 -mattr=+v,+d,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,NOZFMIN,ZVFHMIN5; RUN: llc -mtriple=riscv64 -mattr=+v,+d,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,NOZFMIN,ZVFHMIN6; RUN: llc -mtriple=riscv32 -mattr=+v,+d,+zfhmin,+zfbfmin,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,ZFMIN7; RUN: llc -mtriple=riscv64 -mattr=+v,+d,+zfhmin,+zfbfmin,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,ZFMIN8; RUN: llc -mtriple=riscv32 -mattr=+v,+d,+zfhmin,+zvfhmin,+experimental-zvfbfa -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,ZVFBFA9; RUN: llc -mtriple=riscv64 -mattr=+v,+d,+zfhmin,+zvfhmin,+experimental-zvfbfa -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,ZVFBFA10 11define bfloat @extractelt_nxv1bf16_0(<vscale x 1 x bfloat> %v) {12; NOZFMIN-LABEL: extractelt_nxv1bf16_0:13; NOZFMIN: # %bb.0:14; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma15; NOZFMIN-NEXT: vmv.x.s a0, v816; NOZFMIN-NEXT: lui a1, 104856017; NOZFMIN-NEXT: or a0, a0, a118; NOZFMIN-NEXT: fmv.w.x fa0, a019; NOZFMIN-NEXT: ret20;21; ZFMIN-LABEL: extractelt_nxv1bf16_0:22; ZFMIN: # %bb.0:23; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma24; ZFMIN-NEXT: vmv.x.s a0, v825; ZFMIN-NEXT: fmv.h.x fa0, a026; ZFMIN-NEXT: ret27;28; ZVFBFA-LABEL: extractelt_nxv1bf16_0:29; ZVFBFA: # %bb.0:30; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma31; ZVFBFA-NEXT: vfmv.f.s fa0, v832; ZVFBFA-NEXT: ret33 %r = extractelement <vscale x 1 x bfloat> %v, i32 034 ret bfloat %r35}36 37define bfloat @extractelt_nxv1bf16_imm(<vscale x 1 x bfloat> %v) {38; NOZFMIN-LABEL: extractelt_nxv1bf16_imm:39; NOZFMIN: # %bb.0:40; NOZFMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma41; NOZFMIN-NEXT: vslidedown.vi v8, v8, 242; NOZFMIN-NEXT: vmv.x.s a0, v843; NOZFMIN-NEXT: lui a1, 104856044; NOZFMIN-NEXT: or a0, a0, a145; NOZFMIN-NEXT: fmv.w.x fa0, a046; NOZFMIN-NEXT: ret47;48; ZFMIN-LABEL: extractelt_nxv1bf16_imm:49; ZFMIN: # %bb.0:50; ZFMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma51; ZFMIN-NEXT: vslidedown.vi v8, v8, 252; ZFMIN-NEXT: vmv.x.s a0, v853; ZFMIN-NEXT: fmv.h.x fa0, a054; ZFMIN-NEXT: ret55;56; ZVFBFA-LABEL: extractelt_nxv1bf16_imm:57; ZVFBFA: # %bb.0:58; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, mf4, ta, ma59; ZVFBFA-NEXT: vslidedown.vi v8, v8, 260; ZVFBFA-NEXT: vfmv.f.s fa0, v861; ZVFBFA-NEXT: ret62 %r = extractelement <vscale x 1 x bfloat> %v, i32 263 ret bfloat %r64}65 66define bfloat @extractelt_nxv1bf16_idx(<vscale x 1 x bfloat> %v, i32 zeroext %idx) {67; NOZFMIN-LABEL: extractelt_nxv1bf16_idx:68; NOZFMIN: # %bb.0:69; NOZFMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma70; NOZFMIN-NEXT: vslidedown.vx v8, v8, a071; NOZFMIN-NEXT: vmv.x.s a0, v872; NOZFMIN-NEXT: lui a1, 104856073; NOZFMIN-NEXT: or a0, a0, a174; NOZFMIN-NEXT: fmv.w.x fa0, a075; NOZFMIN-NEXT: ret76;77; ZFMIN-LABEL: extractelt_nxv1bf16_idx:78; ZFMIN: # %bb.0:79; ZFMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma80; ZFMIN-NEXT: vslidedown.vx v8, v8, a081; ZFMIN-NEXT: vmv.x.s a0, v882; ZFMIN-NEXT: fmv.h.x fa0, a083; ZFMIN-NEXT: ret84;85; ZVFBFA-LABEL: extractelt_nxv1bf16_idx:86; ZVFBFA: # %bb.0:87; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, mf4, ta, ma88; ZVFBFA-NEXT: vslidedown.vx v8, v8, a089; ZVFBFA-NEXT: vfmv.f.s fa0, v890; ZVFBFA-NEXT: ret91 %r = extractelement <vscale x 1 x bfloat> %v, i32 %idx92 ret bfloat %r93}94 95define bfloat @extractelt_nxv2bf16_0(<vscale x 2 x bfloat> %v) {96; NOZFMIN-LABEL: extractelt_nxv2bf16_0:97; NOZFMIN: # %bb.0:98; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma99; NOZFMIN-NEXT: vmv.x.s a0, v8100; NOZFMIN-NEXT: lui a1, 1048560101; NOZFMIN-NEXT: or a0, a0, a1102; NOZFMIN-NEXT: fmv.w.x fa0, a0103; NOZFMIN-NEXT: ret104;105; ZFMIN-LABEL: extractelt_nxv2bf16_0:106; ZFMIN: # %bb.0:107; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma108; ZFMIN-NEXT: vmv.x.s a0, v8109; ZFMIN-NEXT: fmv.h.x fa0, a0110; ZFMIN-NEXT: ret111;112; ZVFBFA-LABEL: extractelt_nxv2bf16_0:113; ZVFBFA: # %bb.0:114; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma115; ZVFBFA-NEXT: vfmv.f.s fa0, v8116; ZVFBFA-NEXT: ret117 %r = extractelement <vscale x 2 x bfloat> %v, i32 0118 ret bfloat %r119}120 121define bfloat @extractelt_nxv2bf16_imm(<vscale x 2 x bfloat> %v) {122; NOZFMIN-LABEL: extractelt_nxv2bf16_imm:123; NOZFMIN: # %bb.0:124; NOZFMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma125; NOZFMIN-NEXT: vslidedown.vi v8, v8, 2126; NOZFMIN-NEXT: vmv.x.s a0, v8127; NOZFMIN-NEXT: lui a1, 1048560128; NOZFMIN-NEXT: or a0, a0, a1129; NOZFMIN-NEXT: fmv.w.x fa0, a0130; NOZFMIN-NEXT: ret131;132; ZFMIN-LABEL: extractelt_nxv2bf16_imm:133; ZFMIN: # %bb.0:134; ZFMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma135; ZFMIN-NEXT: vslidedown.vi v8, v8, 2136; ZFMIN-NEXT: vmv.x.s a0, v8137; ZFMIN-NEXT: fmv.h.x fa0, a0138; ZFMIN-NEXT: ret139;140; ZVFBFA-LABEL: extractelt_nxv2bf16_imm:141; ZVFBFA: # %bb.0:142; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, mf2, ta, ma143; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2144; ZVFBFA-NEXT: vfmv.f.s fa0, v8145; ZVFBFA-NEXT: ret146 %r = extractelement <vscale x 2 x bfloat> %v, i32 2147 ret bfloat %r148}149 150define bfloat @extractelt_nxv2bf16_idx(<vscale x 2 x bfloat> %v, i32 zeroext %idx) {151; NOZFMIN-LABEL: extractelt_nxv2bf16_idx:152; NOZFMIN: # %bb.0:153; NOZFMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma154; NOZFMIN-NEXT: vslidedown.vx v8, v8, a0155; NOZFMIN-NEXT: vmv.x.s a0, v8156; NOZFMIN-NEXT: lui a1, 1048560157; NOZFMIN-NEXT: or a0, a0, a1158; NOZFMIN-NEXT: fmv.w.x fa0, a0159; NOZFMIN-NEXT: ret160;161; ZFMIN-LABEL: extractelt_nxv2bf16_idx:162; ZFMIN: # %bb.0:163; ZFMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma164; ZFMIN-NEXT: vslidedown.vx v8, v8, a0165; ZFMIN-NEXT: vmv.x.s a0, v8166; ZFMIN-NEXT: fmv.h.x fa0, a0167; ZFMIN-NEXT: ret168;169; ZVFBFA-LABEL: extractelt_nxv2bf16_idx:170; ZVFBFA: # %bb.0:171; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, mf2, ta, ma172; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0173; ZVFBFA-NEXT: vfmv.f.s fa0, v8174; ZVFBFA-NEXT: ret175 %r = extractelement <vscale x 2 x bfloat> %v, i32 %idx176 ret bfloat %r177}178 179define bfloat @extractelt_nxv4bf16_0(<vscale x 4 x bfloat> %v) {180; NOZFMIN-LABEL: extractelt_nxv4bf16_0:181; NOZFMIN: # %bb.0:182; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma183; NOZFMIN-NEXT: vmv.x.s a0, v8184; NOZFMIN-NEXT: lui a1, 1048560185; NOZFMIN-NEXT: or a0, a0, a1186; NOZFMIN-NEXT: fmv.w.x fa0, a0187; NOZFMIN-NEXT: ret188;189; ZFMIN-LABEL: extractelt_nxv4bf16_0:190; ZFMIN: # %bb.0:191; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma192; ZFMIN-NEXT: vmv.x.s a0, v8193; ZFMIN-NEXT: fmv.h.x fa0, a0194; ZFMIN-NEXT: ret195;196; ZVFBFA-LABEL: extractelt_nxv4bf16_0:197; ZVFBFA: # %bb.0:198; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma199; ZVFBFA-NEXT: vfmv.f.s fa0, v8200; ZVFBFA-NEXT: ret201 %r = extractelement <vscale x 4 x bfloat> %v, i32 0202 ret bfloat %r203}204 205define bfloat @extractelt_nxv4bf16_imm(<vscale x 4 x bfloat> %v) {206; NOZFMIN-LABEL: extractelt_nxv4bf16_imm:207; NOZFMIN: # %bb.0:208; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma209; NOZFMIN-NEXT: vslidedown.vi v8, v8, 2210; NOZFMIN-NEXT: vmv.x.s a0, v8211; NOZFMIN-NEXT: lui a1, 1048560212; NOZFMIN-NEXT: or a0, a0, a1213; NOZFMIN-NEXT: fmv.w.x fa0, a0214; NOZFMIN-NEXT: ret215;216; ZFMIN-LABEL: extractelt_nxv4bf16_imm:217; ZFMIN: # %bb.0:218; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma219; ZFMIN-NEXT: vslidedown.vi v8, v8, 2220; ZFMIN-NEXT: vmv.x.s a0, v8221; ZFMIN-NEXT: fmv.h.x fa0, a0222; ZFMIN-NEXT: ret223;224; ZVFBFA-LABEL: extractelt_nxv4bf16_imm:225; ZVFBFA: # %bb.0:226; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma227; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2228; ZVFBFA-NEXT: vfmv.f.s fa0, v8229; ZVFBFA-NEXT: ret230 %r = extractelement <vscale x 4 x bfloat> %v, i32 2231 ret bfloat %r232}233 234define bfloat @extractelt_nxv4bf16_idx(<vscale x 4 x bfloat> %v, i32 zeroext %idx) {235; NOZFMIN-LABEL: extractelt_nxv4bf16_idx:236; NOZFMIN: # %bb.0:237; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma238; NOZFMIN-NEXT: vslidedown.vx v8, v8, a0239; NOZFMIN-NEXT: vmv.x.s a0, v8240; NOZFMIN-NEXT: lui a1, 1048560241; NOZFMIN-NEXT: or a0, a0, a1242; NOZFMIN-NEXT: fmv.w.x fa0, a0243; NOZFMIN-NEXT: ret244;245; ZFMIN-LABEL: extractelt_nxv4bf16_idx:246; ZFMIN: # %bb.0:247; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma248; ZFMIN-NEXT: vslidedown.vx v8, v8, a0249; ZFMIN-NEXT: vmv.x.s a0, v8250; ZFMIN-NEXT: fmv.h.x fa0, a0251; ZFMIN-NEXT: ret252;253; ZVFBFA-LABEL: extractelt_nxv4bf16_idx:254; ZVFBFA: # %bb.0:255; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma256; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0257; ZVFBFA-NEXT: vfmv.f.s fa0, v8258; ZVFBFA-NEXT: ret259 %r = extractelement <vscale x 4 x bfloat> %v, i32 %idx260 ret bfloat %r261}262 263define bfloat @extractelt_nxv8bf16_0(<vscale x 8 x bfloat> %v) {264; NOZFMIN-LABEL: extractelt_nxv8bf16_0:265; NOZFMIN: # %bb.0:266; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma267; NOZFMIN-NEXT: vmv.x.s a0, v8268; NOZFMIN-NEXT: lui a1, 1048560269; NOZFMIN-NEXT: or a0, a0, a1270; NOZFMIN-NEXT: fmv.w.x fa0, a0271; NOZFMIN-NEXT: ret272;273; ZFMIN-LABEL: extractelt_nxv8bf16_0:274; ZFMIN: # %bb.0:275; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma276; ZFMIN-NEXT: vmv.x.s a0, v8277; ZFMIN-NEXT: fmv.h.x fa0, a0278; ZFMIN-NEXT: ret279;280; ZVFBFA-LABEL: extractelt_nxv8bf16_0:281; ZVFBFA: # %bb.0:282; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma283; ZVFBFA-NEXT: vfmv.f.s fa0, v8284; ZVFBFA-NEXT: ret285 %r = extractelement <vscale x 8 x bfloat> %v, i32 0286 ret bfloat %r287}288 289define bfloat @extractelt_nxv8bf16_imm(<vscale x 8 x bfloat> %v) {290; NOZFMIN-LABEL: extractelt_nxv8bf16_imm:291; NOZFMIN: # %bb.0:292; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma293; NOZFMIN-NEXT: vslidedown.vi v8, v8, 2294; NOZFMIN-NEXT: vmv.x.s a0, v8295; NOZFMIN-NEXT: lui a1, 1048560296; NOZFMIN-NEXT: or a0, a0, a1297; NOZFMIN-NEXT: fmv.w.x fa0, a0298; NOZFMIN-NEXT: ret299;300; ZFMIN-LABEL: extractelt_nxv8bf16_imm:301; ZFMIN: # %bb.0:302; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma303; ZFMIN-NEXT: vslidedown.vi v8, v8, 2304; ZFMIN-NEXT: vmv.x.s a0, v8305; ZFMIN-NEXT: fmv.h.x fa0, a0306; ZFMIN-NEXT: ret307;308; ZVFBFA-LABEL: extractelt_nxv8bf16_imm:309; ZVFBFA: # %bb.0:310; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma311; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2312; ZVFBFA-NEXT: vfmv.f.s fa0, v8313; ZVFBFA-NEXT: ret314 %r = extractelement <vscale x 8 x bfloat> %v, i32 2315 ret bfloat %r316}317 318define bfloat @extractelt_nxv8bf16_idx(<vscale x 8 x bfloat> %v, i32 zeroext %idx) {319; NOZFMIN-LABEL: extractelt_nxv8bf16_idx:320; NOZFMIN: # %bb.0:321; NOZFMIN-NEXT: vsetivli zero, 1, e16, m2, ta, ma322; NOZFMIN-NEXT: vslidedown.vx v8, v8, a0323; NOZFMIN-NEXT: vmv.x.s a0, v8324; NOZFMIN-NEXT: lui a1, 1048560325; NOZFMIN-NEXT: or a0, a0, a1326; NOZFMIN-NEXT: fmv.w.x fa0, a0327; NOZFMIN-NEXT: ret328;329; ZFMIN-LABEL: extractelt_nxv8bf16_idx:330; ZFMIN: # %bb.0:331; ZFMIN-NEXT: vsetivli zero, 1, e16, m2, ta, ma332; ZFMIN-NEXT: vslidedown.vx v8, v8, a0333; ZFMIN-NEXT: vmv.x.s a0, v8334; ZFMIN-NEXT: fmv.h.x fa0, a0335; ZFMIN-NEXT: ret336;337; ZVFBFA-LABEL: extractelt_nxv8bf16_idx:338; ZVFBFA: # %bb.0:339; ZVFBFA-NEXT: vsetivli zero, 1, e16, m2, ta, ma340; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0341; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m2, ta, ma342; ZVFBFA-NEXT: vfmv.f.s fa0, v8343; ZVFBFA-NEXT: ret344 %r = extractelement <vscale x 8 x bfloat> %v, i32 %idx345 ret bfloat %r346}347 348define bfloat @extractelt_nxv16bf16_0(<vscale x 16 x bfloat> %v) {349; NOZFMIN-LABEL: extractelt_nxv16bf16_0:350; NOZFMIN: # %bb.0:351; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma352; NOZFMIN-NEXT: vmv.x.s a0, v8353; NOZFMIN-NEXT: lui a1, 1048560354; NOZFMIN-NEXT: or a0, a0, a1355; NOZFMIN-NEXT: fmv.w.x fa0, a0356; NOZFMIN-NEXT: ret357;358; ZFMIN-LABEL: extractelt_nxv16bf16_0:359; ZFMIN: # %bb.0:360; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma361; ZFMIN-NEXT: vmv.x.s a0, v8362; ZFMIN-NEXT: fmv.h.x fa0, a0363; ZFMIN-NEXT: ret364;365; ZVFBFA-LABEL: extractelt_nxv16bf16_0:366; ZVFBFA: # %bb.0:367; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma368; ZVFBFA-NEXT: vfmv.f.s fa0, v8369; ZVFBFA-NEXT: ret370 %r = extractelement <vscale x 16 x bfloat> %v, i32 0371 ret bfloat %r372}373 374define bfloat @extractelt_nxv16bf16_imm(<vscale x 16 x bfloat> %v) {375; NOZFMIN-LABEL: extractelt_nxv16bf16_imm:376; NOZFMIN: # %bb.0:377; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma378; NOZFMIN-NEXT: vslidedown.vi v8, v8, 2379; NOZFMIN-NEXT: vmv.x.s a0, v8380; NOZFMIN-NEXT: lui a1, 1048560381; NOZFMIN-NEXT: or a0, a0, a1382; NOZFMIN-NEXT: fmv.w.x fa0, a0383; NOZFMIN-NEXT: ret384;385; ZFMIN-LABEL: extractelt_nxv16bf16_imm:386; ZFMIN: # %bb.0:387; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma388; ZFMIN-NEXT: vslidedown.vi v8, v8, 2389; ZFMIN-NEXT: vmv.x.s a0, v8390; ZFMIN-NEXT: fmv.h.x fa0, a0391; ZFMIN-NEXT: ret392;393; ZVFBFA-LABEL: extractelt_nxv16bf16_imm:394; ZVFBFA: # %bb.0:395; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma396; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2397; ZVFBFA-NEXT: vfmv.f.s fa0, v8398; ZVFBFA-NEXT: ret399 %r = extractelement <vscale x 16 x bfloat> %v, i32 2400 ret bfloat %r401}402 403define bfloat @extractelt_nxv16bf16_idx(<vscale x 16 x bfloat> %v, i32 zeroext %idx) {404; NOZFMIN-LABEL: extractelt_nxv16bf16_idx:405; NOZFMIN: # %bb.0:406; NOZFMIN-NEXT: vsetivli zero, 1, e16, m4, ta, ma407; NOZFMIN-NEXT: vslidedown.vx v8, v8, a0408; NOZFMIN-NEXT: vmv.x.s a0, v8409; NOZFMIN-NEXT: lui a1, 1048560410; NOZFMIN-NEXT: or a0, a0, a1411; NOZFMIN-NEXT: fmv.w.x fa0, a0412; NOZFMIN-NEXT: ret413;414; ZFMIN-LABEL: extractelt_nxv16bf16_idx:415; ZFMIN: # %bb.0:416; ZFMIN-NEXT: vsetivli zero, 1, e16, m4, ta, ma417; ZFMIN-NEXT: vslidedown.vx v8, v8, a0418; ZFMIN-NEXT: vmv.x.s a0, v8419; ZFMIN-NEXT: fmv.h.x fa0, a0420; ZFMIN-NEXT: ret421;422; ZVFBFA-LABEL: extractelt_nxv16bf16_idx:423; ZVFBFA: # %bb.0:424; ZVFBFA-NEXT: vsetivli zero, 1, e16, m4, ta, ma425; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0426; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma427; ZVFBFA-NEXT: vfmv.f.s fa0, v8428; ZVFBFA-NEXT: ret429 %r = extractelement <vscale x 16 x bfloat> %v, i32 %idx430 ret bfloat %r431}432 433define bfloat @extractelt_nxv32bf16_0(<vscale x 32 x bfloat> %v) {434; NOZFMIN-LABEL: extractelt_nxv32bf16_0:435; NOZFMIN: # %bb.0:436; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma437; NOZFMIN-NEXT: vmv.x.s a0, v8438; NOZFMIN-NEXT: lui a1, 1048560439; NOZFMIN-NEXT: or a0, a0, a1440; NOZFMIN-NEXT: fmv.w.x fa0, a0441; NOZFMIN-NEXT: ret442;443; ZFMIN-LABEL: extractelt_nxv32bf16_0:444; ZFMIN: # %bb.0:445; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma446; ZFMIN-NEXT: vmv.x.s a0, v8447; ZFMIN-NEXT: fmv.h.x fa0, a0448; ZFMIN-NEXT: ret449;450; ZVFBFA-LABEL: extractelt_nxv32bf16_0:451; ZVFBFA: # %bb.0:452; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma453; ZVFBFA-NEXT: vfmv.f.s fa0, v8454; ZVFBFA-NEXT: ret455 %r = extractelement <vscale x 32 x bfloat> %v, i32 0456 ret bfloat %r457}458 459define bfloat @extractelt_nxv32bf16_imm(<vscale x 32 x bfloat> %v) {460; NOZFMIN-LABEL: extractelt_nxv32bf16_imm:461; NOZFMIN: # %bb.0:462; NOZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma463; NOZFMIN-NEXT: vslidedown.vi v8, v8, 2464; NOZFMIN-NEXT: vmv.x.s a0, v8465; NOZFMIN-NEXT: lui a1, 1048560466; NOZFMIN-NEXT: or a0, a0, a1467; NOZFMIN-NEXT: fmv.w.x fa0, a0468; NOZFMIN-NEXT: ret469;470; ZFMIN-LABEL: extractelt_nxv32bf16_imm:471; ZFMIN: # %bb.0:472; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma473; ZFMIN-NEXT: vslidedown.vi v8, v8, 2474; ZFMIN-NEXT: vmv.x.s a0, v8475; ZFMIN-NEXT: fmv.h.x fa0, a0476; ZFMIN-NEXT: ret477;478; ZVFBFA-LABEL: extractelt_nxv32bf16_imm:479; ZVFBFA: # %bb.0:480; ZVFBFA-NEXT: vsetivli zero, 1, e16alt, m1, ta, ma481; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2482; ZVFBFA-NEXT: vfmv.f.s fa0, v8483; ZVFBFA-NEXT: ret484 %r = extractelement <vscale x 32 x bfloat> %v, i32 2485 ret bfloat %r486}487 488define bfloat @extractelt_nxv32bf16_idx(<vscale x 32 x bfloat> %v, i32 zeroext %idx) {489; NOZFMIN-LABEL: extractelt_nxv32bf16_idx:490; NOZFMIN: # %bb.0:491; NOZFMIN-NEXT: vsetivli zero, 1, e16, m8, ta, ma492; NOZFMIN-NEXT: vslidedown.vx v8, v8, a0493; NOZFMIN-NEXT: vmv.x.s a0, v8494; NOZFMIN-NEXT: lui a1, 1048560495; NOZFMIN-NEXT: or a0, a0, a1496; NOZFMIN-NEXT: fmv.w.x fa0, a0497; NOZFMIN-NEXT: ret498;499; ZFMIN-LABEL: extractelt_nxv32bf16_idx:500; ZFMIN: # %bb.0:501; ZFMIN-NEXT: vsetivli zero, 1, e16, m8, ta, ma502; ZFMIN-NEXT: vslidedown.vx v8, v8, a0503; ZFMIN-NEXT: vmv.x.s a0, v8504; ZFMIN-NEXT: fmv.h.x fa0, a0505; ZFMIN-NEXT: ret506;507; ZVFBFA-LABEL: extractelt_nxv32bf16_idx:508; ZVFBFA: # %bb.0:509; ZVFBFA-NEXT: vsetivli zero, 1, e16, m8, ta, ma510; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0511; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m8, ta, ma512; ZVFBFA-NEXT: vfmv.f.s fa0, v8513; ZVFBFA-NEXT: ret514 %r = extractelement <vscale x 32 x bfloat> %v, i32 %idx515 ret bfloat %r516}517 518define half @extractelt_nxv1f16_0(<vscale x 1 x half> %v) {519; ZVFH-LABEL: extractelt_nxv1f16_0:520; ZVFH: # %bb.0:521; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma522; ZVFH-NEXT: vfmv.f.s fa0, v8523; ZVFH-NEXT: ret524;525; ZVFHMIN-LABEL: extractelt_nxv1f16_0:526; ZVFHMIN: # %bb.0:527; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma528; ZVFHMIN-NEXT: vmv.x.s a0, v8529; ZVFHMIN-NEXT: lui a1, 1048560530; ZVFHMIN-NEXT: or a0, a0, a1531; ZVFHMIN-NEXT: fmv.w.x fa0, a0532; ZVFHMIN-NEXT: ret533;534; ZFMIN-LABEL: extractelt_nxv1f16_0:535; ZFMIN: # %bb.0:536; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma537; ZFMIN-NEXT: vmv.x.s a0, v8538; ZFMIN-NEXT: fmv.h.x fa0, a0539; ZFMIN-NEXT: ret540;541; ZVFBFA-LABEL: extractelt_nxv1f16_0:542; ZVFBFA: # %bb.0:543; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma544; ZVFBFA-NEXT: vmv.x.s a0, v8545; ZVFBFA-NEXT: fmv.h.x fa0, a0546; ZVFBFA-NEXT: ret547 %r = extractelement <vscale x 1 x half> %v, i32 0548 ret half %r549}550 551define half @extractelt_nxv1f16_imm(<vscale x 1 x half> %v) {552; ZVFH-LABEL: extractelt_nxv1f16_imm:553; ZVFH: # %bb.0:554; ZVFH-NEXT: vsetivli zero, 1, e16, mf4, ta, ma555; ZVFH-NEXT: vslidedown.vi v8, v8, 2556; ZVFH-NEXT: vfmv.f.s fa0, v8557; ZVFH-NEXT: ret558;559; ZVFHMIN-LABEL: extractelt_nxv1f16_imm:560; ZVFHMIN: # %bb.0:561; ZVFHMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma562; ZVFHMIN-NEXT: vslidedown.vi v8, v8, 2563; ZVFHMIN-NEXT: vmv.x.s a0, v8564; ZVFHMIN-NEXT: lui a1, 1048560565; ZVFHMIN-NEXT: or a0, a0, a1566; ZVFHMIN-NEXT: fmv.w.x fa0, a0567; ZVFHMIN-NEXT: ret568;569; ZFMIN-LABEL: extractelt_nxv1f16_imm:570; ZFMIN: # %bb.0:571; ZFMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma572; ZFMIN-NEXT: vslidedown.vi v8, v8, 2573; ZFMIN-NEXT: vmv.x.s a0, v8574; ZFMIN-NEXT: fmv.h.x fa0, a0575; ZFMIN-NEXT: ret576;577; ZVFBFA-LABEL: extractelt_nxv1f16_imm:578; ZVFBFA: # %bb.0:579; ZVFBFA-NEXT: vsetivli zero, 1, e16, mf4, ta, ma580; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2581; ZVFBFA-NEXT: vmv.x.s a0, v8582; ZVFBFA-NEXT: fmv.h.x fa0, a0583; ZVFBFA-NEXT: ret584 %r = extractelement <vscale x 1 x half> %v, i32 2585 ret half %r586}587 588define half @extractelt_nxv1f16_idx(<vscale x 1 x half> %v, i32 zeroext %idx) {589; ZVFH-LABEL: extractelt_nxv1f16_idx:590; ZVFH: # %bb.0:591; ZVFH-NEXT: vsetivli zero, 1, e16, mf4, ta, ma592; ZVFH-NEXT: vslidedown.vx v8, v8, a0593; ZVFH-NEXT: vfmv.f.s fa0, v8594; ZVFH-NEXT: ret595;596; ZVFHMIN-LABEL: extractelt_nxv1f16_idx:597; ZVFHMIN: # %bb.0:598; ZVFHMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma599; ZVFHMIN-NEXT: vslidedown.vx v8, v8, a0600; ZVFHMIN-NEXT: vmv.x.s a0, v8601; ZVFHMIN-NEXT: lui a1, 1048560602; ZVFHMIN-NEXT: or a0, a0, a1603; ZVFHMIN-NEXT: fmv.w.x fa0, a0604; ZVFHMIN-NEXT: ret605;606; ZFMIN-LABEL: extractelt_nxv1f16_idx:607; ZFMIN: # %bb.0:608; ZFMIN-NEXT: vsetivli zero, 1, e16, mf4, ta, ma609; ZFMIN-NEXT: vslidedown.vx v8, v8, a0610; ZFMIN-NEXT: vmv.x.s a0, v8611; ZFMIN-NEXT: fmv.h.x fa0, a0612; ZFMIN-NEXT: ret613;614; ZVFBFA-LABEL: extractelt_nxv1f16_idx:615; ZVFBFA: # %bb.0:616; ZVFBFA-NEXT: vsetivli zero, 1, e16, mf4, ta, ma617; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0618; ZVFBFA-NEXT: vmv.x.s a0, v8619; ZVFBFA-NEXT: fmv.h.x fa0, a0620; ZVFBFA-NEXT: ret621 %r = extractelement <vscale x 1 x half> %v, i32 %idx622 ret half %r623}624 625define half @extractelt_nxv2f16_0(<vscale x 2 x half> %v) {626; ZVFH-LABEL: extractelt_nxv2f16_0:627; ZVFH: # %bb.0:628; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma629; ZVFH-NEXT: vfmv.f.s fa0, v8630; ZVFH-NEXT: ret631;632; ZVFHMIN-LABEL: extractelt_nxv2f16_0:633; ZVFHMIN: # %bb.0:634; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma635; ZVFHMIN-NEXT: vmv.x.s a0, v8636; ZVFHMIN-NEXT: lui a1, 1048560637; ZVFHMIN-NEXT: or a0, a0, a1638; ZVFHMIN-NEXT: fmv.w.x fa0, a0639; ZVFHMIN-NEXT: ret640;641; ZFMIN-LABEL: extractelt_nxv2f16_0:642; ZFMIN: # %bb.0:643; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma644; ZFMIN-NEXT: vmv.x.s a0, v8645; ZFMIN-NEXT: fmv.h.x fa0, a0646; ZFMIN-NEXT: ret647;648; ZVFBFA-LABEL: extractelt_nxv2f16_0:649; ZVFBFA: # %bb.0:650; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma651; ZVFBFA-NEXT: vmv.x.s a0, v8652; ZVFBFA-NEXT: fmv.h.x fa0, a0653; ZVFBFA-NEXT: ret654 %r = extractelement <vscale x 2 x half> %v, i32 0655 ret half %r656}657 658define half @extractelt_nxv2f16_imm(<vscale x 2 x half> %v) {659; ZVFH-LABEL: extractelt_nxv2f16_imm:660; ZVFH: # %bb.0:661; ZVFH-NEXT: vsetivli zero, 1, e16, mf2, ta, ma662; ZVFH-NEXT: vslidedown.vi v8, v8, 2663; ZVFH-NEXT: vfmv.f.s fa0, v8664; ZVFH-NEXT: ret665;666; ZVFHMIN-LABEL: extractelt_nxv2f16_imm:667; ZVFHMIN: # %bb.0:668; ZVFHMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma669; ZVFHMIN-NEXT: vslidedown.vi v8, v8, 2670; ZVFHMIN-NEXT: vmv.x.s a0, v8671; ZVFHMIN-NEXT: lui a1, 1048560672; ZVFHMIN-NEXT: or a0, a0, a1673; ZVFHMIN-NEXT: fmv.w.x fa0, a0674; ZVFHMIN-NEXT: ret675;676; ZFMIN-LABEL: extractelt_nxv2f16_imm:677; ZFMIN: # %bb.0:678; ZFMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma679; ZFMIN-NEXT: vslidedown.vi v8, v8, 2680; ZFMIN-NEXT: vmv.x.s a0, v8681; ZFMIN-NEXT: fmv.h.x fa0, a0682; ZFMIN-NEXT: ret683;684; ZVFBFA-LABEL: extractelt_nxv2f16_imm:685; ZVFBFA: # %bb.0:686; ZVFBFA-NEXT: vsetivli zero, 1, e16, mf2, ta, ma687; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2688; ZVFBFA-NEXT: vmv.x.s a0, v8689; ZVFBFA-NEXT: fmv.h.x fa0, a0690; ZVFBFA-NEXT: ret691 %r = extractelement <vscale x 2 x half> %v, i32 2692 ret half %r693}694 695define half @extractelt_nxv2f16_idx(<vscale x 2 x half> %v, i32 zeroext %idx) {696; ZVFH-LABEL: extractelt_nxv2f16_idx:697; ZVFH: # %bb.0:698; ZVFH-NEXT: vsetivli zero, 1, e16, mf2, ta, ma699; ZVFH-NEXT: vslidedown.vx v8, v8, a0700; ZVFH-NEXT: vfmv.f.s fa0, v8701; ZVFH-NEXT: ret702;703; ZVFHMIN-LABEL: extractelt_nxv2f16_idx:704; ZVFHMIN: # %bb.0:705; ZVFHMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma706; ZVFHMIN-NEXT: vslidedown.vx v8, v8, a0707; ZVFHMIN-NEXT: vmv.x.s a0, v8708; ZVFHMIN-NEXT: lui a1, 1048560709; ZVFHMIN-NEXT: or a0, a0, a1710; ZVFHMIN-NEXT: fmv.w.x fa0, a0711; ZVFHMIN-NEXT: ret712;713; ZFMIN-LABEL: extractelt_nxv2f16_idx:714; ZFMIN: # %bb.0:715; ZFMIN-NEXT: vsetivli zero, 1, e16, mf2, ta, ma716; ZFMIN-NEXT: vslidedown.vx v8, v8, a0717; ZFMIN-NEXT: vmv.x.s a0, v8718; ZFMIN-NEXT: fmv.h.x fa0, a0719; ZFMIN-NEXT: ret720;721; ZVFBFA-LABEL: extractelt_nxv2f16_idx:722; ZVFBFA: # %bb.0:723; ZVFBFA-NEXT: vsetivli zero, 1, e16, mf2, ta, ma724; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0725; ZVFBFA-NEXT: vmv.x.s a0, v8726; ZVFBFA-NEXT: fmv.h.x fa0, a0727; ZVFBFA-NEXT: ret728 %r = extractelement <vscale x 2 x half> %v, i32 %idx729 ret half %r730}731 732define half @extractelt_nxv4f16_0(<vscale x 4 x half> %v) {733; ZVFH-LABEL: extractelt_nxv4f16_0:734; ZVFH: # %bb.0:735; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma736; ZVFH-NEXT: vfmv.f.s fa0, v8737; ZVFH-NEXT: ret738;739; ZVFHMIN-LABEL: extractelt_nxv4f16_0:740; ZVFHMIN: # %bb.0:741; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma742; ZVFHMIN-NEXT: vmv.x.s a0, v8743; ZVFHMIN-NEXT: lui a1, 1048560744; ZVFHMIN-NEXT: or a0, a0, a1745; ZVFHMIN-NEXT: fmv.w.x fa0, a0746; ZVFHMIN-NEXT: ret747;748; ZFMIN-LABEL: extractelt_nxv4f16_0:749; ZFMIN: # %bb.0:750; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma751; ZFMIN-NEXT: vmv.x.s a0, v8752; ZFMIN-NEXT: fmv.h.x fa0, a0753; ZFMIN-NEXT: ret754;755; ZVFBFA-LABEL: extractelt_nxv4f16_0:756; ZVFBFA: # %bb.0:757; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma758; ZVFBFA-NEXT: vmv.x.s a0, v8759; ZVFBFA-NEXT: fmv.h.x fa0, a0760; ZVFBFA-NEXT: ret761 %r = extractelement <vscale x 4 x half> %v, i32 0762 ret half %r763}764 765define half @extractelt_nxv4f16_imm(<vscale x 4 x half> %v) {766; ZVFH-LABEL: extractelt_nxv4f16_imm:767; ZVFH: # %bb.0:768; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma769; ZVFH-NEXT: vslidedown.vi v8, v8, 2770; ZVFH-NEXT: vfmv.f.s fa0, v8771; ZVFH-NEXT: ret772;773; ZVFHMIN-LABEL: extractelt_nxv4f16_imm:774; ZVFHMIN: # %bb.0:775; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma776; ZVFHMIN-NEXT: vslidedown.vi v8, v8, 2777; ZVFHMIN-NEXT: vmv.x.s a0, v8778; ZVFHMIN-NEXT: lui a1, 1048560779; ZVFHMIN-NEXT: or a0, a0, a1780; ZVFHMIN-NEXT: fmv.w.x fa0, a0781; ZVFHMIN-NEXT: ret782;783; ZFMIN-LABEL: extractelt_nxv4f16_imm:784; ZFMIN: # %bb.0:785; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma786; ZFMIN-NEXT: vslidedown.vi v8, v8, 2787; ZFMIN-NEXT: vmv.x.s a0, v8788; ZFMIN-NEXT: fmv.h.x fa0, a0789; ZFMIN-NEXT: ret790;791; ZVFBFA-LABEL: extractelt_nxv4f16_imm:792; ZVFBFA: # %bb.0:793; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma794; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2795; ZVFBFA-NEXT: vmv.x.s a0, v8796; ZVFBFA-NEXT: fmv.h.x fa0, a0797; ZVFBFA-NEXT: ret798 %r = extractelement <vscale x 4 x half> %v, i32 2799 ret half %r800}801 802define half @extractelt_nxv4f16_idx(<vscale x 4 x half> %v, i32 zeroext %idx) {803; ZVFH-LABEL: extractelt_nxv4f16_idx:804; ZVFH: # %bb.0:805; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma806; ZVFH-NEXT: vslidedown.vx v8, v8, a0807; ZVFH-NEXT: vfmv.f.s fa0, v8808; ZVFH-NEXT: ret809;810; ZVFHMIN-LABEL: extractelt_nxv4f16_idx:811; ZVFHMIN: # %bb.0:812; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma813; ZVFHMIN-NEXT: vslidedown.vx v8, v8, a0814; ZVFHMIN-NEXT: vmv.x.s a0, v8815; ZVFHMIN-NEXT: lui a1, 1048560816; ZVFHMIN-NEXT: or a0, a0, a1817; ZVFHMIN-NEXT: fmv.w.x fa0, a0818; ZVFHMIN-NEXT: ret819;820; ZFMIN-LABEL: extractelt_nxv4f16_idx:821; ZFMIN: # %bb.0:822; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma823; ZFMIN-NEXT: vslidedown.vx v8, v8, a0824; ZFMIN-NEXT: vmv.x.s a0, v8825; ZFMIN-NEXT: fmv.h.x fa0, a0826; ZFMIN-NEXT: ret827;828; ZVFBFA-LABEL: extractelt_nxv4f16_idx:829; ZVFBFA: # %bb.0:830; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma831; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0832; ZVFBFA-NEXT: vmv.x.s a0, v8833; ZVFBFA-NEXT: fmv.h.x fa0, a0834; ZVFBFA-NEXT: ret835 %r = extractelement <vscale x 4 x half> %v, i32 %idx836 ret half %r837}838 839define half @extractelt_nxv8f16_0(<vscale x 8 x half> %v) {840; ZVFH-LABEL: extractelt_nxv8f16_0:841; ZVFH: # %bb.0:842; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma843; ZVFH-NEXT: vfmv.f.s fa0, v8844; ZVFH-NEXT: ret845;846; ZVFHMIN-LABEL: extractelt_nxv8f16_0:847; ZVFHMIN: # %bb.0:848; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma849; ZVFHMIN-NEXT: vmv.x.s a0, v8850; ZVFHMIN-NEXT: lui a1, 1048560851; ZVFHMIN-NEXT: or a0, a0, a1852; ZVFHMIN-NEXT: fmv.w.x fa0, a0853; ZVFHMIN-NEXT: ret854;855; ZFMIN-LABEL: extractelt_nxv8f16_0:856; ZFMIN: # %bb.0:857; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma858; ZFMIN-NEXT: vmv.x.s a0, v8859; ZFMIN-NEXT: fmv.h.x fa0, a0860; ZFMIN-NEXT: ret861;862; ZVFBFA-LABEL: extractelt_nxv8f16_0:863; ZVFBFA: # %bb.0:864; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma865; ZVFBFA-NEXT: vmv.x.s a0, v8866; ZVFBFA-NEXT: fmv.h.x fa0, a0867; ZVFBFA-NEXT: ret868 %r = extractelement <vscale x 8 x half> %v, i32 0869 ret half %r870}871 872define half @extractelt_nxv8f16_imm(<vscale x 8 x half> %v) {873; ZVFH-LABEL: extractelt_nxv8f16_imm:874; ZVFH: # %bb.0:875; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma876; ZVFH-NEXT: vslidedown.vi v8, v8, 2877; ZVFH-NEXT: vfmv.f.s fa0, v8878; ZVFH-NEXT: ret879;880; ZVFHMIN-LABEL: extractelt_nxv8f16_imm:881; ZVFHMIN: # %bb.0:882; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma883; ZVFHMIN-NEXT: vslidedown.vi v8, v8, 2884; ZVFHMIN-NEXT: vmv.x.s a0, v8885; ZVFHMIN-NEXT: lui a1, 1048560886; ZVFHMIN-NEXT: or a0, a0, a1887; ZVFHMIN-NEXT: fmv.w.x fa0, a0888; ZVFHMIN-NEXT: ret889;890; ZFMIN-LABEL: extractelt_nxv8f16_imm:891; ZFMIN: # %bb.0:892; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma893; ZFMIN-NEXT: vslidedown.vi v8, v8, 2894; ZFMIN-NEXT: vmv.x.s a0, v8895; ZFMIN-NEXT: fmv.h.x fa0, a0896; ZFMIN-NEXT: ret897;898; ZVFBFA-LABEL: extractelt_nxv8f16_imm:899; ZVFBFA: # %bb.0:900; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma901; ZVFBFA-NEXT: vslidedown.vi v8, v8, 2902; ZVFBFA-NEXT: vmv.x.s a0, v8903; ZVFBFA-NEXT: fmv.h.x fa0, a0904; ZVFBFA-NEXT: ret905 %r = extractelement <vscale x 8 x half> %v, i32 2906 ret half %r907}908 909define half @extractelt_nxv8f16_idx(<vscale x 8 x half> %v, i32 zeroext %idx) {910; ZVFH-LABEL: extractelt_nxv8f16_idx:911; ZVFH: # %bb.0:912; ZVFH-NEXT: vsetivli zero, 1, e16, m2, ta, ma913; ZVFH-NEXT: vslidedown.vx v8, v8, a0914; ZVFH-NEXT: vfmv.f.s fa0, v8915; ZVFH-NEXT: ret916;917; ZVFHMIN-LABEL: extractelt_nxv8f16_idx:918; ZVFHMIN: # %bb.0:919; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m2, ta, ma920; ZVFHMIN-NEXT: vslidedown.vx v8, v8, a0921; ZVFHMIN-NEXT: vmv.x.s a0, v8922; ZVFHMIN-NEXT: lui a1, 1048560923; ZVFHMIN-NEXT: or a0, a0, a1924; ZVFHMIN-NEXT: fmv.w.x fa0, a0925; ZVFHMIN-NEXT: ret926;927; ZFMIN-LABEL: extractelt_nxv8f16_idx:928; ZFMIN: # %bb.0:929; ZFMIN-NEXT: vsetivli zero, 1, e16, m2, ta, ma930; ZFMIN-NEXT: vslidedown.vx v8, v8, a0931; ZFMIN-NEXT: vmv.x.s a0, v8932; ZFMIN-NEXT: fmv.h.x fa0, a0933; ZFMIN-NEXT: ret934;935; ZVFBFA-LABEL: extractelt_nxv8f16_idx:936; ZVFBFA: # %bb.0:937; ZVFBFA-NEXT: vsetivli zero, 1, e16, m2, ta, ma938; ZVFBFA-NEXT: vslidedown.vx v8, v8, a0939; ZVFBFA-NEXT: vmv.x.s a0, v8940; ZVFBFA-NEXT: fmv.h.x fa0, a0941; ZVFBFA-NEXT: ret942 %r = extractelement <vscale x 8 x half> %v, i32 %idx943 ret half %r944}945 946define half @extractelt_nxv16f16_0(<vscale x 16 x half> %v) {947; ZVFH-LABEL: extractelt_nxv16f16_0:948; ZVFH: # %bb.0:949; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma950; ZVFH-NEXT: vfmv.f.s fa0, v8951; ZVFH-NEXT: ret952;953; ZVFHMIN-LABEL: extractelt_nxv16f16_0:954; ZVFHMIN: # %bb.0:955; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma956; ZVFHMIN-NEXT: vmv.x.s a0, v8957; ZVFHMIN-NEXT: lui a1, 1048560958; ZVFHMIN-NEXT: or a0, a0, a1959; ZVFHMIN-NEXT: fmv.w.x fa0, a0960; ZVFHMIN-NEXT: ret961;962; ZFMIN-LABEL: extractelt_nxv16f16_0:963; ZFMIN: # %bb.0:964; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma965; ZFMIN-NEXT: vmv.x.s a0, v8966; ZFMIN-NEXT: fmv.h.x fa0, a0967; ZFMIN-NEXT: ret968;969; ZVFBFA-LABEL: extractelt_nxv16f16_0:970; ZVFBFA: # %bb.0:971; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma972; ZVFBFA-NEXT: vmv.x.s a0, v8973; ZVFBFA-NEXT: fmv.h.x fa0, a0974; ZVFBFA-NEXT: ret975 %r = extractelement <vscale x 16 x half> %v, i32 0976 ret half %r977}978 979define half @extractelt_nxv16f16_imm(<vscale x 16 x half> %v) {980; ZVFH-LABEL: extractelt_nxv16f16_imm:981; ZVFH: # %bb.0:982; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma983; ZVFH-NEXT: vslidedown.vi v8, v8, 2984; ZVFH-NEXT: vfmv.f.s fa0, v8985; ZVFH-NEXT: ret986;987; ZVFHMIN-LABEL: extractelt_nxv16f16_imm:988; ZVFHMIN: # %bb.0:989; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma990; ZVFHMIN-NEXT: vslidedown.vi v8, v8, 2991; ZVFHMIN-NEXT: vmv.x.s a0, v8992; ZVFHMIN-NEXT: lui a1, 1048560993; ZVFHMIN-NEXT: or a0, a0, a1994; ZVFHMIN-NEXT: fmv.w.x fa0, a0995; ZVFHMIN-NEXT: ret996;997; ZFMIN-LABEL: extractelt_nxv16f16_imm:998; ZFMIN: # %bb.0:999; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma1000; ZFMIN-NEXT: vslidedown.vi v8, v8, 21001; ZFMIN-NEXT: vmv.x.s a0, v81002; ZFMIN-NEXT: fmv.h.x fa0, a01003; ZFMIN-NEXT: ret1004;1005; ZVFBFA-LABEL: extractelt_nxv16f16_imm:1006; ZVFBFA: # %bb.0:1007; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma1008; ZVFBFA-NEXT: vslidedown.vi v8, v8, 21009; ZVFBFA-NEXT: vmv.x.s a0, v81010; ZVFBFA-NEXT: fmv.h.x fa0, a01011; ZVFBFA-NEXT: ret1012 %r = extractelement <vscale x 16 x half> %v, i32 21013 ret half %r1014}1015 1016define half @extractelt_nxv16f16_idx(<vscale x 16 x half> %v, i32 zeroext %idx) {1017; ZVFH-LABEL: extractelt_nxv16f16_idx:1018; ZVFH: # %bb.0:1019; ZVFH-NEXT: vsetivli zero, 1, e16, m4, ta, ma1020; ZVFH-NEXT: vslidedown.vx v8, v8, a01021; ZVFH-NEXT: vfmv.f.s fa0, v81022; ZVFH-NEXT: ret1023;1024; ZVFHMIN-LABEL: extractelt_nxv16f16_idx:1025; ZVFHMIN: # %bb.0:1026; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m4, ta, ma1027; ZVFHMIN-NEXT: vslidedown.vx v8, v8, a01028; ZVFHMIN-NEXT: vmv.x.s a0, v81029; ZVFHMIN-NEXT: lui a1, 10485601030; ZVFHMIN-NEXT: or a0, a0, a11031; ZVFHMIN-NEXT: fmv.w.x fa0, a01032; ZVFHMIN-NEXT: ret1033;1034; ZFMIN-LABEL: extractelt_nxv16f16_idx:1035; ZFMIN: # %bb.0:1036; ZFMIN-NEXT: vsetivli zero, 1, e16, m4, ta, ma1037; ZFMIN-NEXT: vslidedown.vx v8, v8, a01038; ZFMIN-NEXT: vmv.x.s a0, v81039; ZFMIN-NEXT: fmv.h.x fa0, a01040; ZFMIN-NEXT: ret1041;1042; ZVFBFA-LABEL: extractelt_nxv16f16_idx:1043; ZVFBFA: # %bb.0:1044; ZVFBFA-NEXT: vsetivli zero, 1, e16, m4, ta, ma1045; ZVFBFA-NEXT: vslidedown.vx v8, v8, a01046; ZVFBFA-NEXT: vmv.x.s a0, v81047; ZVFBFA-NEXT: fmv.h.x fa0, a01048; ZVFBFA-NEXT: ret1049 %r = extractelement <vscale x 16 x half> %v, i32 %idx1050 ret half %r1051}1052 1053define half @extractelt_nxv32f16_0(<vscale x 32 x half> %v) {1054; ZVFH-LABEL: extractelt_nxv32f16_0:1055; ZVFH: # %bb.0:1056; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma1057; ZVFH-NEXT: vfmv.f.s fa0, v81058; ZVFH-NEXT: ret1059;1060; ZVFHMIN-LABEL: extractelt_nxv32f16_0:1061; ZVFHMIN: # %bb.0:1062; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma1063; ZVFHMIN-NEXT: vmv.x.s a0, v81064; ZVFHMIN-NEXT: lui a1, 10485601065; ZVFHMIN-NEXT: or a0, a0, a11066; ZVFHMIN-NEXT: fmv.w.x fa0, a01067; ZVFHMIN-NEXT: ret1068;1069; ZFMIN-LABEL: extractelt_nxv32f16_0:1070; ZFMIN: # %bb.0:1071; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma1072; ZFMIN-NEXT: vmv.x.s a0, v81073; ZFMIN-NEXT: fmv.h.x fa0, a01074; ZFMIN-NEXT: ret1075;1076; ZVFBFA-LABEL: extractelt_nxv32f16_0:1077; ZVFBFA: # %bb.0:1078; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma1079; ZVFBFA-NEXT: vmv.x.s a0, v81080; ZVFBFA-NEXT: fmv.h.x fa0, a01081; ZVFBFA-NEXT: ret1082 %r = extractelement <vscale x 32 x half> %v, i32 01083 ret half %r1084}1085 1086define half @extractelt_nxv32f16_imm(<vscale x 32 x half> %v) {1087; ZVFH-LABEL: extractelt_nxv32f16_imm:1088; ZVFH: # %bb.0:1089; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma1090; ZVFH-NEXT: vslidedown.vi v8, v8, 21091; ZVFH-NEXT: vfmv.f.s fa0, v81092; ZVFH-NEXT: ret1093;1094; ZVFHMIN-LABEL: extractelt_nxv32f16_imm:1095; ZVFHMIN: # %bb.0:1096; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma1097; ZVFHMIN-NEXT: vslidedown.vi v8, v8, 21098; ZVFHMIN-NEXT: vmv.x.s a0, v81099; ZVFHMIN-NEXT: lui a1, 10485601100; ZVFHMIN-NEXT: or a0, a0, a11101; ZVFHMIN-NEXT: fmv.w.x fa0, a01102; ZVFHMIN-NEXT: ret1103;1104; ZFMIN-LABEL: extractelt_nxv32f16_imm:1105; ZFMIN: # %bb.0:1106; ZFMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma1107; ZFMIN-NEXT: vslidedown.vi v8, v8, 21108; ZFMIN-NEXT: vmv.x.s a0, v81109; ZFMIN-NEXT: fmv.h.x fa0, a01110; ZFMIN-NEXT: ret1111;1112; ZVFBFA-LABEL: extractelt_nxv32f16_imm:1113; ZVFBFA: # %bb.0:1114; ZVFBFA-NEXT: vsetivli zero, 1, e16, m1, ta, ma1115; ZVFBFA-NEXT: vslidedown.vi v8, v8, 21116; ZVFBFA-NEXT: vmv.x.s a0, v81117; ZVFBFA-NEXT: fmv.h.x fa0, a01118; ZVFBFA-NEXT: ret1119 %r = extractelement <vscale x 32 x half> %v, i32 21120 ret half %r1121}1122 1123define half @extractelt_nxv32f16_idx(<vscale x 32 x half> %v, i32 zeroext %idx) {1124; ZVFH-LABEL: extractelt_nxv32f16_idx:1125; ZVFH: # %bb.0:1126; ZVFH-NEXT: vsetivli zero, 1, e16, m8, ta, ma1127; ZVFH-NEXT: vslidedown.vx v8, v8, a01128; ZVFH-NEXT: vfmv.f.s fa0, v81129; ZVFH-NEXT: ret1130;1131; ZVFHMIN-LABEL: extractelt_nxv32f16_idx:1132; ZVFHMIN: # %bb.0:1133; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m8, ta, ma1134; ZVFHMIN-NEXT: vslidedown.vx v8, v8, a01135; ZVFHMIN-NEXT: vmv.x.s a0, v81136; ZVFHMIN-NEXT: lui a1, 10485601137; ZVFHMIN-NEXT: or a0, a0, a11138; ZVFHMIN-NEXT: fmv.w.x fa0, a01139; ZVFHMIN-NEXT: ret1140;1141; ZFMIN-LABEL: extractelt_nxv32f16_idx:1142; ZFMIN: # %bb.0:1143; ZFMIN-NEXT: vsetivli zero, 1, e16, m8, ta, ma1144; ZFMIN-NEXT: vslidedown.vx v8, v8, a01145; ZFMIN-NEXT: vmv.x.s a0, v81146; ZFMIN-NEXT: fmv.h.x fa0, a01147; ZFMIN-NEXT: ret1148;1149; ZVFBFA-LABEL: extractelt_nxv32f16_idx:1150; ZVFBFA: # %bb.0:1151; ZVFBFA-NEXT: vsetivli zero, 1, e16, m8, ta, ma1152; ZVFBFA-NEXT: vslidedown.vx v8, v8, a01153; ZVFBFA-NEXT: vmv.x.s a0, v81154; ZVFBFA-NEXT: fmv.h.x fa0, a01155; ZVFBFA-NEXT: ret1156 %r = extractelement <vscale x 32 x half> %v, i32 %idx1157 ret half %r1158}1159 1160define float @extractelt_nxv1f32_0(<vscale x 1 x float> %v) {1161; CHECK-LABEL: extractelt_nxv1f32_0:1162; CHECK: # %bb.0:1163; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1164; CHECK-NEXT: vfmv.f.s fa0, v81165; CHECK-NEXT: ret1166 %r = extractelement <vscale x 1 x float> %v, i32 01167 ret float %r1168}1169 1170define float @extractelt_nxv1f32_imm(<vscale x 1 x float> %v) {1171; CHECK-LABEL: extractelt_nxv1f32_imm:1172; CHECK: # %bb.0:1173; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma1174; CHECK-NEXT: vslidedown.vi v8, v8, 21175; CHECK-NEXT: vfmv.f.s fa0, v81176; CHECK-NEXT: ret1177 %r = extractelement <vscale x 1 x float> %v, i32 21178 ret float %r1179}1180 1181define float @extractelt_nxv1f32_idx(<vscale x 1 x float> %v, i32 zeroext %idx) {1182; CHECK-LABEL: extractelt_nxv1f32_idx:1183; CHECK: # %bb.0:1184; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma1185; CHECK-NEXT: vslidedown.vx v8, v8, a01186; CHECK-NEXT: vfmv.f.s fa0, v81187; CHECK-NEXT: ret1188 %r = extractelement <vscale x 1 x float> %v, i32 %idx1189 ret float %r1190}1191 1192define float @extractelt_nxv2f32_0(<vscale x 2 x float> %v) {1193; CHECK-LABEL: extractelt_nxv2f32_0:1194; CHECK: # %bb.0:1195; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1196; CHECK-NEXT: vfmv.f.s fa0, v81197; CHECK-NEXT: ret1198 %r = extractelement <vscale x 2 x float> %v, i32 01199 ret float %r1200}1201 1202define float @extractelt_nxv2f32_imm(<vscale x 2 x float> %v) {1203; CHECK-LABEL: extractelt_nxv2f32_imm:1204; CHECK: # %bb.0:1205; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1206; CHECK-NEXT: vslidedown.vi v8, v8, 21207; CHECK-NEXT: vfmv.f.s fa0, v81208; CHECK-NEXT: ret1209 %r = extractelement <vscale x 2 x float> %v, i32 21210 ret float %r1211}1212 1213define float @extractelt_nxv2f32_idx(<vscale x 2 x float> %v, i32 zeroext %idx) {1214; CHECK-LABEL: extractelt_nxv2f32_idx:1215; CHECK: # %bb.0:1216; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1217; CHECK-NEXT: vslidedown.vx v8, v8, a01218; CHECK-NEXT: vfmv.f.s fa0, v81219; CHECK-NEXT: ret1220 %r = extractelement <vscale x 2 x float> %v, i32 %idx1221 ret float %r1222}1223 1224define float @extractelt_nxv4f32_0(<vscale x 4 x float> %v) {1225; CHECK-LABEL: extractelt_nxv4f32_0:1226; CHECK: # %bb.0:1227; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1228; CHECK-NEXT: vfmv.f.s fa0, v81229; CHECK-NEXT: ret1230 %r = extractelement <vscale x 4 x float> %v, i32 01231 ret float %r1232}1233 1234define float @extractelt_nxv4f32_imm(<vscale x 4 x float> %v) {1235; CHECK-LABEL: extractelt_nxv4f32_imm:1236; CHECK: # %bb.0:1237; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1238; CHECK-NEXT: vslidedown.vi v8, v8, 21239; CHECK-NEXT: vfmv.f.s fa0, v81240; CHECK-NEXT: ret1241 %r = extractelement <vscale x 4 x float> %v, i32 21242 ret float %r1243}1244 1245define float @extractelt_nxv4f32_idx(<vscale x 4 x float> %v, i32 zeroext %idx) {1246; CHECK-LABEL: extractelt_nxv4f32_idx:1247; CHECK: # %bb.0:1248; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, ma1249; CHECK-NEXT: vslidedown.vx v8, v8, a01250; CHECK-NEXT: vfmv.f.s fa0, v81251; CHECK-NEXT: ret1252 %r = extractelement <vscale x 4 x float> %v, i32 %idx1253 ret float %r1254}1255 1256define float @extractelt_nxv8f32_0(<vscale x 8 x float> %v) {1257; CHECK-LABEL: extractelt_nxv8f32_0:1258; CHECK: # %bb.0:1259; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1260; CHECK-NEXT: vfmv.f.s fa0, v81261; CHECK-NEXT: ret1262 %r = extractelement <vscale x 8 x float> %v, i32 01263 ret float %r1264}1265 1266define float @extractelt_nxv8f32_imm(<vscale x 8 x float> %v) {1267; CHECK-LABEL: extractelt_nxv8f32_imm:1268; CHECK: # %bb.0:1269; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1270; CHECK-NEXT: vslidedown.vi v8, v8, 21271; CHECK-NEXT: vfmv.f.s fa0, v81272; CHECK-NEXT: ret1273 %r = extractelement <vscale x 8 x float> %v, i32 21274 ret float %r1275}1276 1277define float @extractelt_nxv8f32_idx(<vscale x 8 x float> %v, i32 zeroext %idx) {1278; CHECK-LABEL: extractelt_nxv8f32_idx:1279; CHECK: # %bb.0:1280; CHECK-NEXT: vsetivli zero, 1, e32, m4, ta, ma1281; CHECK-NEXT: vslidedown.vx v8, v8, a01282; CHECK-NEXT: vfmv.f.s fa0, v81283; CHECK-NEXT: ret1284 %r = extractelement <vscale x 8 x float> %v, i32 %idx1285 ret float %r1286}1287 1288define float @extractelt_nxv16f32_0(<vscale x 16 x float> %v) {1289; CHECK-LABEL: extractelt_nxv16f32_0:1290; CHECK: # %bb.0:1291; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1292; CHECK-NEXT: vfmv.f.s fa0, v81293; CHECK-NEXT: ret1294 %r = extractelement <vscale x 16 x float> %v, i32 01295 ret float %r1296}1297 1298define float @extractelt_nxv16f32_imm(<vscale x 16 x float> %v) {1299; CHECK-LABEL: extractelt_nxv16f32_imm:1300; CHECK: # %bb.0:1301; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1302; CHECK-NEXT: vslidedown.vi v8, v8, 21303; CHECK-NEXT: vfmv.f.s fa0, v81304; CHECK-NEXT: ret1305 %r = extractelement <vscale x 16 x float> %v, i32 21306 ret float %r1307}1308 1309define float @extractelt_nxv16f32_idx(<vscale x 16 x float> %v, i32 zeroext %idx) {1310; CHECK-LABEL: extractelt_nxv16f32_idx:1311; CHECK: # %bb.0:1312; CHECK-NEXT: vsetivli zero, 1, e32, m8, ta, ma1313; CHECK-NEXT: vslidedown.vx v8, v8, a01314; CHECK-NEXT: vfmv.f.s fa0, v81315; CHECK-NEXT: ret1316 %r = extractelement <vscale x 16 x float> %v, i32 %idx1317 ret float %r1318}1319 1320define double @extractelt_nxv1f64_0(<vscale x 1 x double> %v) {1321; CHECK-LABEL: extractelt_nxv1f64_0:1322; CHECK: # %bb.0:1323; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1324; CHECK-NEXT: vfmv.f.s fa0, v81325; CHECK-NEXT: ret1326 %r = extractelement <vscale x 1 x double> %v, i32 01327 ret double %r1328}1329 1330define double @extractelt_nxv1f64_imm(<vscale x 1 x double> %v) {1331; CHECK-LABEL: extractelt_nxv1f64_imm:1332; CHECK: # %bb.0:1333; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1334; CHECK-NEXT: vslidedown.vi v8, v8, 21335; CHECK-NEXT: vfmv.f.s fa0, v81336; CHECK-NEXT: ret1337 %r = extractelement <vscale x 1 x double> %v, i32 21338 ret double %r1339}1340 1341define double @extractelt_nxv1f64_idx(<vscale x 1 x double> %v, i32 zeroext %idx) {1342; CHECK-LABEL: extractelt_nxv1f64_idx:1343; CHECK: # %bb.0:1344; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1345; CHECK-NEXT: vslidedown.vx v8, v8, a01346; CHECK-NEXT: vfmv.f.s fa0, v81347; CHECK-NEXT: ret1348 %r = extractelement <vscale x 1 x double> %v, i32 %idx1349 ret double %r1350}1351 1352define double @extractelt_nxv2f64_0(<vscale x 2 x double> %v) {1353; CHECK-LABEL: extractelt_nxv2f64_0:1354; CHECK: # %bb.0:1355; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1356; CHECK-NEXT: vfmv.f.s fa0, v81357; CHECK-NEXT: ret1358 %r = extractelement <vscale x 2 x double> %v, i32 01359 ret double %r1360}1361 1362define double @extractelt_nxv2f64_imm(<vscale x 2 x double> %v) {1363; CHECK-LABEL: extractelt_nxv2f64_imm:1364; CHECK: # %bb.0:1365; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, ma1366; CHECK-NEXT: vslidedown.vi v8, v8, 21367; CHECK-NEXT: vfmv.f.s fa0, v81368; CHECK-NEXT: ret1369 %r = extractelement <vscale x 2 x double> %v, i32 21370 ret double %r1371}1372 1373define double @extractelt_nxv2f64_idx(<vscale x 2 x double> %v, i32 zeroext %idx) {1374; CHECK-LABEL: extractelt_nxv2f64_idx:1375; CHECK: # %bb.0:1376; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, ma1377; CHECK-NEXT: vslidedown.vx v8, v8, a01378; CHECK-NEXT: vfmv.f.s fa0, v81379; CHECK-NEXT: ret1380 %r = extractelement <vscale x 2 x double> %v, i32 %idx1381 ret double %r1382}1383 1384define double @extractelt_nxv4f64_0(<vscale x 4 x double> %v) {1385; CHECK-LABEL: extractelt_nxv4f64_0:1386; CHECK: # %bb.0:1387; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1388; CHECK-NEXT: vfmv.f.s fa0, v81389; CHECK-NEXT: ret1390 %r = extractelement <vscale x 4 x double> %v, i32 01391 ret double %r1392}1393 1394define double @extractelt_nxv4f64_imm(<vscale x 4 x double> %v) {1395; CHECK-LABEL: extractelt_nxv4f64_imm:1396; CHECK: # %bb.0:1397; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, ma1398; CHECK-NEXT: vslidedown.vi v8, v8, 21399; CHECK-NEXT: vfmv.f.s fa0, v81400; CHECK-NEXT: ret1401 %r = extractelement <vscale x 4 x double> %v, i32 21402 ret double %r1403}1404 1405define double @extractelt_nxv4f64_idx(<vscale x 4 x double> %v, i32 zeroext %idx) {1406; CHECK-LABEL: extractelt_nxv4f64_idx:1407; CHECK: # %bb.0:1408; CHECK-NEXT: vsetivli zero, 1, e64, m4, ta, ma1409; CHECK-NEXT: vslidedown.vx v8, v8, a01410; CHECK-NEXT: vfmv.f.s fa0, v81411; CHECK-NEXT: ret1412 %r = extractelement <vscale x 4 x double> %v, i32 %idx1413 ret double %r1414}1415 1416define double @extractelt_nxv8f64_0(<vscale x 8 x double> %v) {1417; CHECK-LABEL: extractelt_nxv8f64_0:1418; CHECK: # %bb.0:1419; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1420; CHECK-NEXT: vfmv.f.s fa0, v81421; CHECK-NEXT: ret1422 %r = extractelement <vscale x 8 x double> %v, i32 01423 ret double %r1424}1425 1426define double @extractelt_nxv8f64_imm(<vscale x 8 x double> %v) {1427; CHECK-LABEL: extractelt_nxv8f64_imm:1428; CHECK: # %bb.0:1429; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, ma1430; CHECK-NEXT: vslidedown.vi v8, v8, 21431; CHECK-NEXT: vfmv.f.s fa0, v81432; CHECK-NEXT: ret1433 %r = extractelement <vscale x 8 x double> %v, i32 21434 ret double %r1435}1436 1437define double @extractelt_nxv8f64_idx(<vscale x 8 x double> %v, i32 zeroext %idx) {1438; CHECK-LABEL: extractelt_nxv8f64_idx:1439; CHECK: # %bb.0:1440; CHECK-NEXT: vsetivli zero, 1, e64, m8, ta, ma1441; CHECK-NEXT: vslidedown.vx v8, v8, a01442; CHECK-NEXT: vfmv.f.s fa0, v81443; CHECK-NEXT: ret1444 %r = extractelement <vscale x 8 x double> %v, i32 %idx1445 ret double %r1446}1447 1448define void @store_extractelt_nxv8f64(ptr %x, ptr %p) {1449; CHECK-LABEL: store_extractelt_nxv8f64:1450; CHECK: # %bb.0:1451; CHECK-NEXT: vl1re64.v v8, (a0)1452; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1453; CHECK-NEXT: vslidedown.vi v8, v8, 11454; CHECK-NEXT: vse64.v v8, (a1)1455; CHECK-NEXT: ret1456 %a = load <vscale x 8 x double>, ptr %x1457 %b = extractelement <vscale x 8 x double> %a, i64 11458 store double %b, ptr %p1459 ret void1460}1461 1462define void @store_vfmv_f_s_nxv8f64(ptr %x, ptr %p) {1463; CHECK-LABEL: store_vfmv_f_s_nxv8f64:1464; CHECK: # %bb.0:1465; CHECK-NEXT: vl1re64.v v8, (a0)1466; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1467; CHECK-NEXT: vse64.v v8, (a1)1468; CHECK-NEXT: ret1469 %a = load <vscale x 8 x double>, ptr %x1470 %b = call double @llvm.riscv.vfmv.f.s.nxv8f64(<vscale x 8 x double> %a)1471 store double %b, ptr %p1472 ret void1473}1474 1475define float @extractelt_fadd_nxv4f32_splat(<vscale x 4 x float> %x) {1476; CHECK-LABEL: extractelt_fadd_nxv4f32_splat:1477; CHECK: # %bb.0:1478; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1479; CHECK-NEXT: vslidedown.vi v8, v8, 21480; CHECK-NEXT: lui a0, 2631681481; CHECK-NEXT: vfmv.f.s fa5, v81482; CHECK-NEXT: fmv.w.x fa4, a01483; CHECK-NEXT: fadd.s fa0, fa5, fa41484; CHECK-NEXT: ret1485 %bo = fadd <vscale x 4 x float> %x, splat (float 3.0)1486 %ext = extractelement <vscale x 4 x float> %bo, i32 21487 ret float %ext1488}1489 1490define float @extractelt_fsub_nxv4f32_splat(<vscale x 4 x float> %x) {1491; CHECK-LABEL: extractelt_fsub_nxv4f32_splat:1492; CHECK: # %bb.0:1493; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1494; CHECK-NEXT: vslidedown.vi v8, v8, 11495; CHECK-NEXT: lui a0, 2631681496; CHECK-NEXT: vfmv.f.s fa5, v81497; CHECK-NEXT: fmv.w.x fa4, a01498; CHECK-NEXT: fsub.s fa0, fa4, fa51499; CHECK-NEXT: ret1500 %bo = fsub <vscale x 4 x float> splat (float 3.0), %x1501 %ext = extractelement <vscale x 4 x float> %bo, i32 11502 ret float %ext1503}1504 1505define float @extractelt_fmul_nxv4f32_splat(<vscale x 4 x float> %x) {1506; CHECK-LABEL: extractelt_fmul_nxv4f32_splat:1507; CHECK: # %bb.0:1508; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1509; CHECK-NEXT: vslidedown.vi v8, v8, 31510; CHECK-NEXT: lui a0, 2631681511; CHECK-NEXT: vfmv.f.s fa5, v81512; CHECK-NEXT: fmv.w.x fa4, a01513; CHECK-NEXT: fmul.s fa0, fa5, fa41514; CHECK-NEXT: ret1515 %bo = fmul <vscale x 4 x float> %x, splat (float 3.0)1516 %ext = extractelement <vscale x 4 x float> %bo, i32 31517 ret float %ext1518}1519 1520define float @extractelt_fdiv_nxv4f32_splat(<vscale x 4 x float> %x) {1521; CHECK-LABEL: extractelt_fdiv_nxv4f32_splat:1522; CHECK: # %bb.0:1523; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma1524; CHECK-NEXT: vfmv.f.s fa5, v81525; CHECK-NEXT: lui a0, 2631681526; CHECK-NEXT: fmv.w.x fa4, a01527; CHECK-NEXT: fdiv.s fa0, fa5, fa41528; CHECK-NEXT: ret1529 %bo = fdiv <vscale x 4 x float> %x, splat (float 3.0)1530 %ext = extractelement <vscale x 4 x float> %bo, i32 01531 ret float %ext1532}1533 1534define double @extractelt_nxv16f64_0(<vscale x 16 x double> %v) {1535; CHECK-LABEL: extractelt_nxv16f64_0:1536; CHECK: # %bb.0:1537; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma1538; CHECK-NEXT: vfmv.f.s fa0, v81539; CHECK-NEXT: ret1540 %r = extractelement <vscale x 16 x double> %v, i32 01541 ret double %r1542}1543 1544define double @extractelt_nxv16f64_neg1(<vscale x 16 x double> %v) {1545; RV32-LABEL: extractelt_nxv16f64_neg1:1546; RV32: # %bb.0:1547; RV32-NEXT: addi sp, sp, -801548; RV32-NEXT: .cfi_def_cfa_offset 801549; RV32-NEXT: sw ra, 76(sp) # 4-byte Folded Spill1550; RV32-NEXT: sw s0, 72(sp) # 4-byte Folded Spill1551; RV32-NEXT: .cfi_offset ra, -41552; RV32-NEXT: .cfi_offset s0, -81553; RV32-NEXT: addi s0, sp, 801554; RV32-NEXT: .cfi_def_cfa s0, 01555; RV32-NEXT: csrr a0, vlenb1556; RV32-NEXT: slli a0, a0, 41557; RV32-NEXT: sub sp, sp, a01558; RV32-NEXT: andi sp, sp, -641559; RV32-NEXT: addi a0, sp, 641560; RV32-NEXT: csrr a1, vlenb1561; RV32-NEXT: vs8r.v v8, (a0)1562; RV32-NEXT: slli a2, a1, 31563; RV32-NEXT: slli a1, a1, 41564; RV32-NEXT: add a2, a0, a21565; RV32-NEXT: vs8r.v v16, (a2)1566; RV32-NEXT: add a0, a1, a01567; RV32-NEXT: fld fa0, -8(a0)1568; RV32-NEXT: addi sp, s0, -801569; RV32-NEXT: .cfi_def_cfa sp, 801570; RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload1571; RV32-NEXT: lw s0, 72(sp) # 4-byte Folded Reload1572; RV32-NEXT: .cfi_restore ra1573; RV32-NEXT: .cfi_restore s01574; RV32-NEXT: addi sp, sp, 801575; RV32-NEXT: .cfi_def_cfa_offset 01576; RV32-NEXT: ret1577;1578; RV64-LABEL: extractelt_nxv16f64_neg1:1579; RV64: # %bb.0:1580; RV64-NEXT: addi sp, sp, -801581; RV64-NEXT: .cfi_def_cfa_offset 801582; RV64-NEXT: sd ra, 72(sp) # 8-byte Folded Spill1583; RV64-NEXT: sd s0, 64(sp) # 8-byte Folded Spill1584; RV64-NEXT: .cfi_offset ra, -81585; RV64-NEXT: .cfi_offset s0, -161586; RV64-NEXT: addi s0, sp, 801587; RV64-NEXT: .cfi_def_cfa s0, 01588; RV64-NEXT: csrr a0, vlenb1589; RV64-NEXT: slli a0, a0, 41590; RV64-NEXT: sub sp, sp, a01591; RV64-NEXT: andi sp, sp, -641592; RV64-NEXT: addi a0, sp, 641593; RV64-NEXT: csrr a2, vlenb1594; RV64-NEXT: li a1, -11595; RV64-NEXT: vs8r.v v8, (a0)1596; RV64-NEXT: slli a3, a2, 31597; RV64-NEXT: srli a1, a1, 321598; RV64-NEXT: slli a2, a2, 11599; RV64-NEXT: add a3, a0, a31600; RV64-NEXT: addi a2, a2, -11601; RV64-NEXT: vs8r.v v16, (a3)1602; RV64-NEXT: bltu a2, a1, .LBB70_21603; RV64-NEXT: # %bb.1:1604; RV64-NEXT: mv a2, a11605; RV64-NEXT: .LBB70_2:1606; RV64-NEXT: slli a2, a2, 31607; RV64-NEXT: add a0, a0, a21608; RV64-NEXT: fld fa0, 0(a0)1609; RV64-NEXT: addi sp, s0, -801610; RV64-NEXT: .cfi_def_cfa sp, 801611; RV64-NEXT: ld ra, 72(sp) # 8-byte Folded Reload1612; RV64-NEXT: ld s0, 64(sp) # 8-byte Folded Reload1613; RV64-NEXT: .cfi_restore ra1614; RV64-NEXT: .cfi_restore s01615; RV64-NEXT: addi sp, sp, 801616; RV64-NEXT: .cfi_def_cfa_offset 01617; RV64-NEXT: ret1618 %r = extractelement <vscale x 16 x double> %v, i32 -11619 ret double %r1620}1621 1622define double @extractelt_nxv16f64_imm(<vscale x 16 x double> %v) {1623; CHECK-LABEL: extractelt_nxv16f64_imm:1624; CHECK: # %bb.0:1625; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, ma1626; CHECK-NEXT: vslidedown.vi v8, v8, 21627; CHECK-NEXT: vfmv.f.s fa0, v81628; CHECK-NEXT: ret1629 %r = extractelement <vscale x 16 x double> %v, i32 21630 ret double %r1631}1632 1633define double @extractelt_nxv16f64_idx(<vscale x 16 x double> %v, i32 zeroext %idx) {1634; RV32-LABEL: extractelt_nxv16f64_idx:1635; RV32: # %bb.0:1636; RV32-NEXT: csrr a1, vlenb1637; RV32-NEXT: slli a2, a1, 11638; RV32-NEXT: addi a2, a2, -11639; RV32-NEXT: bltu a0, a2, .LBB72_21640; RV32-NEXT: # %bb.1:1641; RV32-NEXT: mv a0, a21642; RV32-NEXT: .LBB72_2:1643; RV32-NEXT: addi sp, sp, -801644; RV32-NEXT: .cfi_def_cfa_offset 801645; RV32-NEXT: sw ra, 76(sp) # 4-byte Folded Spill1646; RV32-NEXT: sw s0, 72(sp) # 4-byte Folded Spill1647; RV32-NEXT: .cfi_offset ra, -41648; RV32-NEXT: .cfi_offset s0, -81649; RV32-NEXT: addi s0, sp, 801650; RV32-NEXT: .cfi_def_cfa s0, 01651; RV32-NEXT: csrr a2, vlenb1652; RV32-NEXT: slli a2, a2, 41653; RV32-NEXT: sub sp, sp, a21654; RV32-NEXT: andi sp, sp, -641655; RV32-NEXT: slli a0, a0, 31656; RV32-NEXT: addi a2, sp, 641657; RV32-NEXT: slli a1, a1, 31658; RV32-NEXT: add a0, a2, a01659; RV32-NEXT: vs8r.v v8, (a2)1660; RV32-NEXT: add a1, a2, a11661; RV32-NEXT: vs8r.v v16, (a1)1662; RV32-NEXT: fld fa0, 0(a0)1663; RV32-NEXT: addi sp, s0, -801664; RV32-NEXT: .cfi_def_cfa sp, 801665; RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload1666; RV32-NEXT: lw s0, 72(sp) # 4-byte Folded Reload1667; RV32-NEXT: .cfi_restore ra1668; RV32-NEXT: .cfi_restore s01669; RV32-NEXT: addi sp, sp, 801670; RV32-NEXT: .cfi_def_cfa_offset 01671; RV32-NEXT: ret1672;1673; RV64-LABEL: extractelt_nxv16f64_idx:1674; RV64: # %bb.0:1675; RV64-NEXT: csrr a1, vlenb1676; RV64-NEXT: slli a2, a1, 11677; RV64-NEXT: addi a2, a2, -11678; RV64-NEXT: bltu a0, a2, .LBB72_21679; RV64-NEXT: # %bb.1:1680; RV64-NEXT: mv a0, a21681; RV64-NEXT: .LBB72_2:1682; RV64-NEXT: addi sp, sp, -801683; RV64-NEXT: .cfi_def_cfa_offset 801684; RV64-NEXT: sd ra, 72(sp) # 8-byte Folded Spill1685; RV64-NEXT: sd s0, 64(sp) # 8-byte Folded Spill1686; RV64-NEXT: .cfi_offset ra, -81687; RV64-NEXT: .cfi_offset s0, -161688; RV64-NEXT: addi s0, sp, 801689; RV64-NEXT: .cfi_def_cfa s0, 01690; RV64-NEXT: csrr a2, vlenb1691; RV64-NEXT: slli a2, a2, 41692; RV64-NEXT: sub sp, sp, a21693; RV64-NEXT: andi sp, sp, -641694; RV64-NEXT: slli a0, a0, 31695; RV64-NEXT: addi a2, sp, 641696; RV64-NEXT: slli a1, a1, 31697; RV64-NEXT: add a0, a2, a01698; RV64-NEXT: vs8r.v v8, (a2)1699; RV64-NEXT: add a1, a2, a11700; RV64-NEXT: vs8r.v v16, (a1)1701; RV64-NEXT: fld fa0, 0(a0)1702; RV64-NEXT: addi sp, s0, -801703; RV64-NEXT: .cfi_def_cfa sp, 801704; RV64-NEXT: ld ra, 72(sp) # 8-byte Folded Reload1705; RV64-NEXT: ld s0, 64(sp) # 8-byte Folded Reload1706; RV64-NEXT: .cfi_restore ra1707; RV64-NEXT: .cfi_restore s01708; RV64-NEXT: addi sp, sp, 801709; RV64-NEXT: .cfi_def_cfa_offset 01710; RV64-NEXT: ret1711 %r = extractelement <vscale x 16 x double> %v, i32 %idx1712 ret double %r1713}1714