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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+d,+zvfh,+zfbfmin,+zvfbfmin -verify-machineinstrs \3; RUN: -target-abi=ilp32d < %s | FileCheck %s --check-prefixes=CHECK,ZVFH,RV324; RUN: llc -mtriple=riscv64 -mattr=+v,+d,+zvfh,+zfbfmin,+zvfbfmin -verify-machineinstrs \5; RUN: -target-abi=lp64d < %s | FileCheck %s --check-prefixes=CHECK,ZVFH,RV646; RUN: llc -mtriple=riscv32 -mattr=+v,+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin -verify-machineinstrs \7; RUN: -target-abi=ilp32d < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,RV328; RUN: llc -mtriple=riscv64 -mattr=+v,+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin -verify-machineinstrs \9; RUN: -target-abi=lp64d < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,RV6410; RUN: llc -mtriple=riscv32 -mattr=+zve32f,+zvl128b,+d,+zvfh,+zfbfmin,+zvfbfmin \11; RUN: -verify-machineinstrs -target-abi=ilp32d < %s | FileCheck %s \12; RUN: --check-prefixes=ELEN32,RV32ELEN3213; RUN: llc -mtriple=riscv64 -mattr=+zve32f,+zvl128b,+d,+zvfh,+zfbfmin,+zvfbfmin \14; RUN: -verify-machineinstrs -target-abi=lp64d < %s | FileCheck %s \15; RUN: --check-prefixes=ELEN32,RV64ELEN3216 17define <32 x i1> @bitcast_v4i8_v32i1(<4 x i8> %a, <32 x i1> %b) {18; CHECK-LABEL: bitcast_v4i8_v32i1:19; CHECK: # %bb.0:20; CHECK-NEXT: li a0, 3221; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma22; CHECK-NEXT: vmxor.mm v0, v0, v823; CHECK-NEXT: ret24;25; ELEN32-LABEL: bitcast_v4i8_v32i1:26; ELEN32: # %bb.0:27; ELEN32-NEXT: li a0, 3228; ELEN32-NEXT: vsetvli zero, a0, e8, m2, ta, ma29; ELEN32-NEXT: vmxor.mm v0, v0, v830; ELEN32-NEXT: ret31 %c = bitcast <4 x i8> %a to <32 x i1>32 %d = xor <32 x i1> %b, %c33 ret <32 x i1> %d34}35 36define i8 @bitcast_v1i8_i8(<1 x i8> %a) {37; CHECK-LABEL: bitcast_v1i8_i8:38; CHECK: # %bb.0:39; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma40; CHECK-NEXT: vmv.x.s a0, v841; CHECK-NEXT: ret42;43; ELEN32-LABEL: bitcast_v1i8_i8:44; ELEN32: # %bb.0:45; ELEN32-NEXT: vsetivli zero, 1, e8, m1, ta, ma46; ELEN32-NEXT: vmv.x.s a0, v847; ELEN32-NEXT: ret48 %b = bitcast <1 x i8> %a to i849 ret i8 %b50}51 52define i16 @bitcast_v2i8_i16(<2 x i8> %a) {53; CHECK-LABEL: bitcast_v2i8_i16:54; CHECK: # %bb.0:55; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma56; CHECK-NEXT: vmv.x.s a0, v857; CHECK-NEXT: ret58;59; ELEN32-LABEL: bitcast_v2i8_i16:60; ELEN32: # %bb.0:61; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma62; ELEN32-NEXT: vmv.x.s a0, v863; ELEN32-NEXT: ret64 %b = bitcast <2 x i8> %a to i1665 ret i16 %b66}67 68define i16 @bitcast_v1i16_i16(<1 x i16> %a) {69; CHECK-LABEL: bitcast_v1i16_i16:70; CHECK: # %bb.0:71; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma72; CHECK-NEXT: vmv.x.s a0, v873; CHECK-NEXT: ret74;75; ELEN32-LABEL: bitcast_v1i16_i16:76; ELEN32: # %bb.0:77; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma78; ELEN32-NEXT: vmv.x.s a0, v879; ELEN32-NEXT: ret80 %b = bitcast <1 x i16> %a to i1681 ret i16 %b82}83 84define i32 @bitcast_v4i8_i32(<4 x i8> %a) {85; CHECK-LABEL: bitcast_v4i8_i32:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma88; CHECK-NEXT: vmv.x.s a0, v889; CHECK-NEXT: ret90;91; ELEN32-LABEL: bitcast_v4i8_i32:92; ELEN32: # %bb.0:93; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma94; ELEN32-NEXT: vmv.x.s a0, v895; ELEN32-NEXT: ret96 %b = bitcast <4 x i8> %a to i3297 ret i32 %b98}99 100define i32 @bitcast_v2i16_i32(<2 x i16> %a) {101; CHECK-LABEL: bitcast_v2i16_i32:102; CHECK: # %bb.0:103; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma104; CHECK-NEXT: vmv.x.s a0, v8105; CHECK-NEXT: ret106;107; ELEN32-LABEL: bitcast_v2i16_i32:108; ELEN32: # %bb.0:109; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma110; ELEN32-NEXT: vmv.x.s a0, v8111; ELEN32-NEXT: ret112 %b = bitcast <2 x i16> %a to i32113 ret i32 %b114}115 116define i32 @bitcast_v1i32_i32(<1 x i32> %a) {117; CHECK-LABEL: bitcast_v1i32_i32:118; CHECK: # %bb.0:119; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma120; CHECK-NEXT: vmv.x.s a0, v8121; CHECK-NEXT: ret122;123; ELEN32-LABEL: bitcast_v1i32_i32:124; ELEN32: # %bb.0:125; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma126; ELEN32-NEXT: vmv.x.s a0, v8127; ELEN32-NEXT: ret128 %b = bitcast <1 x i32> %a to i32129 ret i32 %b130}131 132define i64 @bitcast_v8i8_i64(<8 x i8> %a) {133; RV32-LABEL: bitcast_v8i8_i64:134; RV32: # %bb.0:135; RV32-NEXT: li a0, 32136; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma137; RV32-NEXT: vsrl.vx v9, v8, a0138; RV32-NEXT: vmv.x.s a1, v9139; RV32-NEXT: vmv.x.s a0, v8140; RV32-NEXT: ret141;142; RV64-LABEL: bitcast_v8i8_i64:143; RV64: # %bb.0:144; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma145; RV64-NEXT: vmv.x.s a0, v8146; RV64-NEXT: ret147;148; RV32ELEN32-LABEL: bitcast_v8i8_i64:149; RV32ELEN32: # %bb.0:150; RV32ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma151; RV32ELEN32-NEXT: vmv.x.s a0, v8152; RV32ELEN32-NEXT: vslidedown.vi v8, v8, 1153; RV32ELEN32-NEXT: vmv.x.s a1, v8154; RV32ELEN32-NEXT: ret155;156; RV64ELEN32-LABEL: bitcast_v8i8_i64:157; RV64ELEN32: # %bb.0:158; RV64ELEN32-NEXT: addi sp, sp, -16159; RV64ELEN32-NEXT: .cfi_def_cfa_offset 16160; RV64ELEN32-NEXT: addi a0, sp, 8161; RV64ELEN32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma162; RV64ELEN32-NEXT: vse8.v v8, (a0)163; RV64ELEN32-NEXT: ld a0, 8(sp)164; RV64ELEN32-NEXT: addi sp, sp, 16165; RV64ELEN32-NEXT: .cfi_def_cfa_offset 0166; RV64ELEN32-NEXT: ret167 %b = bitcast <8 x i8> %a to i64168 ret i64 %b169}170 171define i64 @bitcast_v4i16_i64(<4 x i16> %a) {172; RV32-LABEL: bitcast_v4i16_i64:173; RV32: # %bb.0:174; RV32-NEXT: li a0, 32175; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma176; RV32-NEXT: vsrl.vx v9, v8, a0177; RV32-NEXT: vmv.x.s a1, v9178; RV32-NEXT: vmv.x.s a0, v8179; RV32-NEXT: ret180;181; RV64-LABEL: bitcast_v4i16_i64:182; RV64: # %bb.0:183; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma184; RV64-NEXT: vmv.x.s a0, v8185; RV64-NEXT: ret186;187; RV32ELEN32-LABEL: bitcast_v4i16_i64:188; RV32ELEN32: # %bb.0:189; RV32ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma190; RV32ELEN32-NEXT: vmv.x.s a0, v8191; RV32ELEN32-NEXT: vslidedown.vi v8, v8, 1192; RV32ELEN32-NEXT: vmv.x.s a1, v8193; RV32ELEN32-NEXT: ret194;195; RV64ELEN32-LABEL: bitcast_v4i16_i64:196; RV64ELEN32: # %bb.0:197; RV64ELEN32-NEXT: addi sp, sp, -16198; RV64ELEN32-NEXT: .cfi_def_cfa_offset 16199; RV64ELEN32-NEXT: addi a0, sp, 8200; RV64ELEN32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma201; RV64ELEN32-NEXT: vse16.v v8, (a0)202; RV64ELEN32-NEXT: ld a0, 8(sp)203; RV64ELEN32-NEXT: addi sp, sp, 16204; RV64ELEN32-NEXT: .cfi_def_cfa_offset 0205; RV64ELEN32-NEXT: ret206 %b = bitcast <4 x i16> %a to i64207 ret i64 %b208}209 210define i64 @bitcast_v2i32_i64(<2 x i32> %a) {211; RV32-LABEL: bitcast_v2i32_i64:212; RV32: # %bb.0:213; RV32-NEXT: li a0, 32214; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma215; RV32-NEXT: vsrl.vx v9, v8, a0216; RV32-NEXT: vmv.x.s a1, v9217; RV32-NEXT: vmv.x.s a0, v8218; RV32-NEXT: ret219;220; RV64-LABEL: bitcast_v2i32_i64:221; RV64: # %bb.0:222; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma223; RV64-NEXT: vmv.x.s a0, v8224; RV64-NEXT: ret225;226; RV32ELEN32-LABEL: bitcast_v2i32_i64:227; RV32ELEN32: # %bb.0:228; RV32ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma229; RV32ELEN32-NEXT: vmv.x.s a0, v8230; RV32ELEN32-NEXT: vslidedown.vi v8, v8, 1231; RV32ELEN32-NEXT: vmv.x.s a1, v8232; RV32ELEN32-NEXT: ret233;234; RV64ELEN32-LABEL: bitcast_v2i32_i64:235; RV64ELEN32: # %bb.0:236; RV64ELEN32-NEXT: addi sp, sp, -16237; RV64ELEN32-NEXT: .cfi_def_cfa_offset 16238; RV64ELEN32-NEXT: addi a0, sp, 8239; RV64ELEN32-NEXT: vsetivli zero, 2, e32, m1, ta, ma240; RV64ELEN32-NEXT: vse32.v v8, (a0)241; RV64ELEN32-NEXT: ld a0, 8(sp)242; RV64ELEN32-NEXT: addi sp, sp, 16243; RV64ELEN32-NEXT: .cfi_def_cfa_offset 0244; RV64ELEN32-NEXT: ret245 %b = bitcast <2 x i32> %a to i64246 ret i64 %b247}248 249define i64 @bitcast_v1i64_i64(<1 x i64> %a) {250; RV32-LABEL: bitcast_v1i64_i64:251; RV32: # %bb.0:252; RV32-NEXT: li a0, 32253; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, ma254; RV32-NEXT: vsrl.vx v9, v8, a0255; RV32-NEXT: vmv.x.s a1, v9256; RV32-NEXT: vmv.x.s a0, v8257; RV32-NEXT: ret258;259; RV64-LABEL: bitcast_v1i64_i64:260; RV64: # %bb.0:261; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma262; RV64-NEXT: vmv.x.s a0, v8263; RV64-NEXT: ret264;265; ELEN32-LABEL: bitcast_v1i64_i64:266; ELEN32: # %bb.0:267; ELEN32-NEXT: ret268 %b = bitcast <1 x i64> %a to i64269 ret i64 %b270}271 272define bfloat @bitcast_v2i8_bf16(<2 x i8> %a) {273; CHECK-LABEL: bitcast_v2i8_bf16:274; CHECK: # %bb.0:275; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma276; CHECK-NEXT: vmv.x.s a0, v8277; CHECK-NEXT: fmv.h.x fa0, a0278; CHECK-NEXT: ret279;280; ELEN32-LABEL: bitcast_v2i8_bf16:281; ELEN32: # %bb.0:282; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma283; ELEN32-NEXT: vmv.x.s a0, v8284; ELEN32-NEXT: fmv.h.x fa0, a0285; ELEN32-NEXT: ret286 %b = bitcast <2 x i8> %a to bfloat287 ret bfloat %b288}289 290define bfloat @bitcast_v1i16_bf16(<1 x i16> %a) {291; CHECK-LABEL: bitcast_v1i16_bf16:292; CHECK: # %bb.0:293; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma294; CHECK-NEXT: vmv.x.s a0, v8295; CHECK-NEXT: fmv.h.x fa0, a0296; CHECK-NEXT: ret297;298; ELEN32-LABEL: bitcast_v1i16_bf16:299; ELEN32: # %bb.0:300; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma301; ELEN32-NEXT: vmv.x.s a0, v8302; ELEN32-NEXT: fmv.h.x fa0, a0303; ELEN32-NEXT: ret304 %b = bitcast <1 x i16> %a to bfloat305 ret bfloat %b306}307 308define bfloat @bitcast_v1bf16_bf16(<1 x bfloat> %a) {309; CHECK-LABEL: bitcast_v1bf16_bf16:310; CHECK: # %bb.0:311; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma312; CHECK-NEXT: vmv.x.s a0, v8313; CHECK-NEXT: fmv.h.x fa0, a0314; CHECK-NEXT: ret315;316; ELEN32-LABEL: bitcast_v1bf16_bf16:317; ELEN32: # %bb.0:318; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma319; ELEN32-NEXT: vmv.x.s a0, v8320; ELEN32-NEXT: fmv.h.x fa0, a0321; ELEN32-NEXT: ret322 %b = bitcast <1 x bfloat> %a to bfloat323 ret bfloat %b324}325 326define <1 x bfloat> @bitcast_bf16_v1bf16(bfloat %a) {327; CHECK-LABEL: bitcast_bf16_v1bf16:328; CHECK: # %bb.0:329; CHECK-NEXT: fmv.x.h a0, fa0330; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma331; CHECK-NEXT: vmv.s.x v8, a0332; CHECK-NEXT: ret333;334; ELEN32-LABEL: bitcast_bf16_v1bf16:335; ELEN32: # %bb.0:336; ELEN32-NEXT: fmv.x.h a0, fa0337; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma338; ELEN32-NEXT: vmv.s.x v8, a0339; ELEN32-NEXT: ret340 %b = bitcast bfloat %a to <1 x bfloat>341 ret <1 x bfloat> %b342}343 344define half @bitcast_v2i8_f16(<2 x i8> %a) {345; ZVFH-LABEL: bitcast_v2i8_f16:346; ZVFH: # %bb.0:347; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma348; ZVFH-NEXT: vfmv.f.s fa0, v8349; ZVFH-NEXT: ret350;351; ZVFHMIN-LABEL: bitcast_v2i8_f16:352; ZVFHMIN: # %bb.0:353; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma354; ZVFHMIN-NEXT: vmv.x.s a0, v8355; ZVFHMIN-NEXT: fmv.h.x fa0, a0356; ZVFHMIN-NEXT: ret357;358; ELEN32-LABEL: bitcast_v2i8_f16:359; ELEN32: # %bb.0:360; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma361; ELEN32-NEXT: vfmv.f.s fa0, v8362; ELEN32-NEXT: ret363 %b = bitcast <2 x i8> %a to half364 ret half %b365}366 367define half @bitcast_v1i16_f16(<1 x i16> %a) {368; ZVFH-LABEL: bitcast_v1i16_f16:369; ZVFH: # %bb.0:370; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma371; ZVFH-NEXT: vfmv.f.s fa0, v8372; ZVFH-NEXT: ret373;374; ZVFHMIN-LABEL: bitcast_v1i16_f16:375; ZVFHMIN: # %bb.0:376; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma377; ZVFHMIN-NEXT: vmv.x.s a0, v8378; ZVFHMIN-NEXT: fmv.h.x fa0, a0379; ZVFHMIN-NEXT: ret380;381; ELEN32-LABEL: bitcast_v1i16_f16:382; ELEN32: # %bb.0:383; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma384; ELEN32-NEXT: vfmv.f.s fa0, v8385; ELEN32-NEXT: ret386 %b = bitcast <1 x i16> %a to half387 ret half %b388}389 390define half @bitcast_v1f16_f16(<1 x half> %a) {391; ZVFH-LABEL: bitcast_v1f16_f16:392; ZVFH: # %bb.0:393; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma394; ZVFH-NEXT: vfmv.f.s fa0, v8395; ZVFH-NEXT: ret396;397; ZVFHMIN-LABEL: bitcast_v1f16_f16:398; ZVFHMIN: # %bb.0:399; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma400; ZVFHMIN-NEXT: vmv.x.s a0, v8401; ZVFHMIN-NEXT: fmv.h.x fa0, a0402; ZVFHMIN-NEXT: ret403;404; ELEN32-LABEL: bitcast_v1f16_f16:405; ELEN32: # %bb.0:406; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma407; ELEN32-NEXT: vfmv.f.s fa0, v8408; ELEN32-NEXT: ret409 %b = bitcast <1 x half> %a to half410 ret half %b411}412 413define <1 x half> @bitcast_f16_v1f16(half %a) {414; ZVFH-LABEL: bitcast_f16_v1f16:415; ZVFH: # %bb.0:416; ZVFH-NEXT: vsetivli zero, 1, e16, m1, ta, ma417; ZVFH-NEXT: vfmv.s.f v8, fa0418; ZVFH-NEXT: ret419;420; ZVFHMIN-LABEL: bitcast_f16_v1f16:421; ZVFHMIN: # %bb.0:422; ZVFHMIN-NEXT: fmv.x.h a0, fa0423; ZVFHMIN-NEXT: vsetivli zero, 1, e16, m1, ta, ma424; ZVFHMIN-NEXT: vmv.s.x v8, a0425; ZVFHMIN-NEXT: ret426;427; ELEN32-LABEL: bitcast_f16_v1f16:428; ELEN32: # %bb.0:429; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma430; ELEN32-NEXT: vfmv.s.f v8, fa0431; ELEN32-NEXT: ret432 %b = bitcast half %a to <1 x half>433 ret <1 x half> %b434}435 436define float @bitcast_v4i8_f32(<4 x i8> %a) {437; CHECK-LABEL: bitcast_v4i8_f32:438; CHECK: # %bb.0:439; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma440; CHECK-NEXT: vfmv.f.s fa0, v8441; CHECK-NEXT: ret442;443; ELEN32-LABEL: bitcast_v4i8_f32:444; ELEN32: # %bb.0:445; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma446; ELEN32-NEXT: vfmv.f.s fa0, v8447; ELEN32-NEXT: ret448 %b = bitcast <4 x i8> %a to float449 ret float %b450}451 452define float @bitcast_v2i16_f32(<2 x i16> %a) {453; CHECK-LABEL: bitcast_v2i16_f32:454; CHECK: # %bb.0:455; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma456; CHECK-NEXT: vfmv.f.s fa0, v8457; CHECK-NEXT: ret458;459; ELEN32-LABEL: bitcast_v2i16_f32:460; ELEN32: # %bb.0:461; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma462; ELEN32-NEXT: vfmv.f.s fa0, v8463; ELEN32-NEXT: ret464 %b = bitcast <2 x i16> %a to float465 ret float %b466}467 468define float @bitcast_v1i32_f32(<1 x i32> %a) {469; CHECK-LABEL: bitcast_v1i32_f32:470; CHECK: # %bb.0:471; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma472; CHECK-NEXT: vfmv.f.s fa0, v8473; CHECK-NEXT: ret474;475; ELEN32-LABEL: bitcast_v1i32_f32:476; ELEN32: # %bb.0:477; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma478; ELEN32-NEXT: vfmv.f.s fa0, v8479; ELEN32-NEXT: ret480 %b = bitcast <1 x i32> %a to float481 ret float %b482}483 484define double @bitcast_v8i8_f64(<8 x i8> %a) {485; CHECK-LABEL: bitcast_v8i8_f64:486; CHECK: # %bb.0:487; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma488; CHECK-NEXT: vfmv.f.s fa0, v8489; CHECK-NEXT: ret490;491; ELEN32-LABEL: bitcast_v8i8_f64:492; ELEN32: # %bb.0:493; ELEN32-NEXT: addi sp, sp, -16494; ELEN32-NEXT: .cfi_def_cfa_offset 16495; ELEN32-NEXT: addi a0, sp, 8496; ELEN32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma497; ELEN32-NEXT: vse8.v v8, (a0)498; ELEN32-NEXT: fld fa0, 8(sp)499; ELEN32-NEXT: addi sp, sp, 16500; ELEN32-NEXT: .cfi_def_cfa_offset 0501; ELEN32-NEXT: ret502 %b = bitcast <8 x i8> %a to double503 ret double %b504}505 506define double @bitcast_v4i16_f64(<4 x i16> %a) {507; CHECK-LABEL: bitcast_v4i16_f64:508; CHECK: # %bb.0:509; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma510; CHECK-NEXT: vfmv.f.s fa0, v8511; CHECK-NEXT: ret512;513; ELEN32-LABEL: bitcast_v4i16_f64:514; ELEN32: # %bb.0:515; ELEN32-NEXT: addi sp, sp, -16516; ELEN32-NEXT: .cfi_def_cfa_offset 16517; ELEN32-NEXT: addi a0, sp, 8518; ELEN32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma519; ELEN32-NEXT: vse16.v v8, (a0)520; ELEN32-NEXT: fld fa0, 8(sp)521; ELEN32-NEXT: addi sp, sp, 16522; ELEN32-NEXT: .cfi_def_cfa_offset 0523; ELEN32-NEXT: ret524 %b = bitcast <4 x i16> %a to double525 ret double %b526}527 528define double @bitcast_v2i32_f64(<2 x i32> %a) {529; CHECK-LABEL: bitcast_v2i32_f64:530; CHECK: # %bb.0:531; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma532; CHECK-NEXT: vfmv.f.s fa0, v8533; CHECK-NEXT: ret534;535; ELEN32-LABEL: bitcast_v2i32_f64:536; ELEN32: # %bb.0:537; ELEN32-NEXT: addi sp, sp, -16538; ELEN32-NEXT: .cfi_def_cfa_offset 16539; ELEN32-NEXT: addi a0, sp, 8540; ELEN32-NEXT: vsetivli zero, 2, e32, m1, ta, ma541; ELEN32-NEXT: vse32.v v8, (a0)542; ELEN32-NEXT: fld fa0, 8(sp)543; ELEN32-NEXT: addi sp, sp, 16544; ELEN32-NEXT: .cfi_def_cfa_offset 0545; ELEN32-NEXT: ret546 %b = bitcast <2 x i32> %a to double547 ret double %b548}549 550define double @bitcast_v1i64_f64(<1 x i64> %a) {551; CHECK-LABEL: bitcast_v1i64_f64:552; CHECK: # %bb.0:553; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma554; CHECK-NEXT: vfmv.f.s fa0, v8555; CHECK-NEXT: ret556;557; RV32ELEN32-LABEL: bitcast_v1i64_f64:558; RV32ELEN32: # %bb.0:559; RV32ELEN32-NEXT: addi sp, sp, -16560; RV32ELEN32-NEXT: .cfi_def_cfa_offset 16561; RV32ELEN32-NEXT: sw a0, 8(sp)562; RV32ELEN32-NEXT: sw a1, 12(sp)563; RV32ELEN32-NEXT: fld fa0, 8(sp)564; RV32ELEN32-NEXT: addi sp, sp, 16565; RV32ELEN32-NEXT: .cfi_def_cfa_offset 0566; RV32ELEN32-NEXT: ret567;568; RV64ELEN32-LABEL: bitcast_v1i64_f64:569; RV64ELEN32: # %bb.0:570; RV64ELEN32-NEXT: fmv.d.x fa0, a0571; RV64ELEN32-NEXT: ret572 %b = bitcast <1 x i64> %a to double573 ret double %b574}575 576define <1 x i16> @bitcast_i16_v1i16(i16 %a) {577; CHECK-LABEL: bitcast_i16_v1i16:578; CHECK: # %bb.0:579; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma580; CHECK-NEXT: vmv.s.x v8, a0581; CHECK-NEXT: ret582;583; ELEN32-LABEL: bitcast_i16_v1i16:584; ELEN32: # %bb.0:585; ELEN32-NEXT: vsetivli zero, 1, e16, m1, ta, ma586; ELEN32-NEXT: vmv.s.x v8, a0587; ELEN32-NEXT: ret588 %b = bitcast i16 %a to <1 x i16>589 ret <1 x i16> %b590}591 592define <2 x i16> @bitcast_i32_v2i16(i32 %a) {593; CHECK-LABEL: bitcast_i32_v2i16:594; CHECK: # %bb.0:595; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma596; CHECK-NEXT: vmv.s.x v8, a0597; CHECK-NEXT: ret598;599; ELEN32-LABEL: bitcast_i32_v2i16:600; ELEN32: # %bb.0:601; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma602; ELEN32-NEXT: vmv.s.x v8, a0603; ELEN32-NEXT: ret604 %b = bitcast i32 %a to <2 x i16>605 ret <2 x i16> %b606}607 608define <1 x i32> @bitcast_i32_v1i32(i32 %a) {609; CHECK-LABEL: bitcast_i32_v1i32:610; CHECK: # %bb.0:611; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma612; CHECK-NEXT: vmv.s.x v8, a0613; CHECK-NEXT: ret614;615; ELEN32-LABEL: bitcast_i32_v1i32:616; ELEN32: # %bb.0:617; ELEN32-NEXT: vsetivli zero, 1, e32, m1, ta, ma618; ELEN32-NEXT: vmv.s.x v8, a0619; ELEN32-NEXT: ret620 %b = bitcast i32 %a to <1 x i32>621 ret <1 x i32> %b622}623 624define <4 x i16> @bitcast_i64_v4i16(i64 %a) {625; RV32-LABEL: bitcast_i64_v4i16:626; RV32: # %bb.0:627; RV32-NEXT: vsetivli zero, 2, e32, m1, ta, ma628; RV32-NEXT: vslide1down.vx v8, v8, a0629; RV32-NEXT: vslide1down.vx v8, v8, a1630; RV32-NEXT: ret631;632; RV64-LABEL: bitcast_i64_v4i16:633; RV64: # %bb.0:634; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma635; RV64-NEXT: vmv.s.x v8, a0636; RV64-NEXT: ret637;638; RV32ELEN32-LABEL: bitcast_i64_v4i16:639; RV32ELEN32: # %bb.0:640; RV32ELEN32-NEXT: vsetivli zero, 2, e32, m1, ta, ma641; RV32ELEN32-NEXT: vmv.v.x v8, a0642; RV32ELEN32-NEXT: vslide1down.vx v8, v8, a1643; RV32ELEN32-NEXT: ret644;645; RV64ELEN32-LABEL: bitcast_i64_v4i16:646; RV64ELEN32: # %bb.0:647; RV64ELEN32-NEXT: addi sp, sp, -16648; RV64ELEN32-NEXT: .cfi_def_cfa_offset 16649; RV64ELEN32-NEXT: sd a0, 8(sp)650; RV64ELEN32-NEXT: addi a0, sp, 8651; RV64ELEN32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma652; RV64ELEN32-NEXT: vle16.v v8, (a0)653; RV64ELEN32-NEXT: addi sp, sp, 16654; RV64ELEN32-NEXT: .cfi_def_cfa_offset 0655; RV64ELEN32-NEXT: ret656 %b = bitcast i64 %a to <4 x i16>657 ret <4 x i16> %b658}659 660define <2 x i32> @bitcast_i64_v2i32(i64 %a) {661; RV32-LABEL: bitcast_i64_v2i32:662; RV32: # %bb.0:663; RV32-NEXT: vsetivli zero, 2, e32, m1, ta, ma664; RV32-NEXT: vslide1down.vx v8, v8, a0665; RV32-NEXT: vslide1down.vx v8, v8, a1666; RV32-NEXT: ret667;668; RV64-LABEL: bitcast_i64_v2i32:669; RV64: # %bb.0:670; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma671; RV64-NEXT: vmv.s.x v8, a0672; RV64-NEXT: ret673;674; RV32ELEN32-LABEL: bitcast_i64_v2i32:675; RV32ELEN32: # %bb.0:676; RV32ELEN32-NEXT: vsetivli zero, 2, e32, m1, ta, ma677; RV32ELEN32-NEXT: vmv.v.x v8, a0678; RV32ELEN32-NEXT: vslide1down.vx v8, v8, a1679; RV32ELEN32-NEXT: ret680;681; RV64ELEN32-LABEL: bitcast_i64_v2i32:682; RV64ELEN32: # %bb.0:683; RV64ELEN32-NEXT: addi sp, sp, -16684; RV64ELEN32-NEXT: .cfi_def_cfa_offset 16685; RV64ELEN32-NEXT: sd a0, 8(sp)686; RV64ELEN32-NEXT: addi a0, sp, 8687; RV64ELEN32-NEXT: vsetivli zero, 2, e32, m1, ta, ma688; RV64ELEN32-NEXT: vle32.v v8, (a0)689; RV64ELEN32-NEXT: addi sp, sp, 16690; RV64ELEN32-NEXT: .cfi_def_cfa_offset 0691; RV64ELEN32-NEXT: ret692 %b = bitcast i64 %a to <2 x i32>693 ret <2 x i32> %b694}695 696define <1 x i64> @bitcast_i64_v1i64(i64 %a) {697; RV32-LABEL: bitcast_i64_v1i64:698; RV32: # %bb.0:699; RV32-NEXT: vsetivli zero, 2, e32, m1, ta, ma700; RV32-NEXT: vslide1down.vx v8, v8, a0701; RV32-NEXT: vslide1down.vx v8, v8, a1702; RV32-NEXT: ret703;704; RV64-LABEL: bitcast_i64_v1i64:705; RV64: # %bb.0:706; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, ma707; RV64-NEXT: vmv.s.x v8, a0708; RV64-NEXT: ret709;710; ELEN32-LABEL: bitcast_i64_v1i64:711; ELEN32: # %bb.0:712; ELEN32-NEXT: ret713 %b = bitcast i64 %a to <1 x i64>714 ret <1 x i64> %b715}716