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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3 4define fastcc <4 x i8> @ret_v4i8(ptr %p) {5; CHECK-LABEL: ret_v4i8:6; CHECK:       # %bb.0:7; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma8; CHECK-NEXT:    vle8.v v8, (a0)9; CHECK-NEXT:    ret10  %v = load <4 x i8>, ptr %p11  ret <4 x i8> %v12}13 14define fastcc <4 x i32> @ret_v4i32(ptr %p) {15; CHECK-LABEL: ret_v4i32:16; CHECK:       # %bb.0:17; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma18; CHECK-NEXT:    vle32.v v8, (a0)19; CHECK-NEXT:    ret20  %v = load <4 x i32>, ptr %p21  ret <4 x i32> %v22}23 24define fastcc <8 x i32> @ret_v8i32(ptr %p) {25; CHECK-LABEL: ret_v8i32:26; CHECK:       # %bb.0:27; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma28; CHECK-NEXT:    vle32.v v8, (a0)29; CHECK-NEXT:    ret30  %v = load <8 x i32>, ptr %p31  ret <8 x i32> %v32}33 34define fastcc <16 x i64> @ret_v16i64(ptr %p) {35; CHECK-LABEL: ret_v16i64:36; CHECK:       # %bb.0:37; CHECK-NEXT:    vsetivli zero, 16, e64, m8, ta, ma38; CHECK-NEXT:    vle64.v v8, (a0)39; CHECK-NEXT:    ret40  %v = load <16 x i64>, ptr %p41  ret <16 x i64> %v42}43 44define fastcc <8 x i1> @ret_mask_v8i1(ptr %p) {45; CHECK-LABEL: ret_mask_v8i1:46; CHECK:       # %bb.0:47; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma48; CHECK-NEXT:    vlm.v v0, (a0)49; CHECK-NEXT:    ret50  %v = load <8 x i1>, ptr %p51  ret <8 x i1> %v52}53 54define fastcc <32 x i1> @ret_mask_v32i1(ptr %p) {55; CHECK-LABEL: ret_mask_v32i1:56; CHECK:       # %bb.0:57; CHECK-NEXT:    li a1, 3258; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, ma59; CHECK-NEXT:    vlm.v v0, (a0)60; CHECK-NEXT:    ret61  %v = load <32 x i1>, ptr %p62  ret <32 x i1> %v63}64 65; Return the vector via registers v8-v2366define fastcc <64 x i32> @ret_split_v64i32(ptr %x) {67; CHECK-LABEL: ret_split_v64i32:68; CHECK:       # %bb.0:69; CHECK-NEXT:    li a1, 3270; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma71; CHECK-NEXT:    vle32.v v8, (a0)72; CHECK-NEXT:    addi a0, a0, 12873; CHECK-NEXT:    vle32.v v16, (a0)74; CHECK-NEXT:    ret75  %v = load <64 x i32>, ptr %x76  ret <64 x i32> %v77}78 79; Return the vector fully via the stack80define fastcc <128 x i32> @ret_split_v128i32(ptr %x) {81; CHECK-LABEL: ret_split_v128i32:82; CHECK:       # %bb.0:83; CHECK-NEXT:    addi a2, a1, 12884; CHECK-NEXT:    li a3, 3285; CHECK-NEXT:    vsetvli zero, a3, e32, m8, ta, ma86; CHECK-NEXT:    vle32.v v8, (a2)87; CHECK-NEXT:    addi a2, a1, 25688; CHECK-NEXT:    vle32.v v16, (a2)89; CHECK-NEXT:    addi a2, a1, 38490; CHECK-NEXT:    vle32.v v24, (a1)91; CHECK-NEXT:    addi a1, a0, 38492; CHECK-NEXT:    vle32.v v0, (a2)93; CHECK-NEXT:    addi a2, a0, 25694; CHECK-NEXT:    vse32.v v24, (a0)95; CHECK-NEXT:    addi a0, a0, 12896; CHECK-NEXT:    vse32.v v0, (a1)97; CHECK-NEXT:    vse32.v v16, (a2)98; CHECK-NEXT:    vse32.v v8, (a0)99; CHECK-NEXT:    ret100  %v = load <128 x i32>, ptr %x101  ret <128 x i32> %v102}103 104define fastcc <4 x i8> @ret_v8i8_param_v4i8(<4 x i8> %v) {105; CHECK-LABEL: ret_v8i8_param_v4i8:106; CHECK:       # %bb.0:107; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma108; CHECK-NEXT:    vadd.vi v8, v8, 2109; CHECK-NEXT:    ret110  %r = add <4 x i8> %v, <i8 2, i8 2, i8 2, i8 2>111  ret <4 x i8> %r112}113 114define fastcc <4 x i8> @ret_v4i8_param_v4i8_v4i8(<4 x i8> %v, <4 x i8> %w) {115; CHECK-LABEL: ret_v4i8_param_v4i8_v4i8:116; CHECK:       # %bb.0:117; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma118; CHECK-NEXT:    vadd.vv v8, v8, v9119; CHECK-NEXT:    ret120  %r = add <4 x i8> %v, %w121  ret <4 x i8> %r122}123 124define fastcc <4 x i64> @ret_v4i64_param_v4i64_v4i64(<4 x i64> %v, <4 x i64> %w) {125; CHECK-LABEL: ret_v4i64_param_v4i64_v4i64:126; CHECK:       # %bb.0:127; CHECK-NEXT:    vsetivli zero, 4, e64, m2, ta, ma128; CHECK-NEXT:    vadd.vv v8, v8, v10129; CHECK-NEXT:    ret130  %r = add <4 x i64> %v, %w131  ret <4 x i64> %r132}133 134define fastcc <8 x i1> @ret_v8i1_param_v8i1_v8i1(<8 x i1> %v, <8 x i1> %w) {135; CHECK-LABEL: ret_v8i1_param_v8i1_v8i1:136; CHECK:       # %bb.0:137; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma138; CHECK-NEXT:    vmxor.mm v0, v0, v8139; CHECK-NEXT:    ret140  %r = xor <8 x i1> %v, %w141  ret <8 x i1> %r142}143 144define fastcc <32 x i1> @ret_v32i1_param_v32i1_v32i1(<32 x i1> %v, <32 x i1> %w) {145; CHECK-LABEL: ret_v32i1_param_v32i1_v32i1:146; CHECK:       # %bb.0:147; CHECK-NEXT:    li a0, 32148; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, ma149; CHECK-NEXT:    vmand.mm v0, v0, v8150; CHECK-NEXT:    ret151  %r = and <32 x i1> %v, %w152  ret <32 x i1> %r153}154 155define fastcc <32 x i32> @ret_v32i32_param_v32i32_v32i32_v32i32_i32(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %w) {156; CHECK-LABEL: ret_v32i32_param_v32i32_v32i32_v32i32_i32:157; CHECK:       # %bb.0:158; CHECK-NEXT:    li a2, 32159; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma160; CHECK-NEXT:    vle32.v v24, (a0)161; CHECK-NEXT:    vadd.vv v8, v8, v16162; CHECK-NEXT:    vadd.vv v8, v8, v24163; CHECK-NEXT:    vadd.vx v8, v8, a1164; CHECK-NEXT:    ret165  %r = add <32 x i32> %x, %y166  %s = add <32 x i32> %r, %z167  %head = insertelement <32 x i32> poison, i32 %w, i32 0168  %splat = shufflevector <32 x i32> %head, <32 x i32> poison, <32 x i32> zeroinitializer169  %t = add <32 x i32> %s, %splat170  ret <32 x i32> %t171}172 173declare <32 x i32> @ext2(<32 x i32>, <32 x i32>, i32, i32)174declare <32 x i32> @ext3(<32 x i32>, <32 x i32>, <32 x i32>, i32, i32)175 176define fastcc <32 x i32> @ret_v32i32_call_v32i32_v32i32_i32(<32 x i32> %x, <32 x i32> %y, i32 %w) {177; CHECK-LABEL: ret_v32i32_call_v32i32_v32i32_i32:178; CHECK:       # %bb.0:179; CHECK-NEXT:    addi sp, sp, -16180; CHECK-NEXT:    .cfi_def_cfa_offset 16181; CHECK-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill182; CHECK-NEXT:    .cfi_offset ra, -8183; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma184; CHECK-NEXT:    vmv8r.v v24, v8185; CHECK-NEXT:    li a1, 2186; CHECK-NEXT:    vmv8r.v v8, v16187; CHECK-NEXT:    vmv8r.v v16, v24188; CHECK-NEXT:    call ext2189; CHECK-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload190; CHECK-NEXT:    .cfi_restore ra191; CHECK-NEXT:    addi sp, sp, 16192; CHECK-NEXT:    .cfi_def_cfa_offset 0193; CHECK-NEXT:    ret194  %t = call fastcc <32 x i32> @ext2(<32 x i32> %y, <32 x i32> %x, i32 %w, i32 2)195  ret <32 x i32> %t196}197 198define fastcc <32 x i32> @ret_v32i32_call_v32i32_v32i32_v32i32_i32(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %w) {199; CHECK-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32:200; CHECK:       # %bb.0:201; CHECK-NEXT:    addi sp, sp, -256202; CHECK-NEXT:    .cfi_def_cfa_offset 256203; CHECK-NEXT:    sd ra, 248(sp) # 8-byte Folded Spill204; CHECK-NEXT:    sd s0, 240(sp) # 8-byte Folded Spill205; CHECK-NEXT:    .cfi_offset ra, -8206; CHECK-NEXT:    .cfi_offset s0, -16207; CHECK-NEXT:    addi s0, sp, 256208; CHECK-NEXT:    .cfi_def_cfa s0, 0209; CHECK-NEXT:    andi sp, sp, -128210; CHECK-NEXT:    li a2, 32211; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma212; CHECK-NEXT:    vle32.v v24, (a0)213; CHECK-NEXT:    mv a3, sp214; CHECK-NEXT:    mv a0, sp215; CHECK-NEXT:    li a2, 42216; CHECK-NEXT:    vse32.v v8, (a3)217; CHECK-NEXT:    vmv.v.v v8, v24218; CHECK-NEXT:    call ext3219; CHECK-NEXT:    addi sp, s0, -256220; CHECK-NEXT:    .cfi_def_cfa sp, 256221; CHECK-NEXT:    ld ra, 248(sp) # 8-byte Folded Reload222; CHECK-NEXT:    ld s0, 240(sp) # 8-byte Folded Reload223; CHECK-NEXT:    .cfi_restore ra224; CHECK-NEXT:    .cfi_restore s0225; CHECK-NEXT:    addi sp, sp, 256226; CHECK-NEXT:    .cfi_def_cfa_offset 0227; CHECK-NEXT:    ret228  %t = call fastcc <32 x i32> @ext3(<32 x i32> %z, <32 x i32> %y, <32 x i32> %x, i32 %w, i32 42)229  ret <32 x i32> %t230}231 232; A test case where the normal calling convention would pass directly via the233; stack, but with fastcc can pass indirectly with the extra GPR registers234; allowed.235define fastcc <32 x i32> @vector_arg_indirect_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %8) {236; CHECK-LABEL: vector_arg_indirect_stack:237; CHECK:       # %bb.0:238; CHECK-NEXT:    li a0, 32239; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma240; CHECK-NEXT:    vle32.v v16, (t3)241; CHECK-NEXT:    vadd.vv v8, v8, v16242; CHECK-NEXT:    ret243  %s = add <32 x i32> %x, %z244  ret <32 x i32> %s245}246 247; Calling the function above. Ensure we pass the arguments correctly.248define fastcc <32 x i32> @pass_vector_arg_indirect_stack(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z) {249; CHECK-LABEL: pass_vector_arg_indirect_stack:250; CHECK:       # %bb.0:251; CHECK-NEXT:    addi sp, sp, -256252; CHECK-NEXT:    .cfi_def_cfa_offset 256253; CHECK-NEXT:    sd ra, 248(sp) # 8-byte Folded Spill254; CHECK-NEXT:    sd s0, 240(sp) # 8-byte Folded Spill255; CHECK-NEXT:    .cfi_offset ra, -8256; CHECK-NEXT:    .cfi_offset s0, -16257; CHECK-NEXT:    addi s0, sp, 256258; CHECK-NEXT:    .cfi_def_cfa s0, 0259; CHECK-NEXT:    andi sp, sp, -128260; CHECK-NEXT:    li a0, 32261; CHECK-NEXT:    mv t0, sp262; CHECK-NEXT:    li a1, 1263; CHECK-NEXT:    li a2, 2264; CHECK-NEXT:    li a3, 3265; CHECK-NEXT:    li a4, 4266; CHECK-NEXT:    li a5, 5267; CHECK-NEXT:    li a6, 6268; CHECK-NEXT:    li a7, 7269; CHECK-NEXT:    mv t3, sp270; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma271; CHECK-NEXT:    vmv.v.i v8, 0272; CHECK-NEXT:    li t4, 8273; CHECK-NEXT:    vse32.v v8, (t0)274; CHECK-NEXT:    li a0, 0275; CHECK-NEXT:    vmv.v.i v16, 0276; CHECK-NEXT:    call vector_arg_indirect_stack277; CHECK-NEXT:    addi sp, s0, -256278; CHECK-NEXT:    .cfi_def_cfa sp, 256279; CHECK-NEXT:    ld ra, 248(sp) # 8-byte Folded Reload280; CHECK-NEXT:    ld s0, 240(sp) # 8-byte Folded Reload281; CHECK-NEXT:    .cfi_restore ra282; CHECK-NEXT:    .cfi_restore s0283; CHECK-NEXT:    addi sp, sp, 256284; CHECK-NEXT:    .cfi_def_cfa_offset 0285; CHECK-NEXT:    ret286  %s = call fastcc <32 x i32> @vector_arg_indirect_stack(i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 8)287  ret <32 x i32> %s288}289 290; A pathological test case where even with fastcc we must use the stack for arguments %13 and %z291define fastcc <32 x i32> @vector_arg_direct_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %last) {292; CHECK-LABEL: vector_arg_direct_stack:293; CHECK:       # %bb.0:294; CHECK-NEXT:    li a0, 32295; CHECK-NEXT:    addi a1, sp, 16296; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma297; CHECK-NEXT:    vle32.v v24, (a1)298; CHECK-NEXT:    vadd.vv v8, v8, v16299; CHECK-NEXT:    vadd.vv v8, v8, v24300; CHECK-NEXT:    ret301  %s = add <32 x i32> %x, %y302  %t = add <32 x i32> %s, %z303  ret <32 x i32> %t304}305 306; Calling the function above. Ensure we pass the arguments correctly.307define fastcc <32 x i32> @pass_vector_arg_direct_stack(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z) {308; CHECK-LABEL: pass_vector_arg_direct_stack:309; CHECK:       # %bb.0:310; CHECK-NEXT:    addi sp, sp, -176311; CHECK-NEXT:    .cfi_def_cfa_offset 176312; CHECK-NEXT:    sd ra, 168(sp) # 8-byte Folded Spill313; CHECK-NEXT:    sd s0, 160(sp) # 8-byte Folded Spill314; CHECK-NEXT:    .cfi_offset ra, -8315; CHECK-NEXT:    .cfi_offset s0, -16316; CHECK-NEXT:    li a0, 32317; CHECK-NEXT:    addi t0, sp, 16318; CHECK-NEXT:    li t1, 1319; CHECK-NEXT:    li t2, 13320; CHECK-NEXT:    li s0, 12321; CHECK-NEXT:    li a1, 1322; CHECK-NEXT:    li a2, 2323; CHECK-NEXT:    li a3, 3324; CHECK-NEXT:    li a4, 4325; CHECK-NEXT:    li a5, 5326; CHECK-NEXT:    li a6, 6327; CHECK-NEXT:    li a7, 7328; CHECK-NEXT:    li t3, 8329; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, ma330; CHECK-NEXT:    vmv.v.i v8, 0331; CHECK-NEXT:    vse32.v v8, (t0)332; CHECK-NEXT:    li t4, 9333; CHECK-NEXT:    li t5, 10334; CHECK-NEXT:    sd t1, 144(sp)335; CHECK-NEXT:    li t6, 11336; CHECK-NEXT:    sd s0, 0(sp)337; CHECK-NEXT:    sd t2, 8(sp)338; CHECK-NEXT:    li a0, 0339; CHECK-NEXT:    vmv.v.i v16, 0340; CHECK-NEXT:    call vector_arg_direct_stack341; CHECK-NEXT:    ld ra, 168(sp) # 8-byte Folded Reload342; CHECK-NEXT:    ld s0, 160(sp) # 8-byte Folded Reload343; CHECK-NEXT:    .cfi_restore ra344; CHECK-NEXT:    .cfi_restore s0345; CHECK-NEXT:    addi sp, sp, 176346; CHECK-NEXT:    .cfi_def_cfa_offset 0347; CHECK-NEXT:    ret348  %s = call fastcc <32 x i32> @vector_arg_direct_stack(i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 1)349  ret <32 x i32> %s350}351 352; A pathological test case where even with fastcc we must use the stack for353; mask argument %m2. %m1 is passed via v0.354define fastcc <4 x i1> @vector_mask_arg_direct_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, <4 x i1> %m1, <4 x i1> %m2, i32 %last) {355; CHECK-LABEL: vector_mask_arg_direct_stack:356; CHECK:       # %bb.0:357; CHECK-NEXT:    addi a0, sp, 144358; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, ma359; CHECK-NEXT:    vlm.v v8, (a0)360; CHECK-NEXT:    vmxor.mm v0, v0, v8361; CHECK-NEXT:    ret362  %r = xor <4 x i1> %m1, %m2363  ret <4 x i1> %r364}365