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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3 4define <4 x i8> @ret_v4i8(ptr %p) {5; CHECK-LABEL: ret_v4i8:6; CHECK: # %bb.0:7; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma8; CHECK-NEXT: vle8.v v8, (a0)9; CHECK-NEXT: ret10 %v = load <4 x i8>, ptr %p11 ret <4 x i8> %v12}13 14define <4 x i32> @ret_v4i32(ptr %p) {15; CHECK-LABEL: ret_v4i32:16; CHECK: # %bb.0:17; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma18; CHECK-NEXT: vle32.v v8, (a0)19; CHECK-NEXT: ret20 %v = load <4 x i32>, ptr %p21 ret <4 x i32> %v22}23 24define <8 x i32> @ret_v8i32(ptr %p) {25; CHECK-LABEL: ret_v8i32:26; CHECK: # %bb.0:27; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma28; CHECK-NEXT: vle32.v v8, (a0)29; CHECK-NEXT: ret30 %v = load <8 x i32>, ptr %p31 ret <8 x i32> %v32}33 34define <16 x i64> @ret_v16i64(ptr %p) {35; CHECK-LABEL: ret_v16i64:36; CHECK: # %bb.0:37; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma38; CHECK-NEXT: vle64.v v8, (a0)39; CHECK-NEXT: ret40 %v = load <16 x i64>, ptr %p41 ret <16 x i64> %v42}43 44define <8 x i1> @ret_mask_v8i1(ptr %p) {45; CHECK-LABEL: ret_mask_v8i1:46; CHECK: # %bb.0:47; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma48; CHECK-NEXT: vlm.v v0, (a0)49; CHECK-NEXT: ret50 %v = load <8 x i1>, ptr %p51 ret <8 x i1> %v52}53 54define <32 x i1> @ret_mask_v32i1(ptr %p) {55; CHECK-LABEL: ret_mask_v32i1:56; CHECK: # %bb.0:57; CHECK-NEXT: li a1, 3258; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma59; CHECK-NEXT: vlm.v v0, (a0)60; CHECK-NEXT: ret61 %v = load <32 x i1>, ptr %p62 ret <32 x i1> %v63}64 65; Return the vector via registers v8-v2366define <64 x i32> @ret_split_v64i32(ptr %x) {67; CHECK-LABEL: ret_split_v64i32:68; CHECK: # %bb.0:69; CHECK-NEXT: li a1, 3270; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma71; CHECK-NEXT: vle32.v v8, (a0)72; CHECK-NEXT: addi a0, a0, 12873; CHECK-NEXT: vle32.v v16, (a0)74; CHECK-NEXT: ret75 %v = load <64 x i32>, ptr %x76 ret <64 x i32> %v77}78 79; Return the vector fully via the stack80define <128 x i32> @ret_split_v128i32(ptr %x) {81; CHECK-LABEL: ret_split_v128i32:82; CHECK: # %bb.0:83; CHECK-NEXT: addi a2, a1, 12884; CHECK-NEXT: li a3, 3285; CHECK-NEXT: vsetvli zero, a3, e32, m8, ta, ma86; CHECK-NEXT: vle32.v v8, (a2)87; CHECK-NEXT: addi a2, a1, 25688; CHECK-NEXT: vle32.v v16, (a2)89; CHECK-NEXT: addi a2, a1, 38490; CHECK-NEXT: vle32.v v24, (a1)91; CHECK-NEXT: addi a1, a0, 38492; CHECK-NEXT: vle32.v v0, (a2)93; CHECK-NEXT: addi a2, a0, 25694; CHECK-NEXT: vse32.v v24, (a0)95; CHECK-NEXT: addi a0, a0, 12896; CHECK-NEXT: vse32.v v0, (a1)97; CHECK-NEXT: vse32.v v16, (a2)98; CHECK-NEXT: vse32.v v8, (a0)99; CHECK-NEXT: ret100 %v = load <128 x i32>, ptr %x101 ret <128 x i32> %v102}103 104define <4 x i8> @ret_v8i8_param_v4i8(<4 x i8> %v) {105; CHECK-LABEL: ret_v8i8_param_v4i8:106; CHECK: # %bb.0:107; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma108; CHECK-NEXT: vadd.vi v8, v8, 2109; CHECK-NEXT: ret110 %r = add <4 x i8> %v, <i8 2, i8 2, i8 2, i8 2>111 ret <4 x i8> %r112}113 114define <4 x i8> @ret_v4i8_param_v4i8_v4i8(<4 x i8> %v, <4 x i8> %w) {115; CHECK-LABEL: ret_v4i8_param_v4i8_v4i8:116; CHECK: # %bb.0:117; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma118; CHECK-NEXT: vadd.vv v8, v8, v9119; CHECK-NEXT: ret120 %r = add <4 x i8> %v, %w121 ret <4 x i8> %r122}123 124define <4 x i64> @ret_v4i64_param_v4i64_v4i64(<4 x i64> %v, <4 x i64> %w) {125; CHECK-LABEL: ret_v4i64_param_v4i64_v4i64:126; CHECK: # %bb.0:127; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma128; CHECK-NEXT: vadd.vv v8, v8, v10129; CHECK-NEXT: ret130 %r = add <4 x i64> %v, %w131 ret <4 x i64> %r132}133 134define <8 x i1> @ret_v8i1_param_v8i1_v8i1(<8 x i1> %v, <8 x i1> %w) {135; CHECK-LABEL: ret_v8i1_param_v8i1_v8i1:136; CHECK: # %bb.0:137; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma138; CHECK-NEXT: vmxor.mm v0, v0, v8139; CHECK-NEXT: ret140 %r = xor <8 x i1> %v, %w141 ret <8 x i1> %r142}143 144define <32 x i1> @ret_v32i1_param_v32i1_v32i1(<32 x i1> %v, <32 x i1> %w) {145; CHECK-LABEL: ret_v32i1_param_v32i1_v32i1:146; CHECK: # %bb.0:147; CHECK-NEXT: li a0, 32148; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma149; CHECK-NEXT: vmand.mm v0, v0, v8150; CHECK-NEXT: ret151 %r = and <32 x i1> %v, %w152 ret <32 x i1> %r153}154 155define <32 x i32> @ret_v32i32_param_v32i32_v32i32_v32i32_i32(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %w) {156; CHECK-LABEL: ret_v32i32_param_v32i32_v32i32_v32i32_i32:157; CHECK: # %bb.0:158; CHECK-NEXT: li a2, 32159; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma160; CHECK-NEXT: vle32.v v24, (a0)161; CHECK-NEXT: vadd.vv v8, v8, v16162; CHECK-NEXT: vadd.vv v8, v8, v24163; CHECK-NEXT: vadd.vx v8, v8, a1164; CHECK-NEXT: ret165 %r = add <32 x i32> %x, %y166 %s = add <32 x i32> %r, %z167 %head = insertelement <32 x i32> poison, i32 %w, i32 0168 %splat = shufflevector <32 x i32> %head, <32 x i32> poison, <32 x i32> zeroinitializer169 %t = add <32 x i32> %s, %splat170 ret <32 x i32> %t171}172 173declare <32 x i32> @ext2(<32 x i32>, <32 x i32>, i32, i32)174declare <32 x i32> @ext3(<32 x i32>, <32 x i32>, <32 x i32>, i32, i32)175 176define <32 x i32> @ret_v32i32_call_v32i32_v32i32_i32(<32 x i32> %x, <32 x i32> %y, i32 %w) {177; CHECK-LABEL: ret_v32i32_call_v32i32_v32i32_i32:178; CHECK: # %bb.0:179; CHECK-NEXT: addi sp, sp, -16180; CHECK-NEXT: .cfi_def_cfa_offset 16181; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill182; CHECK-NEXT: .cfi_offset ra, -8183; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma184; CHECK-NEXT: vmv8r.v v24, v8185; CHECK-NEXT: li a1, 2186; CHECK-NEXT: vmv8r.v v8, v16187; CHECK-NEXT: vmv8r.v v16, v24188; CHECK-NEXT: call ext2189; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload190; CHECK-NEXT: .cfi_restore ra191; CHECK-NEXT: addi sp, sp, 16192; CHECK-NEXT: .cfi_def_cfa_offset 0193; CHECK-NEXT: ret194 %t = call <32 x i32> @ext2(<32 x i32> %y, <32 x i32> %x, i32 %w, i32 2)195 ret <32 x i32> %t196}197 198define <32 x i32> @ret_v32i32_call_v32i32_v32i32_v32i32_i32(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %w) {199; CHECK-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32:200; CHECK: # %bb.0:201; CHECK-NEXT: addi sp, sp, -256202; CHECK-NEXT: .cfi_def_cfa_offset 256203; CHECK-NEXT: sd ra, 248(sp) # 8-byte Folded Spill204; CHECK-NEXT: sd s0, 240(sp) # 8-byte Folded Spill205; CHECK-NEXT: .cfi_offset ra, -8206; CHECK-NEXT: .cfi_offset s0, -16207; CHECK-NEXT: addi s0, sp, 256208; CHECK-NEXT: .cfi_def_cfa s0, 0209; CHECK-NEXT: andi sp, sp, -128210; CHECK-NEXT: li a2, 32211; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma212; CHECK-NEXT: vle32.v v24, (a0)213; CHECK-NEXT: mv a3, sp214; CHECK-NEXT: mv a0, sp215; CHECK-NEXT: li a2, 42216; CHECK-NEXT: vse32.v v8, (a3)217; CHECK-NEXT: vmv.v.v v8, v24218; CHECK-NEXT: call ext3219; CHECK-NEXT: addi sp, s0, -256220; CHECK-NEXT: .cfi_def_cfa sp, 256221; CHECK-NEXT: ld ra, 248(sp) # 8-byte Folded Reload222; CHECK-NEXT: ld s0, 240(sp) # 8-byte Folded Reload223; CHECK-NEXT: .cfi_restore ra224; CHECK-NEXT: .cfi_restore s0225; CHECK-NEXT: addi sp, sp, 256226; CHECK-NEXT: .cfi_def_cfa_offset 0227; CHECK-NEXT: ret228 %t = call <32 x i32> @ext3(<32 x i32> %z, <32 x i32> %y, <32 x i32> %x, i32 %w, i32 42)229 ret <32 x i32> %t230}231 232; Test various configurations of split vector types where the values are split233; across both registers and the stack.234; a0+64 z[16:31]235; v20m2 y[24:31], v22m2 z[0:7], a1+0 z[8:15], a1+32 z[16:23],236; a1+64 z[24:31]237; v16 y[12:15], v17 y[16:19], v18 y[20:23], v19 y[24:27],238; v20 y[28:31], v21 z[0:3], v22 z[4:7], v23 z[8:11],239; a1+0 z[12:15], a1+16 z[16:19], a1+32 z[20:23], a1+48 z[24:27],240; a1+64 z[28:31]241define <32 x i32> @split_vector_args(<2 x i32>,<2 x i32>,<2 x i32>,<2 x i32>,<2 x i32>, <32 x i32> %y, <32 x i32> %z) {242; CHECK-LABEL: split_vector_args:243; CHECK: # %bb.0:244; CHECK-NEXT: li a1, 32245; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma246; CHECK-NEXT: vle32.v v8, (a0)247; CHECK-NEXT: vadd.vv v8, v16, v8248; CHECK-NEXT: ret249 %v0 = add <32 x i32> %y, %z250 ret <32 x i32> %v0251}252 253define <32 x i32> @call_split_vector_args(ptr %pa, ptr %pb) {254; CHECK-LABEL: call_split_vector_args:255; CHECK: # %bb.0:256; CHECK-NEXT: addi sp, sp, -256257; CHECK-NEXT: .cfi_def_cfa_offset 256258; CHECK-NEXT: sd ra, 248(sp) # 8-byte Folded Spill259; CHECK-NEXT: sd s0, 240(sp) # 8-byte Folded Spill260; CHECK-NEXT: .cfi_offset ra, -8261; CHECK-NEXT: .cfi_offset s0, -16262; CHECK-NEXT: addi s0, sp, 256263; CHECK-NEXT: .cfi_def_cfa s0, 0264; CHECK-NEXT: andi sp, sp, -128265; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma266; CHECK-NEXT: vle32.v v8, (a0)267; CHECK-NEXT: li a0, 32268; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma269; CHECK-NEXT: vle32.v v16, (a1)270; CHECK-NEXT: mv a1, sp271; CHECK-NEXT: mv a0, sp272; CHECK-NEXT: vse32.v v16, (a1)273; CHECK-NEXT: vmv1r.v v9, v8274; CHECK-NEXT: vmv1r.v v10, v8275; CHECK-NEXT: vmv1r.v v11, v8276; CHECK-NEXT: vmv1r.v v12, v8277; CHECK-NEXT: call split_vector_args278; CHECK-NEXT: addi sp, s0, -256279; CHECK-NEXT: .cfi_def_cfa sp, 256280; CHECK-NEXT: ld ra, 248(sp) # 8-byte Folded Reload281; CHECK-NEXT: ld s0, 240(sp) # 8-byte Folded Reload282; CHECK-NEXT: .cfi_restore ra283; CHECK-NEXT: .cfi_restore s0284; CHECK-NEXT: addi sp, sp, 256285; CHECK-NEXT: .cfi_def_cfa_offset 0286; CHECK-NEXT: ret287 %a = load <2 x i32>, ptr %pa288 %b = load <32 x i32>, ptr %pb289 %r = call <32 x i32> @split_vector_args(<2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <32 x i32> %b, <32 x i32> %b)290 ret <32 x i32> %r291}292 293; A rather pathological test case in which we exhaust all vector registers and294; all scalar registers, forcing %z and %8 to go through the stack.295define <32 x i32> @vector_arg_via_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %8) {296; CHECK-LABEL: vector_arg_via_stack:297; CHECK: # %bb.0:298; CHECK-NEXT: li a0, 32299; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma300; CHECK-NEXT: vle32.v v16, (sp)301; CHECK-NEXT: vadd.vv v8, v8, v16302; CHECK-NEXT: ret303 %s = add <32 x i32> %x, %z304 ret <32 x i32> %s305}306 307; Calling the function above. Ensure we pass the arguments correctly.308define <32 x i32> @pass_vector_arg_via_stack(<32 x i32> %x, <32 x i32> %y, <32 x i32> %z) {309; CHECK-LABEL: pass_vector_arg_via_stack:310; CHECK: # %bb.0:311; CHECK-NEXT: addi sp, sp, -144312; CHECK-NEXT: .cfi_def_cfa_offset 144313; CHECK-NEXT: sd ra, 136(sp) # 8-byte Folded Spill314; CHECK-NEXT: .cfi_offset ra, -8315; CHECK-NEXT: li a0, 32316; CHECK-NEXT: li t0, 8317; CHECK-NEXT: li a1, 1318; CHECK-NEXT: li a2, 2319; CHECK-NEXT: li a3, 3320; CHECK-NEXT: li a4, 4321; CHECK-NEXT: li a5, 5322; CHECK-NEXT: li a6, 6323; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma324; CHECK-NEXT: vmv.v.i v8, 0325; CHECK-NEXT: vse32.v v8, (sp)326; CHECK-NEXT: li a7, 7327; CHECK-NEXT: sd t0, 128(sp)328; CHECK-NEXT: li a0, 0329; CHECK-NEXT: vmv.v.i v16, 0330; CHECK-NEXT: call vector_arg_via_stack331; CHECK-NEXT: ld ra, 136(sp) # 8-byte Folded Reload332; CHECK-NEXT: .cfi_restore ra333; CHECK-NEXT: addi sp, sp, 144334; CHECK-NEXT: .cfi_def_cfa_offset 0335; CHECK-NEXT: ret336 %s = call <32 x i32> @vector_arg_via_stack(i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 8)337 ret <32 x i32> %s338}339 340; Another pathological case but where a small mask vector must be passed on the341; stack.342define <4 x i1> @vector_mask_arg_via_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %8, <4 x i1> %9, <4 x i1> %10) {343; CHECK-LABEL: vector_mask_arg_via_stack:344; CHECK: # %bb.0:345; CHECK-NEXT: addi a0, sp, 136346; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma347; CHECK-NEXT: vlm.v v0, (a0)348; CHECK-NEXT: ret349 ret <4 x i1> %10350}351 352; Calling the function above. Ensure we pass the mask arguments correctly. We353; legalize stores of small masks such that the value is at least byte-sized.354define <4 x i1> @pass_vector_mask_arg_via_stack(<4 x i1> %v) {355; CHECK-LABEL: pass_vector_mask_arg_via_stack:356; CHECK: # %bb.0:357; CHECK-NEXT: addi sp, sp, -160358; CHECK-NEXT: .cfi_def_cfa_offset 160359; CHECK-NEXT: sd ra, 152(sp) # 8-byte Folded Spill360; CHECK-NEXT: .cfi_offset ra, -8361; CHECK-NEXT: li a0, 32362; CHECK-NEXT: li a1, 8363; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma364; CHECK-NEXT: vmv.v.i v16, 0365; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma366; CHECK-NEXT: vmv.v.i v17, 0367; CHECK-NEXT: addi a2, sp, 136368; CHECK-NEXT: li a5, 5369; CHECK-NEXT: li a6, 6370; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma371; CHECK-NEXT: vmv.v.i v8, 0372; CHECK-NEXT: sd a1, 128(sp)373; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma374; CHECK-NEXT: vmerge.vim v16, v16, 1, v0375; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma376; CHECK-NEXT: vse32.v v8, (sp)377; CHECK-NEXT: vsetivli zero, 4, e8, mf2, tu, ma378; CHECK-NEXT: vmv.v.v v17, v16379; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma380; CHECK-NEXT: vmsne.vi v16, v17, 0381; CHECK-NEXT: li a7, 7382; CHECK-NEXT: vsm.v v16, (a2)383; CHECK-NEXT: li a0, 0384; CHECK-NEXT: li a1, 0385; CHECK-NEXT: li a2, 0386; CHECK-NEXT: li a3, 0387; CHECK-NEXT: li a4, 0388; CHECK-NEXT: vmv8r.v v16, v8389; CHECK-NEXT: call vector_mask_arg_via_stack390; CHECK-NEXT: ld ra, 152(sp) # 8-byte Folded Reload391; CHECK-NEXT: .cfi_restore ra392; CHECK-NEXT: addi sp, sp, 160393; CHECK-NEXT: .cfi_def_cfa_offset 0394; CHECK-NEXT: ret395 %r = call <4 x i1> @vector_mask_arg_via_stack(i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 6, i32 7, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 8, <4 x i1> %v, <4 x i1> %v)396 ret <4 x i1> %r397}398