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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=riscv32 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644 5define void @compressstore_v1i8(ptr %base, <1 x i8> %v, <1 x i1> %mask) {6; CHECK-LABEL: compressstore_v1i8:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma9; CHECK-NEXT: vcompress.vm v9, v8, v010; CHECK-NEXT: vcpop.m a1, v011; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma12; CHECK-NEXT: vse8.v v9, (a0)13; CHECK-NEXT: ret14 call void @llvm.masked.compressstore.v1i8(<1 x i8> %v, ptr %base, <1 x i1> %mask)15 ret void16}17 18define void @compressstore_v2i8(ptr %base, <2 x i8> %v, <2 x i1> %mask) {19; CHECK-LABEL: compressstore_v2i8:20; CHECK: # %bb.0:21; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma22; CHECK-NEXT: vcompress.vm v9, v8, v023; CHECK-NEXT: vcpop.m a1, v024; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma25; CHECK-NEXT: vse8.v v9, (a0)26; CHECK-NEXT: ret27 call void @llvm.masked.compressstore.v2i8(<2 x i8> %v, ptr %base, <2 x i1> %mask)28 ret void29}30 31define void @compressstore_v4i8(ptr %base, <4 x i8> %v, <4 x i1> %mask) {32; CHECK-LABEL: compressstore_v4i8:33; CHECK: # %bb.0:34; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma35; CHECK-NEXT: vcompress.vm v9, v8, v036; CHECK-NEXT: vcpop.m a1, v037; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma38; CHECK-NEXT: vse8.v v9, (a0)39; CHECK-NEXT: ret40 call void @llvm.masked.compressstore.v4i8(<4 x i8> %v, ptr %base, <4 x i1> %mask)41 ret void42}43 44define void @compressstore_v8i8(ptr %base, <8 x i8> %v, <8 x i1> %mask) {45; CHECK-LABEL: compressstore_v8i8:46; CHECK: # %bb.0:47; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma48; CHECK-NEXT: vcompress.vm v9, v8, v049; CHECK-NEXT: vcpop.m a1, v050; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma51; CHECK-NEXT: vse8.v v9, (a0)52; CHECK-NEXT: ret53 call void @llvm.masked.compressstore.v8i8(<8 x i8> %v, ptr %base, <8 x i1> %mask)54 ret void55}56 57define void @compressstore_v1i16(ptr %base, <1 x i16> %v, <1 x i1> %mask) {58; CHECK-LABEL: compressstore_v1i16:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma61; CHECK-NEXT: vcompress.vm v9, v8, v062; CHECK-NEXT: vcpop.m a1, v063; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma64; CHECK-NEXT: vse16.v v9, (a0)65; CHECK-NEXT: ret66 call void @llvm.masked.compressstore.v1i16(<1 x i16> %v, ptr align 2 %base, <1 x i1> %mask)67 ret void68}69 70define void @compressstore_v2i16(ptr %base, <2 x i16> %v, <2 x i1> %mask) {71; CHECK-LABEL: compressstore_v2i16:72; CHECK: # %bb.0:73; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma74; CHECK-NEXT: vcompress.vm v9, v8, v075; CHECK-NEXT: vcpop.m a1, v076; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma77; CHECK-NEXT: vse16.v v9, (a0)78; CHECK-NEXT: ret79 call void @llvm.masked.compressstore.v2i16(<2 x i16> %v, ptr align 2 %base, <2 x i1> %mask)80 ret void81}82 83define void @compressstore_v4i16(ptr %base, <4 x i16> %v, <4 x i1> %mask) {84; CHECK-LABEL: compressstore_v4i16:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma87; CHECK-NEXT: vcompress.vm v9, v8, v088; CHECK-NEXT: vcpop.m a1, v089; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma90; CHECK-NEXT: vse16.v v9, (a0)91; CHECK-NEXT: ret92 call void @llvm.masked.compressstore.v4i16(<4 x i16> %v, ptr align 2 %base, <4 x i1> %mask)93 ret void94}95 96define void @compressstore_v8i16(ptr %base, <8 x i16> %v, <8 x i1> %mask) {97; CHECK-LABEL: compressstore_v8i16:98; CHECK: # %bb.0:99; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma100; CHECK-NEXT: vcompress.vm v9, v8, v0101; CHECK-NEXT: vcpop.m a1, v0102; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma103; CHECK-NEXT: vse16.v v9, (a0)104; CHECK-NEXT: ret105 call void @llvm.masked.compressstore.v8i16(<8 x i16> %v, ptr align 2 %base, <8 x i1> %mask)106 ret void107}108 109define void @compressstore_v1i32(ptr %base, <1 x i32> %v, <1 x i1> %mask) {110; CHECK-LABEL: compressstore_v1i32:111; CHECK: # %bb.0:112; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma113; CHECK-NEXT: vcompress.vm v9, v8, v0114; CHECK-NEXT: vcpop.m a1, v0115; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma116; CHECK-NEXT: vse32.v v9, (a0)117; CHECK-NEXT: ret118 call void @llvm.masked.compressstore.v1i32(<1 x i32> %v, ptr align 4 %base, <1 x i1> %mask)119 ret void120}121 122define void @compressstore_v2i32(ptr %base, <2 x i32> %v, <2 x i1> %mask) {123; CHECK-LABEL: compressstore_v2i32:124; CHECK: # %bb.0:125; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma126; CHECK-NEXT: vcompress.vm v9, v8, v0127; CHECK-NEXT: vcpop.m a1, v0128; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma129; CHECK-NEXT: vse32.v v9, (a0)130; CHECK-NEXT: ret131 call void @llvm.masked.compressstore.v2i32(<2 x i32> %v, ptr align 4 %base, <2 x i1> %mask)132 ret void133}134 135define void @compressstore_v4i32(ptr %base, <4 x i32> %v, <4 x i1> %mask) {136; CHECK-LABEL: compressstore_v4i32:137; CHECK: # %bb.0:138; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma139; CHECK-NEXT: vcompress.vm v9, v8, v0140; CHECK-NEXT: vcpop.m a1, v0141; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma142; CHECK-NEXT: vse32.v v9, (a0)143; CHECK-NEXT: ret144 call void @llvm.masked.compressstore.v4i32(<4 x i32> %v, ptr align 4 %base, <4 x i1> %mask)145 ret void146}147 148define void @compressstore_v8i32(ptr %base, <8 x i32> %v, <8 x i1> %mask) {149; CHECK-LABEL: compressstore_v8i32:150; CHECK: # %bb.0:151; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma152; CHECK-NEXT: vcompress.vm v10, v8, v0153; CHECK-NEXT: vcpop.m a1, v0154; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma155; CHECK-NEXT: vse32.v v10, (a0)156; CHECK-NEXT: ret157 call void @llvm.masked.compressstore.v8i32(<8 x i32> %v, ptr align 4 %base, <8 x i1> %mask)158 ret void159}160 161define void @compressstore_v1i64(ptr %base, <1 x i64> %v, <1 x i1> %mask) {162; CHECK-LABEL: compressstore_v1i64:163; CHECK: # %bb.0:164; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma165; CHECK-NEXT: vcompress.vm v9, v8, v0166; CHECK-NEXT: vcpop.m a1, v0167; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma168; CHECK-NEXT: vse64.v v9, (a0)169; CHECK-NEXT: ret170 call void @llvm.masked.compressstore.v1i64(<1 x i64> %v, ptr align 8 %base, <1 x i1> %mask)171 ret void172}173 174define void @compressstore_v2i64(ptr %base, <2 x i64> %v, <2 x i1> %mask) {175; CHECK-LABEL: compressstore_v2i64:176; CHECK: # %bb.0:177; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma178; CHECK-NEXT: vcompress.vm v9, v8, v0179; CHECK-NEXT: vcpop.m a1, v0180; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma181; CHECK-NEXT: vse64.v v9, (a0)182; CHECK-NEXT: ret183 call void @llvm.masked.compressstore.v2i64(<2 x i64> %v, ptr align 8 %base, <2 x i1> %mask)184 ret void185}186 187define void @compressstore_v4i64(ptr %base, <4 x i64> %v, <4 x i1> %mask) {188; CHECK-LABEL: compressstore_v4i64:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma191; CHECK-NEXT: vcompress.vm v10, v8, v0192; CHECK-NEXT: vcpop.m a1, v0193; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma194; CHECK-NEXT: vse64.v v10, (a0)195; CHECK-NEXT: ret196 call void @llvm.masked.compressstore.v4i64(<4 x i64> %v, ptr align 8 %base, <4 x i1> %mask)197 ret void198}199 200define void @compressstore_v8i64(ptr %base, <8 x i64> %v, <8 x i1> %mask) {201; CHECK-LABEL: compressstore_v8i64:202; CHECK: # %bb.0:203; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma204; CHECK-NEXT: vcompress.vm v12, v8, v0205; CHECK-NEXT: vcpop.m a1, v0206; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma207; CHECK-NEXT: vse64.v v12, (a0)208; CHECK-NEXT: ret209 call void @llvm.masked.compressstore.v8i64(<8 x i64> %v, ptr align 8 %base, <8 x i1> %mask)210 ret void211}212;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:213; RV32: {{.*}}214; RV64: {{.*}}215