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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+zve64x,+zvl128b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVI,RV32I3; RUN: llc -mtriple=riscv64 -mattr=+m,+zve64x,+zvl128b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVI,RV64I4; RUN: llc -mtriple=riscv32 -mattr=+m,+zve64f,+zvl128b,+f -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVF,RV32F5; RUN: llc -mtriple=riscv64 -mattr=+m,+zve64f,+zvl128b,+f -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVF,RV64F6; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVD,RV32D7; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVD,RV64D8; RUN: llc -mtriple=riscv32 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVBB9; RUN: llc -mtriple=riscv64 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVBB10 11define void @ctlz_v16i8(ptr %x, ptr %y) nounwind {12; RVI-LABEL: ctlz_v16i8:13; RVI: # %bb.0:14; RVI-NEXT: vsetivli zero, 16, e8, m1, ta, ma15; RVI-NEXT: vle8.v v8, (a0)16; RVI-NEXT: li a1, 8517; RVI-NEXT: vsrl.vi v9, v8, 118; RVI-NEXT: vor.vv v8, v8, v919; RVI-NEXT: vsrl.vi v9, v8, 220; RVI-NEXT: vor.vv v8, v8, v921; RVI-NEXT: vsrl.vi v9, v8, 422; RVI-NEXT: vor.vv v8, v8, v923; RVI-NEXT: vnot.v v8, v824; RVI-NEXT: vsrl.vi v9, v8, 125; RVI-NEXT: vand.vx v9, v9, a126; RVI-NEXT: li a1, 5127; RVI-NEXT: vsub.vv v8, v8, v928; RVI-NEXT: vand.vx v9, v8, a129; RVI-NEXT: vsrl.vi v8, v8, 230; RVI-NEXT: vand.vx v8, v8, a131; RVI-NEXT: vadd.vv v8, v9, v832; RVI-NEXT: vsrl.vi v9, v8, 433; RVI-NEXT: vadd.vv v8, v8, v934; RVI-NEXT: vand.vi v8, v8, 1535; RVI-NEXT: vse8.v v8, (a0)36; RVI-NEXT: ret37;38; RVF-LABEL: ctlz_v16i8:39; RVF: # %bb.0:40; RVF-NEXT: vsetivli zero, 16, e16, m2, ta, ma41; RVF-NEXT: vle8.v v8, (a0)42; RVF-NEXT: li a1, 13443; RVF-NEXT: vzext.vf2 v12, v844; RVF-NEXT: vfwcvt.f.xu.v v8, v1245; RVF-NEXT: vnsrl.wi v12, v8, 2346; RVF-NEXT: vsetvli zero, zero, e8, m1, ta, ma47; RVF-NEXT: vnsrl.wi v8, v12, 048; RVF-NEXT: vrsub.vx v8, v8, a149; RVF-NEXT: li a1, 850; RVF-NEXT: vminu.vx v8, v8, a151; RVF-NEXT: vse8.v v8, (a0)52; RVF-NEXT: ret53;54; RVD-LABEL: ctlz_v16i8:55; RVD: # %bb.0:56; RVD-NEXT: vsetivli zero, 16, e16, m2, ta, ma57; RVD-NEXT: vle8.v v8, (a0)58; RVD-NEXT: li a1, 13459; RVD-NEXT: vzext.vf2 v12, v860; RVD-NEXT: vfwcvt.f.xu.v v8, v1261; RVD-NEXT: vnsrl.wi v12, v8, 2362; RVD-NEXT: vsetvli zero, zero, e8, m1, ta, ma63; RVD-NEXT: vnsrl.wi v8, v12, 064; RVD-NEXT: vrsub.vx v8, v8, a165; RVD-NEXT: li a1, 866; RVD-NEXT: vminu.vx v8, v8, a167; RVD-NEXT: vse8.v v8, (a0)68; RVD-NEXT: ret69;70; ZVBB-LABEL: ctlz_v16i8:71; ZVBB: # %bb.0:72; ZVBB-NEXT: vsetivli zero, 16, e8, m1, ta, ma73; ZVBB-NEXT: vle8.v v8, (a0)74; ZVBB-NEXT: vclz.v v8, v875; ZVBB-NEXT: vse8.v v8, (a0)76; ZVBB-NEXT: ret77 %a = load <16 x i8>, ptr %x78 %b = load <16 x i8>, ptr %y79 %c = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)80 store <16 x i8> %c, ptr %x81 ret void82}83 84define void @ctlz_v8i16(ptr %x, ptr %y) nounwind {85; RVI-LABEL: ctlz_v8i16:86; RVI: # %bb.0:87; RVI-NEXT: vsetivli zero, 8, e16, m1, ta, ma88; RVI-NEXT: vle16.v v8, (a0)89; RVI-NEXT: lui a1, 590; RVI-NEXT: addi a1, a1, 136591; RVI-NEXT: vsrl.vi v9, v8, 192; RVI-NEXT: vor.vv v8, v8, v993; RVI-NEXT: vsrl.vi v9, v8, 294; RVI-NEXT: vor.vv v8, v8, v995; RVI-NEXT: vsrl.vi v9, v8, 496; RVI-NEXT: vor.vv v8, v8, v997; RVI-NEXT: vsrl.vi v9, v8, 898; RVI-NEXT: vor.vv v8, v8, v999; RVI-NEXT: vnot.v v8, v8100; RVI-NEXT: vsrl.vi v9, v8, 1101; RVI-NEXT: vand.vx v9, v9, a1102; RVI-NEXT: lui a1, 3103; RVI-NEXT: addi a1, a1, 819104; RVI-NEXT: vsub.vv v8, v8, v9105; RVI-NEXT: vand.vx v9, v8, a1106; RVI-NEXT: vsrl.vi v8, v8, 2107; RVI-NEXT: vand.vx v8, v8, a1108; RVI-NEXT: lui a1, 1109; RVI-NEXT: addi a1, a1, -241110; RVI-NEXT: vadd.vv v8, v9, v8111; RVI-NEXT: vsrl.vi v9, v8, 4112; RVI-NEXT: vadd.vv v8, v8, v9113; RVI-NEXT: vand.vx v8, v8, a1114; RVI-NEXT: li a1, 257115; RVI-NEXT: vmul.vx v8, v8, a1116; RVI-NEXT: vsrl.vi v8, v8, 8117; RVI-NEXT: vse16.v v8, (a0)118; RVI-NEXT: ret119;120; RVF-LABEL: ctlz_v8i16:121; RVF: # %bb.0:122; RVF-NEXT: vsetivli zero, 8, e16, m1, ta, ma123; RVF-NEXT: vle16.v v10, (a0)124; RVF-NEXT: li a1, 142125; RVF-NEXT: vfwcvt.f.xu.v v8, v10126; RVF-NEXT: vnsrl.wi v10, v8, 23127; RVF-NEXT: vrsub.vx v8, v10, a1128; RVF-NEXT: li a1, 16129; RVF-NEXT: vminu.vx v8, v8, a1130; RVF-NEXT: vse16.v v8, (a0)131; RVF-NEXT: ret132;133; RVD-LABEL: ctlz_v8i16:134; RVD: # %bb.0:135; RVD-NEXT: vsetivli zero, 8, e16, m1, ta, ma136; RVD-NEXT: vle16.v v10, (a0)137; RVD-NEXT: li a1, 142138; RVD-NEXT: vfwcvt.f.xu.v v8, v10139; RVD-NEXT: vnsrl.wi v10, v8, 23140; RVD-NEXT: vrsub.vx v8, v10, a1141; RVD-NEXT: li a1, 16142; RVD-NEXT: vminu.vx v8, v8, a1143; RVD-NEXT: vse16.v v8, (a0)144; RVD-NEXT: ret145;146; ZVBB-LABEL: ctlz_v8i16:147; ZVBB: # %bb.0:148; ZVBB-NEXT: vsetivli zero, 8, e16, m1, ta, ma149; ZVBB-NEXT: vle16.v v8, (a0)150; ZVBB-NEXT: vclz.v v8, v8151; ZVBB-NEXT: vse16.v v8, (a0)152; ZVBB-NEXT: ret153 %a = load <8 x i16>, ptr %x154 %b = load <8 x i16>, ptr %y155 %c = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)156 store <8 x i16> %c, ptr %x157 ret void158}159 160define void @ctlz_v4i32(ptr %x, ptr %y) nounwind {161; RVI-LABEL: ctlz_v4i32:162; RVI: # %bb.0:163; RVI-NEXT: vsetivli zero, 4, e32, m1, ta, ma164; RVI-NEXT: vle32.v v8, (a0)165; RVI-NEXT: lui a1, 349525166; RVI-NEXT: addi a1, a1, 1365167; RVI-NEXT: vsrl.vi v9, v8, 1168; RVI-NEXT: vor.vv v8, v8, v9169; RVI-NEXT: vsrl.vi v9, v8, 2170; RVI-NEXT: vor.vv v8, v8, v9171; RVI-NEXT: vsrl.vi v9, v8, 4172; RVI-NEXT: vor.vv v8, v8, v9173; RVI-NEXT: vsrl.vi v9, v8, 8174; RVI-NEXT: vor.vv v8, v8, v9175; RVI-NEXT: vsrl.vi v9, v8, 16176; RVI-NEXT: vor.vv v8, v8, v9177; RVI-NEXT: vnot.v v8, v8178; RVI-NEXT: vsrl.vi v9, v8, 1179; RVI-NEXT: vand.vx v9, v9, a1180; RVI-NEXT: lui a1, 209715181; RVI-NEXT: addi a1, a1, 819182; RVI-NEXT: vsub.vv v8, v8, v9183; RVI-NEXT: vand.vx v9, v8, a1184; RVI-NEXT: vsrl.vi v8, v8, 2185; RVI-NEXT: vand.vx v8, v8, a1186; RVI-NEXT: lui a1, 61681187; RVI-NEXT: addi a1, a1, -241188; RVI-NEXT: vadd.vv v8, v9, v8189; RVI-NEXT: vsrl.vi v9, v8, 4190; RVI-NEXT: vadd.vv v8, v8, v9191; RVI-NEXT: vand.vx v8, v8, a1192; RVI-NEXT: lui a1, 4112193; RVI-NEXT: addi a1, a1, 257194; RVI-NEXT: vmul.vx v8, v8, a1195; RVI-NEXT: vsrl.vi v8, v8, 24196; RVI-NEXT: vse32.v v8, (a0)197; RVI-NEXT: ret198;199; RVF-LABEL: ctlz_v4i32:200; RVF: # %bb.0:201; RVF-NEXT: vsetivli zero, 4, e32, m1, ta, ma202; RVF-NEXT: vle32.v v8, (a0)203; RVF-NEXT: fsrmi a1, 1204; RVF-NEXT: vfcvt.f.xu.v v8, v8205; RVF-NEXT: fsrm a1206; RVF-NEXT: li a1, 158207; RVF-NEXT: vsrl.vi v8, v8, 23208; RVF-NEXT: vrsub.vx v8, v8, a1209; RVF-NEXT: li a1, 32210; RVF-NEXT: vminu.vx v8, v8, a1211; RVF-NEXT: vse32.v v8, (a0)212; RVF-NEXT: ret213;214; RVD-LABEL: ctlz_v4i32:215; RVD: # %bb.0:216; RVD-NEXT: vsetivli zero, 4, e32, m1, ta, ma217; RVD-NEXT: vle32.v v10, (a0)218; RVD-NEXT: li a1, 52219; RVD-NEXT: vfwcvt.f.xu.v v8, v10220; RVD-NEXT: vnsrl.wx v10, v8, a1221; RVD-NEXT: li a1, 1054222; RVD-NEXT: vrsub.vx v8, v10, a1223; RVD-NEXT: li a1, 32224; RVD-NEXT: vminu.vx v8, v8, a1225; RVD-NEXT: vse32.v v8, (a0)226; RVD-NEXT: ret227;228; ZVBB-LABEL: ctlz_v4i32:229; ZVBB: # %bb.0:230; ZVBB-NEXT: vsetivli zero, 4, e32, m1, ta, ma231; ZVBB-NEXT: vle32.v v8, (a0)232; ZVBB-NEXT: vclz.v v8, v8233; ZVBB-NEXT: vse32.v v8, (a0)234; ZVBB-NEXT: ret235 %a = load <4 x i32>, ptr %x236 %b = load <4 x i32>, ptr %y237 %c = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)238 store <4 x i32> %c, ptr %x239 ret void240}241 242define void @ctlz_v2i64(ptr %x, ptr %y) nounwind {243; RV32I-LABEL: ctlz_v2i64:244; RV32I: # %bb.0:245; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma246; RV32I-NEXT: vle64.v v8, (a0)247; RV32I-NEXT: lui a1, 349525248; RV32I-NEXT: addi a1, a1, 1365249; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma250; RV32I-NEXT: vmv.v.x v9, a1251; RV32I-NEXT: li a1, 32252; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma253; RV32I-NEXT: vsrl.vi v10, v8, 1254; RV32I-NEXT: vor.vv v8, v8, v10255; RV32I-NEXT: vsrl.vi v10, v8, 2256; RV32I-NEXT: vor.vv v8, v8, v10257; RV32I-NEXT: vsrl.vi v10, v8, 4258; RV32I-NEXT: vor.vv v8, v8, v10259; RV32I-NEXT: vsrl.vi v10, v8, 8260; RV32I-NEXT: vor.vv v8, v8, v10261; RV32I-NEXT: vsrl.vi v10, v8, 16262; RV32I-NEXT: vor.vv v8, v8, v10263; RV32I-NEXT: vsrl.vx v10, v8, a1264; RV32I-NEXT: lui a1, 209715265; RV32I-NEXT: addi a1, a1, 819266; RV32I-NEXT: vor.vv v8, v8, v10267; RV32I-NEXT: vnot.v v8, v8268; RV32I-NEXT: vsrl.vi v10, v8, 1269; RV32I-NEXT: vand.vv v9, v10, v9270; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma271; RV32I-NEXT: vmv.v.x v10, a1272; RV32I-NEXT: lui a1, 61681273; RV32I-NEXT: addi a1, a1, -241274; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma275; RV32I-NEXT: vsub.vv v8, v8, v9276; RV32I-NEXT: vand.vv v9, v8, v10277; RV32I-NEXT: vsrl.vi v8, v8, 2278; RV32I-NEXT: vand.vv v8, v8, v10279; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma280; RV32I-NEXT: vmv.v.x v10, a1281; RV32I-NEXT: lui a1, 4112282; RV32I-NEXT: addi a1, a1, 257283; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma284; RV32I-NEXT: vadd.vv v8, v9, v8285; RV32I-NEXT: vsrl.vi v9, v8, 4286; RV32I-NEXT: vadd.vv v8, v8, v9287; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma288; RV32I-NEXT: vmv.v.x v9, a1289; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma290; RV32I-NEXT: vand.vv v8, v8, v10291; RV32I-NEXT: vmul.vv v8, v8, v9292; RV32I-NEXT: li a1, 56293; RV32I-NEXT: vsrl.vx v8, v8, a1294; RV32I-NEXT: vse64.v v8, (a0)295; RV32I-NEXT: ret296;297; RV64I-LABEL: ctlz_v2i64:298; RV64I: # %bb.0:299; RV64I-NEXT: vsetivli zero, 2, e64, m1, ta, ma300; RV64I-NEXT: vle64.v v8, (a0)301; RV64I-NEXT: lui a1, 349525302; RV64I-NEXT: lui a2, 209715303; RV64I-NEXT: lui a3, 61681304; RV64I-NEXT: lui a4, 4112305; RV64I-NEXT: addi a1, a1, 1365306; RV64I-NEXT: addi a2, a2, 819307; RV64I-NEXT: addi a3, a3, -241308; RV64I-NEXT: addi a4, a4, 257309; RV64I-NEXT: slli a5, a1, 32310; RV64I-NEXT: add a1, a1, a5311; RV64I-NEXT: slli a5, a2, 32312; RV64I-NEXT: add a2, a2, a5313; RV64I-NEXT: slli a5, a3, 32314; RV64I-NEXT: add a3, a3, a5315; RV64I-NEXT: slli a5, a4, 32316; RV64I-NEXT: add a4, a4, a5317; RV64I-NEXT: li a5, 32318; RV64I-NEXT: vsrl.vi v9, v8, 1319; RV64I-NEXT: vor.vv v8, v8, v9320; RV64I-NEXT: vsrl.vi v9, v8, 2321; RV64I-NEXT: vor.vv v8, v8, v9322; RV64I-NEXT: vsrl.vi v9, v8, 4323; RV64I-NEXT: vor.vv v8, v8, v9324; RV64I-NEXT: vsrl.vi v9, v8, 8325; RV64I-NEXT: vor.vv v8, v8, v9326; RV64I-NEXT: vsrl.vi v9, v8, 16327; RV64I-NEXT: vor.vv v8, v8, v9328; RV64I-NEXT: vsrl.vx v9, v8, a5329; RV64I-NEXT: vor.vv v8, v8, v9330; RV64I-NEXT: vnot.v v8, v8331; RV64I-NEXT: vsrl.vi v9, v8, 1332; RV64I-NEXT: vand.vx v9, v9, a1333; RV64I-NEXT: vsub.vv v8, v8, v9334; RV64I-NEXT: vand.vx v9, v8, a2335; RV64I-NEXT: vsrl.vi v8, v8, 2336; RV64I-NEXT: vand.vx v8, v8, a2337; RV64I-NEXT: vadd.vv v8, v9, v8338; RV64I-NEXT: vsrl.vi v9, v8, 4339; RV64I-NEXT: vadd.vv v8, v8, v9340; RV64I-NEXT: vand.vx v8, v8, a3341; RV64I-NEXT: vmul.vx v8, v8, a4342; RV64I-NEXT: li a1, 56343; RV64I-NEXT: vsrl.vx v8, v8, a1344; RV64I-NEXT: vse64.v v8, (a0)345; RV64I-NEXT: ret346;347; RVF-LABEL: ctlz_v2i64:348; RVF: # %bb.0:349; RVF-NEXT: vsetivli zero, 2, e32, mf2, ta, ma350; RVF-NEXT: vle64.v v8, (a0)351; RVF-NEXT: li a1, 190352; RVF-NEXT: vmv.v.x v9, a1353; RVF-NEXT: fsrmi a1, 1354; RVF-NEXT: vfncvt.f.xu.w v10, v8355; RVF-NEXT: fsrm a1356; RVF-NEXT: vsrl.vi v8, v10, 23357; RVF-NEXT: vwsubu.vv v10, v9, v8358; RVF-NEXT: li a1, 64359; RVF-NEXT: vsetvli zero, zero, e64, m1, ta, ma360; RVF-NEXT: vminu.vx v8, v10, a1361; RVF-NEXT: vse64.v v8, (a0)362; RVF-NEXT: ret363;364; RVD-LABEL: ctlz_v2i64:365; RVD: # %bb.0:366; RVD-NEXT: vsetivli zero, 2, e64, m1, ta, ma367; RVD-NEXT: vle64.v v8, (a0)368; RVD-NEXT: fsrmi a1, 1369; RVD-NEXT: vfcvt.f.xu.v v8, v8370; RVD-NEXT: fsrm a1371; RVD-NEXT: li a1, 52372; RVD-NEXT: vsrl.vx v8, v8, a1373; RVD-NEXT: li a1, 1086374; RVD-NEXT: vrsub.vx v8, v8, a1375; RVD-NEXT: li a1, 64376; RVD-NEXT: vminu.vx v8, v8, a1377; RVD-NEXT: vse64.v v8, (a0)378; RVD-NEXT: ret379;380; ZVBB-LABEL: ctlz_v2i64:381; ZVBB: # %bb.0:382; ZVBB-NEXT: vsetivli zero, 2, e64, m1, ta, ma383; ZVBB-NEXT: vle64.v v8, (a0)384; ZVBB-NEXT: vclz.v v8, v8385; ZVBB-NEXT: vse64.v v8, (a0)386; ZVBB-NEXT: ret387 %a = load <2 x i64>, ptr %x388 %b = load <2 x i64>, ptr %y389 %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)390 store <2 x i64> %c, ptr %x391 ret void392}393 394define void @ctlz_v32i8(ptr %x, ptr %y) nounwind {395; RVI-LABEL: ctlz_v32i8:396; RVI: # %bb.0:397; RVI-NEXT: li a1, 32398; RVI-NEXT: vsetvli zero, a1, e8, m2, ta, ma399; RVI-NEXT: vle8.v v8, (a0)400; RVI-NEXT: li a1, 85401; RVI-NEXT: vsrl.vi v10, v8, 1402; RVI-NEXT: vor.vv v8, v8, v10403; RVI-NEXT: vsrl.vi v10, v8, 2404; RVI-NEXT: vor.vv v8, v8, v10405; RVI-NEXT: vsrl.vi v10, v8, 4406; RVI-NEXT: vor.vv v8, v8, v10407; RVI-NEXT: vnot.v v8, v8408; RVI-NEXT: vsrl.vi v10, v8, 1409; RVI-NEXT: vand.vx v10, v10, a1410; RVI-NEXT: li a1, 51411; RVI-NEXT: vsub.vv v8, v8, v10412; RVI-NEXT: vand.vx v10, v8, a1413; RVI-NEXT: vsrl.vi v8, v8, 2414; RVI-NEXT: vand.vx v8, v8, a1415; RVI-NEXT: vadd.vv v8, v10, v8416; RVI-NEXT: vsrl.vi v10, v8, 4417; RVI-NEXT: vadd.vv v8, v8, v10418; RVI-NEXT: vand.vi v8, v8, 15419; RVI-NEXT: vse8.v v8, (a0)420; RVI-NEXT: ret421;422; RVF-LABEL: ctlz_v32i8:423; RVF: # %bb.0:424; RVF-NEXT: li a1, 32425; RVF-NEXT: vsetvli zero, a1, e16, m4, ta, ma426; RVF-NEXT: vle8.v v8, (a0)427; RVF-NEXT: li a1, 134428; RVF-NEXT: vzext.vf2 v16, v8429; RVF-NEXT: vfwcvt.f.xu.v v8, v16430; RVF-NEXT: vnsrl.wi v16, v8, 23431; RVF-NEXT: vsetvli zero, zero, e8, m2, ta, ma432; RVF-NEXT: vnsrl.wi v8, v16, 0433; RVF-NEXT: vrsub.vx v8, v8, a1434; RVF-NEXT: li a1, 8435; RVF-NEXT: vminu.vx v8, v8, a1436; RVF-NEXT: vse8.v v8, (a0)437; RVF-NEXT: ret438;439; RVD-LABEL: ctlz_v32i8:440; RVD: # %bb.0:441; RVD-NEXT: li a1, 32442; RVD-NEXT: vsetvli zero, a1, e16, m4, ta, ma443; RVD-NEXT: vle8.v v8, (a0)444; RVD-NEXT: li a1, 134445; RVD-NEXT: vzext.vf2 v16, v8446; RVD-NEXT: vfwcvt.f.xu.v v8, v16447; RVD-NEXT: vnsrl.wi v16, v8, 23448; RVD-NEXT: vsetvli zero, zero, e8, m2, ta, ma449; RVD-NEXT: vnsrl.wi v8, v16, 0450; RVD-NEXT: vrsub.vx v8, v8, a1451; RVD-NEXT: li a1, 8452; RVD-NEXT: vminu.vx v8, v8, a1453; RVD-NEXT: vse8.v v8, (a0)454; RVD-NEXT: ret455;456; ZVBB-LABEL: ctlz_v32i8:457; ZVBB: # %bb.0:458; ZVBB-NEXT: li a1, 32459; ZVBB-NEXT: vsetvli zero, a1, e8, m2, ta, ma460; ZVBB-NEXT: vle8.v v8, (a0)461; ZVBB-NEXT: vclz.v v8, v8462; ZVBB-NEXT: vse8.v v8, (a0)463; ZVBB-NEXT: ret464 %a = load <32 x i8>, ptr %x465 %b = load <32 x i8>, ptr %y466 %c = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)467 store <32 x i8> %c, ptr %x468 ret void469}470 471define void @ctlz_v16i16(ptr %x, ptr %y) nounwind {472; RVI-LABEL: ctlz_v16i16:473; RVI: # %bb.0:474; RVI-NEXT: vsetivli zero, 16, e16, m2, ta, ma475; RVI-NEXT: vle16.v v8, (a0)476; RVI-NEXT: lui a1, 5477; RVI-NEXT: addi a1, a1, 1365478; RVI-NEXT: vsrl.vi v10, v8, 1479; RVI-NEXT: vor.vv v8, v8, v10480; RVI-NEXT: vsrl.vi v10, v8, 2481; RVI-NEXT: vor.vv v8, v8, v10482; RVI-NEXT: vsrl.vi v10, v8, 4483; RVI-NEXT: vor.vv v8, v8, v10484; RVI-NEXT: vsrl.vi v10, v8, 8485; RVI-NEXT: vor.vv v8, v8, v10486; RVI-NEXT: vnot.v v8, v8487; RVI-NEXT: vsrl.vi v10, v8, 1488; RVI-NEXT: vand.vx v10, v10, a1489; RVI-NEXT: lui a1, 3490; RVI-NEXT: addi a1, a1, 819491; RVI-NEXT: vsub.vv v8, v8, v10492; RVI-NEXT: vand.vx v10, v8, a1493; RVI-NEXT: vsrl.vi v8, v8, 2494; RVI-NEXT: vand.vx v8, v8, a1495; RVI-NEXT: lui a1, 1496; RVI-NEXT: addi a1, a1, -241497; RVI-NEXT: vadd.vv v8, v10, v8498; RVI-NEXT: vsrl.vi v10, v8, 4499; RVI-NEXT: vadd.vv v8, v8, v10500; RVI-NEXT: vand.vx v8, v8, a1501; RVI-NEXT: li a1, 257502; RVI-NEXT: vmul.vx v8, v8, a1503; RVI-NEXT: vsrl.vi v8, v8, 8504; RVI-NEXT: vse16.v v8, (a0)505; RVI-NEXT: ret506;507; RVF-LABEL: ctlz_v16i16:508; RVF: # %bb.0:509; RVF-NEXT: vsetivli zero, 16, e16, m2, ta, ma510; RVF-NEXT: vle16.v v12, (a0)511; RVF-NEXT: li a1, 142512; RVF-NEXT: vfwcvt.f.xu.v v8, v12513; RVF-NEXT: vnsrl.wi v12, v8, 23514; RVF-NEXT: vrsub.vx v8, v12, a1515; RVF-NEXT: li a1, 16516; RVF-NEXT: vminu.vx v8, v8, a1517; RVF-NEXT: vse16.v v8, (a0)518; RVF-NEXT: ret519;520; RVD-LABEL: ctlz_v16i16:521; RVD: # %bb.0:522; RVD-NEXT: vsetivli zero, 16, e16, m2, ta, ma523; RVD-NEXT: vle16.v v12, (a0)524; RVD-NEXT: li a1, 142525; RVD-NEXT: vfwcvt.f.xu.v v8, v12526; RVD-NEXT: vnsrl.wi v12, v8, 23527; RVD-NEXT: vrsub.vx v8, v12, a1528; RVD-NEXT: li a1, 16529; RVD-NEXT: vminu.vx v8, v8, a1530; RVD-NEXT: vse16.v v8, (a0)531; RVD-NEXT: ret532;533; ZVBB-LABEL: ctlz_v16i16:534; ZVBB: # %bb.0:535; ZVBB-NEXT: vsetivli zero, 16, e16, m2, ta, ma536; ZVBB-NEXT: vle16.v v8, (a0)537; ZVBB-NEXT: vclz.v v8, v8538; ZVBB-NEXT: vse16.v v8, (a0)539; ZVBB-NEXT: ret540 %a = load <16 x i16>, ptr %x541 %b = load <16 x i16>, ptr %y542 %c = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)543 store <16 x i16> %c, ptr %x544 ret void545}546 547define void @ctlz_v8i32(ptr %x, ptr %y) nounwind {548; RVI-LABEL: ctlz_v8i32:549; RVI: # %bb.0:550; RVI-NEXT: vsetivli zero, 8, e32, m2, ta, ma551; RVI-NEXT: vle32.v v8, (a0)552; RVI-NEXT: lui a1, 349525553; RVI-NEXT: addi a1, a1, 1365554; RVI-NEXT: vsrl.vi v10, v8, 1555; RVI-NEXT: vor.vv v8, v8, v10556; RVI-NEXT: vsrl.vi v10, v8, 2557; RVI-NEXT: vor.vv v8, v8, v10558; RVI-NEXT: vsrl.vi v10, v8, 4559; RVI-NEXT: vor.vv v8, v8, v10560; RVI-NEXT: vsrl.vi v10, v8, 8561; RVI-NEXT: vor.vv v8, v8, v10562; RVI-NEXT: vsrl.vi v10, v8, 16563; RVI-NEXT: vor.vv v8, v8, v10564; RVI-NEXT: vnot.v v8, v8565; RVI-NEXT: vsrl.vi v10, v8, 1566; RVI-NEXT: vand.vx v10, v10, a1567; RVI-NEXT: lui a1, 209715568; RVI-NEXT: addi a1, a1, 819569; RVI-NEXT: vsub.vv v8, v8, v10570; RVI-NEXT: vand.vx v10, v8, a1571; RVI-NEXT: vsrl.vi v8, v8, 2572; RVI-NEXT: vand.vx v8, v8, a1573; RVI-NEXT: lui a1, 61681574; RVI-NEXT: addi a1, a1, -241575; RVI-NEXT: vadd.vv v8, v10, v8576; RVI-NEXT: vsrl.vi v10, v8, 4577; RVI-NEXT: vadd.vv v8, v8, v10578; RVI-NEXT: vand.vx v8, v8, a1579; RVI-NEXT: lui a1, 4112580; RVI-NEXT: addi a1, a1, 257581; RVI-NEXT: vmul.vx v8, v8, a1582; RVI-NEXT: vsrl.vi v8, v8, 24583; RVI-NEXT: vse32.v v8, (a0)584; RVI-NEXT: ret585;586; RVF-LABEL: ctlz_v8i32:587; RVF: # %bb.0:588; RVF-NEXT: vsetivli zero, 8, e32, m2, ta, ma589; RVF-NEXT: vle32.v v8, (a0)590; RVF-NEXT: fsrmi a1, 1591; RVF-NEXT: vfcvt.f.xu.v v8, v8592; RVF-NEXT: fsrm a1593; RVF-NEXT: li a1, 158594; RVF-NEXT: vsrl.vi v8, v8, 23595; RVF-NEXT: vrsub.vx v8, v8, a1596; RVF-NEXT: li a1, 32597; RVF-NEXT: vminu.vx v8, v8, a1598; RVF-NEXT: vse32.v v8, (a0)599; RVF-NEXT: ret600;601; RVD-LABEL: ctlz_v8i32:602; RVD: # %bb.0:603; RVD-NEXT: vsetivli zero, 8, e32, m2, ta, ma604; RVD-NEXT: vle32.v v12, (a0)605; RVD-NEXT: li a1, 52606; RVD-NEXT: vfwcvt.f.xu.v v8, v12607; RVD-NEXT: vnsrl.wx v12, v8, a1608; RVD-NEXT: li a1, 1054609; RVD-NEXT: vrsub.vx v8, v12, a1610; RVD-NEXT: li a1, 32611; RVD-NEXT: vminu.vx v8, v8, a1612; RVD-NEXT: vse32.v v8, (a0)613; RVD-NEXT: ret614;615; ZVBB-LABEL: ctlz_v8i32:616; ZVBB: # %bb.0:617; ZVBB-NEXT: vsetivli zero, 8, e32, m2, ta, ma618; ZVBB-NEXT: vle32.v v8, (a0)619; ZVBB-NEXT: vclz.v v8, v8620; ZVBB-NEXT: vse32.v v8, (a0)621; ZVBB-NEXT: ret622 %a = load <8 x i32>, ptr %x623 %b = load <8 x i32>, ptr %y624 %c = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)625 store <8 x i32> %c, ptr %x626 ret void627}628 629define void @ctlz_v4i64(ptr %x, ptr %y) nounwind {630; RV32I-LABEL: ctlz_v4i64:631; RV32I: # %bb.0:632; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma633; RV32I-NEXT: vle64.v v8, (a0)634; RV32I-NEXT: lui a1, 349525635; RV32I-NEXT: addi a1, a1, 1365636; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma637; RV32I-NEXT: vmv.v.x v10, a1638; RV32I-NEXT: li a1, 32639; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma640; RV32I-NEXT: vsrl.vi v12, v8, 1641; RV32I-NEXT: vor.vv v8, v8, v12642; RV32I-NEXT: vsrl.vi v12, v8, 2643; RV32I-NEXT: vor.vv v8, v8, v12644; RV32I-NEXT: vsrl.vi v12, v8, 4645; RV32I-NEXT: vor.vv v8, v8, v12646; RV32I-NEXT: vsrl.vi v12, v8, 8647; RV32I-NEXT: vor.vv v8, v8, v12648; RV32I-NEXT: vsrl.vi v12, v8, 16649; RV32I-NEXT: vor.vv v8, v8, v12650; RV32I-NEXT: vsrl.vx v12, v8, a1651; RV32I-NEXT: lui a1, 209715652; RV32I-NEXT: addi a1, a1, 819653; RV32I-NEXT: vor.vv v8, v8, v12654; RV32I-NEXT: vnot.v v8, v8655; RV32I-NEXT: vsrl.vi v12, v8, 1656; RV32I-NEXT: vand.vv v10, v12, v10657; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma658; RV32I-NEXT: vmv.v.x v12, a1659; RV32I-NEXT: lui a1, 61681660; RV32I-NEXT: addi a1, a1, -241661; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma662; RV32I-NEXT: vsub.vv v8, v8, v10663; RV32I-NEXT: vand.vv v10, v8, v12664; RV32I-NEXT: vsrl.vi v8, v8, 2665; RV32I-NEXT: vand.vv v8, v8, v12666; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma667; RV32I-NEXT: vmv.v.x v12, a1668; RV32I-NEXT: lui a1, 4112669; RV32I-NEXT: addi a1, a1, 257670; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma671; RV32I-NEXT: vadd.vv v8, v10, v8672; RV32I-NEXT: vsrl.vi v10, v8, 4673; RV32I-NEXT: vadd.vv v8, v8, v10674; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma675; RV32I-NEXT: vmv.v.x v10, a1676; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma677; RV32I-NEXT: vand.vv v8, v8, v12678; RV32I-NEXT: vmul.vv v8, v8, v10679; RV32I-NEXT: li a1, 56680; RV32I-NEXT: vsrl.vx v8, v8, a1681; RV32I-NEXT: vse64.v v8, (a0)682; RV32I-NEXT: ret683;684; RV64I-LABEL: ctlz_v4i64:685; RV64I: # %bb.0:686; RV64I-NEXT: vsetivli zero, 4, e64, m2, ta, ma687; RV64I-NEXT: vle64.v v8, (a0)688; RV64I-NEXT: lui a1, 349525689; RV64I-NEXT: lui a2, 209715690; RV64I-NEXT: lui a3, 61681691; RV64I-NEXT: lui a4, 4112692; RV64I-NEXT: addi a1, a1, 1365693; RV64I-NEXT: addi a2, a2, 819694; RV64I-NEXT: addi a3, a3, -241695; RV64I-NEXT: addi a4, a4, 257696; RV64I-NEXT: slli a5, a1, 32697; RV64I-NEXT: add a1, a1, a5698; RV64I-NEXT: slli a5, a2, 32699; RV64I-NEXT: add a2, a2, a5700; RV64I-NEXT: slli a5, a3, 32701; RV64I-NEXT: add a3, a3, a5702; RV64I-NEXT: slli a5, a4, 32703; RV64I-NEXT: add a4, a4, a5704; RV64I-NEXT: li a5, 32705; RV64I-NEXT: vsrl.vi v10, v8, 1706; RV64I-NEXT: vor.vv v8, v8, v10707; RV64I-NEXT: vsrl.vi v10, v8, 2708; RV64I-NEXT: vor.vv v8, v8, v10709; RV64I-NEXT: vsrl.vi v10, v8, 4710; RV64I-NEXT: vor.vv v8, v8, v10711; RV64I-NEXT: vsrl.vi v10, v8, 8712; RV64I-NEXT: vor.vv v8, v8, v10713; RV64I-NEXT: vsrl.vi v10, v8, 16714; RV64I-NEXT: vor.vv v8, v8, v10715; RV64I-NEXT: vsrl.vx v10, v8, a5716; RV64I-NEXT: vor.vv v8, v8, v10717; RV64I-NEXT: vnot.v v8, v8718; RV64I-NEXT: vsrl.vi v10, v8, 1719; RV64I-NEXT: vand.vx v10, v10, a1720; RV64I-NEXT: vsub.vv v8, v8, v10721; RV64I-NEXT: vand.vx v10, v8, a2722; RV64I-NEXT: vsrl.vi v8, v8, 2723; RV64I-NEXT: vand.vx v8, v8, a2724; RV64I-NEXT: vadd.vv v8, v10, v8725; RV64I-NEXT: vsrl.vi v10, v8, 4726; RV64I-NEXT: vadd.vv v8, v8, v10727; RV64I-NEXT: vand.vx v8, v8, a3728; RV64I-NEXT: vmul.vx v8, v8, a4729; RV64I-NEXT: li a1, 56730; RV64I-NEXT: vsrl.vx v8, v8, a1731; RV64I-NEXT: vse64.v v8, (a0)732; RV64I-NEXT: ret733;734; RVF-LABEL: ctlz_v4i64:735; RVF: # %bb.0:736; RVF-NEXT: vsetivli zero, 4, e32, m1, ta, ma737; RVF-NEXT: vle64.v v8, (a0)738; RVF-NEXT: li a1, 190739; RVF-NEXT: vmv.v.x v10, a1740; RVF-NEXT: fsrmi a1, 1741; RVF-NEXT: vfncvt.f.xu.w v11, v8742; RVF-NEXT: fsrm a1743; RVF-NEXT: vsrl.vi v11, v11, 23744; RVF-NEXT: vwsubu.vv v8, v10, v11745; RVF-NEXT: li a1, 64746; RVF-NEXT: vsetvli zero, zero, e64, m2, ta, ma747; RVF-NEXT: vminu.vx v8, v8, a1748; RVF-NEXT: vse64.v v8, (a0)749; RVF-NEXT: ret750;751; RVD-LABEL: ctlz_v4i64:752; RVD: # %bb.0:753; RVD-NEXT: vsetivli zero, 4, e64, m2, ta, ma754; RVD-NEXT: vle64.v v8, (a0)755; RVD-NEXT: fsrmi a1, 1756; RVD-NEXT: vfcvt.f.xu.v v8, v8757; RVD-NEXT: fsrm a1758; RVD-NEXT: li a1, 52759; RVD-NEXT: vsrl.vx v8, v8, a1760; RVD-NEXT: li a1, 1086761; RVD-NEXT: vrsub.vx v8, v8, a1762; RVD-NEXT: li a1, 64763; RVD-NEXT: vminu.vx v8, v8, a1764; RVD-NEXT: vse64.v v8, (a0)765; RVD-NEXT: ret766;767; ZVBB-LABEL: ctlz_v4i64:768; ZVBB: # %bb.0:769; ZVBB-NEXT: vsetivli zero, 4, e64, m2, ta, ma770; ZVBB-NEXT: vle64.v v8, (a0)771; ZVBB-NEXT: vclz.v v8, v8772; ZVBB-NEXT: vse64.v v8, (a0)773; ZVBB-NEXT: ret774 %a = load <4 x i64>, ptr %x775 %b = load <4 x i64>, ptr %y776 %c = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)777 store <4 x i64> %c, ptr %x778 ret void779}780 781define void @ctlz_zero_undef_v16i8(ptr %x, ptr %y) nounwind {782; RVI-LABEL: ctlz_zero_undef_v16i8:783; RVI: # %bb.0:784; RVI-NEXT: vsetivli zero, 16, e8, m1, ta, ma785; RVI-NEXT: vle8.v v8, (a0)786; RVI-NEXT: li a1, 85787; RVI-NEXT: vsrl.vi v9, v8, 1788; RVI-NEXT: vor.vv v8, v8, v9789; RVI-NEXT: vsrl.vi v9, v8, 2790; RVI-NEXT: vor.vv v8, v8, v9791; RVI-NEXT: vsrl.vi v9, v8, 4792; RVI-NEXT: vor.vv v8, v8, v9793; RVI-NEXT: vnot.v v8, v8794; RVI-NEXT: vsrl.vi v9, v8, 1795; RVI-NEXT: vand.vx v9, v9, a1796; RVI-NEXT: li a1, 51797; RVI-NEXT: vsub.vv v8, v8, v9798; RVI-NEXT: vand.vx v9, v8, a1799; RVI-NEXT: vsrl.vi v8, v8, 2800; RVI-NEXT: vand.vx v8, v8, a1801; RVI-NEXT: vadd.vv v8, v9, v8802; RVI-NEXT: vsrl.vi v9, v8, 4803; RVI-NEXT: vadd.vv v8, v8, v9804; RVI-NEXT: vand.vi v8, v8, 15805; RVI-NEXT: vse8.v v8, (a0)806; RVI-NEXT: ret807;808; RVF-LABEL: ctlz_zero_undef_v16i8:809; RVF: # %bb.0:810; RVF-NEXT: vsetivli zero, 16, e16, m2, ta, ma811; RVF-NEXT: vle8.v v8, (a0)812; RVF-NEXT: vzext.vf2 v12, v8813; RVF-NEXT: vfwcvt.f.xu.v v8, v12814; RVF-NEXT: vnsrl.wi v12, v8, 23815; RVF-NEXT: vsetvli zero, zero, e8, m1, ta, ma816; RVF-NEXT: vnsrl.wi v8, v12, 0817; RVF-NEXT: li a1, 134818; RVF-NEXT: vrsub.vx v8, v8, a1819; RVF-NEXT: vse8.v v8, (a0)820; RVF-NEXT: ret821;822; RVD-LABEL: ctlz_zero_undef_v16i8:823; RVD: # %bb.0:824; RVD-NEXT: vsetivli zero, 16, e16, m2, ta, ma825; RVD-NEXT: vle8.v v8, (a0)826; RVD-NEXT: vzext.vf2 v12, v8827; RVD-NEXT: vfwcvt.f.xu.v v8, v12828; RVD-NEXT: vnsrl.wi v12, v8, 23829; RVD-NEXT: vsetvli zero, zero, e8, m1, ta, ma830; RVD-NEXT: vnsrl.wi v8, v12, 0831; RVD-NEXT: li a1, 134832; RVD-NEXT: vrsub.vx v8, v8, a1833; RVD-NEXT: vse8.v v8, (a0)834; RVD-NEXT: ret835;836; ZVBB-LABEL: ctlz_zero_undef_v16i8:837; ZVBB: # %bb.0:838; ZVBB-NEXT: vsetivli zero, 16, e8, m1, ta, ma839; ZVBB-NEXT: vle8.v v8, (a0)840; ZVBB-NEXT: vclz.v v8, v8841; ZVBB-NEXT: vse8.v v8, (a0)842; ZVBB-NEXT: ret843 %a = load <16 x i8>, ptr %x844 %b = load <16 x i8>, ptr %y845 %c = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)846 store <16 x i8> %c, ptr %x847 ret void848}849 850define void @ctlz_zero_undef_v8i16(ptr %x, ptr %y) nounwind {851; RVI-LABEL: ctlz_zero_undef_v8i16:852; RVI: # %bb.0:853; RVI-NEXT: vsetivli zero, 8, e16, m1, ta, ma854; RVI-NEXT: vle16.v v8, (a0)855; RVI-NEXT: lui a1, 5856; RVI-NEXT: addi a1, a1, 1365857; RVI-NEXT: vsrl.vi v9, v8, 1858; RVI-NEXT: vor.vv v8, v8, v9859; RVI-NEXT: vsrl.vi v9, v8, 2860; RVI-NEXT: vor.vv v8, v8, v9861; RVI-NEXT: vsrl.vi v9, v8, 4862; RVI-NEXT: vor.vv v8, v8, v9863; RVI-NEXT: vsrl.vi v9, v8, 8864; RVI-NEXT: vor.vv v8, v8, v9865; RVI-NEXT: vnot.v v8, v8866; RVI-NEXT: vsrl.vi v9, v8, 1867; RVI-NEXT: vand.vx v9, v9, a1868; RVI-NEXT: lui a1, 3869; RVI-NEXT: addi a1, a1, 819870; RVI-NEXT: vsub.vv v8, v8, v9871; RVI-NEXT: vand.vx v9, v8, a1872; RVI-NEXT: vsrl.vi v8, v8, 2873; RVI-NEXT: vand.vx v8, v8, a1874; RVI-NEXT: lui a1, 1875; RVI-NEXT: addi a1, a1, -241876; RVI-NEXT: vadd.vv v8, v9, v8877; RVI-NEXT: vsrl.vi v9, v8, 4878; RVI-NEXT: vadd.vv v8, v8, v9879; RVI-NEXT: vand.vx v8, v8, a1880; RVI-NEXT: li a1, 257881; RVI-NEXT: vmul.vx v8, v8, a1882; RVI-NEXT: vsrl.vi v8, v8, 8883; RVI-NEXT: vse16.v v8, (a0)884; RVI-NEXT: ret885;886; RVF-LABEL: ctlz_zero_undef_v8i16:887; RVF: # %bb.0:888; RVF-NEXT: vsetivli zero, 8, e16, m1, ta, ma889; RVF-NEXT: vle16.v v10, (a0)890; RVF-NEXT: vfwcvt.f.xu.v v8, v10891; RVF-NEXT: vnsrl.wi v10, v8, 23892; RVF-NEXT: li a1, 142893; RVF-NEXT: vrsub.vx v8, v10, a1894; RVF-NEXT: vse16.v v8, (a0)895; RVF-NEXT: ret896;897; RVD-LABEL: ctlz_zero_undef_v8i16:898; RVD: # %bb.0:899; RVD-NEXT: vsetivli zero, 8, e16, m1, ta, ma900; RVD-NEXT: vle16.v v10, (a0)901; RVD-NEXT: vfwcvt.f.xu.v v8, v10902; RVD-NEXT: vnsrl.wi v10, v8, 23903; RVD-NEXT: li a1, 142904; RVD-NEXT: vrsub.vx v8, v10, a1905; RVD-NEXT: vse16.v v8, (a0)906; RVD-NEXT: ret907;908; ZVBB-LABEL: ctlz_zero_undef_v8i16:909; ZVBB: # %bb.0:910; ZVBB-NEXT: vsetivli zero, 8, e16, m1, ta, ma911; ZVBB-NEXT: vle16.v v8, (a0)912; ZVBB-NEXT: vclz.v v8, v8913; ZVBB-NEXT: vse16.v v8, (a0)914; ZVBB-NEXT: ret915 %a = load <8 x i16>, ptr %x916 %b = load <8 x i16>, ptr %y917 %c = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)918 store <8 x i16> %c, ptr %x919 ret void920}921 922define void @ctlz_zero_undef_v4i32(ptr %x, ptr %y) nounwind {923; RVI-LABEL: ctlz_zero_undef_v4i32:924; RVI: # %bb.0:925; RVI-NEXT: vsetivli zero, 4, e32, m1, ta, ma926; RVI-NEXT: vle32.v v8, (a0)927; RVI-NEXT: lui a1, 349525928; RVI-NEXT: addi a1, a1, 1365929; RVI-NEXT: vsrl.vi v9, v8, 1930; RVI-NEXT: vor.vv v8, v8, v9931; RVI-NEXT: vsrl.vi v9, v8, 2932; RVI-NEXT: vor.vv v8, v8, v9933; RVI-NEXT: vsrl.vi v9, v8, 4934; RVI-NEXT: vor.vv v8, v8, v9935; RVI-NEXT: vsrl.vi v9, v8, 8936; RVI-NEXT: vor.vv v8, v8, v9937; RVI-NEXT: vsrl.vi v9, v8, 16938; RVI-NEXT: vor.vv v8, v8, v9939; RVI-NEXT: vnot.v v8, v8940; RVI-NEXT: vsrl.vi v9, v8, 1941; RVI-NEXT: vand.vx v9, v9, a1942; RVI-NEXT: lui a1, 209715943; RVI-NEXT: addi a1, a1, 819944; RVI-NEXT: vsub.vv v8, v8, v9945; RVI-NEXT: vand.vx v9, v8, a1946; RVI-NEXT: vsrl.vi v8, v8, 2947; RVI-NEXT: vand.vx v8, v8, a1948; RVI-NEXT: lui a1, 61681949; RVI-NEXT: addi a1, a1, -241950; RVI-NEXT: vadd.vv v8, v9, v8951; RVI-NEXT: vsrl.vi v9, v8, 4952; RVI-NEXT: vadd.vv v8, v8, v9953; RVI-NEXT: vand.vx v8, v8, a1954; RVI-NEXT: lui a1, 4112955; RVI-NEXT: addi a1, a1, 257956; RVI-NEXT: vmul.vx v8, v8, a1957; RVI-NEXT: vsrl.vi v8, v8, 24958; RVI-NEXT: vse32.v v8, (a0)959; RVI-NEXT: ret960;961; RVF-LABEL: ctlz_zero_undef_v4i32:962; RVF: # %bb.0:963; RVF-NEXT: vsetivli zero, 4, e32, m1, ta, ma964; RVF-NEXT: vle32.v v8, (a0)965; RVF-NEXT: fsrmi a1, 1966; RVF-NEXT: vfcvt.f.xu.v v8, v8967; RVF-NEXT: fsrm a1968; RVF-NEXT: vsrl.vi v8, v8, 23969; RVF-NEXT: li a1, 158970; RVF-NEXT: vrsub.vx v8, v8, a1971; RVF-NEXT: vse32.v v8, (a0)972; RVF-NEXT: ret973;974; RVD-LABEL: ctlz_zero_undef_v4i32:975; RVD: # %bb.0:976; RVD-NEXT: vsetivli zero, 4, e32, m1, ta, ma977; RVD-NEXT: vle32.v v10, (a0)978; RVD-NEXT: li a1, 52979; RVD-NEXT: vfwcvt.f.xu.v v8, v10980; RVD-NEXT: vnsrl.wx v10, v8, a1981; RVD-NEXT: li a1, 1054982; RVD-NEXT: vrsub.vx v8, v10, a1983; RVD-NEXT: vse32.v v8, (a0)984; RVD-NEXT: ret985;986; ZVBB-LABEL: ctlz_zero_undef_v4i32:987; ZVBB: # %bb.0:988; ZVBB-NEXT: vsetivli zero, 4, e32, m1, ta, ma989; ZVBB-NEXT: vle32.v v8, (a0)990; ZVBB-NEXT: vclz.v v8, v8991; ZVBB-NEXT: vse32.v v8, (a0)992; ZVBB-NEXT: ret993 %a = load <4 x i32>, ptr %x994 %b = load <4 x i32>, ptr %y995 %c = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)996 store <4 x i32> %c, ptr %x997 ret void998}999 1000define void @ctlz_zero_undef_v2i64(ptr %x, ptr %y) nounwind {1001; RV32I-LABEL: ctlz_zero_undef_v2i64:1002; RV32I: # %bb.0:1003; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1004; RV32I-NEXT: vle64.v v8, (a0)1005; RV32I-NEXT: lui a1, 3495251006; RV32I-NEXT: addi a1, a1, 13651007; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma1008; RV32I-NEXT: vmv.v.x v9, a11009; RV32I-NEXT: li a1, 321010; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1011; RV32I-NEXT: vsrl.vi v10, v8, 11012; RV32I-NEXT: vor.vv v8, v8, v101013; RV32I-NEXT: vsrl.vi v10, v8, 21014; RV32I-NEXT: vor.vv v8, v8, v101015; RV32I-NEXT: vsrl.vi v10, v8, 41016; RV32I-NEXT: vor.vv v8, v8, v101017; RV32I-NEXT: vsrl.vi v10, v8, 81018; RV32I-NEXT: vor.vv v8, v8, v101019; RV32I-NEXT: vsrl.vi v10, v8, 161020; RV32I-NEXT: vor.vv v8, v8, v101021; RV32I-NEXT: vsrl.vx v10, v8, a11022; RV32I-NEXT: lui a1, 2097151023; RV32I-NEXT: addi a1, a1, 8191024; RV32I-NEXT: vor.vv v8, v8, v101025; RV32I-NEXT: vnot.v v8, v81026; RV32I-NEXT: vsrl.vi v10, v8, 11027; RV32I-NEXT: vand.vv v9, v10, v91028; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma1029; RV32I-NEXT: vmv.v.x v10, a11030; RV32I-NEXT: lui a1, 616811031; RV32I-NEXT: addi a1, a1, -2411032; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1033; RV32I-NEXT: vsub.vv v8, v8, v91034; RV32I-NEXT: vand.vv v9, v8, v101035; RV32I-NEXT: vsrl.vi v8, v8, 21036; RV32I-NEXT: vand.vv v8, v8, v101037; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma1038; RV32I-NEXT: vmv.v.x v10, a11039; RV32I-NEXT: lui a1, 41121040; RV32I-NEXT: addi a1, a1, 2571041; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1042; RV32I-NEXT: vadd.vv v8, v9, v81043; RV32I-NEXT: vsrl.vi v9, v8, 41044; RV32I-NEXT: vadd.vv v8, v8, v91045; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma1046; RV32I-NEXT: vmv.v.x v9, a11047; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1048; RV32I-NEXT: vand.vv v8, v8, v101049; RV32I-NEXT: vmul.vv v8, v8, v91050; RV32I-NEXT: li a1, 561051; RV32I-NEXT: vsrl.vx v8, v8, a11052; RV32I-NEXT: vse64.v v8, (a0)1053; RV32I-NEXT: ret1054;1055; RV64I-LABEL: ctlz_zero_undef_v2i64:1056; RV64I: # %bb.0:1057; RV64I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1058; RV64I-NEXT: vle64.v v8, (a0)1059; RV64I-NEXT: lui a1, 3495251060; RV64I-NEXT: lui a2, 2097151061; RV64I-NEXT: lui a3, 616811062; RV64I-NEXT: lui a4, 41121063; RV64I-NEXT: addi a1, a1, 13651064; RV64I-NEXT: addi a2, a2, 8191065; RV64I-NEXT: addi a3, a3, -2411066; RV64I-NEXT: addi a4, a4, 2571067; RV64I-NEXT: slli a5, a1, 321068; RV64I-NEXT: add a1, a1, a51069; RV64I-NEXT: slli a5, a2, 321070; RV64I-NEXT: add a2, a2, a51071; RV64I-NEXT: slli a5, a3, 321072; RV64I-NEXT: add a3, a3, a51073; RV64I-NEXT: slli a5, a4, 321074; RV64I-NEXT: add a4, a4, a51075; RV64I-NEXT: li a5, 321076; RV64I-NEXT: vsrl.vi v9, v8, 11077; RV64I-NEXT: vor.vv v8, v8, v91078; RV64I-NEXT: vsrl.vi v9, v8, 21079; RV64I-NEXT: vor.vv v8, v8, v91080; RV64I-NEXT: vsrl.vi v9, v8, 41081; RV64I-NEXT: vor.vv v8, v8, v91082; RV64I-NEXT: vsrl.vi v9, v8, 81083; RV64I-NEXT: vor.vv v8, v8, v91084; RV64I-NEXT: vsrl.vi v9, v8, 161085; RV64I-NEXT: vor.vv v8, v8, v91086; RV64I-NEXT: vsrl.vx v9, v8, a51087; RV64I-NEXT: vor.vv v8, v8, v91088; RV64I-NEXT: vnot.v v8, v81089; RV64I-NEXT: vsrl.vi v9, v8, 11090; RV64I-NEXT: vand.vx v9, v9, a11091; RV64I-NEXT: vsub.vv v8, v8, v91092; RV64I-NEXT: vand.vx v9, v8, a21093; RV64I-NEXT: vsrl.vi v8, v8, 21094; RV64I-NEXT: vand.vx v8, v8, a21095; RV64I-NEXT: vadd.vv v8, v9, v81096; RV64I-NEXT: vsrl.vi v9, v8, 41097; RV64I-NEXT: vadd.vv v8, v8, v91098; RV64I-NEXT: vand.vx v8, v8, a31099; RV64I-NEXT: vmul.vx v8, v8, a41100; RV64I-NEXT: li a1, 561101; RV64I-NEXT: vsrl.vx v8, v8, a11102; RV64I-NEXT: vse64.v v8, (a0)1103; RV64I-NEXT: ret1104;1105; RVF-LABEL: ctlz_zero_undef_v2i64:1106; RVF: # %bb.0:1107; RVF-NEXT: vsetivli zero, 2, e32, mf2, ta, ma1108; RVF-NEXT: vle64.v v8, (a0)1109; RVF-NEXT: li a1, 1901110; RVF-NEXT: vmv.v.x v9, a11111; RVF-NEXT: fsrmi a1, 11112; RVF-NEXT: vfncvt.f.xu.w v10, v81113; RVF-NEXT: fsrm a11114; RVF-NEXT: vsrl.vi v8, v10, 231115; RVF-NEXT: vwsubu.vv v10, v9, v81116; RVF-NEXT: vse64.v v10, (a0)1117; RVF-NEXT: ret1118;1119; RVD-LABEL: ctlz_zero_undef_v2i64:1120; RVD: # %bb.0:1121; RVD-NEXT: vsetivli zero, 2, e64, m1, ta, ma1122; RVD-NEXT: vle64.v v8, (a0)1123; RVD-NEXT: fsrmi a1, 11124; RVD-NEXT: vfcvt.f.xu.v v8, v81125; RVD-NEXT: fsrm a11126; RVD-NEXT: li a1, 521127; RVD-NEXT: vsrl.vx v8, v8, a11128; RVD-NEXT: li a1, 10861129; RVD-NEXT: vrsub.vx v8, v8, a11130; RVD-NEXT: vse64.v v8, (a0)1131; RVD-NEXT: ret1132;1133; ZVBB-LABEL: ctlz_zero_undef_v2i64:1134; ZVBB: # %bb.0:1135; ZVBB-NEXT: vsetivli zero, 2, e64, m1, ta, ma1136; ZVBB-NEXT: vle64.v v8, (a0)1137; ZVBB-NEXT: vclz.v v8, v81138; ZVBB-NEXT: vse64.v v8, (a0)1139; ZVBB-NEXT: ret1140 %a = load <2 x i64>, ptr %x1141 %b = load <2 x i64>, ptr %y1142 %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)1143 store <2 x i64> %c, ptr %x1144 ret void1145}1146 1147define void @ctlz_zero_undef_v32i8(ptr %x, ptr %y) nounwind {1148; RVI-LABEL: ctlz_zero_undef_v32i8:1149; RVI: # %bb.0:1150; RVI-NEXT: li a1, 321151; RVI-NEXT: vsetvli zero, a1, e8, m2, ta, ma1152; RVI-NEXT: vle8.v v8, (a0)1153; RVI-NEXT: li a1, 851154; RVI-NEXT: vsrl.vi v10, v8, 11155; RVI-NEXT: vor.vv v8, v8, v101156; RVI-NEXT: vsrl.vi v10, v8, 21157; RVI-NEXT: vor.vv v8, v8, v101158; RVI-NEXT: vsrl.vi v10, v8, 41159; RVI-NEXT: vor.vv v8, v8, v101160; RVI-NEXT: vnot.v v8, v81161; RVI-NEXT: vsrl.vi v10, v8, 11162; RVI-NEXT: vand.vx v10, v10, a11163; RVI-NEXT: li a1, 511164; RVI-NEXT: vsub.vv v8, v8, v101165; RVI-NEXT: vand.vx v10, v8, a11166; RVI-NEXT: vsrl.vi v8, v8, 21167; RVI-NEXT: vand.vx v8, v8, a11168; RVI-NEXT: vadd.vv v8, v10, v81169; RVI-NEXT: vsrl.vi v10, v8, 41170; RVI-NEXT: vadd.vv v8, v8, v101171; RVI-NEXT: vand.vi v8, v8, 151172; RVI-NEXT: vse8.v v8, (a0)1173; RVI-NEXT: ret1174;1175; RVF-LABEL: ctlz_zero_undef_v32i8:1176; RVF: # %bb.0:1177; RVF-NEXT: li a1, 321178; RVF-NEXT: vsetvli zero, a1, e16, m4, ta, ma1179; RVF-NEXT: vle8.v v8, (a0)1180; RVF-NEXT: vzext.vf2 v16, v81181; RVF-NEXT: vfwcvt.f.xu.v v8, v161182; RVF-NEXT: vnsrl.wi v16, v8, 231183; RVF-NEXT: vsetvli zero, zero, e8, m2, ta, ma1184; RVF-NEXT: vnsrl.wi v8, v16, 01185; RVF-NEXT: li a1, 1341186; RVF-NEXT: vrsub.vx v8, v8, a11187; RVF-NEXT: vse8.v v8, (a0)1188; RVF-NEXT: ret1189;1190; RVD-LABEL: ctlz_zero_undef_v32i8:1191; RVD: # %bb.0:1192; RVD-NEXT: li a1, 321193; RVD-NEXT: vsetvli zero, a1, e16, m4, ta, ma1194; RVD-NEXT: vle8.v v8, (a0)1195; RVD-NEXT: vzext.vf2 v16, v81196; RVD-NEXT: vfwcvt.f.xu.v v8, v161197; RVD-NEXT: vnsrl.wi v16, v8, 231198; RVD-NEXT: vsetvli zero, zero, e8, m2, ta, ma1199; RVD-NEXT: vnsrl.wi v8, v16, 01200; RVD-NEXT: li a1, 1341201; RVD-NEXT: vrsub.vx v8, v8, a11202; RVD-NEXT: vse8.v v8, (a0)1203; RVD-NEXT: ret1204;1205; ZVBB-LABEL: ctlz_zero_undef_v32i8:1206; ZVBB: # %bb.0:1207; ZVBB-NEXT: li a1, 321208; ZVBB-NEXT: vsetvli zero, a1, e8, m2, ta, ma1209; ZVBB-NEXT: vle8.v v8, (a0)1210; ZVBB-NEXT: vclz.v v8, v81211; ZVBB-NEXT: vse8.v v8, (a0)1212; ZVBB-NEXT: ret1213 %a = load <32 x i8>, ptr %x1214 %b = load <32 x i8>, ptr %y1215 %c = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)1216 store <32 x i8> %c, ptr %x1217 ret void1218}1219 1220define void @ctlz_zero_undef_v16i16(ptr %x, ptr %y) nounwind {1221; RVI-LABEL: ctlz_zero_undef_v16i16:1222; RVI: # %bb.0:1223; RVI-NEXT: vsetivli zero, 16, e16, m2, ta, ma1224; RVI-NEXT: vle16.v v8, (a0)1225; RVI-NEXT: lui a1, 51226; RVI-NEXT: addi a1, a1, 13651227; RVI-NEXT: vsrl.vi v10, v8, 11228; RVI-NEXT: vor.vv v8, v8, v101229; RVI-NEXT: vsrl.vi v10, v8, 21230; RVI-NEXT: vor.vv v8, v8, v101231; RVI-NEXT: vsrl.vi v10, v8, 41232; RVI-NEXT: vor.vv v8, v8, v101233; RVI-NEXT: vsrl.vi v10, v8, 81234; RVI-NEXT: vor.vv v8, v8, v101235; RVI-NEXT: vnot.v v8, v81236; RVI-NEXT: vsrl.vi v10, v8, 11237; RVI-NEXT: vand.vx v10, v10, a11238; RVI-NEXT: lui a1, 31239; RVI-NEXT: addi a1, a1, 8191240; RVI-NEXT: vsub.vv v8, v8, v101241; RVI-NEXT: vand.vx v10, v8, a11242; RVI-NEXT: vsrl.vi v8, v8, 21243; RVI-NEXT: vand.vx v8, v8, a11244; RVI-NEXT: lui a1, 11245; RVI-NEXT: addi a1, a1, -2411246; RVI-NEXT: vadd.vv v8, v10, v81247; RVI-NEXT: vsrl.vi v10, v8, 41248; RVI-NEXT: vadd.vv v8, v8, v101249; RVI-NEXT: vand.vx v8, v8, a11250; RVI-NEXT: li a1, 2571251; RVI-NEXT: vmul.vx v8, v8, a11252; RVI-NEXT: vsrl.vi v8, v8, 81253; RVI-NEXT: vse16.v v8, (a0)1254; RVI-NEXT: ret1255;1256; RVF-LABEL: ctlz_zero_undef_v16i16:1257; RVF: # %bb.0:1258; RVF-NEXT: vsetivli zero, 16, e16, m2, ta, ma1259; RVF-NEXT: vle16.v v12, (a0)1260; RVF-NEXT: vfwcvt.f.xu.v v8, v121261; RVF-NEXT: vnsrl.wi v12, v8, 231262; RVF-NEXT: li a1, 1421263; RVF-NEXT: vrsub.vx v8, v12, a11264; RVF-NEXT: vse16.v v8, (a0)1265; RVF-NEXT: ret1266;1267; RVD-LABEL: ctlz_zero_undef_v16i16:1268; RVD: # %bb.0:1269; RVD-NEXT: vsetivli zero, 16, e16, m2, ta, ma1270; RVD-NEXT: vle16.v v12, (a0)1271; RVD-NEXT: vfwcvt.f.xu.v v8, v121272; RVD-NEXT: vnsrl.wi v12, v8, 231273; RVD-NEXT: li a1, 1421274; RVD-NEXT: vrsub.vx v8, v12, a11275; RVD-NEXT: vse16.v v8, (a0)1276; RVD-NEXT: ret1277;1278; ZVBB-LABEL: ctlz_zero_undef_v16i16:1279; ZVBB: # %bb.0:1280; ZVBB-NEXT: vsetivli zero, 16, e16, m2, ta, ma1281; ZVBB-NEXT: vle16.v v8, (a0)1282; ZVBB-NEXT: vclz.v v8, v81283; ZVBB-NEXT: vse16.v v8, (a0)1284; ZVBB-NEXT: ret1285 %a = load <16 x i16>, ptr %x1286 %b = load <16 x i16>, ptr %y1287 %c = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)1288 store <16 x i16> %c, ptr %x1289 ret void1290}1291 1292define void @ctlz_zero_undef_v8i32(ptr %x, ptr %y) nounwind {1293; RVI-LABEL: ctlz_zero_undef_v8i32:1294; RVI: # %bb.0:1295; RVI-NEXT: vsetivli zero, 8, e32, m2, ta, ma1296; RVI-NEXT: vle32.v v8, (a0)1297; RVI-NEXT: lui a1, 3495251298; RVI-NEXT: addi a1, a1, 13651299; RVI-NEXT: vsrl.vi v10, v8, 11300; RVI-NEXT: vor.vv v8, v8, v101301; RVI-NEXT: vsrl.vi v10, v8, 21302; RVI-NEXT: vor.vv v8, v8, v101303; RVI-NEXT: vsrl.vi v10, v8, 41304; RVI-NEXT: vor.vv v8, v8, v101305; RVI-NEXT: vsrl.vi v10, v8, 81306; RVI-NEXT: vor.vv v8, v8, v101307; RVI-NEXT: vsrl.vi v10, v8, 161308; RVI-NEXT: vor.vv v8, v8, v101309; RVI-NEXT: vnot.v v8, v81310; RVI-NEXT: vsrl.vi v10, v8, 11311; RVI-NEXT: vand.vx v10, v10, a11312; RVI-NEXT: lui a1, 2097151313; RVI-NEXT: addi a1, a1, 8191314; RVI-NEXT: vsub.vv v8, v8, v101315; RVI-NEXT: vand.vx v10, v8, a11316; RVI-NEXT: vsrl.vi v8, v8, 21317; RVI-NEXT: vand.vx v8, v8, a11318; RVI-NEXT: lui a1, 616811319; RVI-NEXT: addi a1, a1, -2411320; RVI-NEXT: vadd.vv v8, v10, v81321; RVI-NEXT: vsrl.vi v10, v8, 41322; RVI-NEXT: vadd.vv v8, v8, v101323; RVI-NEXT: vand.vx v8, v8, a11324; RVI-NEXT: lui a1, 41121325; RVI-NEXT: addi a1, a1, 2571326; RVI-NEXT: vmul.vx v8, v8, a11327; RVI-NEXT: vsrl.vi v8, v8, 241328; RVI-NEXT: vse32.v v8, (a0)1329; RVI-NEXT: ret1330;1331; RVF-LABEL: ctlz_zero_undef_v8i32:1332; RVF: # %bb.0:1333; RVF-NEXT: vsetivli zero, 8, e32, m2, ta, ma1334; RVF-NEXT: vle32.v v8, (a0)1335; RVF-NEXT: fsrmi a1, 11336; RVF-NEXT: vfcvt.f.xu.v v8, v81337; RVF-NEXT: fsrm a11338; RVF-NEXT: vsrl.vi v8, v8, 231339; RVF-NEXT: li a1, 1581340; RVF-NEXT: vrsub.vx v8, v8, a11341; RVF-NEXT: vse32.v v8, (a0)1342; RVF-NEXT: ret1343;1344; RVD-LABEL: ctlz_zero_undef_v8i32:1345; RVD: # %bb.0:1346; RVD-NEXT: vsetivli zero, 8, e32, m2, ta, ma1347; RVD-NEXT: vle32.v v12, (a0)1348; RVD-NEXT: li a1, 521349; RVD-NEXT: vfwcvt.f.xu.v v8, v121350; RVD-NEXT: vnsrl.wx v12, v8, a11351; RVD-NEXT: li a1, 10541352; RVD-NEXT: vrsub.vx v8, v12, a11353; RVD-NEXT: vse32.v v8, (a0)1354; RVD-NEXT: ret1355;1356; ZVBB-LABEL: ctlz_zero_undef_v8i32:1357; ZVBB: # %bb.0:1358; ZVBB-NEXT: vsetivli zero, 8, e32, m2, ta, ma1359; ZVBB-NEXT: vle32.v v8, (a0)1360; ZVBB-NEXT: vclz.v v8, v81361; ZVBB-NEXT: vse32.v v8, (a0)1362; ZVBB-NEXT: ret1363 %a = load <8 x i32>, ptr %x1364 %b = load <8 x i32>, ptr %y1365 %c = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)1366 store <8 x i32> %c, ptr %x1367 ret void1368}1369 1370define void @ctlz_zero_undef_v4i64(ptr %x, ptr %y) nounwind {1371; RV32I-LABEL: ctlz_zero_undef_v4i64:1372; RV32I: # %bb.0:1373; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1374; RV32I-NEXT: vle64.v v8, (a0)1375; RV32I-NEXT: lui a1, 3495251376; RV32I-NEXT: addi a1, a1, 13651377; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1378; RV32I-NEXT: vmv.v.x v10, a11379; RV32I-NEXT: li a1, 321380; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1381; RV32I-NEXT: vsrl.vi v12, v8, 11382; RV32I-NEXT: vor.vv v8, v8, v121383; RV32I-NEXT: vsrl.vi v12, v8, 21384; RV32I-NEXT: vor.vv v8, v8, v121385; RV32I-NEXT: vsrl.vi v12, v8, 41386; RV32I-NEXT: vor.vv v8, v8, v121387; RV32I-NEXT: vsrl.vi v12, v8, 81388; RV32I-NEXT: vor.vv v8, v8, v121389; RV32I-NEXT: vsrl.vi v12, v8, 161390; RV32I-NEXT: vor.vv v8, v8, v121391; RV32I-NEXT: vsrl.vx v12, v8, a11392; RV32I-NEXT: lui a1, 2097151393; RV32I-NEXT: addi a1, a1, 8191394; RV32I-NEXT: vor.vv v8, v8, v121395; RV32I-NEXT: vnot.v v8, v81396; RV32I-NEXT: vsrl.vi v12, v8, 11397; RV32I-NEXT: vand.vv v10, v12, v101398; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1399; RV32I-NEXT: vmv.v.x v12, a11400; RV32I-NEXT: lui a1, 616811401; RV32I-NEXT: addi a1, a1, -2411402; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1403; RV32I-NEXT: vsub.vv v8, v8, v101404; RV32I-NEXT: vand.vv v10, v8, v121405; RV32I-NEXT: vsrl.vi v8, v8, 21406; RV32I-NEXT: vand.vv v8, v8, v121407; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1408; RV32I-NEXT: vmv.v.x v12, a11409; RV32I-NEXT: lui a1, 41121410; RV32I-NEXT: addi a1, a1, 2571411; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1412; RV32I-NEXT: vadd.vv v8, v10, v81413; RV32I-NEXT: vsrl.vi v10, v8, 41414; RV32I-NEXT: vadd.vv v8, v8, v101415; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1416; RV32I-NEXT: vmv.v.x v10, a11417; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1418; RV32I-NEXT: vand.vv v8, v8, v121419; RV32I-NEXT: vmul.vv v8, v8, v101420; RV32I-NEXT: li a1, 561421; RV32I-NEXT: vsrl.vx v8, v8, a11422; RV32I-NEXT: vse64.v v8, (a0)1423; RV32I-NEXT: ret1424;1425; RV64I-LABEL: ctlz_zero_undef_v4i64:1426; RV64I: # %bb.0:1427; RV64I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1428; RV64I-NEXT: vle64.v v8, (a0)1429; RV64I-NEXT: lui a1, 3495251430; RV64I-NEXT: lui a2, 2097151431; RV64I-NEXT: lui a3, 616811432; RV64I-NEXT: lui a4, 41121433; RV64I-NEXT: addi a1, a1, 13651434; RV64I-NEXT: addi a2, a2, 8191435; RV64I-NEXT: addi a3, a3, -2411436; RV64I-NEXT: addi a4, a4, 2571437; RV64I-NEXT: slli a5, a1, 321438; RV64I-NEXT: add a1, a1, a51439; RV64I-NEXT: slli a5, a2, 321440; RV64I-NEXT: add a2, a2, a51441; RV64I-NEXT: slli a5, a3, 321442; RV64I-NEXT: add a3, a3, a51443; RV64I-NEXT: slli a5, a4, 321444; RV64I-NEXT: add a4, a4, a51445; RV64I-NEXT: li a5, 321446; RV64I-NEXT: vsrl.vi v10, v8, 11447; RV64I-NEXT: vor.vv v8, v8, v101448; RV64I-NEXT: vsrl.vi v10, v8, 21449; RV64I-NEXT: vor.vv v8, v8, v101450; RV64I-NEXT: vsrl.vi v10, v8, 41451; RV64I-NEXT: vor.vv v8, v8, v101452; RV64I-NEXT: vsrl.vi v10, v8, 81453; RV64I-NEXT: vor.vv v8, v8, v101454; RV64I-NEXT: vsrl.vi v10, v8, 161455; RV64I-NEXT: vor.vv v8, v8, v101456; RV64I-NEXT: vsrl.vx v10, v8, a51457; RV64I-NEXT: vor.vv v8, v8, v101458; RV64I-NEXT: vnot.v v8, v81459; RV64I-NEXT: vsrl.vi v10, v8, 11460; RV64I-NEXT: vand.vx v10, v10, a11461; RV64I-NEXT: vsub.vv v8, v8, v101462; RV64I-NEXT: vand.vx v10, v8, a21463; RV64I-NEXT: vsrl.vi v8, v8, 21464; RV64I-NEXT: vand.vx v8, v8, a21465; RV64I-NEXT: vadd.vv v8, v10, v81466; RV64I-NEXT: vsrl.vi v10, v8, 41467; RV64I-NEXT: vadd.vv v8, v8, v101468; RV64I-NEXT: vand.vx v8, v8, a31469; RV64I-NEXT: vmul.vx v8, v8, a41470; RV64I-NEXT: li a1, 561471; RV64I-NEXT: vsrl.vx v8, v8, a11472; RV64I-NEXT: vse64.v v8, (a0)1473; RV64I-NEXT: ret1474;1475; RVF-LABEL: ctlz_zero_undef_v4i64:1476; RVF: # %bb.0:1477; RVF-NEXT: vsetivli zero, 4, e32, m1, ta, ma1478; RVF-NEXT: vle64.v v8, (a0)1479; RVF-NEXT: li a1, 1901480; RVF-NEXT: vmv.v.x v10, a11481; RVF-NEXT: fsrmi a1, 11482; RVF-NEXT: vfncvt.f.xu.w v11, v81483; RVF-NEXT: fsrm a11484; RVF-NEXT: vsrl.vi v11, v11, 231485; RVF-NEXT: vwsubu.vv v8, v10, v111486; RVF-NEXT: vse64.v v8, (a0)1487; RVF-NEXT: ret1488;1489; RVD-LABEL: ctlz_zero_undef_v4i64:1490; RVD: # %bb.0:1491; RVD-NEXT: vsetivli zero, 4, e64, m2, ta, ma1492; RVD-NEXT: vle64.v v8, (a0)1493; RVD-NEXT: fsrmi a1, 11494; RVD-NEXT: vfcvt.f.xu.v v8, v81495; RVD-NEXT: fsrm a11496; RVD-NEXT: li a1, 521497; RVD-NEXT: vsrl.vx v8, v8, a11498; RVD-NEXT: li a1, 10861499; RVD-NEXT: vrsub.vx v8, v8, a11500; RVD-NEXT: vse64.v v8, (a0)1501; RVD-NEXT: ret1502;1503; ZVBB-LABEL: ctlz_zero_undef_v4i64:1504; ZVBB: # %bb.0:1505; ZVBB-NEXT: vsetivli zero, 4, e64, m2, ta, ma1506; ZVBB-NEXT: vle64.v v8, (a0)1507; ZVBB-NEXT: vclz.v v8, v81508; ZVBB-NEXT: vse64.v v8, (a0)1509; ZVBB-NEXT: ret1510 %a = load <4 x i64>, ptr %x1511 %b = load <4 x i64>, ptr %y1512 %c = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)1513 store <4 x i64> %c, ptr %x1514 ret void1515}1516;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1517; RV32D: {{.*}}1518; RV32F: {{.*}}1519; RV64D: {{.*}}1520; RV64F: {{.*}}1521