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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+zve64x,+zvl128b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVI,RV32I3; RUN: llc -mtriple=riscv64 -mattr=+m,+zve64x,+zvl128b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVI,RV64I4; RUN: llc -mtriple=riscv32 -mattr=+m,+zve64f,+zvl128b,+f -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVF,RV32F5; RUN: llc -mtriple=riscv64 -mattr=+m,+zve64f,+zvl128b,+f -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVF,RV64F6; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVD,RV32D7; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RVD,RV64D8; RUN: llc -mtriple=riscv32 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVBB9; RUN: llc -mtriple=riscv64 -mattr=+v,+zvbb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=ZVBB10 11define void @cttz_v16i8(ptr %x, ptr %y) nounwind {12; RVI-LABEL: cttz_v16i8:13; RVI: # %bb.0:14; RVI-NEXT: vsetivli zero, 16, e8, m1, ta, ma15; RVI-NEXT: vle8.v v8, (a0)16; RVI-NEXT: li a1, 8517; RVI-NEXT: vadd.vi v9, v8, -118; RVI-NEXT: vnot.v v8, v819; RVI-NEXT: vand.vv v8, v8, v920; RVI-NEXT: vsrl.vi v9, v8, 121; RVI-NEXT: vand.vx v9, v9, a122; RVI-NEXT: li a1, 5123; RVI-NEXT: vsub.vv v8, v8, v924; RVI-NEXT: vand.vx v9, v8, a125; RVI-NEXT: vsrl.vi v8, v8, 226; RVI-NEXT: vand.vx v8, v8, a127; RVI-NEXT: vadd.vv v8, v9, v828; RVI-NEXT: vsrl.vi v9, v8, 429; RVI-NEXT: vadd.vv v8, v8, v930; RVI-NEXT: vand.vi v8, v8, 1531; RVI-NEXT: vse8.v v8, (a0)32; RVI-NEXT: ret33;34; RVF-LABEL: cttz_v16i8:35; RVF: # %bb.0:36; RVF-NEXT: vsetivli zero, 16, e8, m1, ta, ma37; RVF-NEXT: vle8.v v14, (a0)38; RVF-NEXT: li a1, 12739; RVF-NEXT: vrsub.vi v8, v14, 040; RVF-NEXT: vand.vv v8, v14, v841; RVF-NEXT: vsetvli zero, zero, e16, m2, ta, ma42; RVF-NEXT: vzext.vf2 v12, v843; RVF-NEXT: vfwcvt.f.xu.v v8, v1244; RVF-NEXT: vnsrl.wi v12, v8, 2345; RVF-NEXT: vsetvli zero, zero, e8, m1, ta, ma46; RVF-NEXT: vnsrl.wi v8, v12, 047; RVF-NEXT: vmseq.vi v0, v14, 048; RVF-NEXT: vsub.vx v8, v8, a149; RVF-NEXT: vmerge.vim v8, v8, 8, v050; RVF-NEXT: vse8.v v8, (a0)51; RVF-NEXT: ret52;53; RVD-LABEL: cttz_v16i8:54; RVD: # %bb.0:55; RVD-NEXT: vsetivli zero, 16, e8, m1, ta, ma56; RVD-NEXT: vle8.v v14, (a0)57; RVD-NEXT: li a1, 12758; RVD-NEXT: vrsub.vi v8, v14, 059; RVD-NEXT: vand.vv v8, v14, v860; RVD-NEXT: vsetvli zero, zero, e16, m2, ta, ma61; RVD-NEXT: vzext.vf2 v12, v862; RVD-NEXT: vfwcvt.f.xu.v v8, v1263; RVD-NEXT: vnsrl.wi v12, v8, 2364; RVD-NEXT: vsetvli zero, zero, e8, m1, ta, ma65; RVD-NEXT: vnsrl.wi v8, v12, 066; RVD-NEXT: vmseq.vi v0, v14, 067; RVD-NEXT: vsub.vx v8, v8, a168; RVD-NEXT: vmerge.vim v8, v8, 8, v069; RVD-NEXT: vse8.v v8, (a0)70; RVD-NEXT: ret71;72; ZVBB-LABEL: cttz_v16i8:73; ZVBB: # %bb.0:74; ZVBB-NEXT: vsetivli zero, 16, e8, m1, ta, ma75; ZVBB-NEXT: vle8.v v8, (a0)76; ZVBB-NEXT: vctz.v v8, v877; ZVBB-NEXT: vse8.v v8, (a0)78; ZVBB-NEXT: ret79 %a = load <16 x i8>, ptr %x80 %b = load <16 x i8>, ptr %y81 %c = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 false)82 store <16 x i8> %c, ptr %x83 ret void84}85 86define void @cttz_v8i16(ptr %x, ptr %y) nounwind {87; RVI-LABEL: cttz_v8i16:88; RVI: # %bb.0:89; RVI-NEXT: vsetivli zero, 8, e16, m1, ta, ma90; RVI-NEXT: vle16.v v8, (a0)91; RVI-NEXT: lui a1, 592; RVI-NEXT: addi a1, a1, 136593; RVI-NEXT: vadd.vi v9, v8, -194; RVI-NEXT: vnot.v v8, v895; RVI-NEXT: vand.vv v8, v8, v996; RVI-NEXT: vsrl.vi v9, v8, 197; RVI-NEXT: vand.vx v9, v9, a198; RVI-NEXT: lui a1, 399; RVI-NEXT: addi a1, a1, 819100; RVI-NEXT: vsub.vv v8, v8, v9101; RVI-NEXT: vand.vx v9, v8, a1102; RVI-NEXT: vsrl.vi v8, v8, 2103; RVI-NEXT: vand.vx v8, v8, a1104; RVI-NEXT: lui a1, 1105; RVI-NEXT: addi a1, a1, -241106; RVI-NEXT: vadd.vv v8, v9, v8107; RVI-NEXT: vsrl.vi v9, v8, 4108; RVI-NEXT: vadd.vv v8, v8, v9109; RVI-NEXT: vand.vx v8, v8, a1110; RVI-NEXT: li a1, 257111; RVI-NEXT: vmul.vx v8, v8, a1112; RVI-NEXT: vsrl.vi v8, v8, 8113; RVI-NEXT: vse16.v v8, (a0)114; RVI-NEXT: ret115;116; RVF-LABEL: cttz_v8i16:117; RVF: # %bb.0:118; RVF-NEXT: vsetivli zero, 8, e16, m1, ta, ma119; RVF-NEXT: vle16.v v8, (a0)120; RVF-NEXT: li a1, 127121; RVF-NEXT: vrsub.vi v9, v8, 0122; RVF-NEXT: vmseq.vi v0, v8, 0123; RVF-NEXT: vand.vv v10, v8, v9124; RVF-NEXT: vfwcvt.f.xu.v v8, v10125; RVF-NEXT: vnsrl.wi v10, v8, 23126; RVF-NEXT: vsub.vx v8, v10, a1127; RVF-NEXT: li a1, 16128; RVF-NEXT: vmerge.vxm v8, v8, a1, v0129; RVF-NEXT: vse16.v v8, (a0)130; RVF-NEXT: ret131;132; RVD-LABEL: cttz_v8i16:133; RVD: # %bb.0:134; RVD-NEXT: vsetivli zero, 8, e16, m1, ta, ma135; RVD-NEXT: vle16.v v8, (a0)136; RVD-NEXT: li a1, 127137; RVD-NEXT: vrsub.vi v9, v8, 0138; RVD-NEXT: vmseq.vi v0, v8, 0139; RVD-NEXT: vand.vv v10, v8, v9140; RVD-NEXT: vfwcvt.f.xu.v v8, v10141; RVD-NEXT: vnsrl.wi v10, v8, 23142; RVD-NEXT: vsub.vx v8, v10, a1143; RVD-NEXT: li a1, 16144; RVD-NEXT: vmerge.vxm v8, v8, a1, v0145; RVD-NEXT: vse16.v v8, (a0)146; RVD-NEXT: ret147;148; ZVBB-LABEL: cttz_v8i16:149; ZVBB: # %bb.0:150; ZVBB-NEXT: vsetivli zero, 8, e16, m1, ta, ma151; ZVBB-NEXT: vle16.v v8, (a0)152; ZVBB-NEXT: vctz.v v8, v8153; ZVBB-NEXT: vse16.v v8, (a0)154; ZVBB-NEXT: ret155 %a = load <8 x i16>, ptr %x156 %b = load <8 x i16>, ptr %y157 %c = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 false)158 store <8 x i16> %c, ptr %x159 ret void160}161 162define void @cttz_v4i32(ptr %x, ptr %y) nounwind {163; RVI-LABEL: cttz_v4i32:164; RVI: # %bb.0:165; RVI-NEXT: vsetivli zero, 4, e32, m1, ta, ma166; RVI-NEXT: vle32.v v8, (a0)167; RVI-NEXT: lui a1, 349525168; RVI-NEXT: addi a1, a1, 1365169; RVI-NEXT: vadd.vi v9, v8, -1170; RVI-NEXT: vnot.v v8, v8171; RVI-NEXT: vand.vv v8, v8, v9172; RVI-NEXT: vsrl.vi v9, v8, 1173; RVI-NEXT: vand.vx v9, v9, a1174; RVI-NEXT: lui a1, 209715175; RVI-NEXT: addi a1, a1, 819176; RVI-NEXT: vsub.vv v8, v8, v9177; RVI-NEXT: vand.vx v9, v8, a1178; RVI-NEXT: vsrl.vi v8, v8, 2179; RVI-NEXT: vand.vx v8, v8, a1180; RVI-NEXT: lui a1, 61681181; RVI-NEXT: addi a1, a1, -241182; RVI-NEXT: vadd.vv v8, v9, v8183; RVI-NEXT: vsrl.vi v9, v8, 4184; RVI-NEXT: vadd.vv v8, v8, v9185; RVI-NEXT: vand.vx v8, v8, a1186; RVI-NEXT: lui a1, 4112187; RVI-NEXT: addi a1, a1, 257188; RVI-NEXT: vmul.vx v8, v8, a1189; RVI-NEXT: vsrl.vi v8, v8, 24190; RVI-NEXT: vse32.v v8, (a0)191; RVI-NEXT: ret192;193; RVF-LABEL: cttz_v4i32:194; RVF: # %bb.0:195; RVF-NEXT: vsetivli zero, 4, e32, m1, ta, ma196; RVF-NEXT: vle32.v v8, (a0)197; RVF-NEXT: fsrmi a1, 1198; RVF-NEXT: vrsub.vi v9, v8, 0199; RVF-NEXT: vand.vv v9, v8, v9200; RVF-NEXT: vfcvt.f.xu.v v9, v9201; RVF-NEXT: fsrm a1202; RVF-NEXT: li a1, 127203; RVF-NEXT: vmseq.vi v0, v8, 0204; RVF-NEXT: vsrl.vi v8, v9, 23205; RVF-NEXT: vsub.vx v8, v8, a1206; RVF-NEXT: li a1, 32207; RVF-NEXT: vmerge.vxm v8, v8, a1, v0208; RVF-NEXT: vse32.v v8, (a0)209; RVF-NEXT: ret210;211; RVD-LABEL: cttz_v4i32:212; RVD: # %bb.0:213; RVD-NEXT: vsetivli zero, 4, e32, m1, ta, ma214; RVD-NEXT: vle32.v v10, (a0)215; RVD-NEXT: li a1, 52216; RVD-NEXT: vrsub.vi v8, v10, 0217; RVD-NEXT: vand.vv v11, v10, v8218; RVD-NEXT: vfwcvt.f.xu.v v8, v11219; RVD-NEXT: vnsrl.wx v11, v8, a1220; RVD-NEXT: li a1, 1023221; RVD-NEXT: vmseq.vi v0, v10, 0222; RVD-NEXT: vsub.vx v8, v11, a1223; RVD-NEXT: li a1, 32224; RVD-NEXT: vmerge.vxm v8, v8, a1, v0225; RVD-NEXT: vse32.v v8, (a0)226; RVD-NEXT: ret227;228; ZVBB-LABEL: cttz_v4i32:229; ZVBB: # %bb.0:230; ZVBB-NEXT: vsetivli zero, 4, e32, m1, ta, ma231; ZVBB-NEXT: vle32.v v8, (a0)232; ZVBB-NEXT: vctz.v v8, v8233; ZVBB-NEXT: vse32.v v8, (a0)234; ZVBB-NEXT: ret235 %a = load <4 x i32>, ptr %x236 %b = load <4 x i32>, ptr %y237 %c = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 false)238 store <4 x i32> %c, ptr %x239 ret void240}241 242define void @cttz_v2i64(ptr %x, ptr %y) nounwind {243; RV32I-LABEL: cttz_v2i64:244; RV32I: # %bb.0:245; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma246; RV32I-NEXT: vle64.v v8, (a0)247; RV32I-NEXT: lui a1, 349525248; RV32I-NEXT: addi a1, a1, 1365249; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma250; RV32I-NEXT: vmv.v.x v9, a1251; RV32I-NEXT: lui a1, 209715252; RV32I-NEXT: addi a1, a1, 819253; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma254; RV32I-NEXT: vadd.vi v10, v8, -1255; RV32I-NEXT: vnot.v v8, v8256; RV32I-NEXT: vand.vv v8, v8, v10257; RV32I-NEXT: vsrl.vi v10, v8, 1258; RV32I-NEXT: vand.vv v9, v10, v9259; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma260; RV32I-NEXT: vmv.v.x v10, a1261; RV32I-NEXT: lui a1, 61681262; RV32I-NEXT: addi a1, a1, -241263; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma264; RV32I-NEXT: vsub.vv v8, v8, v9265; RV32I-NEXT: vand.vv v9, v8, v10266; RV32I-NEXT: vsrl.vi v8, v8, 2267; RV32I-NEXT: vand.vv v8, v8, v10268; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma269; RV32I-NEXT: vmv.v.x v10, a1270; RV32I-NEXT: lui a1, 4112271; RV32I-NEXT: addi a1, a1, 257272; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma273; RV32I-NEXT: vadd.vv v8, v9, v8274; RV32I-NEXT: vsrl.vi v9, v8, 4275; RV32I-NEXT: vadd.vv v8, v8, v9276; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma277; RV32I-NEXT: vmv.v.x v9, a1278; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma279; RV32I-NEXT: vand.vv v8, v8, v10280; RV32I-NEXT: vmul.vv v8, v8, v9281; RV32I-NEXT: li a1, 56282; RV32I-NEXT: vsrl.vx v8, v8, a1283; RV32I-NEXT: vse64.v v8, (a0)284; RV32I-NEXT: ret285;286; RV64I-LABEL: cttz_v2i64:287; RV64I: # %bb.0:288; RV64I-NEXT: vsetivli zero, 2, e64, m1, ta, ma289; RV64I-NEXT: vle64.v v8, (a0)290; RV64I-NEXT: lui a1, 349525291; RV64I-NEXT: lui a2, 209715292; RV64I-NEXT: lui a3, 61681293; RV64I-NEXT: lui a4, 4112294; RV64I-NEXT: addi a1, a1, 1365295; RV64I-NEXT: addi a2, a2, 819296; RV64I-NEXT: addi a3, a3, -241297; RV64I-NEXT: addi a4, a4, 257298; RV64I-NEXT: slli a5, a1, 32299; RV64I-NEXT: add a1, a1, a5300; RV64I-NEXT: slli a5, a2, 32301; RV64I-NEXT: add a2, a2, a5302; RV64I-NEXT: slli a5, a3, 32303; RV64I-NEXT: add a3, a3, a5304; RV64I-NEXT: slli a5, a4, 32305; RV64I-NEXT: add a4, a4, a5306; RV64I-NEXT: vadd.vi v9, v8, -1307; RV64I-NEXT: vnot.v v8, v8308; RV64I-NEXT: vand.vv v8, v8, v9309; RV64I-NEXT: vsrl.vi v9, v8, 1310; RV64I-NEXT: vand.vx v9, v9, a1311; RV64I-NEXT: vsub.vv v8, v8, v9312; RV64I-NEXT: vand.vx v9, v8, a2313; RV64I-NEXT: vsrl.vi v8, v8, 2314; RV64I-NEXT: vand.vx v8, v8, a2315; RV64I-NEXT: vadd.vv v8, v9, v8316; RV64I-NEXT: vsrl.vi v9, v8, 4317; RV64I-NEXT: vadd.vv v8, v8, v9318; RV64I-NEXT: vand.vx v8, v8, a3319; RV64I-NEXT: vmul.vx v8, v8, a4320; RV64I-NEXT: li a1, 56321; RV64I-NEXT: vsrl.vx v8, v8, a1322; RV64I-NEXT: vse64.v v8, (a0)323; RV64I-NEXT: ret324;325; RVF-LABEL: cttz_v2i64:326; RVF: # %bb.0:327; RVF-NEXT: vsetivli zero, 2, e64, m1, ta, ma328; RVF-NEXT: vle64.v v8, (a0)329; RVF-NEXT: fsrmi a1, 1330; RVF-NEXT: vrsub.vi v9, v8, 0331; RVF-NEXT: vand.vv v9, v8, v9332; RVF-NEXT: vsetvli zero, zero, e32, mf2, ta, ma333; RVF-NEXT: vfncvt.f.xu.w v10, v9334; RVF-NEXT: fsrm a1335; RVF-NEXT: li a1, 127336; RVF-NEXT: vsetvli zero, zero, e64, m1, ta, ma337; RVF-NEXT: vmseq.vi v0, v8, 0338; RVF-NEXT: vsetvli zero, zero, e32, mf2, ta, ma339; RVF-NEXT: vsrl.vi v8, v10, 23340; RVF-NEXT: vwsubu.vx v9, v8, a1341; RVF-NEXT: li a1, 64342; RVF-NEXT: vsetvli zero, zero, e64, m1, ta, ma343; RVF-NEXT: vmerge.vxm v8, v9, a1, v0344; RVF-NEXT: vse64.v v8, (a0)345; RVF-NEXT: ret346;347; RVD-LABEL: cttz_v2i64:348; RVD: # %bb.0:349; RVD-NEXT: vsetivli zero, 2, e64, m1, ta, ma350; RVD-NEXT: vle64.v v8, (a0)351; RVD-NEXT: fsrmi a1, 1352; RVD-NEXT: vrsub.vi v9, v8, 0353; RVD-NEXT: vand.vv v9, v8, v9354; RVD-NEXT: vfcvt.f.xu.v v9, v9355; RVD-NEXT: fsrm a1356; RVD-NEXT: li a1, 52357; RVD-NEXT: vsrl.vx v9, v9, a1358; RVD-NEXT: li a1, 1023359; RVD-NEXT: vmseq.vi v0, v8, 0360; RVD-NEXT: vsub.vx v8, v9, a1361; RVD-NEXT: li a1, 64362; RVD-NEXT: vmerge.vxm v8, v8, a1, v0363; RVD-NEXT: vse64.v v8, (a0)364; RVD-NEXT: ret365;366; ZVBB-LABEL: cttz_v2i64:367; ZVBB: # %bb.0:368; ZVBB-NEXT: vsetivli zero, 2, e64, m1, ta, ma369; ZVBB-NEXT: vle64.v v8, (a0)370; ZVBB-NEXT: vctz.v v8, v8371; ZVBB-NEXT: vse64.v v8, (a0)372; ZVBB-NEXT: ret373 %a = load <2 x i64>, ptr %x374 %b = load <2 x i64>, ptr %y375 %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 false)376 store <2 x i64> %c, ptr %x377 ret void378}379 380define void @cttz_v32i8(ptr %x, ptr %y) nounwind {381; RVI-LABEL: cttz_v32i8:382; RVI: # %bb.0:383; RVI-NEXT: li a1, 32384; RVI-NEXT: vsetvli zero, a1, e8, m2, ta, ma385; RVI-NEXT: vle8.v v8, (a0)386; RVI-NEXT: li a1, 85387; RVI-NEXT: vadd.vi v10, v8, -1388; RVI-NEXT: vnot.v v8, v8389; RVI-NEXT: vand.vv v8, v8, v10390; RVI-NEXT: vsrl.vi v10, v8, 1391; RVI-NEXT: vand.vx v10, v10, a1392; RVI-NEXT: li a1, 51393; RVI-NEXT: vsub.vv v8, v8, v10394; RVI-NEXT: vand.vx v10, v8, a1395; RVI-NEXT: vsrl.vi v8, v8, 2396; RVI-NEXT: vand.vx v8, v8, a1397; RVI-NEXT: vadd.vv v8, v10, v8398; RVI-NEXT: vsrl.vi v10, v8, 4399; RVI-NEXT: vadd.vv v8, v8, v10400; RVI-NEXT: vand.vi v8, v8, 15401; RVI-NEXT: vse8.v v8, (a0)402; RVI-NEXT: ret403;404; RVF-LABEL: cttz_v32i8:405; RVF: # %bb.0:406; RVF-NEXT: li a1, 32407; RVF-NEXT: vsetvli zero, a1, e8, m2, ta, ma408; RVF-NEXT: vle8.v v20, (a0)409; RVF-NEXT: li a1, 127410; RVF-NEXT: vrsub.vi v8, v20, 0411; RVF-NEXT: vand.vv v8, v20, v8412; RVF-NEXT: vsetvli zero, zero, e16, m4, ta, ma413; RVF-NEXT: vzext.vf2 v16, v8414; RVF-NEXT: vfwcvt.f.xu.v v8, v16415; RVF-NEXT: vnsrl.wi v16, v8, 23416; RVF-NEXT: vsetvli zero, zero, e8, m2, ta, ma417; RVF-NEXT: vnsrl.wi v8, v16, 0418; RVF-NEXT: vmseq.vi v0, v20, 0419; RVF-NEXT: vsub.vx v8, v8, a1420; RVF-NEXT: vmerge.vim v8, v8, 8, v0421; RVF-NEXT: vse8.v v8, (a0)422; RVF-NEXT: ret423;424; RVD-LABEL: cttz_v32i8:425; RVD: # %bb.0:426; RVD-NEXT: li a1, 32427; RVD-NEXT: vsetvli zero, a1, e8, m2, ta, ma428; RVD-NEXT: vle8.v v20, (a0)429; RVD-NEXT: li a1, 127430; RVD-NEXT: vrsub.vi v8, v20, 0431; RVD-NEXT: vand.vv v8, v20, v8432; RVD-NEXT: vsetvli zero, zero, e16, m4, ta, ma433; RVD-NEXT: vzext.vf2 v16, v8434; RVD-NEXT: vfwcvt.f.xu.v v8, v16435; RVD-NEXT: vnsrl.wi v16, v8, 23436; RVD-NEXT: vsetvli zero, zero, e8, m2, ta, ma437; RVD-NEXT: vnsrl.wi v8, v16, 0438; RVD-NEXT: vmseq.vi v0, v20, 0439; RVD-NEXT: vsub.vx v8, v8, a1440; RVD-NEXT: vmerge.vim v8, v8, 8, v0441; RVD-NEXT: vse8.v v8, (a0)442; RVD-NEXT: ret443;444; ZVBB-LABEL: cttz_v32i8:445; ZVBB: # %bb.0:446; ZVBB-NEXT: li a1, 32447; ZVBB-NEXT: vsetvli zero, a1, e8, m2, ta, ma448; ZVBB-NEXT: vle8.v v8, (a0)449; ZVBB-NEXT: vctz.v v8, v8450; ZVBB-NEXT: vse8.v v8, (a0)451; ZVBB-NEXT: ret452 %a = load <32 x i8>, ptr %x453 %b = load <32 x i8>, ptr %y454 %c = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 false)455 store <32 x i8> %c, ptr %x456 ret void457}458 459define void @cttz_v16i16(ptr %x, ptr %y) nounwind {460; RVI-LABEL: cttz_v16i16:461; RVI: # %bb.0:462; RVI-NEXT: vsetivli zero, 16, e16, m2, ta, ma463; RVI-NEXT: vle16.v v8, (a0)464; RVI-NEXT: lui a1, 5465; RVI-NEXT: addi a1, a1, 1365466; RVI-NEXT: vadd.vi v10, v8, -1467; RVI-NEXT: vnot.v v8, v8468; RVI-NEXT: vand.vv v8, v8, v10469; RVI-NEXT: vsrl.vi v10, v8, 1470; RVI-NEXT: vand.vx v10, v10, a1471; RVI-NEXT: lui a1, 3472; RVI-NEXT: addi a1, a1, 819473; RVI-NEXT: vsub.vv v8, v8, v10474; RVI-NEXT: vand.vx v10, v8, a1475; RVI-NEXT: vsrl.vi v8, v8, 2476; RVI-NEXT: vand.vx v8, v8, a1477; RVI-NEXT: lui a1, 1478; RVI-NEXT: addi a1, a1, -241479; RVI-NEXT: vadd.vv v8, v10, v8480; RVI-NEXT: vsrl.vi v10, v8, 4481; RVI-NEXT: vadd.vv v8, v8, v10482; RVI-NEXT: vand.vx v8, v8, a1483; RVI-NEXT: li a1, 257484; RVI-NEXT: vmul.vx v8, v8, a1485; RVI-NEXT: vsrl.vi v8, v8, 8486; RVI-NEXT: vse16.v v8, (a0)487; RVI-NEXT: ret488;489; RVF-LABEL: cttz_v16i16:490; RVF: # %bb.0:491; RVF-NEXT: vsetivli zero, 16, e16, m2, ta, ma492; RVF-NEXT: vle16.v v8, (a0)493; RVF-NEXT: li a1, 127494; RVF-NEXT: vrsub.vi v10, v8, 0495; RVF-NEXT: vmseq.vi v0, v8, 0496; RVF-NEXT: vand.vv v12, v8, v10497; RVF-NEXT: vfwcvt.f.xu.v v8, v12498; RVF-NEXT: vnsrl.wi v12, v8, 23499; RVF-NEXT: vsub.vx v8, v12, a1500; RVF-NEXT: li a1, 16501; RVF-NEXT: vmerge.vxm v8, v8, a1, v0502; RVF-NEXT: vse16.v v8, (a0)503; RVF-NEXT: ret504;505; RVD-LABEL: cttz_v16i16:506; RVD: # %bb.0:507; RVD-NEXT: vsetivli zero, 16, e16, m2, ta, ma508; RVD-NEXT: vle16.v v8, (a0)509; RVD-NEXT: li a1, 127510; RVD-NEXT: vrsub.vi v10, v8, 0511; RVD-NEXT: vmseq.vi v0, v8, 0512; RVD-NEXT: vand.vv v12, v8, v10513; RVD-NEXT: vfwcvt.f.xu.v v8, v12514; RVD-NEXT: vnsrl.wi v12, v8, 23515; RVD-NEXT: vsub.vx v8, v12, a1516; RVD-NEXT: li a1, 16517; RVD-NEXT: vmerge.vxm v8, v8, a1, v0518; RVD-NEXT: vse16.v v8, (a0)519; RVD-NEXT: ret520;521; ZVBB-LABEL: cttz_v16i16:522; ZVBB: # %bb.0:523; ZVBB-NEXT: vsetivli zero, 16, e16, m2, ta, ma524; ZVBB-NEXT: vle16.v v8, (a0)525; ZVBB-NEXT: vctz.v v8, v8526; ZVBB-NEXT: vse16.v v8, (a0)527; ZVBB-NEXT: ret528 %a = load <16 x i16>, ptr %x529 %b = load <16 x i16>, ptr %y530 %c = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 false)531 store <16 x i16> %c, ptr %x532 ret void533}534 535define void @cttz_v8i32(ptr %x, ptr %y) nounwind {536; RVI-LABEL: cttz_v8i32:537; RVI: # %bb.0:538; RVI-NEXT: vsetivli zero, 8, e32, m2, ta, ma539; RVI-NEXT: vle32.v v8, (a0)540; RVI-NEXT: lui a1, 349525541; RVI-NEXT: addi a1, a1, 1365542; RVI-NEXT: vadd.vi v10, v8, -1543; RVI-NEXT: vnot.v v8, v8544; RVI-NEXT: vand.vv v8, v8, v10545; RVI-NEXT: vsrl.vi v10, v8, 1546; RVI-NEXT: vand.vx v10, v10, a1547; RVI-NEXT: lui a1, 209715548; RVI-NEXT: addi a1, a1, 819549; RVI-NEXT: vsub.vv v8, v8, v10550; RVI-NEXT: vand.vx v10, v8, a1551; RVI-NEXT: vsrl.vi v8, v8, 2552; RVI-NEXT: vand.vx v8, v8, a1553; RVI-NEXT: lui a1, 61681554; RVI-NEXT: addi a1, a1, -241555; RVI-NEXT: vadd.vv v8, v10, v8556; RVI-NEXT: vsrl.vi v10, v8, 4557; RVI-NEXT: vadd.vv v8, v8, v10558; RVI-NEXT: vand.vx v8, v8, a1559; RVI-NEXT: lui a1, 4112560; RVI-NEXT: addi a1, a1, 257561; RVI-NEXT: vmul.vx v8, v8, a1562; RVI-NEXT: vsrl.vi v8, v8, 24563; RVI-NEXT: vse32.v v8, (a0)564; RVI-NEXT: ret565;566; RVF-LABEL: cttz_v8i32:567; RVF: # %bb.0:568; RVF-NEXT: vsetivli zero, 8, e32, m2, ta, ma569; RVF-NEXT: vle32.v v8, (a0)570; RVF-NEXT: fsrmi a1, 1571; RVF-NEXT: vrsub.vi v10, v8, 0572; RVF-NEXT: vand.vv v10, v8, v10573; RVF-NEXT: vfcvt.f.xu.v v10, v10574; RVF-NEXT: fsrm a1575; RVF-NEXT: li a1, 127576; RVF-NEXT: vmseq.vi v0, v8, 0577; RVF-NEXT: vsrl.vi v8, v10, 23578; RVF-NEXT: vsub.vx v8, v8, a1579; RVF-NEXT: li a1, 32580; RVF-NEXT: vmerge.vxm v8, v8, a1, v0581; RVF-NEXT: vse32.v v8, (a0)582; RVF-NEXT: ret583;584; RVD-LABEL: cttz_v8i32:585; RVD: # %bb.0:586; RVD-NEXT: vsetivli zero, 8, e32, m2, ta, ma587; RVD-NEXT: vle32.v v12, (a0)588; RVD-NEXT: li a1, 52589; RVD-NEXT: vrsub.vi v8, v12, 0590; RVD-NEXT: vand.vv v14, v12, v8591; RVD-NEXT: vfwcvt.f.xu.v v8, v14592; RVD-NEXT: vnsrl.wx v14, v8, a1593; RVD-NEXT: li a1, 1023594; RVD-NEXT: vmseq.vi v0, v12, 0595; RVD-NEXT: vsub.vx v8, v14, a1596; RVD-NEXT: li a1, 32597; RVD-NEXT: vmerge.vxm v8, v8, a1, v0598; RVD-NEXT: vse32.v v8, (a0)599; RVD-NEXT: ret600;601; ZVBB-LABEL: cttz_v8i32:602; ZVBB: # %bb.0:603; ZVBB-NEXT: vsetivli zero, 8, e32, m2, ta, ma604; ZVBB-NEXT: vle32.v v8, (a0)605; ZVBB-NEXT: vctz.v v8, v8606; ZVBB-NEXT: vse32.v v8, (a0)607; ZVBB-NEXT: ret608 %a = load <8 x i32>, ptr %x609 %b = load <8 x i32>, ptr %y610 %c = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 false)611 store <8 x i32> %c, ptr %x612 ret void613}614 615define void @cttz_v4i64(ptr %x, ptr %y) nounwind {616; RV32I-LABEL: cttz_v4i64:617; RV32I: # %bb.0:618; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma619; RV32I-NEXT: vle64.v v8, (a0)620; RV32I-NEXT: lui a1, 349525621; RV32I-NEXT: addi a1, a1, 1365622; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma623; RV32I-NEXT: vmv.v.x v10, a1624; RV32I-NEXT: lui a1, 209715625; RV32I-NEXT: addi a1, a1, 819626; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma627; RV32I-NEXT: vadd.vi v12, v8, -1628; RV32I-NEXT: vnot.v v8, v8629; RV32I-NEXT: vand.vv v8, v8, v12630; RV32I-NEXT: vsrl.vi v12, v8, 1631; RV32I-NEXT: vand.vv v10, v12, v10632; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma633; RV32I-NEXT: vmv.v.x v12, a1634; RV32I-NEXT: lui a1, 61681635; RV32I-NEXT: addi a1, a1, -241636; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma637; RV32I-NEXT: vsub.vv v8, v8, v10638; RV32I-NEXT: vand.vv v10, v8, v12639; RV32I-NEXT: vsrl.vi v8, v8, 2640; RV32I-NEXT: vand.vv v8, v8, v12641; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma642; RV32I-NEXT: vmv.v.x v12, a1643; RV32I-NEXT: lui a1, 4112644; RV32I-NEXT: addi a1, a1, 257645; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma646; RV32I-NEXT: vadd.vv v8, v10, v8647; RV32I-NEXT: vsrl.vi v10, v8, 4648; RV32I-NEXT: vadd.vv v8, v8, v10649; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma650; RV32I-NEXT: vmv.v.x v10, a1651; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma652; RV32I-NEXT: vand.vv v8, v8, v12653; RV32I-NEXT: vmul.vv v8, v8, v10654; RV32I-NEXT: li a1, 56655; RV32I-NEXT: vsrl.vx v8, v8, a1656; RV32I-NEXT: vse64.v v8, (a0)657; RV32I-NEXT: ret658;659; RV64I-LABEL: cttz_v4i64:660; RV64I: # %bb.0:661; RV64I-NEXT: vsetivli zero, 4, e64, m2, ta, ma662; RV64I-NEXT: vle64.v v8, (a0)663; RV64I-NEXT: lui a1, 349525664; RV64I-NEXT: lui a2, 209715665; RV64I-NEXT: lui a3, 61681666; RV64I-NEXT: lui a4, 4112667; RV64I-NEXT: addi a1, a1, 1365668; RV64I-NEXT: addi a2, a2, 819669; RV64I-NEXT: addi a3, a3, -241670; RV64I-NEXT: addi a4, a4, 257671; RV64I-NEXT: slli a5, a1, 32672; RV64I-NEXT: add a1, a1, a5673; RV64I-NEXT: slli a5, a2, 32674; RV64I-NEXT: add a2, a2, a5675; RV64I-NEXT: slli a5, a3, 32676; RV64I-NEXT: add a3, a3, a5677; RV64I-NEXT: slli a5, a4, 32678; RV64I-NEXT: add a4, a4, a5679; RV64I-NEXT: vadd.vi v10, v8, -1680; RV64I-NEXT: vnot.v v8, v8681; RV64I-NEXT: vand.vv v8, v8, v10682; RV64I-NEXT: vsrl.vi v10, v8, 1683; RV64I-NEXT: vand.vx v10, v10, a1684; RV64I-NEXT: vsub.vv v8, v8, v10685; RV64I-NEXT: vand.vx v10, v8, a2686; RV64I-NEXT: vsrl.vi v8, v8, 2687; RV64I-NEXT: vand.vx v8, v8, a2688; RV64I-NEXT: vadd.vv v8, v10, v8689; RV64I-NEXT: vsrl.vi v10, v8, 4690; RV64I-NEXT: vadd.vv v8, v8, v10691; RV64I-NEXT: vand.vx v8, v8, a3692; RV64I-NEXT: vmul.vx v8, v8, a4693; RV64I-NEXT: li a1, 56694; RV64I-NEXT: vsrl.vx v8, v8, a1695; RV64I-NEXT: vse64.v v8, (a0)696; RV64I-NEXT: ret697;698; RVF-LABEL: cttz_v4i64:699; RVF: # %bb.0:700; RVF-NEXT: vsetivli zero, 4, e64, m2, ta, ma701; RVF-NEXT: vle64.v v8, (a0)702; RVF-NEXT: fsrmi a1, 1703; RVF-NEXT: vrsub.vi v10, v8, 0704; RVF-NEXT: vand.vv v10, v8, v10705; RVF-NEXT: vsetvli zero, zero, e32, m1, ta, ma706; RVF-NEXT: vfncvt.f.xu.w v12, v10707; RVF-NEXT: fsrm a1708; RVF-NEXT: li a1, 127709; RVF-NEXT: vsetvli zero, zero, e64, m2, ta, ma710; RVF-NEXT: vmseq.vi v0, v8, 0711; RVF-NEXT: vsetvli zero, zero, e32, m1, ta, ma712; RVF-NEXT: vsrl.vi v10, v12, 23713; RVF-NEXT: vwsubu.vx v8, v10, a1714; RVF-NEXT: li a1, 64715; RVF-NEXT: vsetvli zero, zero, e64, m2, ta, ma716; RVF-NEXT: vmerge.vxm v8, v8, a1, v0717; RVF-NEXT: vse64.v v8, (a0)718; RVF-NEXT: ret719;720; RVD-LABEL: cttz_v4i64:721; RVD: # %bb.0:722; RVD-NEXT: vsetivli zero, 4, e64, m2, ta, ma723; RVD-NEXT: vle64.v v8, (a0)724; RVD-NEXT: fsrmi a1, 1725; RVD-NEXT: vrsub.vi v10, v8, 0726; RVD-NEXT: vand.vv v10, v8, v10727; RVD-NEXT: vfcvt.f.xu.v v10, v10728; RVD-NEXT: fsrm a1729; RVD-NEXT: li a1, 52730; RVD-NEXT: vsrl.vx v10, v10, a1731; RVD-NEXT: li a1, 1023732; RVD-NEXT: vmseq.vi v0, v8, 0733; RVD-NEXT: vsub.vx v8, v10, a1734; RVD-NEXT: li a1, 64735; RVD-NEXT: vmerge.vxm v8, v8, a1, v0736; RVD-NEXT: vse64.v v8, (a0)737; RVD-NEXT: ret738;739; ZVBB-LABEL: cttz_v4i64:740; ZVBB: # %bb.0:741; ZVBB-NEXT: vsetivli zero, 4, e64, m2, ta, ma742; ZVBB-NEXT: vle64.v v8, (a0)743; ZVBB-NEXT: vctz.v v8, v8744; ZVBB-NEXT: vse64.v v8, (a0)745; ZVBB-NEXT: ret746 %a = load <4 x i64>, ptr %x747 %b = load <4 x i64>, ptr %y748 %c = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 false)749 store <4 x i64> %c, ptr %x750 ret void751}752 753define void @cttz_zero_undef_v16i8(ptr %x, ptr %y) nounwind {754; RVI-LABEL: cttz_zero_undef_v16i8:755; RVI: # %bb.0:756; RVI-NEXT: vsetivli zero, 16, e8, m1, ta, ma757; RVI-NEXT: vle8.v v8, (a0)758; RVI-NEXT: li a1, 85759; RVI-NEXT: vadd.vi v9, v8, -1760; RVI-NEXT: vnot.v v8, v8761; RVI-NEXT: vand.vv v8, v8, v9762; RVI-NEXT: vsrl.vi v9, v8, 1763; RVI-NEXT: vand.vx v9, v9, a1764; RVI-NEXT: li a1, 51765; RVI-NEXT: vsub.vv v8, v8, v9766; RVI-NEXT: vand.vx v9, v8, a1767; RVI-NEXT: vsrl.vi v8, v8, 2768; RVI-NEXT: vand.vx v8, v8, a1769; RVI-NEXT: vadd.vv v8, v9, v8770; RVI-NEXT: vsrl.vi v9, v8, 4771; RVI-NEXT: vadd.vv v8, v8, v9772; RVI-NEXT: vand.vi v8, v8, 15773; RVI-NEXT: vse8.v v8, (a0)774; RVI-NEXT: ret775;776; RVF-LABEL: cttz_zero_undef_v16i8:777; RVF: # %bb.0:778; RVF-NEXT: vsetivli zero, 16, e8, m1, ta, ma779; RVF-NEXT: vle8.v v8, (a0)780; RVF-NEXT: vrsub.vi v9, v8, 0781; RVF-NEXT: vand.vv v8, v8, v9782; RVF-NEXT: vsetvli zero, zero, e16, m2, ta, ma783; RVF-NEXT: vzext.vf2 v12, v8784; RVF-NEXT: vfwcvt.f.xu.v v8, v12785; RVF-NEXT: vnsrl.wi v12, v8, 23786; RVF-NEXT: vsetvli zero, zero, e8, m1, ta, ma787; RVF-NEXT: vnsrl.wi v8, v12, 0788; RVF-NEXT: li a1, 127789; RVF-NEXT: vsub.vx v8, v8, a1790; RVF-NEXT: vse8.v v8, (a0)791; RVF-NEXT: ret792;793; RVD-LABEL: cttz_zero_undef_v16i8:794; RVD: # %bb.0:795; RVD-NEXT: vsetivli zero, 16, e8, m1, ta, ma796; RVD-NEXT: vle8.v v8, (a0)797; RVD-NEXT: vrsub.vi v9, v8, 0798; RVD-NEXT: vand.vv v8, v8, v9799; RVD-NEXT: vsetvli zero, zero, e16, m2, ta, ma800; RVD-NEXT: vzext.vf2 v12, v8801; RVD-NEXT: vfwcvt.f.xu.v v8, v12802; RVD-NEXT: vnsrl.wi v12, v8, 23803; RVD-NEXT: vsetvli zero, zero, e8, m1, ta, ma804; RVD-NEXT: vnsrl.wi v8, v12, 0805; RVD-NEXT: li a1, 127806; RVD-NEXT: vsub.vx v8, v8, a1807; RVD-NEXT: vse8.v v8, (a0)808; RVD-NEXT: ret809;810; ZVBB-LABEL: cttz_zero_undef_v16i8:811; ZVBB: # %bb.0:812; ZVBB-NEXT: vsetivli zero, 16, e8, m1, ta, ma813; ZVBB-NEXT: vle8.v v8, (a0)814; ZVBB-NEXT: vctz.v v8, v8815; ZVBB-NEXT: vse8.v v8, (a0)816; ZVBB-NEXT: ret817 %a = load <16 x i8>, ptr %x818 %b = load <16 x i8>, ptr %y819 %c = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 true)820 store <16 x i8> %c, ptr %x821 ret void822}823 824define void @cttz_zero_undef_v8i16(ptr %x, ptr %y) nounwind {825; RVI-LABEL: cttz_zero_undef_v8i16:826; RVI: # %bb.0:827; RVI-NEXT: vsetivli zero, 8, e16, m1, ta, ma828; RVI-NEXT: vle16.v v8, (a0)829; RVI-NEXT: lui a1, 5830; RVI-NEXT: addi a1, a1, 1365831; RVI-NEXT: vadd.vi v9, v8, -1832; RVI-NEXT: vnot.v v8, v8833; RVI-NEXT: vand.vv v8, v8, v9834; RVI-NEXT: vsrl.vi v9, v8, 1835; RVI-NEXT: vand.vx v9, v9, a1836; RVI-NEXT: lui a1, 3837; RVI-NEXT: addi a1, a1, 819838; RVI-NEXT: vsub.vv v8, v8, v9839; RVI-NEXT: vand.vx v9, v8, a1840; RVI-NEXT: vsrl.vi v8, v8, 2841; RVI-NEXT: vand.vx v8, v8, a1842; RVI-NEXT: lui a1, 1843; RVI-NEXT: addi a1, a1, -241844; RVI-NEXT: vadd.vv v8, v9, v8845; RVI-NEXT: vsrl.vi v9, v8, 4846; RVI-NEXT: vadd.vv v8, v8, v9847; RVI-NEXT: vand.vx v8, v8, a1848; RVI-NEXT: li a1, 257849; RVI-NEXT: vmul.vx v8, v8, a1850; RVI-NEXT: vsrl.vi v8, v8, 8851; RVI-NEXT: vse16.v v8, (a0)852; RVI-NEXT: ret853;854; RVF-LABEL: cttz_zero_undef_v8i16:855; RVF: # %bb.0:856; RVF-NEXT: vsetivli zero, 8, e16, m1, ta, ma857; RVF-NEXT: vle16.v v8, (a0)858; RVF-NEXT: vrsub.vi v9, v8, 0859; RVF-NEXT: vand.vv v10, v8, v9860; RVF-NEXT: vfwcvt.f.xu.v v8, v10861; RVF-NEXT: vnsrl.wi v10, v8, 23862; RVF-NEXT: li a1, 127863; RVF-NEXT: vsub.vx v8, v10, a1864; RVF-NEXT: vse16.v v8, (a0)865; RVF-NEXT: ret866;867; RVD-LABEL: cttz_zero_undef_v8i16:868; RVD: # %bb.0:869; RVD-NEXT: vsetivli zero, 8, e16, m1, ta, ma870; RVD-NEXT: vle16.v v8, (a0)871; RVD-NEXT: vrsub.vi v9, v8, 0872; RVD-NEXT: vand.vv v10, v8, v9873; RVD-NEXT: vfwcvt.f.xu.v v8, v10874; RVD-NEXT: vnsrl.wi v10, v8, 23875; RVD-NEXT: li a1, 127876; RVD-NEXT: vsub.vx v8, v10, a1877; RVD-NEXT: vse16.v v8, (a0)878; RVD-NEXT: ret879;880; ZVBB-LABEL: cttz_zero_undef_v8i16:881; ZVBB: # %bb.0:882; ZVBB-NEXT: vsetivli zero, 8, e16, m1, ta, ma883; ZVBB-NEXT: vle16.v v8, (a0)884; ZVBB-NEXT: vctz.v v8, v8885; ZVBB-NEXT: vse16.v v8, (a0)886; ZVBB-NEXT: ret887 %a = load <8 x i16>, ptr %x888 %b = load <8 x i16>, ptr %y889 %c = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 true)890 store <8 x i16> %c, ptr %x891 ret void892}893 894define void @cttz_zero_undef_v4i32(ptr %x, ptr %y) nounwind {895; RVI-LABEL: cttz_zero_undef_v4i32:896; RVI: # %bb.0:897; RVI-NEXT: vsetivli zero, 4, e32, m1, ta, ma898; RVI-NEXT: vle32.v v8, (a0)899; RVI-NEXT: lui a1, 349525900; RVI-NEXT: addi a1, a1, 1365901; RVI-NEXT: vadd.vi v9, v8, -1902; RVI-NEXT: vnot.v v8, v8903; RVI-NEXT: vand.vv v8, v8, v9904; RVI-NEXT: vsrl.vi v9, v8, 1905; RVI-NEXT: vand.vx v9, v9, a1906; RVI-NEXT: lui a1, 209715907; RVI-NEXT: addi a1, a1, 819908; RVI-NEXT: vsub.vv v8, v8, v9909; RVI-NEXT: vand.vx v9, v8, a1910; RVI-NEXT: vsrl.vi v8, v8, 2911; RVI-NEXT: vand.vx v8, v8, a1912; RVI-NEXT: lui a1, 61681913; RVI-NEXT: addi a1, a1, -241914; RVI-NEXT: vadd.vv v8, v9, v8915; RVI-NEXT: vsrl.vi v9, v8, 4916; RVI-NEXT: vadd.vv v8, v8, v9917; RVI-NEXT: vand.vx v8, v8, a1918; RVI-NEXT: lui a1, 4112919; RVI-NEXT: addi a1, a1, 257920; RVI-NEXT: vmul.vx v8, v8, a1921; RVI-NEXT: vsrl.vi v8, v8, 24922; RVI-NEXT: vse32.v v8, (a0)923; RVI-NEXT: ret924;925; RVF-LABEL: cttz_zero_undef_v4i32:926; RVF: # %bb.0:927; RVF-NEXT: vsetivli zero, 4, e32, m1, ta, ma928; RVF-NEXT: vle32.v v8, (a0)929; RVF-NEXT: fsrmi a1, 1930; RVF-NEXT: vrsub.vi v9, v8, 0931; RVF-NEXT: vand.vv v8, v8, v9932; RVF-NEXT: vfcvt.f.xu.v v8, v8933; RVF-NEXT: fsrm a1934; RVF-NEXT: vsrl.vi v8, v8, 23935; RVF-NEXT: li a1, 127936; RVF-NEXT: vsub.vx v8, v8, a1937; RVF-NEXT: vse32.v v8, (a0)938; RVF-NEXT: ret939;940; RVD-LABEL: cttz_zero_undef_v4i32:941; RVD: # %bb.0:942; RVD-NEXT: vsetivli zero, 4, e32, m1, ta, ma943; RVD-NEXT: vle32.v v8, (a0)944; RVD-NEXT: li a1, 52945; RVD-NEXT: vrsub.vi v9, v8, 0946; RVD-NEXT: vand.vv v10, v8, v9947; RVD-NEXT: vfwcvt.f.xu.v v8, v10948; RVD-NEXT: vnsrl.wx v10, v8, a1949; RVD-NEXT: li a1, 1023950; RVD-NEXT: vsub.vx v8, v10, a1951; RVD-NEXT: vse32.v v8, (a0)952; RVD-NEXT: ret953;954; ZVBB-LABEL: cttz_zero_undef_v4i32:955; ZVBB: # %bb.0:956; ZVBB-NEXT: vsetivli zero, 4, e32, m1, ta, ma957; ZVBB-NEXT: vle32.v v8, (a0)958; ZVBB-NEXT: vctz.v v8, v8959; ZVBB-NEXT: vse32.v v8, (a0)960; ZVBB-NEXT: ret961 %a = load <4 x i32>, ptr %x962 %b = load <4 x i32>, ptr %y963 %c = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 true)964 store <4 x i32> %c, ptr %x965 ret void966}967 968define void @cttz_zero_undef_v2i64(ptr %x, ptr %y) nounwind {969; RV32I-LABEL: cttz_zero_undef_v2i64:970; RV32I: # %bb.0:971; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma972; RV32I-NEXT: vle64.v v8, (a0)973; RV32I-NEXT: lui a1, 349525974; RV32I-NEXT: addi a1, a1, 1365975; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma976; RV32I-NEXT: vmv.v.x v9, a1977; RV32I-NEXT: lui a1, 209715978; RV32I-NEXT: addi a1, a1, 819979; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma980; RV32I-NEXT: vadd.vi v10, v8, -1981; RV32I-NEXT: vnot.v v8, v8982; RV32I-NEXT: vand.vv v8, v8, v10983; RV32I-NEXT: vsrl.vi v10, v8, 1984; RV32I-NEXT: vand.vv v9, v10, v9985; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma986; RV32I-NEXT: vmv.v.x v10, a1987; RV32I-NEXT: lui a1, 61681988; RV32I-NEXT: addi a1, a1, -241989; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma990; RV32I-NEXT: vsub.vv v8, v8, v9991; RV32I-NEXT: vand.vv v9, v8, v10992; RV32I-NEXT: vsrl.vi v8, v8, 2993; RV32I-NEXT: vand.vv v8, v8, v10994; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma995; RV32I-NEXT: vmv.v.x v10, a1996; RV32I-NEXT: lui a1, 4112997; RV32I-NEXT: addi a1, a1, 257998; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma999; RV32I-NEXT: vadd.vv v8, v9, v81000; RV32I-NEXT: vsrl.vi v9, v8, 41001; RV32I-NEXT: vadd.vv v8, v8, v91002; RV32I-NEXT: vsetivli zero, 4, e32, m1, ta, ma1003; RV32I-NEXT: vmv.v.x v9, a11004; RV32I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1005; RV32I-NEXT: vand.vv v8, v8, v101006; RV32I-NEXT: vmul.vv v8, v8, v91007; RV32I-NEXT: li a1, 561008; RV32I-NEXT: vsrl.vx v8, v8, a11009; RV32I-NEXT: vse64.v v8, (a0)1010; RV32I-NEXT: ret1011;1012; RV64I-LABEL: cttz_zero_undef_v2i64:1013; RV64I: # %bb.0:1014; RV64I-NEXT: vsetivli zero, 2, e64, m1, ta, ma1015; RV64I-NEXT: vle64.v v8, (a0)1016; RV64I-NEXT: lui a1, 3495251017; RV64I-NEXT: lui a2, 2097151018; RV64I-NEXT: lui a3, 616811019; RV64I-NEXT: lui a4, 41121020; RV64I-NEXT: addi a1, a1, 13651021; RV64I-NEXT: addi a2, a2, 8191022; RV64I-NEXT: addi a3, a3, -2411023; RV64I-NEXT: addi a4, a4, 2571024; RV64I-NEXT: slli a5, a1, 321025; RV64I-NEXT: add a1, a1, a51026; RV64I-NEXT: slli a5, a2, 321027; RV64I-NEXT: add a2, a2, a51028; RV64I-NEXT: slli a5, a3, 321029; RV64I-NEXT: add a3, a3, a51030; RV64I-NEXT: slli a5, a4, 321031; RV64I-NEXT: add a4, a4, a51032; RV64I-NEXT: vadd.vi v9, v8, -11033; RV64I-NEXT: vnot.v v8, v81034; RV64I-NEXT: vand.vv v8, v8, v91035; RV64I-NEXT: vsrl.vi v9, v8, 11036; RV64I-NEXT: vand.vx v9, v9, a11037; RV64I-NEXT: vsub.vv v8, v8, v91038; RV64I-NEXT: vand.vx v9, v8, a21039; RV64I-NEXT: vsrl.vi v8, v8, 21040; RV64I-NEXT: vand.vx v8, v8, a21041; RV64I-NEXT: vadd.vv v8, v9, v81042; RV64I-NEXT: vsrl.vi v9, v8, 41043; RV64I-NEXT: vadd.vv v8, v8, v91044; RV64I-NEXT: vand.vx v8, v8, a31045; RV64I-NEXT: vmul.vx v8, v8, a41046; RV64I-NEXT: li a1, 561047; RV64I-NEXT: vsrl.vx v8, v8, a11048; RV64I-NEXT: vse64.v v8, (a0)1049; RV64I-NEXT: ret1050;1051; RVF-LABEL: cttz_zero_undef_v2i64:1052; RVF: # %bb.0:1053; RVF-NEXT: vsetivli zero, 2, e64, m1, ta, ma1054; RVF-NEXT: vle64.v v8, (a0)1055; RVF-NEXT: fsrmi a1, 11056; RVF-NEXT: vrsub.vi v9, v8, 01057; RVF-NEXT: vand.vv v8, v8, v91058; RVF-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1059; RVF-NEXT: vfncvt.f.xu.w v9, v81060; RVF-NEXT: fsrm a11061; RVF-NEXT: vsrl.vi v8, v9, 231062; RVF-NEXT: li a1, 1271063; RVF-NEXT: vwsubu.vx v9, v8, a11064; RVF-NEXT: vse64.v v9, (a0)1065; RVF-NEXT: ret1066;1067; RVD-LABEL: cttz_zero_undef_v2i64:1068; RVD: # %bb.0:1069; RVD-NEXT: vsetivli zero, 2, e64, m1, ta, ma1070; RVD-NEXT: vle64.v v8, (a0)1071; RVD-NEXT: fsrmi a1, 11072; RVD-NEXT: vrsub.vi v9, v8, 01073; RVD-NEXT: vand.vv v8, v8, v91074; RVD-NEXT: vfcvt.f.xu.v v8, v81075; RVD-NEXT: fsrm a11076; RVD-NEXT: li a1, 521077; RVD-NEXT: vsrl.vx v8, v8, a11078; RVD-NEXT: li a1, 10231079; RVD-NEXT: vsub.vx v8, v8, a11080; RVD-NEXT: vse64.v v8, (a0)1081; RVD-NEXT: ret1082;1083; ZVBB-LABEL: cttz_zero_undef_v2i64:1084; ZVBB: # %bb.0:1085; ZVBB-NEXT: vsetivli zero, 2, e64, m1, ta, ma1086; ZVBB-NEXT: vle64.v v8, (a0)1087; ZVBB-NEXT: vctz.v v8, v81088; ZVBB-NEXT: vse64.v v8, (a0)1089; ZVBB-NEXT: ret1090 %a = load <2 x i64>, ptr %x1091 %b = load <2 x i64>, ptr %y1092 %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 true)1093 store <2 x i64> %c, ptr %x1094 ret void1095}1096 1097define void @cttz_zero_undef_v32i8(ptr %x, ptr %y) nounwind {1098; RVI-LABEL: cttz_zero_undef_v32i8:1099; RVI: # %bb.0:1100; RVI-NEXT: li a1, 321101; RVI-NEXT: vsetvli zero, a1, e8, m2, ta, ma1102; RVI-NEXT: vle8.v v8, (a0)1103; RVI-NEXT: li a1, 851104; RVI-NEXT: vadd.vi v10, v8, -11105; RVI-NEXT: vnot.v v8, v81106; RVI-NEXT: vand.vv v8, v8, v101107; RVI-NEXT: vsrl.vi v10, v8, 11108; RVI-NEXT: vand.vx v10, v10, a11109; RVI-NEXT: li a1, 511110; RVI-NEXT: vsub.vv v8, v8, v101111; RVI-NEXT: vand.vx v10, v8, a11112; RVI-NEXT: vsrl.vi v8, v8, 21113; RVI-NEXT: vand.vx v8, v8, a11114; RVI-NEXT: vadd.vv v8, v10, v81115; RVI-NEXT: vsrl.vi v10, v8, 41116; RVI-NEXT: vadd.vv v8, v8, v101117; RVI-NEXT: vand.vi v8, v8, 151118; RVI-NEXT: vse8.v v8, (a0)1119; RVI-NEXT: ret1120;1121; RVF-LABEL: cttz_zero_undef_v32i8:1122; RVF: # %bb.0:1123; RVF-NEXT: li a1, 321124; RVF-NEXT: vsetvli zero, a1, e8, m2, ta, ma1125; RVF-NEXT: vle8.v v8, (a0)1126; RVF-NEXT: vrsub.vi v10, v8, 01127; RVF-NEXT: vand.vv v8, v8, v101128; RVF-NEXT: vsetvli zero, zero, e16, m4, ta, ma1129; RVF-NEXT: vzext.vf2 v16, v81130; RVF-NEXT: vfwcvt.f.xu.v v8, v161131; RVF-NEXT: vnsrl.wi v16, v8, 231132; RVF-NEXT: vsetvli zero, zero, e8, m2, ta, ma1133; RVF-NEXT: vnsrl.wi v8, v16, 01134; RVF-NEXT: li a1, 1271135; RVF-NEXT: vsub.vx v8, v8, a11136; RVF-NEXT: vse8.v v8, (a0)1137; RVF-NEXT: ret1138;1139; RVD-LABEL: cttz_zero_undef_v32i8:1140; RVD: # %bb.0:1141; RVD-NEXT: li a1, 321142; RVD-NEXT: vsetvli zero, a1, e8, m2, ta, ma1143; RVD-NEXT: vle8.v v8, (a0)1144; RVD-NEXT: vrsub.vi v10, v8, 01145; RVD-NEXT: vand.vv v8, v8, v101146; RVD-NEXT: vsetvli zero, zero, e16, m4, ta, ma1147; RVD-NEXT: vzext.vf2 v16, v81148; RVD-NEXT: vfwcvt.f.xu.v v8, v161149; RVD-NEXT: vnsrl.wi v16, v8, 231150; RVD-NEXT: vsetvli zero, zero, e8, m2, ta, ma1151; RVD-NEXT: vnsrl.wi v8, v16, 01152; RVD-NEXT: li a1, 1271153; RVD-NEXT: vsub.vx v8, v8, a11154; RVD-NEXT: vse8.v v8, (a0)1155; RVD-NEXT: ret1156;1157; ZVBB-LABEL: cttz_zero_undef_v32i8:1158; ZVBB: # %bb.0:1159; ZVBB-NEXT: li a1, 321160; ZVBB-NEXT: vsetvli zero, a1, e8, m2, ta, ma1161; ZVBB-NEXT: vle8.v v8, (a0)1162; ZVBB-NEXT: vctz.v v8, v81163; ZVBB-NEXT: vse8.v v8, (a0)1164; ZVBB-NEXT: ret1165 %a = load <32 x i8>, ptr %x1166 %b = load <32 x i8>, ptr %y1167 %c = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 true)1168 store <32 x i8> %c, ptr %x1169 ret void1170}1171 1172define void @cttz_zero_undef_v16i16(ptr %x, ptr %y) nounwind {1173; RVI-LABEL: cttz_zero_undef_v16i16:1174; RVI: # %bb.0:1175; RVI-NEXT: vsetivli zero, 16, e16, m2, ta, ma1176; RVI-NEXT: vle16.v v8, (a0)1177; RVI-NEXT: lui a1, 51178; RVI-NEXT: addi a1, a1, 13651179; RVI-NEXT: vadd.vi v10, v8, -11180; RVI-NEXT: vnot.v v8, v81181; RVI-NEXT: vand.vv v8, v8, v101182; RVI-NEXT: vsrl.vi v10, v8, 11183; RVI-NEXT: vand.vx v10, v10, a11184; RVI-NEXT: lui a1, 31185; RVI-NEXT: addi a1, a1, 8191186; RVI-NEXT: vsub.vv v8, v8, v101187; RVI-NEXT: vand.vx v10, v8, a11188; RVI-NEXT: vsrl.vi v8, v8, 21189; RVI-NEXT: vand.vx v8, v8, a11190; RVI-NEXT: lui a1, 11191; RVI-NEXT: addi a1, a1, -2411192; RVI-NEXT: vadd.vv v8, v10, v81193; RVI-NEXT: vsrl.vi v10, v8, 41194; RVI-NEXT: vadd.vv v8, v8, v101195; RVI-NEXT: vand.vx v8, v8, a11196; RVI-NEXT: li a1, 2571197; RVI-NEXT: vmul.vx v8, v8, a11198; RVI-NEXT: vsrl.vi v8, v8, 81199; RVI-NEXT: vse16.v v8, (a0)1200; RVI-NEXT: ret1201;1202; RVF-LABEL: cttz_zero_undef_v16i16:1203; RVF: # %bb.0:1204; RVF-NEXT: vsetivli zero, 16, e16, m2, ta, ma1205; RVF-NEXT: vle16.v v8, (a0)1206; RVF-NEXT: vrsub.vi v10, v8, 01207; RVF-NEXT: vand.vv v12, v8, v101208; RVF-NEXT: vfwcvt.f.xu.v v8, v121209; RVF-NEXT: vnsrl.wi v12, v8, 231210; RVF-NEXT: li a1, 1271211; RVF-NEXT: vsub.vx v8, v12, a11212; RVF-NEXT: vse16.v v8, (a0)1213; RVF-NEXT: ret1214;1215; RVD-LABEL: cttz_zero_undef_v16i16:1216; RVD: # %bb.0:1217; RVD-NEXT: vsetivli zero, 16, e16, m2, ta, ma1218; RVD-NEXT: vle16.v v8, (a0)1219; RVD-NEXT: vrsub.vi v10, v8, 01220; RVD-NEXT: vand.vv v12, v8, v101221; RVD-NEXT: vfwcvt.f.xu.v v8, v121222; RVD-NEXT: vnsrl.wi v12, v8, 231223; RVD-NEXT: li a1, 1271224; RVD-NEXT: vsub.vx v8, v12, a11225; RVD-NEXT: vse16.v v8, (a0)1226; RVD-NEXT: ret1227;1228; ZVBB-LABEL: cttz_zero_undef_v16i16:1229; ZVBB: # %bb.0:1230; ZVBB-NEXT: vsetivli zero, 16, e16, m2, ta, ma1231; ZVBB-NEXT: vle16.v v8, (a0)1232; ZVBB-NEXT: vctz.v v8, v81233; ZVBB-NEXT: vse16.v v8, (a0)1234; ZVBB-NEXT: ret1235 %a = load <16 x i16>, ptr %x1236 %b = load <16 x i16>, ptr %y1237 %c = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 true)1238 store <16 x i16> %c, ptr %x1239 ret void1240}1241 1242define void @cttz_zero_undef_v8i32(ptr %x, ptr %y) nounwind {1243; RVI-LABEL: cttz_zero_undef_v8i32:1244; RVI: # %bb.0:1245; RVI-NEXT: vsetivli zero, 8, e32, m2, ta, ma1246; RVI-NEXT: vle32.v v8, (a0)1247; RVI-NEXT: lui a1, 3495251248; RVI-NEXT: addi a1, a1, 13651249; RVI-NEXT: vadd.vi v10, v8, -11250; RVI-NEXT: vnot.v v8, v81251; RVI-NEXT: vand.vv v8, v8, v101252; RVI-NEXT: vsrl.vi v10, v8, 11253; RVI-NEXT: vand.vx v10, v10, a11254; RVI-NEXT: lui a1, 2097151255; RVI-NEXT: addi a1, a1, 8191256; RVI-NEXT: vsub.vv v8, v8, v101257; RVI-NEXT: vand.vx v10, v8, a11258; RVI-NEXT: vsrl.vi v8, v8, 21259; RVI-NEXT: vand.vx v8, v8, a11260; RVI-NEXT: lui a1, 616811261; RVI-NEXT: addi a1, a1, -2411262; RVI-NEXT: vadd.vv v8, v10, v81263; RVI-NEXT: vsrl.vi v10, v8, 41264; RVI-NEXT: vadd.vv v8, v8, v101265; RVI-NEXT: vand.vx v8, v8, a11266; RVI-NEXT: lui a1, 41121267; RVI-NEXT: addi a1, a1, 2571268; RVI-NEXT: vmul.vx v8, v8, a11269; RVI-NEXT: vsrl.vi v8, v8, 241270; RVI-NEXT: vse32.v v8, (a0)1271; RVI-NEXT: ret1272;1273; RVF-LABEL: cttz_zero_undef_v8i32:1274; RVF: # %bb.0:1275; RVF-NEXT: vsetivli zero, 8, e32, m2, ta, ma1276; RVF-NEXT: vle32.v v8, (a0)1277; RVF-NEXT: fsrmi a1, 11278; RVF-NEXT: vrsub.vi v10, v8, 01279; RVF-NEXT: vand.vv v8, v8, v101280; RVF-NEXT: vfcvt.f.xu.v v8, v81281; RVF-NEXT: fsrm a11282; RVF-NEXT: vsrl.vi v8, v8, 231283; RVF-NEXT: li a1, 1271284; RVF-NEXT: vsub.vx v8, v8, a11285; RVF-NEXT: vse32.v v8, (a0)1286; RVF-NEXT: ret1287;1288; RVD-LABEL: cttz_zero_undef_v8i32:1289; RVD: # %bb.0:1290; RVD-NEXT: vsetivli zero, 8, e32, m2, ta, ma1291; RVD-NEXT: vle32.v v8, (a0)1292; RVD-NEXT: li a1, 521293; RVD-NEXT: vrsub.vi v10, v8, 01294; RVD-NEXT: vand.vv v12, v8, v101295; RVD-NEXT: vfwcvt.f.xu.v v8, v121296; RVD-NEXT: vnsrl.wx v12, v8, a11297; RVD-NEXT: li a1, 10231298; RVD-NEXT: vsub.vx v8, v12, a11299; RVD-NEXT: vse32.v v8, (a0)1300; RVD-NEXT: ret1301;1302; ZVBB-LABEL: cttz_zero_undef_v8i32:1303; ZVBB: # %bb.0:1304; ZVBB-NEXT: vsetivli zero, 8, e32, m2, ta, ma1305; ZVBB-NEXT: vle32.v v8, (a0)1306; ZVBB-NEXT: vctz.v v8, v81307; ZVBB-NEXT: vse32.v v8, (a0)1308; ZVBB-NEXT: ret1309 %a = load <8 x i32>, ptr %x1310 %b = load <8 x i32>, ptr %y1311 %c = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 true)1312 store <8 x i32> %c, ptr %x1313 ret void1314}1315 1316define void @cttz_zero_undef_v4i64(ptr %x, ptr %y) nounwind {1317; RV32I-LABEL: cttz_zero_undef_v4i64:1318; RV32I: # %bb.0:1319; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1320; RV32I-NEXT: vle64.v v8, (a0)1321; RV32I-NEXT: lui a1, 3495251322; RV32I-NEXT: addi a1, a1, 13651323; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1324; RV32I-NEXT: vmv.v.x v10, a11325; RV32I-NEXT: lui a1, 2097151326; RV32I-NEXT: addi a1, a1, 8191327; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1328; RV32I-NEXT: vadd.vi v12, v8, -11329; RV32I-NEXT: vnot.v v8, v81330; RV32I-NEXT: vand.vv v8, v8, v121331; RV32I-NEXT: vsrl.vi v12, v8, 11332; RV32I-NEXT: vand.vv v10, v12, v101333; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1334; RV32I-NEXT: vmv.v.x v12, a11335; RV32I-NEXT: lui a1, 616811336; RV32I-NEXT: addi a1, a1, -2411337; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1338; RV32I-NEXT: vsub.vv v8, v8, v101339; RV32I-NEXT: vand.vv v10, v8, v121340; RV32I-NEXT: vsrl.vi v8, v8, 21341; RV32I-NEXT: vand.vv v8, v8, v121342; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1343; RV32I-NEXT: vmv.v.x v12, a11344; RV32I-NEXT: lui a1, 41121345; RV32I-NEXT: addi a1, a1, 2571346; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1347; RV32I-NEXT: vadd.vv v8, v10, v81348; RV32I-NEXT: vsrl.vi v10, v8, 41349; RV32I-NEXT: vadd.vv v8, v8, v101350; RV32I-NEXT: vsetivli zero, 8, e32, m2, ta, ma1351; RV32I-NEXT: vmv.v.x v10, a11352; RV32I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1353; RV32I-NEXT: vand.vv v8, v8, v121354; RV32I-NEXT: vmul.vv v8, v8, v101355; RV32I-NEXT: li a1, 561356; RV32I-NEXT: vsrl.vx v8, v8, a11357; RV32I-NEXT: vse64.v v8, (a0)1358; RV32I-NEXT: ret1359;1360; RV64I-LABEL: cttz_zero_undef_v4i64:1361; RV64I: # %bb.0:1362; RV64I-NEXT: vsetivli zero, 4, e64, m2, ta, ma1363; RV64I-NEXT: vle64.v v8, (a0)1364; RV64I-NEXT: lui a1, 3495251365; RV64I-NEXT: lui a2, 2097151366; RV64I-NEXT: lui a3, 616811367; RV64I-NEXT: lui a4, 41121368; RV64I-NEXT: addi a1, a1, 13651369; RV64I-NEXT: addi a2, a2, 8191370; RV64I-NEXT: addi a3, a3, -2411371; RV64I-NEXT: addi a4, a4, 2571372; RV64I-NEXT: slli a5, a1, 321373; RV64I-NEXT: add a1, a1, a51374; RV64I-NEXT: slli a5, a2, 321375; RV64I-NEXT: add a2, a2, a51376; RV64I-NEXT: slli a5, a3, 321377; RV64I-NEXT: add a3, a3, a51378; RV64I-NEXT: slli a5, a4, 321379; RV64I-NEXT: add a4, a4, a51380; RV64I-NEXT: vadd.vi v10, v8, -11381; RV64I-NEXT: vnot.v v8, v81382; RV64I-NEXT: vand.vv v8, v8, v101383; RV64I-NEXT: vsrl.vi v10, v8, 11384; RV64I-NEXT: vand.vx v10, v10, a11385; RV64I-NEXT: vsub.vv v8, v8, v101386; RV64I-NEXT: vand.vx v10, v8, a21387; RV64I-NEXT: vsrl.vi v8, v8, 21388; RV64I-NEXT: vand.vx v8, v8, a21389; RV64I-NEXT: vadd.vv v8, v10, v81390; RV64I-NEXT: vsrl.vi v10, v8, 41391; RV64I-NEXT: vadd.vv v8, v8, v101392; RV64I-NEXT: vand.vx v8, v8, a31393; RV64I-NEXT: vmul.vx v8, v8, a41394; RV64I-NEXT: li a1, 561395; RV64I-NEXT: vsrl.vx v8, v8, a11396; RV64I-NEXT: vse64.v v8, (a0)1397; RV64I-NEXT: ret1398;1399; RVF-LABEL: cttz_zero_undef_v4i64:1400; RVF: # %bb.0:1401; RVF-NEXT: vsetivli zero, 4, e64, m2, ta, ma1402; RVF-NEXT: vle64.v v8, (a0)1403; RVF-NEXT: fsrmi a1, 11404; RVF-NEXT: vrsub.vi v10, v8, 01405; RVF-NEXT: vand.vv v8, v8, v101406; RVF-NEXT: vsetvli zero, zero, e32, m1, ta, ma1407; RVF-NEXT: vfncvt.f.xu.w v10, v81408; RVF-NEXT: fsrm a11409; RVF-NEXT: vsrl.vi v10, v10, 231410; RVF-NEXT: li a1, 1271411; RVF-NEXT: vwsubu.vx v8, v10, a11412; RVF-NEXT: vse64.v v8, (a0)1413; RVF-NEXT: ret1414;1415; RVD-LABEL: cttz_zero_undef_v4i64:1416; RVD: # %bb.0:1417; RVD-NEXT: vsetivli zero, 4, e64, m2, ta, ma1418; RVD-NEXT: vle64.v v8, (a0)1419; RVD-NEXT: fsrmi a1, 11420; RVD-NEXT: vrsub.vi v10, v8, 01421; RVD-NEXT: vand.vv v8, v8, v101422; RVD-NEXT: vfcvt.f.xu.v v8, v81423; RVD-NEXT: fsrm a11424; RVD-NEXT: li a1, 521425; RVD-NEXT: vsrl.vx v8, v8, a11426; RVD-NEXT: li a1, 10231427; RVD-NEXT: vsub.vx v8, v8, a11428; RVD-NEXT: vse64.v v8, (a0)1429; RVD-NEXT: ret1430;1431; ZVBB-LABEL: cttz_zero_undef_v4i64:1432; ZVBB: # %bb.0:1433; ZVBB-NEXT: vsetivli zero, 4, e64, m2, ta, ma1434; ZVBB-NEXT: vle64.v v8, (a0)1435; ZVBB-NEXT: vctz.v v8, v81436; ZVBB-NEXT: vse64.v v8, (a0)1437; ZVBB-NEXT: ret1438 %a = load <4 x i64>, ptr %x1439 %b = load <4 x i64>, ptr %y1440 %c = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 true)1441 store <4 x i64> %c, ptr %x1442 ret void1443}1444;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1445; RV32D: {{.*}}1446; RV32F: {{.*}}1447; RV64D: {{.*}}1448; RV64F: {{.*}}1449