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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -target-abi=ilp32d -mattr=+v,+zvfh,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH,ZVFH323; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zvfh,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH,ZVFH644; RUN: llc -mtriple=riscv32 -target-abi=ilp32d -mattr=+v,+zvfhmin,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,ZVFHMIN325; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zvfhmin,+zvfbfmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN,ZVFHMIN646 7define void @fp2si_v2f32_v2i32(ptr %x, ptr %y) {8; CHECK-LABEL: fp2si_v2f32_v2i32:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma11; CHECK-NEXT: vle32.v v8, (a0)12; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v813; CHECK-NEXT: vse32.v v8, (a1)14; CHECK-NEXT: ret15 %a = load <2 x float>, ptr %x16 %d = fptosi <2 x float> %a to <2 x i32>17 store <2 x i32> %d, ptr %y18 ret void19}20 21define void @fp2ui_v2f32_v2i32(ptr %x, ptr %y) {22; CHECK-LABEL: fp2ui_v2f32_v2i32:23; CHECK: # %bb.0:24; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma25; CHECK-NEXT: vle32.v v8, (a0)26; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v827; CHECK-NEXT: vse32.v v8, (a1)28; CHECK-NEXT: ret29 %a = load <2 x float>, ptr %x30 %d = fptoui <2 x float> %a to <2 x i32>31 store <2 x i32> %d, ptr %y32 ret void33}34 35define <2 x i1> @fp2si_v2f32_v2i1(<2 x float> %x) {36; CHECK-LABEL: fp2si_v2f32_v2i1:37; CHECK: # %bb.0:38; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma39; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v840; CHECK-NEXT: vand.vi v8, v9, 141; CHECK-NEXT: vmsne.vi v0, v8, 042; CHECK-NEXT: ret43 %z = fptosi <2 x float> %x to <2 x i1>44 ret <2 x i1> %z45}46 47define <2 x i15> @fp2si_v2f32_v2i15(<2 x float> %x) {48; CHECK-LABEL: fp2si_v2f32_v2i15:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma51; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v852; CHECK-NEXT: vmv1r.v v8, v953; CHECK-NEXT: ret54 %z = fptosi <2 x float> %x to <2 x i15>55 ret <2 x i15> %z56}57 58define <2 x i15> @fp2ui_v2f32_v2i15(<2 x float> %x) {59; CHECK-LABEL: fp2ui_v2f32_v2i15:60; CHECK: # %bb.0:61; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma62; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v863; CHECK-NEXT: vmv1r.v v8, v964; CHECK-NEXT: ret65 %z = fptoui <2 x float> %x to <2 x i15>66 ret <2 x i15> %z67}68 69define <2 x i1> @fp2ui_v2f32_v2i1(<2 x float> %x) {70; CHECK-LABEL: fp2ui_v2f32_v2i1:71; CHECK: # %bb.0:72; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma73; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v874; CHECK-NEXT: vand.vi v8, v9, 175; CHECK-NEXT: vmsne.vi v0, v8, 076; CHECK-NEXT: ret77 %z = fptoui <2 x float> %x to <2 x i1>78 ret <2 x i1> %z79}80 81define void @fp2si_v3f32_v3i32(ptr %x, ptr %y) {82; CHECK-LABEL: fp2si_v3f32_v3i32:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetivli zero, 3, e32, m1, ta, ma85; CHECK-NEXT: vle32.v v8, (a0)86; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v887; CHECK-NEXT: vse32.v v8, (a1)88; CHECK-NEXT: ret89 %a = load <3 x float>, ptr %x90 %d = fptosi <3 x float> %a to <3 x i32>91 store <3 x i32> %d, ptr %y92 ret void93}94 95define void @fp2ui_v3f32_v3i32(ptr %x, ptr %y) {96; CHECK-LABEL: fp2ui_v3f32_v3i32:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetivli zero, 3, e32, m1, ta, ma99; CHECK-NEXT: vle32.v v8, (a0)100; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8101; CHECK-NEXT: vse32.v v8, (a1)102; CHECK-NEXT: ret103 %a = load <3 x float>, ptr %x104 %d = fptoui <3 x float> %a to <3 x i32>105 store <3 x i32> %d, ptr %y106 ret void107}108 109define <3 x i1> @fp2si_v3f32_v3i1(<3 x float> %x) {110; CHECK-LABEL: fp2si_v3f32_v3i1:111; CHECK: # %bb.0:112; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma113; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8114; CHECK-NEXT: vand.vi v8, v9, 1115; CHECK-NEXT: vmsne.vi v0, v8, 0116; CHECK-NEXT: ret117 %z = fptosi <3 x float> %x to <3 x i1>118 ret <3 x i1> %z119}120 121; FIXME: This is expanded when they could be widened + promoted122define <3 x i15> @fp2si_v3f32_v3i15(<3 x float> %x) {123; ZVFH32-LABEL: fp2si_v3f32_v3i15:124; ZVFH32: # %bb.0:125; ZVFH32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma126; ZVFH32-NEXT: vfncvt.rtz.x.f.w v9, v8127; ZVFH32-NEXT: vslidedown.vi v8, v9, 2128; ZVFH32-NEXT: vmv.x.s a1, v9129; ZVFH32-NEXT: vslidedown.vi v9, v9, 1130; ZVFH32-NEXT: vmv.x.s a2, v8131; ZVFH32-NEXT: slli a1, a1, 17132; ZVFH32-NEXT: srli a1, a1, 17133; ZVFH32-NEXT: slli a3, a2, 30134; ZVFH32-NEXT: or a1, a1, a3135; ZVFH32-NEXT: vmv.x.s a3, v9136; ZVFH32-NEXT: slli a2, a2, 17137; ZVFH32-NEXT: slli a3, a3, 17138; ZVFH32-NEXT: srli a2, a2, 19139; ZVFH32-NEXT: srli a3, a3, 2140; ZVFH32-NEXT: or a1, a1, a3141; ZVFH32-NEXT: sw a1, 0(a0)142; ZVFH32-NEXT: sh a2, 4(a0)143; ZVFH32-NEXT: ret144;145; ZVFH64-LABEL: fp2si_v3f32_v3i15:146; ZVFH64: # %bb.0:147; ZVFH64-NEXT: vsetivli zero, 4, e16, mf2, ta, ma148; ZVFH64-NEXT: vfncvt.rtz.x.f.w v9, v8149; ZVFH64-NEXT: vmv.x.s a1, v9150; ZVFH64-NEXT: vslidedown.vi v8, v9, 1151; ZVFH64-NEXT: vslidedown.vi v9, v9, 2152; ZVFH64-NEXT: slli a1, a1, 49153; ZVFH64-NEXT: vmv.x.s a2, v8154; ZVFH64-NEXT: vmv.x.s a3, v9155; ZVFH64-NEXT: srli a1, a1, 49156; ZVFH64-NEXT: slli a2, a2, 49157; ZVFH64-NEXT: slli a3, a3, 30158; ZVFH64-NEXT: srli a2, a2, 34159; ZVFH64-NEXT: or a1, a1, a3160; ZVFH64-NEXT: or a1, a1, a2161; ZVFH64-NEXT: slli a2, a1, 19162; ZVFH64-NEXT: srli a2, a2, 51163; ZVFH64-NEXT: sw a1, 0(a0)164; ZVFH64-NEXT: sh a2, 4(a0)165; ZVFH64-NEXT: ret166;167; ZVFHMIN32-LABEL: fp2si_v3f32_v3i15:168; ZVFHMIN32: # %bb.0:169; ZVFHMIN32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma170; ZVFHMIN32-NEXT: vfncvt.rtz.x.f.w v9, v8171; ZVFHMIN32-NEXT: vslidedown.vi v8, v9, 2172; ZVFHMIN32-NEXT: vmv.x.s a1, v9173; ZVFHMIN32-NEXT: vslidedown.vi v9, v9, 1174; ZVFHMIN32-NEXT: vmv.x.s a2, v8175; ZVFHMIN32-NEXT: slli a1, a1, 17176; ZVFHMIN32-NEXT: srli a1, a1, 17177; ZVFHMIN32-NEXT: slli a3, a2, 30178; ZVFHMIN32-NEXT: or a1, a1, a3179; ZVFHMIN32-NEXT: vmv.x.s a3, v9180; ZVFHMIN32-NEXT: slli a2, a2, 17181; ZVFHMIN32-NEXT: slli a3, a3, 17182; ZVFHMIN32-NEXT: srli a2, a2, 19183; ZVFHMIN32-NEXT: srli a3, a3, 2184; ZVFHMIN32-NEXT: or a1, a1, a3185; ZVFHMIN32-NEXT: sw a1, 0(a0)186; ZVFHMIN32-NEXT: sh a2, 4(a0)187; ZVFHMIN32-NEXT: ret188;189; ZVFHMIN64-LABEL: fp2si_v3f32_v3i15:190; ZVFHMIN64: # %bb.0:191; ZVFHMIN64-NEXT: vsetivli zero, 4, e16, mf2, ta, ma192; ZVFHMIN64-NEXT: vfncvt.rtz.x.f.w v9, v8193; ZVFHMIN64-NEXT: vmv.x.s a1, v9194; ZVFHMIN64-NEXT: vslidedown.vi v8, v9, 1195; ZVFHMIN64-NEXT: vslidedown.vi v9, v9, 2196; ZVFHMIN64-NEXT: slli a1, a1, 49197; ZVFHMIN64-NEXT: vmv.x.s a2, v8198; ZVFHMIN64-NEXT: vmv.x.s a3, v9199; ZVFHMIN64-NEXT: srli a1, a1, 49200; ZVFHMIN64-NEXT: slli a2, a2, 49201; ZVFHMIN64-NEXT: slli a3, a3, 30202; ZVFHMIN64-NEXT: srli a2, a2, 34203; ZVFHMIN64-NEXT: or a1, a1, a3204; ZVFHMIN64-NEXT: or a1, a1, a2205; ZVFHMIN64-NEXT: slli a2, a1, 19206; ZVFHMIN64-NEXT: srli a2, a2, 51207; ZVFHMIN64-NEXT: sw a1, 0(a0)208; ZVFHMIN64-NEXT: sh a2, 4(a0)209; ZVFHMIN64-NEXT: ret210 %z = fptosi <3 x float> %x to <3 x i15>211 ret <3 x i15> %z212}213 214; FIXME: This is expanded when they could be widened + promoted215define <3 x i15> @fp2ui_v3f32_v3i15(<3 x float> %x) {216; ZVFH32-LABEL: fp2ui_v3f32_v3i15:217; ZVFH32: # %bb.0:218; ZVFH32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma219; ZVFH32-NEXT: vfncvt.rtz.x.f.w v9, v8220; ZVFH32-NEXT: vslidedown.vi v8, v9, 2221; ZVFH32-NEXT: vmv.x.s a1, v9222; ZVFH32-NEXT: vslidedown.vi v9, v9, 1223; ZVFH32-NEXT: vmv.x.s a2, v8224; ZVFH32-NEXT: slli a1, a1, 16225; ZVFH32-NEXT: srli a1, a1, 16226; ZVFH32-NEXT: slli a3, a2, 30227; ZVFH32-NEXT: or a1, a1, a3228; ZVFH32-NEXT: vmv.x.s a3, v9229; ZVFH32-NEXT: slli a2, a2, 17230; ZVFH32-NEXT: slli a3, a3, 16231; ZVFH32-NEXT: srli a2, a2, 19232; ZVFH32-NEXT: srli a3, a3, 1233; ZVFH32-NEXT: or a1, a1, a3234; ZVFH32-NEXT: sw a1, 0(a0)235; ZVFH32-NEXT: sh a2, 4(a0)236; ZVFH32-NEXT: ret237;238; ZVFH64-LABEL: fp2ui_v3f32_v3i15:239; ZVFH64: # %bb.0:240; ZVFH64-NEXT: vsetivli zero, 4, e16, mf2, ta, ma241; ZVFH64-NEXT: vfncvt.rtz.x.f.w v9, v8242; ZVFH64-NEXT: vmv.x.s a1, v9243; ZVFH64-NEXT: vslidedown.vi v8, v9, 1244; ZVFH64-NEXT: vslidedown.vi v9, v9, 2245; ZVFH64-NEXT: slli a1, a1, 48246; ZVFH64-NEXT: vmv.x.s a2, v8247; ZVFH64-NEXT: vmv.x.s a3, v9248; ZVFH64-NEXT: srli a1, a1, 48249; ZVFH64-NEXT: slli a2, a2, 48250; ZVFH64-NEXT: slli a3, a3, 30251; ZVFH64-NEXT: srli a2, a2, 33252; ZVFH64-NEXT: or a1, a1, a3253; ZVFH64-NEXT: or a1, a1, a2254; ZVFH64-NEXT: slli a2, a1, 19255; ZVFH64-NEXT: srli a2, a2, 51256; ZVFH64-NEXT: sw a1, 0(a0)257; ZVFH64-NEXT: sh a2, 4(a0)258; ZVFH64-NEXT: ret259;260; ZVFHMIN32-LABEL: fp2ui_v3f32_v3i15:261; ZVFHMIN32: # %bb.0:262; ZVFHMIN32-NEXT: vsetivli zero, 4, e16, mf2, ta, ma263; ZVFHMIN32-NEXT: vfncvt.rtz.x.f.w v9, v8264; ZVFHMIN32-NEXT: vslidedown.vi v8, v9, 2265; ZVFHMIN32-NEXT: vmv.x.s a1, v9266; ZVFHMIN32-NEXT: vslidedown.vi v9, v9, 1267; ZVFHMIN32-NEXT: vmv.x.s a2, v8268; ZVFHMIN32-NEXT: slli a1, a1, 16269; ZVFHMIN32-NEXT: srli a1, a1, 16270; ZVFHMIN32-NEXT: slli a3, a2, 30271; ZVFHMIN32-NEXT: or a1, a1, a3272; ZVFHMIN32-NEXT: vmv.x.s a3, v9273; ZVFHMIN32-NEXT: slli a2, a2, 17274; ZVFHMIN32-NEXT: slli a3, a3, 16275; ZVFHMIN32-NEXT: srli a2, a2, 19276; ZVFHMIN32-NEXT: srli a3, a3, 1277; ZVFHMIN32-NEXT: or a1, a1, a3278; ZVFHMIN32-NEXT: sw a1, 0(a0)279; ZVFHMIN32-NEXT: sh a2, 4(a0)280; ZVFHMIN32-NEXT: ret281;282; ZVFHMIN64-LABEL: fp2ui_v3f32_v3i15:283; ZVFHMIN64: # %bb.0:284; ZVFHMIN64-NEXT: vsetivli zero, 4, e16, mf2, ta, ma285; ZVFHMIN64-NEXT: vfncvt.rtz.x.f.w v9, v8286; ZVFHMIN64-NEXT: vmv.x.s a1, v9287; ZVFHMIN64-NEXT: vslidedown.vi v8, v9, 1288; ZVFHMIN64-NEXT: vslidedown.vi v9, v9, 2289; ZVFHMIN64-NEXT: slli a1, a1, 48290; ZVFHMIN64-NEXT: vmv.x.s a2, v8291; ZVFHMIN64-NEXT: vmv.x.s a3, v9292; ZVFHMIN64-NEXT: srli a1, a1, 48293; ZVFHMIN64-NEXT: slli a2, a2, 48294; ZVFHMIN64-NEXT: slli a3, a3, 30295; ZVFHMIN64-NEXT: srli a2, a2, 33296; ZVFHMIN64-NEXT: or a1, a1, a3297; ZVFHMIN64-NEXT: or a1, a1, a2298; ZVFHMIN64-NEXT: slli a2, a1, 19299; ZVFHMIN64-NEXT: srli a2, a2, 51300; ZVFHMIN64-NEXT: sw a1, 0(a0)301; ZVFHMIN64-NEXT: sh a2, 4(a0)302; ZVFHMIN64-NEXT: ret303 %z = fptoui <3 x float> %x to <3 x i15>304 ret <3 x i15> %z305}306 307define <3 x i1> @fp2ui_v3f32_v3i1(<3 x float> %x) {308; CHECK-LABEL: fp2ui_v3f32_v3i1:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma311; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8312; CHECK-NEXT: vand.vi v8, v9, 1313; CHECK-NEXT: vmsne.vi v0, v8, 0314; CHECK-NEXT: ret315 %z = fptoui <3 x float> %x to <3 x i1>316 ret <3 x i1> %z317}318 319define void @fp2si_v8f32_v8i32(ptr %x, ptr %y) {320; CHECK-LABEL: fp2si_v8f32_v8i32:321; CHECK: # %bb.0:322; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma323; CHECK-NEXT: vle32.v v8, (a0)324; CHECK-NEXT: vfcvt.rtz.x.f.v v8, v8325; CHECK-NEXT: vse32.v v8, (a1)326; CHECK-NEXT: ret327 %a = load <8 x float>, ptr %x328 %d = fptosi <8 x float> %a to <8 x i32>329 store <8 x i32> %d, ptr %y330 ret void331}332 333define void @fp2ui_v8f32_v8i32(ptr %x, ptr %y) {334; CHECK-LABEL: fp2ui_v8f32_v8i32:335; CHECK: # %bb.0:336; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma337; CHECK-NEXT: vle32.v v8, (a0)338; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8339; CHECK-NEXT: vse32.v v8, (a1)340; CHECK-NEXT: ret341 %a = load <8 x float>, ptr %x342 %d = fptoui <8 x float> %a to <8 x i32>343 store <8 x i32> %d, ptr %y344 ret void345}346 347define <8 x i1> @fp2si_v8f32_v8i1(<8 x float> %x) {348; CHECK-LABEL: fp2si_v8f32_v8i1:349; CHECK: # %bb.0:350; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma351; CHECK-NEXT: vfncvt.rtz.x.f.w v10, v8352; CHECK-NEXT: vand.vi v8, v10, 1353; CHECK-NEXT: vmsne.vi v0, v8, 0354; CHECK-NEXT: ret355 %z = fptosi <8 x float> %x to <8 x i1>356 ret <8 x i1> %z357}358 359define <8 x i1> @fp2ui_v8f32_v8i1(<8 x float> %x) {360; CHECK-LABEL: fp2ui_v8f32_v8i1:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma363; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8364; CHECK-NEXT: vand.vi v8, v10, 1365; CHECK-NEXT: vmsne.vi v0, v8, 0366; CHECK-NEXT: ret367 %z = fptoui <8 x float> %x to <8 x i1>368 ret <8 x i1> %z369}370 371define void @fp2si_v2f32_v2i64(ptr %x, ptr %y) {372; CHECK-LABEL: fp2si_v2f32_v2i64:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma375; CHECK-NEXT: vle32.v v8, (a0)376; CHECK-NEXT: vfwcvt.rtz.x.f.v v9, v8377; CHECK-NEXT: vse64.v v9, (a1)378; CHECK-NEXT: ret379 %a = load <2 x float>, ptr %x380 %d = fptosi <2 x float> %a to <2 x i64>381 store <2 x i64> %d, ptr %y382 ret void383}384 385define void @fp2ui_v2f32_v2i64(ptr %x, ptr %y) {386; CHECK-LABEL: fp2ui_v2f32_v2i64:387; CHECK: # %bb.0:388; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma389; CHECK-NEXT: vle32.v v8, (a0)390; CHECK-NEXT: vfwcvt.rtz.xu.f.v v9, v8391; CHECK-NEXT: vse64.v v9, (a1)392; CHECK-NEXT: ret393 %a = load <2 x float>, ptr %x394 %d = fptoui <2 x float> %a to <2 x i64>395 store <2 x i64> %d, ptr %y396 ret void397}398 399define void @fp2si_v8f32_v8i64(ptr %x, ptr %y) {400; CHECK-LABEL: fp2si_v8f32_v8i64:401; CHECK: # %bb.0:402; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma403; CHECK-NEXT: vle32.v v12, (a0)404; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v12405; CHECK-NEXT: vse64.v v8, (a1)406; CHECK-NEXT: ret407 %a = load <8 x float>, ptr %x408 %d = fptosi <8 x float> %a to <8 x i64>409 store <8 x i64> %d, ptr %y410 ret void411}412 413define void @fp2ui_v8f32_v8i64(ptr %x, ptr %y) {414; CHECK-LABEL: fp2ui_v8f32_v8i64:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma417; CHECK-NEXT: vle32.v v12, (a0)418; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v12419; CHECK-NEXT: vse64.v v8, (a1)420; CHECK-NEXT: ret421 %a = load <8 x float>, ptr %x422 %d = fptoui <8 x float> %a to <8 x i64>423 store <8 x i64> %d, ptr %y424 ret void425}426 427define void @fp2si_v2bf16_v2i64(ptr %x, ptr %y) {428; CHECK-LABEL: fp2si_v2bf16_v2i64:429; CHECK: # %bb.0:430; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma431; CHECK-NEXT: vle16.v v8, (a0)432; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8433; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma434; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v9435; CHECK-NEXT: vse64.v v8, (a1)436; CHECK-NEXT: ret437 %a = load <2 x bfloat>, ptr %x438 %d = fptosi <2 x bfloat> %a to <2 x i64>439 store <2 x i64> %d, ptr %y440 ret void441}442 443define void @fp2ui_v2bf16_v2i64(ptr %x, ptr %y) {444; CHECK-LABEL: fp2ui_v2bf16_v2i64:445; CHECK: # %bb.0:446; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma447; CHECK-NEXT: vle16.v v8, (a0)448; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8449; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma450; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v9451; CHECK-NEXT: vse64.v v8, (a1)452; CHECK-NEXT: ret453 %a = load <2 x bfloat>, ptr %x454 %d = fptoui <2 x bfloat> %a to <2 x i64>455 store <2 x i64> %d, ptr %y456 ret void457}458 459define <2 x i1> @fp2si_v2bf16_v2i1(<2 x bfloat> %x) {460; CHECK-LABEL: fp2si_v2bf16_v2i1:461; CHECK: # %bb.0:462; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma463; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8464; CHECK-NEXT: vfncvt.rtz.x.f.w v8, v9465; CHECK-NEXT: vand.vi v8, v8, 1466; CHECK-NEXT: vmsne.vi v0, v8, 0467; CHECK-NEXT: ret468 %z = fptosi <2 x bfloat> %x to <2 x i1>469 ret <2 x i1> %z470}471 472define <2 x i1> @fp2ui_v2bf16_v2i1(<2 x bfloat> %x) {473; CHECK-LABEL: fp2ui_v2bf16_v2i1:474; CHECK: # %bb.0:475; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma476; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v8477; CHECK-NEXT: vfncvt.rtz.xu.f.w v8, v9478; CHECK-NEXT: vand.vi v8, v8, 1479; CHECK-NEXT: vmsne.vi v0, v8, 0480; CHECK-NEXT: ret481 %z = fptoui <2 x bfloat> %x to <2 x i1>482 ret <2 x i1> %z483}484 485define void @fp2si_v2f16_v2i64(ptr %x, ptr %y) {486; CHECK-LABEL: fp2si_v2f16_v2i64:487; CHECK: # %bb.0:488; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma489; CHECK-NEXT: vle16.v v8, (a0)490; CHECK-NEXT: vfwcvt.f.f.v v9, v8491; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma492; CHECK-NEXT: vfwcvt.rtz.x.f.v v8, v9493; CHECK-NEXT: vse64.v v8, (a1)494; CHECK-NEXT: ret495 %a = load <2 x half>, ptr %x496 %d = fptosi <2 x half> %a to <2 x i64>497 store <2 x i64> %d, ptr %y498 ret void499}500 501define void @fp2ui_v2f16_v2i64(ptr %x, ptr %y) {502; CHECK-LABEL: fp2ui_v2f16_v2i64:503; CHECK: # %bb.0:504; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma505; CHECK-NEXT: vle16.v v8, (a0)506; CHECK-NEXT: vfwcvt.f.f.v v9, v8507; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma508; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v9509; CHECK-NEXT: vse64.v v8, (a1)510; CHECK-NEXT: ret511 %a = load <2 x half>, ptr %x512 %d = fptoui <2 x half> %a to <2 x i64>513 store <2 x i64> %d, ptr %y514 ret void515}516 517define <2 x i1> @fp2si_v2f16_v2i1(<2 x half> %x) {518; ZVFH-LABEL: fp2si_v2f16_v2i1:519; ZVFH: # %bb.0:520; ZVFH-NEXT: vsetivli zero, 2, e8, mf8, ta, ma521; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8522; ZVFH-NEXT: vand.vi v8, v9, 1523; ZVFH-NEXT: vmsne.vi v0, v8, 0524; ZVFH-NEXT: ret525;526; ZVFHMIN-LABEL: fp2si_v2f16_v2i1:527; ZVFHMIN: # %bb.0:528; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma529; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8530; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9531; ZVFHMIN-NEXT: vand.vi v8, v8, 1532; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0533; ZVFHMIN-NEXT: ret534 %z = fptosi <2 x half> %x to <2 x i1>535 ret <2 x i1> %z536}537 538define <2 x i1> @fp2ui_v2f16_v2i1(<2 x half> %x) {539; ZVFH-LABEL: fp2ui_v2f16_v2i1:540; ZVFH: # %bb.0:541; ZVFH-NEXT: vsetivli zero, 2, e8, mf8, ta, ma542; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8543; ZVFH-NEXT: vand.vi v8, v9, 1544; ZVFH-NEXT: vmsne.vi v0, v8, 0545; ZVFH-NEXT: ret546;547; ZVFHMIN-LABEL: fp2ui_v2f16_v2i1:548; ZVFHMIN: # %bb.0:549; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma550; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8551; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9552; ZVFHMIN-NEXT: vand.vi v8, v8, 1553; ZVFHMIN-NEXT: vmsne.vi v0, v8, 0554; ZVFHMIN-NEXT: ret555 %z = fptoui <2 x half> %x to <2 x i1>556 ret <2 x i1> %z557}558 559define void @fp2si_v2f64_v2i8(ptr %x, ptr %y) {560; CHECK-LABEL: fp2si_v2f64_v2i8:561; CHECK: # %bb.0:562; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma563; CHECK-NEXT: vle64.v v8, (a0)564; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8565; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma566; CHECK-NEXT: vnsrl.wi v8, v9, 0567; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma568; CHECK-NEXT: vnsrl.wi v8, v8, 0569; CHECK-NEXT: vse8.v v8, (a1)570; CHECK-NEXT: ret571 %a = load <2 x double>, ptr %x572 %d = fptosi <2 x double> %a to <2 x i8>573 store <2 x i8> %d, ptr %y574 ret void575}576 577define void @fp2ui_v2f64_v2i8(ptr %x, ptr %y) {578; CHECK-LABEL: fp2ui_v2f64_v2i8:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma581; CHECK-NEXT: vle64.v v8, (a0)582; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8583; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma584; CHECK-NEXT: vnsrl.wi v8, v9, 0585; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma586; CHECK-NEXT: vnsrl.wi v8, v8, 0587; CHECK-NEXT: vse8.v v8, (a1)588; CHECK-NEXT: ret589 %a = load <2 x double>, ptr %x590 %d = fptoui <2 x double> %a to <2 x i8>591 store <2 x i8> %d, ptr %y592 ret void593}594 595define <2 x i1> @fp2si_v2f64_v2i1(<2 x double> %x) {596; CHECK-LABEL: fp2si_v2f64_v2i1:597; CHECK: # %bb.0:598; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma599; CHECK-NEXT: vfncvt.rtz.x.f.w v9, v8600; CHECK-NEXT: vand.vi v8, v9, 1601; CHECK-NEXT: vmsne.vi v0, v8, 0602; CHECK-NEXT: ret603 %z = fptosi <2 x double> %x to <2 x i1>604 ret <2 x i1> %z605}606 607define <2 x i1> @fp2ui_v2f64_v2i1(<2 x double> %x) {608; CHECK-LABEL: fp2ui_v2f64_v2i1:609; CHECK: # %bb.0:610; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma611; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8612; CHECK-NEXT: vand.vi v8, v9, 1613; CHECK-NEXT: vmsne.vi v0, v8, 0614; CHECK-NEXT: ret615 %z = fptoui <2 x double> %x to <2 x i1>616 ret <2 x i1> %z617}618 619define void @fp2si_v8f64_v8i8(ptr %x, ptr %y) {620; CHECK-LABEL: fp2si_v8f64_v8i8:621; CHECK: # %bb.0:622; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma623; CHECK-NEXT: vle64.v v8, (a0)624; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8625; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma626; CHECK-NEXT: vnsrl.wi v8, v12, 0627; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma628; CHECK-NEXT: vnsrl.wi v8, v8, 0629; CHECK-NEXT: vse8.v v8, (a1)630; CHECK-NEXT: ret631 %a = load <8 x double>, ptr %x632 %d = fptosi <8 x double> %a to <8 x i8>633 store <8 x i8> %d, ptr %y634 ret void635}636 637define void @fp2ui_v8f64_v8i8(ptr %x, ptr %y) {638; CHECK-LABEL: fp2ui_v8f64_v8i8:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma641; CHECK-NEXT: vle64.v v8, (a0)642; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8643; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma644; CHECK-NEXT: vnsrl.wi v8, v12, 0645; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma646; CHECK-NEXT: vnsrl.wi v8, v8, 0647; CHECK-NEXT: vse8.v v8, (a1)648; CHECK-NEXT: ret649 %a = load <8 x double>, ptr %x650 %d = fptoui <8 x double> %a to <8 x i8>651 store <8 x i8> %d, ptr %y652 ret void653}654 655define <8 x i1> @fp2si_v8f64_v8i1(<8 x double> %x) {656; CHECK-LABEL: fp2si_v8f64_v8i1:657; CHECK: # %bb.0:658; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma659; CHECK-NEXT: vfncvt.rtz.x.f.w v12, v8660; CHECK-NEXT: vand.vi v8, v12, 1661; CHECK-NEXT: vmsne.vi v0, v8, 0662; CHECK-NEXT: ret663 %z = fptosi <8 x double> %x to <8 x i1>664 ret <8 x i1> %z665}666 667define <8 x i1> @fp2ui_v8f64_v8i1(<8 x double> %x) {668; CHECK-LABEL: fp2ui_v8f64_v8i1:669; CHECK: # %bb.0:670; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma671; CHECK-NEXT: vfncvt.rtz.xu.f.w v12, v8672; CHECK-NEXT: vand.vi v8, v12, 1673; CHECK-NEXT: vmsne.vi v0, v8, 0674; CHECK-NEXT: ret675 %z = fptoui <8 x double> %x to <8 x i1>676 ret <8 x i1> %z677}678