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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh < %s | FileCheck %s --check-prefixes=CHECK,ZVFH3; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh < %s | FileCheck %s --check-prefixes=CHECK,ZVFH4; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN5; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN6 7define <4 x i7> @vfptoui_v4i7_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {8; ZVFH-LABEL: vfptoui_v4i7_v4f16:9; ZVFH: # %bb.0:10; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma11; ZVFH-NEXT: vfncvt.rtz.x.f.w v9, v8, v0.t12; ZVFH-NEXT: vmv1r.v v8, v913; ZVFH-NEXT: ret14;15; ZVFHMIN-LABEL: vfptoui_v4i7_v4f16:16; ZVFHMIN: # %bb.0:17; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma18; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v819; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma20; ZVFHMIN-NEXT: vfncvt.rtz.x.f.w v8, v9, v0.t21; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma22; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0, v0.t23; ZVFHMIN-NEXT: ret24 %v = call <4 x i7> @llvm.vp.fptoui.v4i7.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)25 ret <4 x i7> %v26}27 28define <4 x i8> @vfptoui_v4i8_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {29; ZVFH-LABEL: vfptoui_v4i8_v4f16:30; ZVFH: # %bb.0:31; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma32; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v8, v0.t33; ZVFH-NEXT: vmv1r.v v8, v934; ZVFH-NEXT: ret35;36; ZVFHMIN-LABEL: vfptoui_v4i8_v4f16:37; ZVFHMIN: # %bb.0:38; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma39; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v840; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma41; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9, v0.t42; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma43; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 0, v0.t44; ZVFHMIN-NEXT: ret45 %v = call <4 x i8> @llvm.vp.fptoui.v4i8.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)46 ret <4 x i8> %v47}48 49define <4 x i8> @vfptoui_v4i8_v4f16_unmasked(<4 x half> %va, i32 zeroext %evl) {50; ZVFH-LABEL: vfptoui_v4i8_v4f16_unmasked:51; ZVFH: # %bb.0:52; ZVFH-NEXT: vsetvli zero, a0, e8, mf4, ta, ma53; ZVFH-NEXT: vfncvt.rtz.xu.f.w v9, v854; ZVFH-NEXT: vmv1r.v v8, v955; ZVFH-NEXT: ret56;57; ZVFHMIN-LABEL: vfptoui_v4i8_v4f16_unmasked:58; ZVFHMIN: # %bb.0:59; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma60; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v861; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma62; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v963; ZVFHMIN-NEXT: vsetvli zero, zero, e8, mf4, ta, ma64; ZVFHMIN-NEXT: vnsrl.wi v8, v8, 065; ZVFHMIN-NEXT: ret66 %v = call <4 x i8> @llvm.vp.fptoui.v4i8.v4f16(<4 x half> %va, <4 x i1> splat (i1 true), i32 %evl)67 ret <4 x i8> %v68}69 70define <4 x i16> @vfptoui_v4i16_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {71; ZVFH-LABEL: vfptoui_v4i16_v4f16:72; ZVFH: # %bb.0:73; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma74; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v8, v0.t75; ZVFH-NEXT: ret76;77; ZVFHMIN-LABEL: vfptoui_v4i16_v4f16:78; ZVFHMIN: # %bb.0:79; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma80; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v881; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma82; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9, v0.t83; ZVFHMIN-NEXT: ret84 %v = call <4 x i16> @llvm.vp.fptoui.v4i16.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)85 ret <4 x i16> %v86}87 88define <4 x i16> @vfptoui_v4i16_v4f16_unmasked(<4 x half> %va, i32 zeroext %evl) {89; ZVFH-LABEL: vfptoui_v4i16_v4f16_unmasked:90; ZVFH: # %bb.0:91; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma92; ZVFH-NEXT: vfcvt.rtz.xu.f.v v8, v893; ZVFH-NEXT: ret94;95; ZVFHMIN-LABEL: vfptoui_v4i16_v4f16_unmasked:96; ZVFHMIN: # %bb.0:97; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma98; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v899; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma100; ZVFHMIN-NEXT: vfncvt.rtz.xu.f.w v8, v9101; ZVFHMIN-NEXT: ret102 %v = call <4 x i16> @llvm.vp.fptoui.v4i16.v4f16(<4 x half> %va, <4 x i1> splat (i1 true), i32 %evl)103 ret <4 x i16> %v104}105 106define <4 x i32> @vfptoui_v4i32_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {107; ZVFH-LABEL: vfptoui_v4i32_v4f16:108; ZVFH: # %bb.0:109; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma110; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v9, v8, v0.t111; ZVFH-NEXT: vmv1r.v v8, v9112; ZVFH-NEXT: ret113;114; ZVFHMIN-LABEL: vfptoui_v4i32_v4f16:115; ZVFHMIN: # %bb.0:116; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma117; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8118; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma119; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v9, v0.t120; ZVFHMIN-NEXT: ret121 %v = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)122 ret <4 x i32> %v123}124 125define <4 x i32> @vfptoui_v4i32_v4f16_unmasked(<4 x half> %va, i32 zeroext %evl) {126; ZVFH-LABEL: vfptoui_v4i32_v4f16_unmasked:127; ZVFH: # %bb.0:128; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma129; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v9, v8130; ZVFH-NEXT: vmv1r.v v8, v9131; ZVFH-NEXT: ret132;133; ZVFHMIN-LABEL: vfptoui_v4i32_v4f16_unmasked:134; ZVFHMIN: # %bb.0:135; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma136; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8137; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma138; ZVFHMIN-NEXT: vfcvt.rtz.xu.f.v v8, v9139; ZVFHMIN-NEXT: ret140 %v = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f16(<4 x half> %va, <4 x i1> splat (i1 true), i32 %evl)141 ret <4 x i32> %v142}143 144define <4 x i64> @vfptoui_v4i64_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {145; ZVFH-LABEL: vfptoui_v4i64_v4f16:146; ZVFH: # %bb.0:147; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma148; ZVFH-NEXT: vfwcvt.f.f.v v10, v8, v0.t149; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma150; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v8, v10, v0.t151; ZVFH-NEXT: ret152;153; ZVFHMIN-LABEL: vfptoui_v4i64_v4f16:154; ZVFHMIN: # %bb.0:155; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma156; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8157; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma158; ZVFHMIN-NEXT: vfwcvt.rtz.xu.f.v v8, v10, v0.t159; ZVFHMIN-NEXT: ret160 %v = call <4 x i64> @llvm.vp.fptoui.v4i64.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)161 ret <4 x i64> %v162}163 164define <4 x i64> @vfptoui_v4i64_v4f16_unmasked(<4 x half> %va, i32 zeroext %evl) {165; ZVFH-LABEL: vfptoui_v4i64_v4f16_unmasked:166; ZVFH: # %bb.0:167; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma168; ZVFH-NEXT: vfwcvt.f.f.v v10, v8169; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma170; ZVFH-NEXT: vfwcvt.rtz.xu.f.v v8, v10171; ZVFH-NEXT: ret172;173; ZVFHMIN-LABEL: vfptoui_v4i64_v4f16_unmasked:174; ZVFHMIN: # %bb.0:175; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma176; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8177; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma178; ZVFHMIN-NEXT: vfwcvt.rtz.xu.f.v v8, v10179; ZVFHMIN-NEXT: ret180 %v = call <4 x i64> @llvm.vp.fptoui.v4i64.v4f16(<4 x half> %va, <4 x i1> splat (i1 true), i32 %evl)181 ret <4 x i64> %v182}183 184define <4 x i8> @vfptoui_v4i8_v4f32(<4 x float> %va, <4 x i1> %m, i32 zeroext %evl) {185; CHECK-LABEL: vfptoui_v4i8_v4f32:186; CHECK: # %bb.0:187; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma188; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8, v0.t189; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma190; CHECK-NEXT: vnsrl.wi v8, v9, 0, v0.t191; CHECK-NEXT: ret192 %v = call <4 x i8> @llvm.vp.fptoui.v4i8.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)193 ret <4 x i8> %v194}195 196define <4 x i8> @vfptoui_v4i8_v4f32_unmasked(<4 x float> %va, i32 zeroext %evl) {197; CHECK-LABEL: vfptoui_v4i8_v4f32_unmasked:198; CHECK: # %bb.0:199; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma200; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8201; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma202; CHECK-NEXT: vnsrl.wi v8, v9, 0203; CHECK-NEXT: ret204 %v = call <4 x i8> @llvm.vp.fptoui.v4i8.v4f32(<4 x float> %va, <4 x i1> splat (i1 true), i32 %evl)205 ret <4 x i8> %v206}207 208define <4 x i16> @vfptoui_v4i16_v4f32(<4 x float> %va, <4 x i1> %m, i32 zeroext %evl) {209; CHECK-LABEL: vfptoui_v4i16_v4f32:210; CHECK: # %bb.0:211; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma212; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8, v0.t213; CHECK-NEXT: vmv1r.v v8, v9214; CHECK-NEXT: ret215 %v = call <4 x i16> @llvm.vp.fptoui.v4i16.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)216 ret <4 x i16> %v217}218 219define <4 x i16> @vfptoui_v4i16_v4f32_unmasked(<4 x float> %va, i32 zeroext %evl) {220; CHECK-LABEL: vfptoui_v4i16_v4f32_unmasked:221; CHECK: # %bb.0:222; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma223; CHECK-NEXT: vfncvt.rtz.xu.f.w v9, v8224; CHECK-NEXT: vmv1r.v v8, v9225; CHECK-NEXT: ret226 %v = call <4 x i16> @llvm.vp.fptoui.v4i16.v4f32(<4 x float> %va, <4 x i1> splat (i1 true), i32 %evl)227 ret <4 x i16> %v228}229 230define <4 x i32> @vfptoui_v4i32_v4f32(<4 x float> %va, <4 x i1> %m, i32 zeroext %evl) {231; CHECK-LABEL: vfptoui_v4i32_v4f32:232; CHECK: # %bb.0:233; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma234; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8, v0.t235; CHECK-NEXT: ret236 %v = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)237 ret <4 x i32> %v238}239 240define <4 x i32> @vfptoui_v4i32_v4f32_unmasked(<4 x float> %va, i32 zeroext %evl) {241; CHECK-LABEL: vfptoui_v4i32_v4f32_unmasked:242; CHECK: # %bb.0:243; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma244; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8245; CHECK-NEXT: ret246 %v = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f32(<4 x float> %va, <4 x i1> splat (i1 true), i32 %evl)247 ret <4 x i32> %v248}249 250define <4 x i64> @vfptoui_v4i64_v4f32(<4 x float> %va, <4 x i1> %m, i32 zeroext %evl) {251; CHECK-LABEL: vfptoui_v4i64_v4f32:252; CHECK: # %bb.0:253; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma254; CHECK-NEXT: vmv1r.v v10, v8255; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v10, v0.t256; CHECK-NEXT: ret257 %v = call <4 x i64> @llvm.vp.fptoui.v4i64.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)258 ret <4 x i64> %v259}260 261define <4 x i64> @vfptoui_v4i64_v4f32_unmasked(<4 x float> %va, i32 zeroext %evl) {262; CHECK-LABEL: vfptoui_v4i64_v4f32_unmasked:263; CHECK: # %bb.0:264; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma265; CHECK-NEXT: vmv1r.v v10, v8266; CHECK-NEXT: vfwcvt.rtz.xu.f.v v8, v10267; CHECK-NEXT: ret268 %v = call <4 x i64> @llvm.vp.fptoui.v4i64.v4f32(<4 x float> %va, <4 x i1> splat (i1 true), i32 %evl)269 ret <4 x i64> %v270}271 272define <4 x i8> @vfptoui_v4i8_v4f64(<4 x double> %va, <4 x i1> %m, i32 zeroext %evl) {273; CHECK-LABEL: vfptoui_v4i8_v4f64:274; CHECK: # %bb.0:275; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma276; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8, v0.t277; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma278; CHECK-NEXT: vnsrl.wi v8, v10, 0, v0.t279; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma280; CHECK-NEXT: vnsrl.wi v8, v8, 0, v0.t281; CHECK-NEXT: ret282 %v = call <4 x i8> @llvm.vp.fptoui.v4i8.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)283 ret <4 x i8> %v284}285 286define <4 x i8> @vfptoui_v4i8_v4f64_unmasked(<4 x double> %va, i32 zeroext %evl) {287; CHECK-LABEL: vfptoui_v4i8_v4f64_unmasked:288; CHECK: # %bb.0:289; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma290; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8291; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma292; CHECK-NEXT: vnsrl.wi v8, v10, 0293; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma294; CHECK-NEXT: vnsrl.wi v8, v8, 0295; CHECK-NEXT: ret296 %v = call <4 x i8> @llvm.vp.fptoui.v4i8.v4f64(<4 x double> %va, <4 x i1> splat (i1 true), i32 %evl)297 ret <4 x i8> %v298}299 300define <4 x i16> @vfptoui_v4i16_v4f64(<4 x double> %va, <4 x i1> %m, i32 zeroext %evl) {301; CHECK-LABEL: vfptoui_v4i16_v4f64:302; CHECK: # %bb.0:303; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma304; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8, v0.t305; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma306; CHECK-NEXT: vnsrl.wi v8, v10, 0, v0.t307; CHECK-NEXT: ret308 %v = call <4 x i16> @llvm.vp.fptoui.v4i16.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)309 ret <4 x i16> %v310}311 312define <4 x i16> @vfptoui_v4i16_v4f64_unmasked(<4 x double> %va, i32 zeroext %evl) {313; CHECK-LABEL: vfptoui_v4i16_v4f64_unmasked:314; CHECK: # %bb.0:315; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma316; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8317; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma318; CHECK-NEXT: vnsrl.wi v8, v10, 0319; CHECK-NEXT: ret320 %v = call <4 x i16> @llvm.vp.fptoui.v4i16.v4f64(<4 x double> %va, <4 x i1> splat (i1 true), i32 %evl)321 ret <4 x i16> %v322}323 324define <4 x i32> @vfptoui_v4i32_v4f64(<4 x double> %va, <4 x i1> %m, i32 zeroext %evl) {325; CHECK-LABEL: vfptoui_v4i32_v4f64:326; CHECK: # %bb.0:327; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma328; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8, v0.t329; CHECK-NEXT: vmv.v.v v8, v10330; CHECK-NEXT: ret331 %v = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)332 ret <4 x i32> %v333}334 335define <4 x i32> @vfptoui_v4i32_v4f64_unmasked(<4 x double> %va, i32 zeroext %evl) {336; CHECK-LABEL: vfptoui_v4i32_v4f64_unmasked:337; CHECK: # %bb.0:338; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma339; CHECK-NEXT: vfncvt.rtz.xu.f.w v10, v8340; CHECK-NEXT: vmv.v.v v8, v10341; CHECK-NEXT: ret342 %v = call <4 x i32> @llvm.vp.fptoui.v4i32.v4f64(<4 x double> %va, <4 x i1> splat (i1 true), i32 %evl)343 ret <4 x i32> %v344}345 346define <4 x i64> @vfptoui_v4i64_v4f64(<4 x double> %va, <4 x i1> %m, i32 zeroext %evl) {347; CHECK-LABEL: vfptoui_v4i64_v4f64:348; CHECK: # %bb.0:349; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma350; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8, v0.t351; CHECK-NEXT: ret352 %v = call <4 x i64> @llvm.vp.fptoui.v4i64.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)353 ret <4 x i64> %v354}355 356define <4 x i64> @vfptoui_v4i64_v4f64_unmasked(<4 x double> %va, i32 zeroext %evl) {357; CHECK-LABEL: vfptoui_v4i64_v4f64_unmasked:358; CHECK: # %bb.0:359; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma360; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8361; CHECK-NEXT: ret362 %v = call <4 x i64> @llvm.vp.fptoui.v4i64.v4f64(<4 x double> %va, <4 x i1> splat (i1 true), i32 %evl)363 ret <4 x i64> %v364}365 366define <32 x i64> @vfptoui_v32i64_v32f64(<32 x double> %va, <32 x i1> %m, i32 zeroext %evl) {367; CHECK-LABEL: vfptoui_v32i64_v32f64:368; CHECK: # %bb.0:369; CHECK-NEXT: li a2, 16370; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma371; CHECK-NEXT: vslidedown.vi v24, v0, 2372; CHECK-NEXT: mv a1, a0373; CHECK-NEXT: bltu a0, a2, .LBB25_2374; CHECK-NEXT: # %bb.1:375; CHECK-NEXT: li a1, 16376; CHECK-NEXT: .LBB25_2:377; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma378; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8, v0.t379; CHECK-NEXT: addi a1, a0, -16380; CHECK-NEXT: sltu a0, a0, a1381; CHECK-NEXT: addi a0, a0, -1382; CHECK-NEXT: and a0, a0, a1383; CHECK-NEXT: vmv1r.v v0, v24384; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma385; CHECK-NEXT: vfcvt.rtz.xu.f.v v16, v16, v0.t386; CHECK-NEXT: ret387 %v = call <32 x i64> @llvm.vp.fptoui.v32i64.v32f64(<32 x double> %va, <32 x i1> %m, i32 %evl)388 ret <32 x i64> %v389}390 391define <32 x i64> @vfptoui_v32i64_v32f64_unmasked(<32 x double> %va, i32 zeroext %evl) {392; CHECK-LABEL: vfptoui_v32i64_v32f64_unmasked:393; CHECK: # %bb.0:394; CHECK-NEXT: li a2, 16395; CHECK-NEXT: mv a1, a0396; CHECK-NEXT: bltu a0, a2, .LBB26_2397; CHECK-NEXT: # %bb.1:398; CHECK-NEXT: li a1, 16399; CHECK-NEXT: .LBB26_2:400; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma401; CHECK-NEXT: vfcvt.rtz.xu.f.v v8, v8402; CHECK-NEXT: addi a1, a0, -16403; CHECK-NEXT: sltu a0, a0, a1404; CHECK-NEXT: addi a0, a0, -1405; CHECK-NEXT: and a0, a0, a1406; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma407; CHECK-NEXT: vfcvt.rtz.xu.f.v v16, v16408; CHECK-NEXT: ret409 %v = call <32 x i64> @llvm.vp.fptoui.v32i64.v32f64(<32 x double> %va, <32 x i1> splat (i1 true), i32 %evl)410 ret <32 x i64> %v411}412