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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV32 %s4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV64 %s6 7; This file tests the code generation for `llvm.experimental.constrained.roundeven.*` on scalable vector type.8 9define <1 x half> @roundeven_v1f16(<1 x half> %x) strictfp {10; CHECK-LABEL: roundeven_v1f16:11; CHECK: # %bb.0:12; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, mu13; CHECK-NEXT: vmfne.vv v0, v8, v814; CHECK-NEXT: li a0, 2515; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t16; CHECK-NEXT: slli a0, a0, 1017; CHECK-NEXT: vfabs.v v9, v818; CHECK-NEXT: fmv.h.x fa5, a019; CHECK-NEXT: vmflt.vf v0, v9, fa520; CHECK-NEXT: fsrmi a0, 021; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma22; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t23; CHECK-NEXT: fsrm a024; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t25; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu26; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t27; CHECK-NEXT: ret28 %a = call <1 x half> @llvm.experimental.constrained.roundeven.v1f16(<1 x half> %x, metadata !"fpexcept.strict")29 ret <1 x half> %a30}31 32define <2 x half> @roundeven_v2f16(<2 x half> %x) strictfp {33; CHECK-LABEL: roundeven_v2f16:34; CHECK: # %bb.0:35; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu36; CHECK-NEXT: vmfne.vv v0, v8, v837; CHECK-NEXT: li a0, 2538; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t39; CHECK-NEXT: slli a0, a0, 1040; CHECK-NEXT: vfabs.v v9, v841; CHECK-NEXT: fmv.h.x fa5, a042; CHECK-NEXT: vmflt.vf v0, v9, fa543; CHECK-NEXT: fsrmi a0, 044; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma45; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t46; CHECK-NEXT: fsrm a047; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t48; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu49; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t50; CHECK-NEXT: ret51 %a = call <2 x half> @llvm.experimental.constrained.roundeven.v2f16(<2 x half> %x, metadata !"fpexcept.strict")52 ret <2 x half> %a53}54 55define <4 x half> @roundeven_v4f16(<4 x half> %x) strictfp {56; CHECK-LABEL: roundeven_v4f16:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu59; CHECK-NEXT: vmfne.vv v0, v8, v860; CHECK-NEXT: li a0, 2561; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t62; CHECK-NEXT: slli a0, a0, 1063; CHECK-NEXT: vfabs.v v9, v864; CHECK-NEXT: fmv.h.x fa5, a065; CHECK-NEXT: vmflt.vf v0, v9, fa566; CHECK-NEXT: fsrmi a0, 067; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma68; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t69; CHECK-NEXT: fsrm a070; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t71; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu72; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t73; CHECK-NEXT: ret74 %a = call <4 x half> @llvm.experimental.constrained.roundeven.v4f16(<4 x half> %x, metadata !"fpexcept.strict")75 ret <4 x half> %a76}77 78define <8 x half> @roundeven_v8f16(<8 x half> %x) strictfp {79; CHECK-LABEL: roundeven_v8f16:80; CHECK: # %bb.0:81; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu82; CHECK-NEXT: vmfne.vv v0, v8, v883; CHECK-NEXT: li a0, 2584; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t85; CHECK-NEXT: slli a0, a0, 1086; CHECK-NEXT: vfabs.v v9, v887; CHECK-NEXT: fmv.h.x fa5, a088; CHECK-NEXT: vmflt.vf v0, v9, fa589; CHECK-NEXT: fsrmi a0, 090; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma91; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t92; CHECK-NEXT: fsrm a093; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t94; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu95; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t96; CHECK-NEXT: ret97 %a = call <8 x half> @llvm.experimental.constrained.roundeven.v8f16(<8 x half> %x, metadata !"fpexcept.strict")98 ret <8 x half> %a99}100 101define <16 x half> @roundeven_v16f16(<16 x half> %x) strictfp {102; CHECK-LABEL: roundeven_v16f16:103; CHECK: # %bb.0:104; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, mu105; CHECK-NEXT: vmfne.vv v0, v8, v8106; CHECK-NEXT: li a0, 25107; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t108; CHECK-NEXT: slli a0, a0, 10109; CHECK-NEXT: vfabs.v v10, v8110; CHECK-NEXT: fmv.h.x fa5, a0111; CHECK-NEXT: vmflt.vf v0, v10, fa5112; CHECK-NEXT: fsrmi a0, 0113; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma114; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t115; CHECK-NEXT: fsrm a0116; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t117; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu118; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t119; CHECK-NEXT: ret120 %a = call <16 x half> @llvm.experimental.constrained.roundeven.v16f16(<16 x half> %x, metadata !"fpexcept.strict")121 ret <16 x half> %a122}123 124define <32 x half> @roundeven_v32f16(<32 x half> %x) strictfp {125; CHECK-LABEL: roundeven_v32f16:126; CHECK: # %bb.0:127; CHECK-NEXT: li a0, 32128; CHECK-NEXT: li a1, 25129; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, mu130; CHECK-NEXT: vmfne.vv v0, v8, v8131; CHECK-NEXT: slli a1, a1, 10132; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t133; CHECK-NEXT: fmv.h.x fa5, a1134; CHECK-NEXT: vfabs.v v12, v8135; CHECK-NEXT: vmflt.vf v0, v12, fa5136; CHECK-NEXT: fsrmi a0, 0137; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma138; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t139; CHECK-NEXT: fsrm a0140; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t141; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu142; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t143; CHECK-NEXT: ret144 %a = call <32 x half> @llvm.experimental.constrained.roundeven.v32f16(<32 x half> %x, metadata !"fpexcept.strict")145 ret <32 x half> %a146}147 148define <1 x float> @roundeven_v1f32(<1 x float> %x) strictfp {149; CHECK-LABEL: roundeven_v1f32:150; CHECK: # %bb.0:151; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, mu152; CHECK-NEXT: vmfne.vv v0, v8, v8153; CHECK-NEXT: lui a0, 307200154; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t155; CHECK-NEXT: fmv.w.x fa5, a0156; CHECK-NEXT: vfabs.v v9, v8157; CHECK-NEXT: vmflt.vf v0, v9, fa5158; CHECK-NEXT: fsrmi a0, 0159; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma160; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t161; CHECK-NEXT: fsrm a0162; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t163; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu164; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t165; CHECK-NEXT: ret166 %a = call <1 x float> @llvm.experimental.constrained.roundeven.v1f32(<1 x float> %x, metadata !"fpexcept.strict")167 ret <1 x float> %a168}169 170define <2 x float> @roundeven_v2f32(<2 x float> %x) strictfp {171; CHECK-LABEL: roundeven_v2f32:172; CHECK: # %bb.0:173; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu174; CHECK-NEXT: vmfne.vv v0, v8, v8175; CHECK-NEXT: lui a0, 307200176; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t177; CHECK-NEXT: fmv.w.x fa5, a0178; CHECK-NEXT: vfabs.v v9, v8179; CHECK-NEXT: vmflt.vf v0, v9, fa5180; CHECK-NEXT: fsrmi a0, 0181; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma182; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t183; CHECK-NEXT: fsrm a0184; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t185; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu186; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t187; CHECK-NEXT: ret188 %a = call <2 x float> @llvm.experimental.constrained.roundeven.v2f32(<2 x float> %x, metadata !"fpexcept.strict")189 ret <2 x float> %a190}191 192define <4 x float> @roundeven_v4f32(<4 x float> %x) strictfp {193; CHECK-LABEL: roundeven_v4f32:194; CHECK: # %bb.0:195; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu196; CHECK-NEXT: vmfne.vv v0, v8, v8197; CHECK-NEXT: lui a0, 307200198; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t199; CHECK-NEXT: fmv.w.x fa5, a0200; CHECK-NEXT: vfabs.v v9, v8201; CHECK-NEXT: vmflt.vf v0, v9, fa5202; CHECK-NEXT: fsrmi a0, 0203; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma204; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t205; CHECK-NEXT: fsrm a0206; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t207; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu208; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t209; CHECK-NEXT: ret210 %a = call <4 x float> @llvm.experimental.constrained.roundeven.v4f32(<4 x float> %x, metadata !"fpexcept.strict")211 ret <4 x float> %a212}213 214define <8 x float> @roundeven_v8f32(<8 x float> %x) strictfp {215; CHECK-LABEL: roundeven_v8f32:216; CHECK: # %bb.0:217; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, mu218; CHECK-NEXT: vmfne.vv v0, v8, v8219; CHECK-NEXT: lui a0, 307200220; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t221; CHECK-NEXT: fmv.w.x fa5, a0222; CHECK-NEXT: vfabs.v v10, v8223; CHECK-NEXT: vmflt.vf v0, v10, fa5224; CHECK-NEXT: fsrmi a0, 0225; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma226; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t227; CHECK-NEXT: fsrm a0228; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t229; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu230; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t231; CHECK-NEXT: ret232 %a = call <8 x float> @llvm.experimental.constrained.roundeven.v8f32(<8 x float> %x, metadata !"fpexcept.strict")233 ret <8 x float> %a234}235 236define <16 x float> @roundeven_v16f32(<16 x float> %x) strictfp {237; CHECK-LABEL: roundeven_v16f32:238; CHECK: # %bb.0:239; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu240; CHECK-NEXT: vmfne.vv v0, v8, v8241; CHECK-NEXT: lui a0, 307200242; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t243; CHECK-NEXT: fmv.w.x fa5, a0244; CHECK-NEXT: vfabs.v v12, v8245; CHECK-NEXT: vmflt.vf v0, v12, fa5246; CHECK-NEXT: fsrmi a0, 0247; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma248; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t249; CHECK-NEXT: fsrm a0250; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t251; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu252; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t253; CHECK-NEXT: ret254 %a = call <16 x float> @llvm.experimental.constrained.roundeven.v16f32(<16 x float> %x, metadata !"fpexcept.strict")255 ret <16 x float> %a256}257 258define <1 x double> @roundeven_v1f64(<1 x double> %x) strictfp {259; RV32-LABEL: roundeven_v1f64:260; RV32: # %bb.0:261; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, mu262; RV32-NEXT: vmfne.vv v0, v8, v8263; RV32-NEXT: lui a0, %hi(.LCPI11_0)264; RV32-NEXT: fld fa5, %lo(.LCPI11_0)(a0)265; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t266; RV32-NEXT: vfabs.v v9, v8267; RV32-NEXT: vmflt.vf v0, v9, fa5268; RV32-NEXT: fsrmi a0, 0269; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma270; RV32-NEXT: vfcvt.x.f.v v9, v8, v0.t271; RV32-NEXT: fsrm a0272; RV32-NEXT: vfcvt.f.x.v v9, v9, v0.t273; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, mu274; RV32-NEXT: vfsgnj.vv v8, v9, v8, v0.t275; RV32-NEXT: ret276;277; RV64-LABEL: roundeven_v1f64:278; RV64: # %bb.0:279; RV64-NEXT: vsetivli zero, 1, e64, m1, ta, mu280; RV64-NEXT: vmfne.vv v0, v8, v8281; RV64-NEXT: li a0, 1075282; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t283; RV64-NEXT: slli a0, a0, 52284; RV64-NEXT: vfabs.v v9, v8285; RV64-NEXT: fmv.d.x fa5, a0286; RV64-NEXT: vmflt.vf v0, v9, fa5287; RV64-NEXT: fsrmi a0, 0288; RV64-NEXT: vsetvli zero, zero, e64, m1, ta, ma289; RV64-NEXT: vfcvt.x.f.v v9, v8, v0.t290; RV64-NEXT: fsrm a0291; RV64-NEXT: vfcvt.f.x.v v9, v9, v0.t292; RV64-NEXT: vsetvli zero, zero, e64, m1, ta, mu293; RV64-NEXT: vfsgnj.vv v8, v9, v8, v0.t294; RV64-NEXT: ret295 %a = call <1 x double> @llvm.experimental.constrained.roundeven.v1f64(<1 x double> %x, metadata !"fpexcept.strict")296 ret <1 x double> %a297}298 299define <2 x double> @roundeven_v2f64(<2 x double> %x) strictfp {300; RV32-LABEL: roundeven_v2f64:301; RV32: # %bb.0:302; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, mu303; RV32-NEXT: vmfne.vv v0, v8, v8304; RV32-NEXT: lui a0, %hi(.LCPI12_0)305; RV32-NEXT: fld fa5, %lo(.LCPI12_0)(a0)306; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t307; RV32-NEXT: vfabs.v v9, v8308; RV32-NEXT: vmflt.vf v0, v9, fa5309; RV32-NEXT: fsrmi a0, 0310; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma311; RV32-NEXT: vfcvt.x.f.v v9, v8, v0.t312; RV32-NEXT: fsrm a0313; RV32-NEXT: vfcvt.f.x.v v9, v9, v0.t314; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, mu315; RV32-NEXT: vfsgnj.vv v8, v9, v8, v0.t316; RV32-NEXT: ret317;318; RV64-LABEL: roundeven_v2f64:319; RV64: # %bb.0:320; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, mu321; RV64-NEXT: vmfne.vv v0, v8, v8322; RV64-NEXT: li a0, 1075323; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t324; RV64-NEXT: slli a0, a0, 52325; RV64-NEXT: vfabs.v v9, v8326; RV64-NEXT: fmv.d.x fa5, a0327; RV64-NEXT: vmflt.vf v0, v9, fa5328; RV64-NEXT: fsrmi a0, 0329; RV64-NEXT: vsetvli zero, zero, e64, m1, ta, ma330; RV64-NEXT: vfcvt.x.f.v v9, v8, v0.t331; RV64-NEXT: fsrm a0332; RV64-NEXT: vfcvt.f.x.v v9, v9, v0.t333; RV64-NEXT: vsetvli zero, zero, e64, m1, ta, mu334; RV64-NEXT: vfsgnj.vv v8, v9, v8, v0.t335; RV64-NEXT: ret336 %a = call <2 x double> @llvm.experimental.constrained.roundeven.v2f64(<2 x double> %x, metadata !"fpexcept.strict")337 ret <2 x double> %a338}339 340define <4 x double> @roundeven_v4f64(<4 x double> %x) strictfp {341; RV32-LABEL: roundeven_v4f64:342; RV32: # %bb.0:343; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, mu344; RV32-NEXT: vmfne.vv v0, v8, v8345; RV32-NEXT: lui a0, %hi(.LCPI13_0)346; RV32-NEXT: fld fa5, %lo(.LCPI13_0)(a0)347; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t348; RV32-NEXT: vfabs.v v10, v8349; RV32-NEXT: vmflt.vf v0, v10, fa5350; RV32-NEXT: fsrmi a0, 0351; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, ma352; RV32-NEXT: vfcvt.x.f.v v10, v8, v0.t353; RV32-NEXT: fsrm a0354; RV32-NEXT: vfcvt.f.x.v v10, v10, v0.t355; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu356; RV32-NEXT: vfsgnj.vv v8, v10, v8, v0.t357; RV32-NEXT: ret358;359; RV64-LABEL: roundeven_v4f64:360; RV64: # %bb.0:361; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, mu362; RV64-NEXT: vmfne.vv v0, v8, v8363; RV64-NEXT: li a0, 1075364; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t365; RV64-NEXT: slli a0, a0, 52366; RV64-NEXT: vfabs.v v10, v8367; RV64-NEXT: fmv.d.x fa5, a0368; RV64-NEXT: vmflt.vf v0, v10, fa5369; RV64-NEXT: fsrmi a0, 0370; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, ma371; RV64-NEXT: vfcvt.x.f.v v10, v8, v0.t372; RV64-NEXT: fsrm a0373; RV64-NEXT: vfcvt.f.x.v v10, v10, v0.t374; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu375; RV64-NEXT: vfsgnj.vv v8, v10, v8, v0.t376; RV64-NEXT: ret377 %a = call <4 x double> @llvm.experimental.constrained.roundeven.v4f64(<4 x double> %x, metadata !"fpexcept.strict")378 ret <4 x double> %a379}380 381define <8 x double> @roundeven_v8f64(<8 x double> %x) strictfp {382; RV32-LABEL: roundeven_v8f64:383; RV32: # %bb.0:384; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, mu385; RV32-NEXT: vmfne.vv v0, v8, v8386; RV32-NEXT: lui a0, %hi(.LCPI14_0)387; RV32-NEXT: fld fa5, %lo(.LCPI14_0)(a0)388; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t389; RV32-NEXT: vfabs.v v12, v8390; RV32-NEXT: vmflt.vf v0, v12, fa5391; RV32-NEXT: fsrmi a0, 0392; RV32-NEXT: vsetvli zero, zero, e64, m4, ta, ma393; RV32-NEXT: vfcvt.x.f.v v12, v8, v0.t394; RV32-NEXT: fsrm a0395; RV32-NEXT: vfcvt.f.x.v v12, v12, v0.t396; RV32-NEXT: vsetvli zero, zero, e64, m4, ta, mu397; RV32-NEXT: vfsgnj.vv v8, v12, v8, v0.t398; RV32-NEXT: ret399;400; RV64-LABEL: roundeven_v8f64:401; RV64: # %bb.0:402; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, mu403; RV64-NEXT: vmfne.vv v0, v8, v8404; RV64-NEXT: li a0, 1075405; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t406; RV64-NEXT: slli a0, a0, 52407; RV64-NEXT: vfabs.v v12, v8408; RV64-NEXT: fmv.d.x fa5, a0409; RV64-NEXT: vmflt.vf v0, v12, fa5410; RV64-NEXT: fsrmi a0, 0411; RV64-NEXT: vsetvli zero, zero, e64, m4, ta, ma412; RV64-NEXT: vfcvt.x.f.v v12, v8, v0.t413; RV64-NEXT: fsrm a0414; RV64-NEXT: vfcvt.f.x.v v12, v12, v0.t415; RV64-NEXT: vsetvli zero, zero, e64, m4, ta, mu416; RV64-NEXT: vfsgnj.vv v8, v12, v8, v0.t417; RV64-NEXT: ret418 %a = call <8 x double> @llvm.experimental.constrained.roundeven.v8f64(<8 x double> %x, metadata !"fpexcept.strict")419 ret <8 x double> %a420}421