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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s4 5; FIXME: We use exclusively byte types here because the MVT we use for the6; stores is calculated assuming byte elements. We need to deal with mismatched7; subvector "casts" to make other elements work.8 9define void @seteq_vv_v16i8(ptr %x, ptr %y) {10; CHECK-LABEL: seteq_vv_v16i8:11; CHECK: # %bb.0:12; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma13; CHECK-NEXT: vle8.v v8, (a0)14; CHECK-NEXT: vle8.v v9, (a1)15; CHECK-NEXT: vmseq.vv v0, v8, v916; CHECK-NEXT: vmv.v.i v8, 017; CHECK-NEXT: vmerge.vim v8, v8, -1, v018; CHECK-NEXT: vse8.v v8, (a0)19; CHECK-NEXT: ret20 %a = load <16 x i8>, ptr %x21 %b = load <16 x i8>, ptr %y22 %c = icmp eq <16 x i8> %a, %b23 %d = sext <16 x i1> %c to <16 x i8>24 store <16 x i8> %d, ptr %x25 ret void26}27 28define void @setne_vv_v32i8(ptr %x, ptr %y) {29; CHECK-LABEL: setne_vv_v32i8:30; CHECK: # %bb.0:31; CHECK-NEXT: li a2, 3232; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma33; CHECK-NEXT: vle8.v v8, (a0)34; CHECK-NEXT: vle8.v v10, (a1)35; CHECK-NEXT: vmsne.vv v0, v8, v1036; CHECK-NEXT: vmv.v.i v8, 037; CHECK-NEXT: vmerge.vim v8, v8, 1, v038; CHECK-NEXT: vse8.v v8, (a0)39; CHECK-NEXT: ret40 %a = load <32 x i8>, ptr %x41 %b = load <32 x i8>, ptr %y42 %c = icmp ne <32 x i8> %a, %b43 %d = zext <32 x i1> %c to <32 x i8>44 store <32 x i8> %d, ptr %x45 ret void46}47 48define void @setgt_vv_v64i8(ptr %x, ptr %y, ptr %z) {49; CHECK-LABEL: setgt_vv_v64i8:50; CHECK: # %bb.0:51; CHECK-NEXT: li a3, 6452; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, ma53; CHECK-NEXT: vle8.v v8, (a0)54; CHECK-NEXT: vle8.v v12, (a1)55; CHECK-NEXT: vmslt.vv v16, v12, v856; CHECK-NEXT: vsm.v v16, (a2)57; CHECK-NEXT: ret58 %a = load <64 x i8>, ptr %x59 %b = load <64 x i8>, ptr %y60 %c = icmp sgt <64 x i8> %a, %b61 store <64 x i1> %c, ptr %z62 ret void63}64 65define void @setlt_vv_v128i8(ptr %x, ptr %y, ptr %z) {66; CHECK-LABEL: setlt_vv_v128i8:67; CHECK: # %bb.0:68; CHECK-NEXT: li a3, 12869; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma70; CHECK-NEXT: vle8.v v8, (a0)71; CHECK-NEXT: vle8.v v16, (a1)72; CHECK-NEXT: vmslt.vv v24, v8, v1673; CHECK-NEXT: vsm.v v24, (a2)74; CHECK-NEXT: ret75 %a = load <128 x i8>, ptr %x76 %b = load <128 x i8>, ptr %y77 %c = icmp slt <128 x i8> %a, %b78 store <128 x i1> %c, ptr %z79 ret void80}81 82define void @setge_vv_v8i8(ptr %x, ptr %y, ptr %z) {83; CHECK-LABEL: setge_vv_v8i8:84; CHECK: # %bb.0:85; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma86; CHECK-NEXT: vle8.v v8, (a0)87; CHECK-NEXT: vle8.v v9, (a1)88; CHECK-NEXT: vmsle.vv v8, v9, v889; CHECK-NEXT: vsm.v v8, (a2)90; CHECK-NEXT: ret91 %a = load <8 x i8>, ptr %x92 %b = load <8 x i8>, ptr %y93 %c = icmp sge <8 x i8> %a, %b94 store <8 x i1> %c, ptr %z95 ret void96}97 98define void @setle_vv_v16i8(ptr %x, ptr %y, ptr %z) {99; CHECK-LABEL: setle_vv_v16i8:100; CHECK: # %bb.0:101; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma102; CHECK-NEXT: vle8.v v8, (a0)103; CHECK-NEXT: vle8.v v9, (a1)104; CHECK-NEXT: vmsle.vv v8, v8, v9105; CHECK-NEXT: vsm.v v8, (a2)106; CHECK-NEXT: ret107 %a = load <16 x i8>, ptr %x108 %b = load <16 x i8>, ptr %y109 %c = icmp sle <16 x i8> %a, %b110 store <16 x i1> %c, ptr %z111 ret void112}113 114define void @setugt_vv_v32i8(ptr %x, ptr %y, ptr %z) {115; CHECK-LABEL: setugt_vv_v32i8:116; CHECK: # %bb.0:117; CHECK-NEXT: li a3, 32118; CHECK-NEXT: vsetvli zero, a3, e8, m2, ta, ma119; CHECK-NEXT: vle8.v v8, (a0)120; CHECK-NEXT: vle8.v v10, (a1)121; CHECK-NEXT: vmsltu.vv v12, v10, v8122; CHECK-NEXT: vsm.v v12, (a2)123; CHECK-NEXT: ret124 %a = load <32 x i8>, ptr %x125 %b = load <32 x i8>, ptr %y126 %c = icmp ugt <32 x i8> %a, %b127 store <32 x i1> %c, ptr %z128 ret void129}130 131define void @setult_vv_v64i8(ptr %x, ptr %y, ptr %z) {132; CHECK-LABEL: setult_vv_v64i8:133; CHECK: # %bb.0:134; CHECK-NEXT: li a3, 64135; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, ma136; CHECK-NEXT: vle8.v v8, (a0)137; CHECK-NEXT: vle8.v v12, (a1)138; CHECK-NEXT: vmsltu.vv v16, v8, v12139; CHECK-NEXT: vsm.v v16, (a2)140; CHECK-NEXT: ret141 %a = load <64 x i8>, ptr %x142 %b = load <64 x i8>, ptr %y143 %c = icmp ult <64 x i8> %a, %b144 store <64 x i1> %c, ptr %z145 ret void146}147 148define void @setuge_vv_v128i8(ptr %x, ptr %y, ptr %z) {149; CHECK-LABEL: setuge_vv_v128i8:150; CHECK: # %bb.0:151; CHECK-NEXT: li a3, 128152; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma153; CHECK-NEXT: vle8.v v8, (a0)154; CHECK-NEXT: vle8.v v16, (a1)155; CHECK-NEXT: vmsleu.vv v24, v16, v8156; CHECK-NEXT: vsm.v v24, (a2)157; CHECK-NEXT: ret158 %a = load <128 x i8>, ptr %x159 %b = load <128 x i8>, ptr %y160 %c = icmp uge <128 x i8> %a, %b161 store <128 x i1> %c, ptr %z162 ret void163}164 165define void @setule_vv_v8i8(ptr %x, ptr %y, ptr %z) {166; CHECK-LABEL: setule_vv_v8i8:167; CHECK: # %bb.0:168; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma169; CHECK-NEXT: vle8.v v8, (a0)170; CHECK-NEXT: vle8.v v9, (a1)171; CHECK-NEXT: vmsleu.vv v8, v8, v9172; CHECK-NEXT: vsm.v v8, (a2)173; CHECK-NEXT: ret174 %a = load <8 x i8>, ptr %x175 %b = load <8 x i8>, ptr %y176 %c = icmp ule <8 x i8> %a, %b177 store <8 x i1> %c, ptr %z178 ret void179}180 181define void @seteq_vx_v16i8(ptr %x, i8 %y, ptr %z) {182; CHECK-LABEL: seteq_vx_v16i8:183; CHECK: # %bb.0:184; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma185; CHECK-NEXT: vle8.v v8, (a0)186; CHECK-NEXT: vmseq.vx v8, v8, a1187; CHECK-NEXT: vsm.v v8, (a2)188; CHECK-NEXT: ret189 %a = load <16 x i8>, ptr %x190 %b = insertelement <16 x i8> poison, i8 %y, i32 0191 %c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer192 %d = icmp eq <16 x i8> %a, %c193 store <16 x i1> %d, ptr %z194 ret void195}196 197define void @setne_vx_v32i8(ptr %x, i8 %y, ptr %z) {198; CHECK-LABEL: setne_vx_v32i8:199; CHECK: # %bb.0:200; CHECK-NEXT: li a3, 32201; CHECK-NEXT: vsetvli zero, a3, e8, m2, ta, ma202; CHECK-NEXT: vle8.v v8, (a0)203; CHECK-NEXT: vmsne.vx v10, v8, a1204; CHECK-NEXT: vsm.v v10, (a2)205; CHECK-NEXT: ret206 %a = load <32 x i8>, ptr %x207 %b = insertelement <32 x i8> poison, i8 %y, i32 0208 %c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer209 %d = icmp ne <32 x i8> %a, %c210 store <32 x i1> %d, ptr %z211 ret void212}213 214define void @setgt_vx_v64i8(ptr %x, i8 %y, ptr %z) {215; CHECK-LABEL: setgt_vx_v64i8:216; CHECK: # %bb.0:217; CHECK-NEXT: li a3, 64218; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, ma219; CHECK-NEXT: vle8.v v8, (a0)220; CHECK-NEXT: vmsgt.vx v12, v8, a1221; CHECK-NEXT: vsm.v v12, (a2)222; CHECK-NEXT: ret223 %a = load <64 x i8>, ptr %x224 %b = insertelement <64 x i8> poison, i8 %y, i32 0225 %c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer226 %d = icmp sgt <64 x i8> %a, %c227 store <64 x i1> %d, ptr %z228 ret void229}230 231define void @setlt_vx_v128i8(ptr %x, i8 %y, ptr %z) {232; CHECK-LABEL: setlt_vx_v128i8:233; CHECK: # %bb.0:234; CHECK-NEXT: li a3, 128235; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma236; CHECK-NEXT: vle8.v v8, (a0)237; CHECK-NEXT: vmslt.vx v16, v8, a1238; CHECK-NEXT: vsm.v v16, (a2)239; CHECK-NEXT: ret240 %a = load <128 x i8>, ptr %x241 %b = insertelement <128 x i8> poison, i8 %y, i32 0242 %c = shufflevector <128 x i8> %b, <128 x i8> poison, <128 x i32> zeroinitializer243 %d = icmp slt <128 x i8> %a, %c244 store <128 x i1> %d, ptr %z245 ret void246}247 248define void @setge_vx_v8i8(ptr %x, i8 %y, ptr %z) {249; CHECK-LABEL: setge_vx_v8i8:250; CHECK: # %bb.0:251; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma252; CHECK-NEXT: vle8.v v8, (a0)253; CHECK-NEXT: vmv.v.x v9, a1254; CHECK-NEXT: vmsle.vv v8, v9, v8255; CHECK-NEXT: vsm.v v8, (a2)256; CHECK-NEXT: ret257 %a = load <8 x i8>, ptr %x258 %b = insertelement <8 x i8> poison, i8 %y, i32 0259 %c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer260 %d = icmp sge <8 x i8> %a, %c261 store <8 x i1> %d, ptr %z262 ret void263}264 265define void @setle_vx_v16i8(ptr %x, i8 %y, ptr %z) {266; CHECK-LABEL: setle_vx_v16i8:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma269; CHECK-NEXT: vle8.v v8, (a0)270; CHECK-NEXT: vmsle.vx v8, v8, a1271; CHECK-NEXT: vsm.v v8, (a2)272; CHECK-NEXT: ret273 %a = load <16 x i8>, ptr %x274 %b = insertelement <16 x i8> poison, i8 %y, i32 0275 %c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer276 %d = icmp sle <16 x i8> %a, %c277 store <16 x i1> %d, ptr %z278 ret void279}280 281define void @setugt_vx_v32i8(ptr %x, i8 %y, ptr %z) {282; CHECK-LABEL: setugt_vx_v32i8:283; CHECK: # %bb.0:284; CHECK-NEXT: li a3, 32285; CHECK-NEXT: vsetvli zero, a3, e8, m2, ta, ma286; CHECK-NEXT: vle8.v v8, (a0)287; CHECK-NEXT: vmsgtu.vx v10, v8, a1288; CHECK-NEXT: vsm.v v10, (a2)289; CHECK-NEXT: ret290 %a = load <32 x i8>, ptr %x291 %b = insertelement <32 x i8> poison, i8 %y, i32 0292 %c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer293 %d = icmp ugt <32 x i8> %a, %c294 store <32 x i1> %d, ptr %z295 ret void296}297 298define void @setult_vx_v64i8(ptr %x, i8 %y, ptr %z) {299; CHECK-LABEL: setult_vx_v64i8:300; CHECK: # %bb.0:301; CHECK-NEXT: li a3, 64302; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, ma303; CHECK-NEXT: vle8.v v8, (a0)304; CHECK-NEXT: vmsltu.vx v12, v8, a1305; CHECK-NEXT: vsm.v v12, (a2)306; CHECK-NEXT: ret307 %a = load <64 x i8>, ptr %x308 %b = insertelement <64 x i8> poison, i8 %y, i32 0309 %c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer310 %d = icmp ult <64 x i8> %a, %c311 store <64 x i1> %d, ptr %z312 ret void313}314 315define void @setuge_vx_v128i8(ptr %x, i8 %y, ptr %z) {316; CHECK-LABEL: setuge_vx_v128i8:317; CHECK: # %bb.0:318; CHECK-NEXT: li a3, 128319; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma320; CHECK-NEXT: vle8.v v8, (a0)321; CHECK-NEXT: vmv.v.x v16, a1322; CHECK-NEXT: vmsleu.vv v24, v16, v8323; CHECK-NEXT: vsm.v v24, (a2)324; CHECK-NEXT: ret325 %a = load <128 x i8>, ptr %x326 %b = insertelement <128 x i8> poison, i8 %y, i32 0327 %c = shufflevector <128 x i8> %b, <128 x i8> poison, <128 x i32> zeroinitializer328 %d = icmp uge <128 x i8> %a, %c329 store <128 x i1> %d, ptr %z330 ret void331}332 333define void @setule_vx_v8i8(ptr %x, i8 %y, ptr %z) {334; CHECK-LABEL: setule_vx_v8i8:335; CHECK: # %bb.0:336; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma337; CHECK-NEXT: vle8.v v8, (a0)338; CHECK-NEXT: vmsleu.vx v8, v8, a1339; CHECK-NEXT: vsm.v v8, (a2)340; CHECK-NEXT: ret341 %a = load <8 x i8>, ptr %x342 %b = insertelement <8 x i8> poison, i8 %y, i32 0343 %c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer344 %d = icmp ule <8 x i8> %a, %c345 store <8 x i1> %d, ptr %z346 ret void347}348 349define void @seteq_xv_v16i8(ptr %x, i8 %y, ptr %z) {350; CHECK-LABEL: seteq_xv_v16i8:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma353; CHECK-NEXT: vle8.v v8, (a0)354; CHECK-NEXT: vmseq.vx v8, v8, a1355; CHECK-NEXT: vsm.v v8, (a2)356; CHECK-NEXT: ret357 %a = load <16 x i8>, ptr %x358 %b = insertelement <16 x i8> poison, i8 %y, i32 0359 %c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer360 %d = icmp eq <16 x i8> %c, %a361 store <16 x i1> %d, ptr %z362 ret void363}364 365define void @setne_xv_v32i8(ptr %x, i8 %y, ptr %z) {366; CHECK-LABEL: setne_xv_v32i8:367; CHECK: # %bb.0:368; CHECK-NEXT: li a3, 32369; CHECK-NEXT: vsetvli zero, a3, e8, m2, ta, ma370; CHECK-NEXT: vle8.v v8, (a0)371; CHECK-NEXT: vmsne.vx v10, v8, a1372; CHECK-NEXT: vsm.v v10, (a2)373; CHECK-NEXT: ret374 %a = load <32 x i8>, ptr %x375 %b = insertelement <32 x i8> poison, i8 %y, i32 0376 %c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer377 %d = icmp ne <32 x i8> %c, %a378 store <32 x i1> %d, ptr %z379 ret void380}381 382define void @setgt_xv_v64i8(ptr %x, i8 %y, ptr %z) {383; CHECK-LABEL: setgt_xv_v64i8:384; CHECK: # %bb.0:385; CHECK-NEXT: li a3, 64386; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, ma387; CHECK-NEXT: vle8.v v8, (a0)388; CHECK-NEXT: vmslt.vx v12, v8, a1389; CHECK-NEXT: vsm.v v12, (a2)390; CHECK-NEXT: ret391 %a = load <64 x i8>, ptr %x392 %b = insertelement <64 x i8> poison, i8 %y, i32 0393 %c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer394 %d = icmp sgt <64 x i8> %c, %a395 store <64 x i1> %d, ptr %z396 ret void397}398 399define void @setlt_xv_v128i8(ptr %x, i8 %y, ptr %z) {400; CHECK-LABEL: setlt_xv_v128i8:401; CHECK: # %bb.0:402; CHECK-NEXT: li a3, 128403; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma404; CHECK-NEXT: vle8.v v8, (a0)405; CHECK-NEXT: vmsgt.vx v16, v8, a1406; CHECK-NEXT: vsm.v v16, (a2)407; CHECK-NEXT: ret408 %a = load <128 x i8>, ptr %x409 %b = insertelement <128 x i8> poison, i8 %y, i32 0410 %c = shufflevector <128 x i8> %b, <128 x i8> poison, <128 x i32> zeroinitializer411 %d = icmp slt <128 x i8> %c, %a412 store <128 x i1> %d, ptr %z413 ret void414}415 416define void @setge_xv_v8i8(ptr %x, i8 %y, ptr %z) {417; CHECK-LABEL: setge_xv_v8i8:418; CHECK: # %bb.0:419; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma420; CHECK-NEXT: vle8.v v8, (a0)421; CHECK-NEXT: vmsle.vx v8, v8, a1422; CHECK-NEXT: vsm.v v8, (a2)423; CHECK-NEXT: ret424 %a = load <8 x i8>, ptr %x425 %b = insertelement <8 x i8> poison, i8 %y, i32 0426 %c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer427 %d = icmp sge <8 x i8> %c, %a428 store <8 x i1> %d, ptr %z429 ret void430}431 432define void @setle_xv_v16i8(ptr %x, i8 %y, ptr %z) {433; CHECK-LABEL: setle_xv_v16i8:434; CHECK: # %bb.0:435; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma436; CHECK-NEXT: vle8.v v8, (a0)437; CHECK-NEXT: vmv.v.x v9, a1438; CHECK-NEXT: vmsle.vv v8, v9, v8439; CHECK-NEXT: vsm.v v8, (a2)440; CHECK-NEXT: ret441 %a = load <16 x i8>, ptr %x442 %b = insertelement <16 x i8> poison, i8 %y, i32 0443 %c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer444 %d = icmp sle <16 x i8> %c, %a445 store <16 x i1> %d, ptr %z446 ret void447}448 449define void @setugt_xv_v32i8(ptr %x, i8 %y, ptr %z) {450; CHECK-LABEL: setugt_xv_v32i8:451; CHECK: # %bb.0:452; CHECK-NEXT: li a3, 32453; CHECK-NEXT: vsetvli zero, a3, e8, m2, ta, ma454; CHECK-NEXT: vle8.v v8, (a0)455; CHECK-NEXT: vmsltu.vx v10, v8, a1456; CHECK-NEXT: vsm.v v10, (a2)457; CHECK-NEXT: ret458 %a = load <32 x i8>, ptr %x459 %b = insertelement <32 x i8> poison, i8 %y, i32 0460 %c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer461 %d = icmp ugt <32 x i8> %c, %a462 store <32 x i1> %d, ptr %z463 ret void464}465 466define void @setult_xv_v64i8(ptr %x, i8 %y, ptr %z) {467; CHECK-LABEL: setult_xv_v64i8:468; CHECK: # %bb.0:469; CHECK-NEXT: li a3, 64470; CHECK-NEXT: vsetvli zero, a3, e8, m4, ta, ma471; CHECK-NEXT: vle8.v v8, (a0)472; CHECK-NEXT: vmsgtu.vx v12, v8, a1473; CHECK-NEXT: vsm.v v12, (a2)474; CHECK-NEXT: ret475 %a = load <64 x i8>, ptr %x476 %b = insertelement <64 x i8> poison, i8 %y, i32 0477 %c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer478 %d = icmp ult <64 x i8> %c, %a479 store <64 x i1> %d, ptr %z480 ret void481}482 483define void @setuge_xv_v128i8(ptr %x, i8 %y, ptr %z) {484; CHECK-LABEL: setuge_xv_v128i8:485; CHECK: # %bb.0:486; CHECK-NEXT: li a3, 128487; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma488; CHECK-NEXT: vle8.v v8, (a0)489; CHECK-NEXT: vmsleu.vx v16, v8, a1490; CHECK-NEXT: vsm.v v16, (a2)491; CHECK-NEXT: ret492 %a = load <128 x i8>, ptr %x493 %b = insertelement <128 x i8> poison, i8 %y, i32 0494 %c = shufflevector <128 x i8> %b, <128 x i8> poison, <128 x i32> zeroinitializer495 %d = icmp uge <128 x i8> %c, %a496 store <128 x i1> %d, ptr %z497 ret void498}499 500define void @setule_xv_v8i8(ptr %x, i8 %y, ptr %z) {501; CHECK-LABEL: setule_xv_v8i8:502; CHECK: # %bb.0:503; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma504; CHECK-NEXT: vle8.v v8, (a0)505; CHECK-NEXT: vmv.v.x v9, a1506; CHECK-NEXT: vmsleu.vv v8, v9, v8507; CHECK-NEXT: vsm.v v8, (a2)508; CHECK-NEXT: ret509 %a = load <8 x i8>, ptr %x510 %b = insertelement <8 x i8> poison, i8 %y, i32 0511 %c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer512 %d = icmp ule <8 x i8> %c, %a513 store <8 x i1> %d, ptr %z514 ret void515}516 517define void @seteq_vi_v16i8(ptr %x, ptr %z) {518; CHECK-LABEL: seteq_vi_v16i8:519; CHECK: # %bb.0:520; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma521; CHECK-NEXT: vle8.v v8, (a0)522; CHECK-NEXT: vmseq.vi v8, v8, 0523; CHECK-NEXT: vsm.v v8, (a1)524; CHECK-NEXT: ret525 %a = load <16 x i8>, ptr %x526 %d = icmp eq <16 x i8> %a, splat (i8 0)527 store <16 x i1> %d, ptr %z528 ret void529}530 531define void @setne_vi_v32i8(ptr %x, ptr %z) {532; CHECK-LABEL: setne_vi_v32i8:533; CHECK: # %bb.0:534; CHECK-NEXT: li a2, 32535; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma536; CHECK-NEXT: vle8.v v8, (a0)537; CHECK-NEXT: vmsne.vi v10, v8, 0538; CHECK-NEXT: vsm.v v10, (a1)539; CHECK-NEXT: ret540 %a = load <32 x i8>, ptr %x541 %d = icmp ne <32 x i8> %a, splat (i8 0)542 store <32 x i1> %d, ptr %z543 ret void544}545 546define void @setgt_vi_v64i8(ptr %x, ptr %z) {547; CHECK-LABEL: setgt_vi_v64i8:548; CHECK: # %bb.0:549; CHECK-NEXT: li a2, 64550; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma551; CHECK-NEXT: vle8.v v8, (a0)552; CHECK-NEXT: vmsgt.vi v12, v8, 0553; CHECK-NEXT: vsm.v v12, (a1)554; CHECK-NEXT: ret555 %a = load <64 x i8>, ptr %x556 %d = icmp sgt <64 x i8> %a, splat (i8 0)557 store <64 x i1> %d, ptr %z558 ret void559}560 561define void @setgt_vi_v64i8_nonzero(ptr %x, ptr %z) {562; CHECK-LABEL: setgt_vi_v64i8_nonzero:563; CHECK: # %bb.0:564; CHECK-NEXT: li a2, 64565; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma566; CHECK-NEXT: vle8.v v8, (a0)567; CHECK-NEXT: vmsgt.vi v12, v8, 5568; CHECK-NEXT: vsm.v v12, (a1)569; CHECK-NEXT: ret570 %a = load <64 x i8>, ptr %x571 %d = icmp sgt <64 x i8> %a, splat (i8 5)572 store <64 x i1> %d, ptr %z573 ret void574}575 576define void @setlt_vi_v128i8(ptr %x, ptr %z) {577; CHECK-LABEL: setlt_vi_v128i8:578; CHECK: # %bb.0:579; CHECK-NEXT: li a2, 128580; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma581; CHECK-NEXT: vle8.v v8, (a0)582; CHECK-NEXT: vmsle.vi v16, v8, -1583; CHECK-NEXT: vsm.v v16, (a1)584; CHECK-NEXT: ret585 %a = load <128 x i8>, ptr %x586 %d = icmp slt <128 x i8> %a, splat (i8 0)587 store <128 x i1> %d, ptr %z588 ret void589}590 591define void @setge_vi_v8i8(ptr %x, ptr %z) {592; CHECK-LABEL: setge_vi_v8i8:593; CHECK: # %bb.0:594; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma595; CHECK-NEXT: vle8.v v8, (a0)596; CHECK-NEXT: vmsgt.vi v8, v8, -1597; CHECK-NEXT: vsm.v v8, (a1)598; CHECK-NEXT: ret599 %a = load <8 x i8>, ptr %x600 %d = icmp sge <8 x i8> %a, splat (i8 0)601 store <8 x i1> %d, ptr %z602 ret void603}604 605define void @setle_vi_v16i8(ptr %x, ptr %z) {606; CHECK-LABEL: setle_vi_v16i8:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma609; CHECK-NEXT: vle8.v v8, (a0)610; CHECK-NEXT: vmsle.vi v8, v8, 0611; CHECK-NEXT: vsm.v v8, (a1)612; CHECK-NEXT: ret613 %a = load <16 x i8>, ptr %x614 %d = icmp sle <16 x i8> %a, splat (i8 0)615 store <16 x i1> %d, ptr %z616 ret void617}618 619define void @setugt_vi_v32i8(ptr %x, ptr %z) {620; CHECK-LABEL: setugt_vi_v32i8:621; CHECK: # %bb.0:622; CHECK-NEXT: li a2, 32623; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma624; CHECK-NEXT: vle8.v v8, (a0)625; CHECK-NEXT: vmsgtu.vi v10, v8, 5626; CHECK-NEXT: vsm.v v10, (a1)627; CHECK-NEXT: ret628 %a = load <32 x i8>, ptr %x629 %d = icmp ugt <32 x i8> %a, splat (i8 5)630 store <32 x i1> %d, ptr %z631 ret void632}633 634define void @setult_vi_v64i8(ptr %x, ptr %z) {635; CHECK-LABEL: setult_vi_v64i8:636; CHECK: # %bb.0:637; CHECK-NEXT: li a2, 64638; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma639; CHECK-NEXT: vle8.v v8, (a0)640; CHECK-NEXT: vmsleu.vi v12, v8, 4641; CHECK-NEXT: vsm.v v12, (a1)642; CHECK-NEXT: ret643 %a = load <64 x i8>, ptr %x644 %d = icmp ult <64 x i8> %a, splat (i8 5)645 store <64 x i1> %d, ptr %z646 ret void647}648 649define void @setuge_vi_v128i8(ptr %x, ptr %z) {650; CHECK-LABEL: setuge_vi_v128i8:651; CHECK: # %bb.0:652; CHECK-NEXT: li a2, 128653; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma654; CHECK-NEXT: vle8.v v8, (a0)655; CHECK-NEXT: vmsgtu.vi v16, v8, 4656; CHECK-NEXT: vsm.v v16, (a1)657; CHECK-NEXT: ret658 %a = load <128 x i8>, ptr %x659 %d = icmp uge <128 x i8> %a, splat (i8 5)660 store <128 x i1> %d, ptr %z661 ret void662}663 664define void @setule_vi_v8i8(ptr %x, ptr %z) {665; CHECK-LABEL: setule_vi_v8i8:666; CHECK: # %bb.0:667; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma668; CHECK-NEXT: vle8.v v8, (a0)669; CHECK-NEXT: vmsleu.vi v8, v8, 5670; CHECK-NEXT: vsm.v v8, (a1)671; CHECK-NEXT: ret672 %a = load <8 x i8>, ptr %x673 %d = icmp ule <8 x i8> %a, splat (i8 5)674 store <8 x i1> %d, ptr %z675 ret void676}677 678define void @seteq_vv_v8i16(ptr %x, ptr %y) {679; CHECK-LABEL: seteq_vv_v8i16:680; CHECK: # %bb.0:681; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma682; CHECK-NEXT: vle16.v v8, (a0)683; CHECK-NEXT: vle16.v v9, (a1)684; CHECK-NEXT: vmseq.vv v0, v8, v9685; CHECK-NEXT: vmv.v.i v8, 0686; CHECK-NEXT: vmerge.vim v8, v8, -1, v0687; CHECK-NEXT: vse16.v v8, (a0)688; CHECK-NEXT: ret689 %a = load <8 x i16>, ptr %x690 %b = load <8 x i16>, ptr %y691 %c = icmp eq <8 x i16> %a, %b692 %d = sext <8 x i1> %c to <8 x i16>693 store <8 x i16> %d, ptr %x694 ret void695}696 697define void @setne_vv_v4i32(ptr %x, ptr %y) {698; CHECK-LABEL: setne_vv_v4i32:699; CHECK: # %bb.0:700; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma701; CHECK-NEXT: vle32.v v8, (a0)702; CHECK-NEXT: vle32.v v9, (a1)703; CHECK-NEXT: vmsne.vv v0, v8, v9704; CHECK-NEXT: vmv.v.i v8, 0705; CHECK-NEXT: vmerge.vim v8, v8, -1, v0706; CHECK-NEXT: vse32.v v8, (a0)707; CHECK-NEXT: ret708 %a = load <4 x i32>, ptr %x709 %b = load <4 x i32>, ptr %y710 %c = icmp ne <4 x i32> %a, %b711 %d = sext <4 x i1> %c to <4 x i32>712 store <4 x i32> %d, ptr %x713 ret void714}715 716define void @setgt_vv_v2i64(ptr %x, ptr %y) {717; CHECK-LABEL: setgt_vv_v2i64:718; CHECK: # %bb.0:719; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma720; CHECK-NEXT: vle64.v v8, (a0)721; CHECK-NEXT: vle64.v v9, (a1)722; CHECK-NEXT: vmslt.vv v0, v9, v8723; CHECK-NEXT: vmv.v.i v8, 0724; CHECK-NEXT: vmerge.vim v8, v8, -1, v0725; CHECK-NEXT: vse64.v v8, (a0)726; CHECK-NEXT: ret727 %a = load <2 x i64>, ptr %x728 %b = load <2 x i64>, ptr %y729 %c = icmp sgt <2 x i64> %a, %b730 %d = sext <2 x i1> %c to <2 x i64>731 store <2 x i64> %d, ptr %x732 ret void733}734 735define void @setlt_vv_v16i16(ptr %x, ptr %y) {736; CHECK-LABEL: setlt_vv_v16i16:737; CHECK: # %bb.0:738; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma739; CHECK-NEXT: vle16.v v8, (a0)740; CHECK-NEXT: vle16.v v10, (a1)741; CHECK-NEXT: vmslt.vv v0, v8, v10742; CHECK-NEXT: vmv.v.i v8, 0743; CHECK-NEXT: vmerge.vim v8, v8, 1, v0744; CHECK-NEXT: vse16.v v8, (a0)745; CHECK-NEXT: ret746 %a = load <16 x i16>, ptr %x747 %b = load <16 x i16>, ptr %y748 %c = icmp slt <16 x i16> %a, %b749 %d = zext <16 x i1> %c to <16 x i16>750 store <16 x i16> %d, ptr %x751 ret void752}753 754define void @setugt_vv_v8i32(ptr %x, ptr %y) {755; CHECK-LABEL: setugt_vv_v8i32:756; CHECK: # %bb.0:757; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma758; CHECK-NEXT: vle32.v v8, (a0)759; CHECK-NEXT: vle32.v v10, (a1)760; CHECK-NEXT: vmsltu.vv v0, v10, v8761; CHECK-NEXT: vmv.v.i v8, 0762; CHECK-NEXT: vmerge.vim v8, v8, 1, v0763; CHECK-NEXT: vse32.v v8, (a0)764; CHECK-NEXT: ret765 %a = load <8 x i32>, ptr %x766 %b = load <8 x i32>, ptr %y767 %c = icmp ugt <8 x i32> %a, %b768 %d = zext <8 x i1> %c to <8 x i32>769 store <8 x i32> %d, ptr %x770 ret void771}772 773define void @setult_vv_v4i64(ptr %x, ptr %y) {774; CHECK-LABEL: setult_vv_v4i64:775; CHECK: # %bb.0:776; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma777; CHECK-NEXT: vle64.v v8, (a0)778; CHECK-NEXT: vle64.v v10, (a1)779; CHECK-NEXT: vmsltu.vv v0, v8, v10780; CHECK-NEXT: vmv.v.i v8, 0781; CHECK-NEXT: vmerge.vim v8, v8, 1, v0782; CHECK-NEXT: vse64.v v8, (a0)783; CHECK-NEXT: ret784 %a = load <4 x i64>, ptr %x785 %b = load <4 x i64>, ptr %y786 %c = icmp ult <4 x i64> %a, %b787 %d = zext <4 x i1> %c to <4 x i64>788 store <4 x i64> %d, ptr %x789 ret void790}791