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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s5; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s6 7define <1 x bfloat> @masked_load_v1bf16(ptr %a, <1 x i1> %mask) {8; CHECK-LABEL: masked_load_v1bf16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma11; CHECK-NEXT: vle16.v v8, (a0), v0.t12; CHECK-NEXT: ret13 %load = call <1 x bfloat> @llvm.masked.load.v1bf16(ptr %a, i32 8, <1 x i1> %mask, <1 x bfloat> poison)14 ret <1 x bfloat> %load15}16 17define <1 x half> @masked_load_v1f16(ptr %a, <1 x i1> %mask) {18; CHECK-LABEL: masked_load_v1f16:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma21; CHECK-NEXT: vle16.v v8, (a0), v0.t22; CHECK-NEXT: ret23 %load = call <1 x half> @llvm.masked.load.v1f16(ptr %a, i32 8, <1 x i1> %mask, <1 x half> poison)24 ret <1 x half> %load25}26 27define <1 x float> @masked_load_v1f32(ptr %a, <1 x i1> %mask) {28; CHECK-LABEL: masked_load_v1f32:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma31; CHECK-NEXT: vle32.v v8, (a0), v0.t32; CHECK-NEXT: ret33 %load = call <1 x float> @llvm.masked.load.v1f32(ptr %a, i32 8, <1 x i1> %mask, <1 x float> poison)34 ret <1 x float> %load35}36 37define <1 x double> @masked_load_v1f64(ptr %a, <1 x i1> %mask) {38; CHECK-LABEL: masked_load_v1f64:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma41; CHECK-NEXT: vle64.v v8, (a0), v0.t42; CHECK-NEXT: ret43 %load = call <1 x double> @llvm.masked.load.v1f64(ptr %a, i32 8, <1 x i1> %mask, <1 x double> poison)44 ret <1 x double> %load45}46 47define <2 x bfloat> @masked_load_v2bf16(ptr %a, <2 x i1> %mask) {48; CHECK-LABEL: masked_load_v2bf16:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma51; CHECK-NEXT: vle16.v v8, (a0), v0.t52; CHECK-NEXT: ret53 %load = call <2 x bfloat> @llvm.masked.load.v2bf16(ptr %a, i32 8, <2 x i1> %mask, <2 x bfloat> poison)54 ret <2 x bfloat> %load55}56 57define <2 x half> @masked_load_v2f16(ptr %a, <2 x i1> %mask) {58; CHECK-LABEL: masked_load_v2f16:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma61; CHECK-NEXT: vle16.v v8, (a0), v0.t62; CHECK-NEXT: ret63 %load = call <2 x half> @llvm.masked.load.v2f16(ptr %a, i32 8, <2 x i1> %mask, <2 x half> poison)64 ret <2 x half> %load65}66 67define <2 x float> @masked_load_v2f32(ptr %a, <2 x i1> %mask) {68; CHECK-LABEL: masked_load_v2f32:69; CHECK: # %bb.0:70; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma71; CHECK-NEXT: vle32.v v8, (a0), v0.t72; CHECK-NEXT: ret73 %load = call <2 x float> @llvm.masked.load.v2f32(ptr %a, i32 8, <2 x i1> %mask, <2 x float> poison)74 ret <2 x float> %load75}76 77define <2 x double> @masked_load_v2f64(ptr %a, <2 x i1> %mask) {78; CHECK-LABEL: masked_load_v2f64:79; CHECK: # %bb.0:80; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma81; CHECK-NEXT: vle64.v v8, (a0), v0.t82; CHECK-NEXT: ret83 %load = call <2 x double> @llvm.masked.load.v2f64(ptr %a, i32 8, <2 x i1> %mask, <2 x double> poison)84 ret <2 x double> %load85}86 87define <4 x bfloat> @masked_load_v4bf16(ptr %a, <4 x i1> %mask) {88; CHECK-LABEL: masked_load_v4bf16:89; CHECK: # %bb.0:90; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma91; CHECK-NEXT: vle16.v v8, (a0), v0.t92; CHECK-NEXT: ret93 %load = call <4 x bfloat> @llvm.masked.load.v4bf16(ptr %a, i32 8, <4 x i1> %mask, <4 x bfloat> poison)94 ret <4 x bfloat> %load95}96 97define <4 x half> @masked_load_v4f16(ptr %a, <4 x i1> %mask) {98; CHECK-LABEL: masked_load_v4f16:99; CHECK: # %bb.0:100; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma101; CHECK-NEXT: vle16.v v8, (a0), v0.t102; CHECK-NEXT: ret103 %load = call <4 x half> @llvm.masked.load.v4f16(ptr %a, i32 8, <4 x i1> %mask, <4 x half> poison)104 ret <4 x half> %load105}106 107define <4 x float> @masked_load_v4f32(ptr %a, <4 x i1> %mask) {108; CHECK-LABEL: masked_load_v4f32:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma111; CHECK-NEXT: vle32.v v8, (a0), v0.t112; CHECK-NEXT: ret113 %load = call <4 x float> @llvm.masked.load.v4f32(ptr %a, i32 8, <4 x i1> %mask, <4 x float> poison)114 ret <4 x float> %load115}116 117define <4 x double> @masked_load_v4f64(ptr %a, <4 x i1> %mask) {118; CHECK-LABEL: masked_load_v4f64:119; CHECK: # %bb.0:120; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma121; CHECK-NEXT: vle64.v v8, (a0), v0.t122; CHECK-NEXT: ret123 %load = call <4 x double> @llvm.masked.load.v4f64(ptr %a, i32 8, <4 x i1> %mask, <4 x double> poison)124 ret <4 x double> %load125}126 127define <8 x bfloat> @masked_load_v8bf16(ptr %a, <8 x i1> %mask) {128; CHECK-LABEL: masked_load_v8bf16:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma131; CHECK-NEXT: vle16.v v8, (a0), v0.t132; CHECK-NEXT: ret133 %load = call <8 x bfloat> @llvm.masked.load.v8bf16(ptr %a, i32 8, <8 x i1> %mask, <8 x bfloat> poison)134 ret <8 x bfloat> %load135}136 137define <8 x half> @masked_load_v8f16(ptr %a, <8 x i1> %mask) {138; CHECK-LABEL: masked_load_v8f16:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma141; CHECK-NEXT: vle16.v v8, (a0), v0.t142; CHECK-NEXT: ret143 %load = call <8 x half> @llvm.masked.load.v8f16(ptr %a, i32 8, <8 x i1> %mask, <8 x half> poison)144 ret <8 x half> %load145}146 147define <8 x float> @masked_load_v8f32(ptr %a, <8 x i1> %mask) {148; CHECK-LABEL: masked_load_v8f32:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma151; CHECK-NEXT: vle32.v v8, (a0), v0.t152; CHECK-NEXT: ret153 %load = call <8 x float> @llvm.masked.load.v8f32(ptr %a, i32 8, <8 x i1> %mask, <8 x float> poison)154 ret <8 x float> %load155}156 157define <8 x double> @masked_load_v8f64(ptr %a, <8 x i1> %mask) {158; CHECK-LABEL: masked_load_v8f64:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma161; CHECK-NEXT: vle64.v v8, (a0), v0.t162; CHECK-NEXT: ret163 %load = call <8 x double> @llvm.masked.load.v8f64(ptr %a, i32 8, <8 x i1> %mask, <8 x double> poison)164 ret <8 x double> %load165}166 167define <16 x bfloat> @masked_load_v16bf16(ptr %a, <16 x i1> %mask) {168; CHECK-LABEL: masked_load_v16bf16:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma171; CHECK-NEXT: vle16.v v8, (a0), v0.t172; CHECK-NEXT: ret173 %load = call <16 x bfloat> @llvm.masked.load.v16bf16(ptr %a, i32 8, <16 x i1> %mask, <16 x bfloat> poison)174 ret <16 x bfloat> %load175}176 177define <16 x half> @masked_load_v16f16(ptr %a, <16 x i1> %mask) {178; CHECK-LABEL: masked_load_v16f16:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma181; CHECK-NEXT: vle16.v v8, (a0), v0.t182; CHECK-NEXT: ret183 %load = call <16 x half> @llvm.masked.load.v16f16(ptr %a, i32 8, <16 x i1> %mask, <16 x half> poison)184 ret <16 x half> %load185}186 187define <16 x float> @masked_load_v16f32(ptr %a, <16 x i1> %mask) {188; CHECK-LABEL: masked_load_v16f32:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma191; CHECK-NEXT: vle32.v v8, (a0), v0.t192; CHECK-NEXT: ret193 %load = call <16 x float> @llvm.masked.load.v16f32(ptr %a, i32 8, <16 x i1> %mask, <16 x float> poison)194 ret <16 x float> %load195}196 197define <16 x double> @masked_load_v16f64(ptr %a, <16 x i1> %mask) {198; CHECK-LABEL: masked_load_v16f64:199; CHECK: # %bb.0:200; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma201; CHECK-NEXT: vle64.v v8, (a0), v0.t202; CHECK-NEXT: ret203 %load = call <16 x double> @llvm.masked.load.v16f64(ptr %a, i32 8, <16 x i1> %mask, <16 x double> poison)204 ret <16 x double> %load205}206 207define <32 x bfloat> @masked_load_v32bf16(ptr %a, <32 x i1> %mask) {208; CHECK-LABEL: masked_load_v32bf16:209; CHECK: # %bb.0:210; CHECK-NEXT: li a1, 32211; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma212; CHECK-NEXT: vle16.v v8, (a0), v0.t213; CHECK-NEXT: ret214 %load = call <32 x bfloat> @llvm.masked.load.v32bf16(ptr %a, i32 8, <32 x i1> %mask, <32 x bfloat> poison)215 ret <32 x bfloat> %load216}217 218define <32 x half> @masked_load_v32f16(ptr %a, <32 x i1> %mask) {219; CHECK-LABEL: masked_load_v32f16:220; CHECK: # %bb.0:221; CHECK-NEXT: li a1, 32222; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma223; CHECK-NEXT: vle16.v v8, (a0), v0.t224; CHECK-NEXT: ret225 %load = call <32 x half> @llvm.masked.load.v32f16(ptr %a, i32 8, <32 x i1> %mask, <32 x half> poison)226 ret <32 x half> %load227}228 229define <32 x float> @masked_load_v32f32(ptr %a, <32 x i1> %mask) {230; CHECK-LABEL: masked_load_v32f32:231; CHECK: # %bb.0:232; CHECK-NEXT: li a1, 32233; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma234; CHECK-NEXT: vle32.v v8, (a0), v0.t235; CHECK-NEXT: ret236 %load = call <32 x float> @llvm.masked.load.v32f32(ptr %a, i32 8, <32 x i1> %mask, <32 x float> poison)237 ret <32 x float> %load238}239 240define <32 x double> @masked_load_v32f64(ptr %a, <32 x i1> %mask) {241; CHECK-LABEL: masked_load_v32f64:242; CHECK: # %bb.0:243; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma244; CHECK-NEXT: vle64.v v8, (a0), v0.t245; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma246; CHECK-NEXT: vslidedown.vi v0, v0, 2247; CHECK-NEXT: addi a0, a0, 128248; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma249; CHECK-NEXT: vle64.v v16, (a0), v0.t250; CHECK-NEXT: ret251 %load = call <32 x double> @llvm.masked.load.v32f64(ptr %a, i32 8, <32 x i1> %mask, <32 x double> poison)252 ret <32 x double> %load253}254 255define <64 x bfloat> @masked_load_v64bf16(ptr %a, <64 x i1> %mask) {256; CHECK-LABEL: masked_load_v64bf16:257; CHECK: # %bb.0:258; CHECK-NEXT: li a1, 64259; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma260; CHECK-NEXT: vle16.v v8, (a0), v0.t261; CHECK-NEXT: ret262 %load = call <64 x bfloat> @llvm.masked.load.v64bf16(ptr %a, i32 8, <64 x i1> %mask, <64 x bfloat> poison)263 ret <64 x bfloat> %load264}265 266define <64 x half> @masked_load_v64f16(ptr %a, <64 x i1> %mask) {267; CHECK-LABEL: masked_load_v64f16:268; CHECK: # %bb.0:269; CHECK-NEXT: li a1, 64270; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma271; CHECK-NEXT: vle16.v v8, (a0), v0.t272; CHECK-NEXT: ret273 %load = call <64 x half> @llvm.masked.load.v64f16(ptr %a, i32 8, <64 x i1> %mask, <64 x half> poison)274 ret <64 x half> %load275}276 277define <64 x float> @masked_load_v64f32(ptr %a, <64 x i1> %mask) {278; CHECK-LABEL: masked_load_v64f32:279; CHECK: # %bb.0:280; CHECK-NEXT: li a1, 32281; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma282; CHECK-NEXT: vle32.v v8, (a0), v0.t283; CHECK-NEXT: vsetivli zero, 4, e8, mf2, ta, ma284; CHECK-NEXT: vslidedown.vi v0, v0, 4285; CHECK-NEXT: addi a0, a0, 128286; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma287; CHECK-NEXT: vle32.v v16, (a0), v0.t288; CHECK-NEXT: ret289 %load = call <64 x float> @llvm.masked.load.v64f32(ptr %a, i32 8, <64 x i1> %mask, <64 x float> poison)290 ret <64 x float> %load291}292 293define <128 x bfloat> @masked_load_v128bf16(ptr %a, <128 x i1> %mask) {294; CHECK-LABEL: masked_load_v128bf16:295; CHECK: # %bb.0:296; CHECK-NEXT: li a1, 64297; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma298; CHECK-NEXT: vle16.v v8, (a0), v0.t299; CHECK-NEXT: vsetivli zero, 8, e8, m1, ta, ma300; CHECK-NEXT: vslidedown.vi v0, v0, 8301; CHECK-NEXT: addi a0, a0, 128302; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma303; CHECK-NEXT: vle16.v v16, (a0), v0.t304; CHECK-NEXT: ret305 %load = call <128 x bfloat> @llvm.masked.load.v128bf16(ptr %a, i32 8, <128 x i1> %mask, <128 x bfloat> poison)306 ret <128 x bfloat> %load307}308 309define <128 x half> @masked_load_v128f16(ptr %a, <128 x i1> %mask) {310; CHECK-LABEL: masked_load_v128f16:311; CHECK: # %bb.0:312; CHECK-NEXT: li a1, 64313; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma314; CHECK-NEXT: vle16.v v8, (a0), v0.t315; CHECK-NEXT: vsetivli zero, 8, e8, m1, ta, ma316; CHECK-NEXT: vslidedown.vi v0, v0, 8317; CHECK-NEXT: addi a0, a0, 128318; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma319; CHECK-NEXT: vle16.v v16, (a0), v0.t320; CHECK-NEXT: ret321 %load = call <128 x half> @llvm.masked.load.v128f16(ptr %a, i32 8, <128 x i1> %mask, <128 x half> poison)322 ret <128 x half> %load323}324 325define <7 x float> @masked_load_v7f32(ptr %a, <7 x i1> %mask) {326; CHECK-LABEL: masked_load_v7f32:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetivli zero, 7, e32, m2, ta, ma329; CHECK-NEXT: vle32.v v8, (a0), v0.t330; CHECK-NEXT: ret331 %load = call <7 x float> @llvm.masked.load.v7f32(ptr %a, i32 8, <7 x i1> %mask, <7 x float> poison)332 ret <7 x float> %load333}334