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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s4 5define <1 x i8> @masked_load_v1i8(ptr %a, <1 x i1> %mask) {6; CHECK-LABEL: masked_load_v1i8:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma9; CHECK-NEXT: vle8.v v8, (a0), v0.t10; CHECK-NEXT: ret11 %load = call <1 x i8> @llvm.masked.load.v1i8(ptr %a, i32 8, <1 x i1> %mask, <1 x i8> poison)12 ret <1 x i8> %load13}14 15define <1 x i16> @masked_load_v1i16(ptr %a, <1 x i1> %mask) {16; CHECK-LABEL: masked_load_v1i16:17; CHECK: # %bb.0:18; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma19; CHECK-NEXT: vle16.v v8, (a0), v0.t20; CHECK-NEXT: ret21 %load = call <1 x i16> @llvm.masked.load.v1i16(ptr %a, i32 8, <1 x i1> %mask, <1 x i16> poison)22 ret <1 x i16> %load23}24 25define <1 x i32> @masked_load_v1i32(ptr %a, <1 x i1> %mask) {26; CHECK-LABEL: masked_load_v1i32:27; CHECK: # %bb.0:28; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma29; CHECK-NEXT: vle32.v v8, (a0), v0.t30; CHECK-NEXT: ret31 %load = call <1 x i32> @llvm.masked.load.v1i32(ptr %a, i32 8, <1 x i1> %mask, <1 x i32> poison)32 ret <1 x i32> %load33}34 35define <1 x i64> @masked_load_v1i64(ptr %a, <1 x i1> %mask) {36; CHECK-LABEL: masked_load_v1i64:37; CHECK: # %bb.0:38; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma39; CHECK-NEXT: vle64.v v8, (a0), v0.t40; CHECK-NEXT: ret41 %load = call <1 x i64> @llvm.masked.load.v1i64(ptr %a, i32 8, <1 x i1> %mask, <1 x i64> poison)42 ret <1 x i64> %load43}44 45define <2 x i8> @masked_load_v2i8(ptr %a, <2 x i1> %mask) {46; CHECK-LABEL: masked_load_v2i8:47; CHECK: # %bb.0:48; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma49; CHECK-NEXT: vle8.v v8, (a0), v0.t50; CHECK-NEXT: ret51 %load = call <2 x i8> @llvm.masked.load.v2i8(ptr %a, i32 8, <2 x i1> %mask, <2 x i8> poison)52 ret <2 x i8> %load53}54 55define <2 x i16> @masked_load_v2i16(ptr %a, <2 x i1> %mask) {56; CHECK-LABEL: masked_load_v2i16:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma59; CHECK-NEXT: vle16.v v8, (a0), v0.t60; CHECK-NEXT: ret61 %load = call <2 x i16> @llvm.masked.load.v2i16(ptr %a, i32 8, <2 x i1> %mask, <2 x i16> poison)62 ret <2 x i16> %load63}64 65define <2 x i32> @masked_load_v2i32(ptr %a, <2 x i1> %mask) {66; CHECK-LABEL: masked_load_v2i32:67; CHECK: # %bb.0:68; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma69; CHECK-NEXT: vle32.v v8, (a0), v0.t70; CHECK-NEXT: ret71 %load = call <2 x i32> @llvm.masked.load.v2i32(ptr %a, i32 8, <2 x i1> %mask, <2 x i32> poison)72 ret <2 x i32> %load73}74 75define <2 x i64> @masked_load_v2i64(ptr %a, <2 x i1> %mask) {76; CHECK-LABEL: masked_load_v2i64:77; CHECK: # %bb.0:78; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma79; CHECK-NEXT: vle64.v v8, (a0), v0.t80; CHECK-NEXT: ret81 %load = call <2 x i64> @llvm.masked.load.v2i64(ptr %a, i32 8, <2 x i1> %mask, <2 x i64> poison)82 ret <2 x i64> %load83}84 85define <4 x i8> @masked_load_v4i8(ptr %a, <4 x i1> %mask) {86; CHECK-LABEL: masked_load_v4i8:87; CHECK: # %bb.0:88; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma89; CHECK-NEXT: vle8.v v8, (a0), v0.t90; CHECK-NEXT: ret91 %load = call <4 x i8> @llvm.masked.load.v4i8(ptr %a, i32 8, <4 x i1> %mask, <4 x i8> poison)92 ret <4 x i8> %load93}94 95define <4 x i16> @masked_load_v4i16(ptr %a, <4 x i1> %mask) {96; CHECK-LABEL: masked_load_v4i16:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma99; CHECK-NEXT: vle16.v v8, (a0), v0.t100; CHECK-NEXT: ret101 %load = call <4 x i16> @llvm.masked.load.v4i16(ptr %a, i32 8, <4 x i1> %mask, <4 x i16> poison)102 ret <4 x i16> %load103}104 105define <4 x i32> @masked_load_v4i32(ptr %a, <4 x i1> %mask) {106; CHECK-LABEL: masked_load_v4i32:107; CHECK: # %bb.0:108; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma109; CHECK-NEXT: vle32.v v8, (a0), v0.t110; CHECK-NEXT: ret111 %load = call <4 x i32> @llvm.masked.load.v4i32(ptr %a, i32 8, <4 x i1> %mask, <4 x i32> poison)112 ret <4 x i32> %load113}114 115define <4 x i64> @masked_load_v4i64(ptr %a, <4 x i1> %mask) {116; CHECK-LABEL: masked_load_v4i64:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma119; CHECK-NEXT: vle64.v v8, (a0), v0.t120; CHECK-NEXT: ret121 %load = call <4 x i64> @llvm.masked.load.v4i64(ptr %a, i32 8, <4 x i1> %mask, <4 x i64> poison)122 ret <4 x i64> %load123}124 125define <8 x i8> @masked_load_v8i8(ptr %a, <8 x i1> %mask) {126; CHECK-LABEL: masked_load_v8i8:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma129; CHECK-NEXT: vle8.v v8, (a0), v0.t130; CHECK-NEXT: ret131 %load = call <8 x i8> @llvm.masked.load.v8i8(ptr %a, i32 8, <8 x i1> %mask, <8 x i8> poison)132 ret <8 x i8> %load133}134 135define <8 x i16> @masked_load_v8i16(ptr %a, <8 x i1> %mask) {136; CHECK-LABEL: masked_load_v8i16:137; CHECK: # %bb.0:138; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma139; CHECK-NEXT: vle16.v v8, (a0), v0.t140; CHECK-NEXT: ret141 %load = call <8 x i16> @llvm.masked.load.v8i16(ptr %a, i32 8, <8 x i1> %mask, <8 x i16> poison)142 ret <8 x i16> %load143}144 145define <8 x i32> @masked_load_v8i32(ptr %a, <8 x i1> %mask) {146; CHECK-LABEL: masked_load_v8i32:147; CHECK: # %bb.0:148; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma149; CHECK-NEXT: vle32.v v8, (a0), v0.t150; CHECK-NEXT: ret151 %load = call <8 x i32> @llvm.masked.load.v8i32(ptr %a, i32 8, <8 x i1> %mask, <8 x i32> poison)152 ret <8 x i32> %load153}154 155define <8 x i64> @masked_load_v8i64(ptr %a, <8 x i1> %mask) {156; CHECK-LABEL: masked_load_v8i64:157; CHECK: # %bb.0:158; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma159; CHECK-NEXT: vle64.v v8, (a0), v0.t160; CHECK-NEXT: ret161 %load = call <8 x i64> @llvm.masked.load.v8i64(ptr %a, i32 8, <8 x i1> %mask, <8 x i64> poison)162 ret <8 x i64> %load163}164 165define <16 x i8> @masked_load_v16i8(ptr %a, <16 x i1> %mask) {166; CHECK-LABEL: masked_load_v16i8:167; CHECK: # %bb.0:168; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma169; CHECK-NEXT: vle8.v v8, (a0), v0.t170; CHECK-NEXT: ret171 %load = call <16 x i8> @llvm.masked.load.v16i8(ptr %a, i32 8, <16 x i1> %mask, <16 x i8> poison)172 ret <16 x i8> %load173}174 175define <16 x i16> @masked_load_v16i16(ptr %a, <16 x i1> %mask) {176; CHECK-LABEL: masked_load_v16i16:177; CHECK: # %bb.0:178; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma179; CHECK-NEXT: vle16.v v8, (a0), v0.t180; CHECK-NEXT: ret181 %load = call <16 x i16> @llvm.masked.load.v16i16(ptr %a, i32 8, <16 x i1> %mask, <16 x i16> poison)182 ret <16 x i16> %load183}184 185define <16 x i32> @masked_load_v16i32(ptr %a, <16 x i1> %mask) {186; CHECK-LABEL: masked_load_v16i32:187; CHECK: # %bb.0:188; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma189; CHECK-NEXT: vle32.v v8, (a0), v0.t190; CHECK-NEXT: ret191 %load = call <16 x i32> @llvm.masked.load.v16i32(ptr %a, i32 8, <16 x i1> %mask, <16 x i32> poison)192 ret <16 x i32> %load193}194 195define <16 x i64> @masked_load_v16i64(ptr %a, <16 x i1> %mask) {196; CHECK-LABEL: masked_load_v16i64:197; CHECK: # %bb.0:198; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma199; CHECK-NEXT: vle64.v v8, (a0), v0.t200; CHECK-NEXT: ret201 %load = call <16 x i64> @llvm.masked.load.v16i64(ptr %a, i32 8, <16 x i1> %mask, <16 x i64> poison)202 ret <16 x i64> %load203}204 205define <32 x i8> @masked_load_v32i8(ptr %a, <32 x i1> %mask) {206; CHECK-LABEL: masked_load_v32i8:207; CHECK: # %bb.0:208; CHECK-NEXT: li a1, 32209; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma210; CHECK-NEXT: vle8.v v8, (a0), v0.t211; CHECK-NEXT: ret212 %load = call <32 x i8> @llvm.masked.load.v32i8(ptr %a, i32 8, <32 x i1> %mask, <32 x i8> poison)213 ret <32 x i8> %load214}215 216define <32 x i16> @masked_load_v32i16(ptr %a, <32 x i1> %mask) {217; CHECK-LABEL: masked_load_v32i16:218; CHECK: # %bb.0:219; CHECK-NEXT: li a1, 32220; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma221; CHECK-NEXT: vle16.v v8, (a0), v0.t222; CHECK-NEXT: ret223 %load = call <32 x i16> @llvm.masked.load.v32i16(ptr %a, i32 8, <32 x i1> %mask, <32 x i16> poison)224 ret <32 x i16> %load225}226 227define <32 x i32> @masked_load_v32i32(ptr %a, <32 x i1> %mask) {228; CHECK-LABEL: masked_load_v32i32:229; CHECK: # %bb.0:230; CHECK-NEXT: li a1, 32231; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma232; CHECK-NEXT: vle32.v v8, (a0), v0.t233; CHECK-NEXT: ret234 %load = call <32 x i32> @llvm.masked.load.v32i32(ptr %a, i32 8, <32 x i1> %mask, <32 x i32> poison)235 ret <32 x i32> %load236}237 238define <32 x i64> @masked_load_v32i64(ptr %a, <32 x i1> %mask) {239; CHECK-LABEL: masked_load_v32i64:240; CHECK: # %bb.0:241; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma242; CHECK-NEXT: vle64.v v8, (a0), v0.t243; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma244; CHECK-NEXT: vslidedown.vi v0, v0, 2245; CHECK-NEXT: addi a0, a0, 128246; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma247; CHECK-NEXT: vle64.v v16, (a0), v0.t248; CHECK-NEXT: ret249 %load = call <32 x i64> @llvm.masked.load.v32i64(ptr %a, i32 8, <32 x i1> %mask, <32 x i64> poison)250 ret <32 x i64> %load251}252 253define <64 x i8> @masked_load_v64i8(ptr %a, <64 x i1> %mask) {254; CHECK-LABEL: masked_load_v64i8:255; CHECK: # %bb.0:256; CHECK-NEXT: li a1, 64257; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma258; CHECK-NEXT: vle8.v v8, (a0), v0.t259; CHECK-NEXT: ret260 %load = call <64 x i8> @llvm.masked.load.v64i8(ptr %a, i32 8, <64 x i1> %mask, <64 x i8> poison)261 ret <64 x i8> %load262}263 264define <64 x i16> @masked_load_v64i16(ptr %a, <64 x i1> %mask) {265; CHECK-LABEL: masked_load_v64i16:266; CHECK: # %bb.0:267; CHECK-NEXT: li a1, 64268; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma269; CHECK-NEXT: vle16.v v8, (a0), v0.t270; CHECK-NEXT: ret271 %load = call <64 x i16> @llvm.masked.load.v64i16(ptr %a, i32 8, <64 x i1> %mask, <64 x i16> poison)272 ret <64 x i16> %load273}274 275define <64 x i32> @masked_load_v64i32(ptr %a, <64 x i1> %mask) {276; CHECK-LABEL: masked_load_v64i32:277; CHECK: # %bb.0:278; CHECK-NEXT: li a1, 32279; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma280; CHECK-NEXT: vle32.v v8, (a0), v0.t281; CHECK-NEXT: vsetivli zero, 4, e8, mf2, ta, ma282; CHECK-NEXT: vslidedown.vi v0, v0, 4283; CHECK-NEXT: addi a0, a0, 128284; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma285; CHECK-NEXT: vle32.v v16, (a0), v0.t286; CHECK-NEXT: ret287 %load = call <64 x i32> @llvm.masked.load.v64i32(ptr %a, i32 8, <64 x i1> %mask, <64 x i32> poison)288 ret <64 x i32> %load289}290 291define <128 x i8> @masked_load_v128i8(ptr %a, <128 x i1> %mask) {292; CHECK-LABEL: masked_load_v128i8:293; CHECK: # %bb.0:294; CHECK-NEXT: li a1, 128295; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma296; CHECK-NEXT: vle8.v v8, (a0), v0.t297; CHECK-NEXT: ret298 %load = call <128 x i8> @llvm.masked.load.v128i8(ptr %a, i32 8, <128 x i1> %mask, <128 x i8> poison)299 ret <128 x i8> %load300}301 302define <128 x i16> @masked_load_v128i16(ptr %a, <128 x i1> %mask) {303; CHECK-LABEL: masked_load_v128i16:304; CHECK: # %bb.0:305; CHECK-NEXT: li a1, 64306; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma307; CHECK-NEXT: vle16.v v8, (a0), v0.t308; CHECK-NEXT: vsetivli zero, 8, e8, m1, ta, ma309; CHECK-NEXT: vslidedown.vi v0, v0, 8310; CHECK-NEXT: addi a0, a0, 128311; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma312; CHECK-NEXT: vle16.v v16, (a0), v0.t313; CHECK-NEXT: ret314 %load = call <128 x i16> @llvm.masked.load.v128i16(ptr %a, i32 8, <128 x i1> %mask, <128 x i16> poison)315 ret <128 x i16> %load316}317 318define <256 x i8> @masked_load_v256i8(ptr %a, <256 x i1> %mask) {319; CHECK-LABEL: masked_load_v256i8:320; CHECK: # %bb.0:321; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma322; CHECK-NEXT: vmv1r.v v16, v8323; CHECK-NEXT: li a1, 128324; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma325; CHECK-NEXT: vle8.v v8, (a0), v0.t326; CHECK-NEXT: addi a0, a0, 128327; CHECK-NEXT: vmv1r.v v0, v16328; CHECK-NEXT: vle8.v v16, (a0), v0.t329; CHECK-NEXT: ret330 %load = call <256 x i8> @llvm.masked.load.v256i8(ptr %a, i32 8, <256 x i1> %mask, <256 x i8> poison)331 ret <256 x i8> %load332}333 334define <7 x i8> @masked_load_v7i8(ptr %a, <7 x i1> %mask) {335; CHECK-LABEL: masked_load_v7i8:336; CHECK: # %bb.0:337; CHECK-NEXT: vsetivli zero, 7, e8, mf2, ta, ma338; CHECK-NEXT: vle8.v v8, (a0), v0.t339; CHECK-NEXT: ret340 %load = call <7 x i8> @llvm.masked.load.v7i8(ptr %a, i32 8, <7 x i1> %mask, <7 x i8> poison)341 ret <7 x i8> %load342}343 344define <7 x i8> @masked_load_passthru_v7i8(ptr %a, <7 x i1> %mask) {345; CHECK-LABEL: masked_load_passthru_v7i8:346; CHECK: # %bb.0:347; CHECK-NEXT: li a1, 127348; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu349; CHECK-NEXT: vmv.s.x v8, a1350; CHECK-NEXT: vmand.mm v0, v0, v8351; CHECK-NEXT: vmv.v.i v8, 0352; CHECK-NEXT: vle8.v v8, (a0), v0.t353; CHECK-NEXT: ret354 %load = call <7 x i8> @llvm.masked.load.v7i8(ptr %a, i32 8, <7 x i1> %mask, <7 x i8> zeroinitializer)355 ret <7 x i8> %load356}357