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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s4 5define zeroext i1 @vpreduce_and_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {6; CHECK-LABEL: vpreduce_and_v1i1:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma9; CHECK-NEXT: vmnot.m v9, v010; CHECK-NEXT: vmv1r.v v0, v811; CHECK-NEXT: vcpop.m a1, v9, v0.t12; CHECK-NEXT: seqz a1, a113; CHECK-NEXT: and a0, a1, a014; CHECK-NEXT: ret15 %r = call i1 @llvm.vp.reduce.and.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)16 ret i1 %r17}18 19define zeroext i1 @vpreduce_or_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {20; CHECK-LABEL: vpreduce_or_v1i1:21; CHECK: # %bb.0:22; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma23; CHECK-NEXT: vmv1r.v v9, v024; CHECK-NEXT: vmv1r.v v0, v825; CHECK-NEXT: vcpop.m a1, v9, v0.t26; CHECK-NEXT: snez a1, a127; CHECK-NEXT: or a0, a1, a028; CHECK-NEXT: ret29 %r = call i1 @llvm.vp.reduce.or.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)30 ret i1 %r31}32 33define zeroext i1 @vpreduce_xor_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {34; CHECK-LABEL: vpreduce_xor_v1i1:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma37; CHECK-NEXT: vmv1r.v v9, v038; CHECK-NEXT: vmv1r.v v0, v839; CHECK-NEXT: vcpop.m a1, v9, v0.t40; CHECK-NEXT: andi a1, a1, 141; CHECK-NEXT: xor a0, a1, a042; CHECK-NEXT: ret43 %r = call i1 @llvm.vp.reduce.xor.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)44 ret i1 %r45}46 47define zeroext i1 @vpreduce_and_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {48; CHECK-LABEL: vpreduce_and_v2i1:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma51; CHECK-NEXT: vmnot.m v9, v052; CHECK-NEXT: vmv1r.v v0, v853; CHECK-NEXT: vcpop.m a1, v9, v0.t54; CHECK-NEXT: seqz a1, a155; CHECK-NEXT: and a0, a1, a056; CHECK-NEXT: ret57 %r = call i1 @llvm.vp.reduce.and.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)58 ret i1 %r59}60 61define zeroext i1 @vpreduce_or_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {62; CHECK-LABEL: vpreduce_or_v2i1:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma65; CHECK-NEXT: vmv1r.v v9, v066; CHECK-NEXT: vmv1r.v v0, v867; CHECK-NEXT: vcpop.m a1, v9, v0.t68; CHECK-NEXT: snez a1, a169; CHECK-NEXT: or a0, a1, a070; CHECK-NEXT: ret71 %r = call i1 @llvm.vp.reduce.or.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)72 ret i1 %r73}74 75define zeroext i1 @vpreduce_xor_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {76; CHECK-LABEL: vpreduce_xor_v2i1:77; CHECK: # %bb.0:78; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma79; CHECK-NEXT: vmv1r.v v9, v080; CHECK-NEXT: vmv1r.v v0, v881; CHECK-NEXT: vcpop.m a1, v9, v0.t82; CHECK-NEXT: andi a1, a1, 183; CHECK-NEXT: xor a0, a1, a084; CHECK-NEXT: ret85 %r = call i1 @llvm.vp.reduce.xor.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)86 ret i1 %r87}88 89define zeroext i1 @vpreduce_and_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {90; CHECK-LABEL: vpreduce_and_v4i1:91; CHECK: # %bb.0:92; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma93; CHECK-NEXT: vmnot.m v9, v094; CHECK-NEXT: vmv1r.v v0, v895; CHECK-NEXT: vcpop.m a1, v9, v0.t96; CHECK-NEXT: seqz a1, a197; CHECK-NEXT: and a0, a1, a098; CHECK-NEXT: ret99 %r = call i1 @llvm.vp.reduce.and.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)100 ret i1 %r101}102 103define zeroext i1 @vpreduce_or_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {104; CHECK-LABEL: vpreduce_or_v4i1:105; CHECK: # %bb.0:106; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma107; CHECK-NEXT: vmv1r.v v9, v0108; CHECK-NEXT: vmv1r.v v0, v8109; CHECK-NEXT: vcpop.m a1, v9, v0.t110; CHECK-NEXT: snez a1, a1111; CHECK-NEXT: or a0, a1, a0112; CHECK-NEXT: ret113 %r = call i1 @llvm.vp.reduce.or.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)114 ret i1 %r115}116 117define zeroext i1 @vpreduce_xor_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {118; CHECK-LABEL: vpreduce_xor_v4i1:119; CHECK: # %bb.0:120; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma121; CHECK-NEXT: vmv1r.v v9, v0122; CHECK-NEXT: vmv1r.v v0, v8123; CHECK-NEXT: vcpop.m a1, v9, v0.t124; CHECK-NEXT: andi a1, a1, 1125; CHECK-NEXT: xor a0, a1, a0126; CHECK-NEXT: ret127 %r = call i1 @llvm.vp.reduce.xor.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)128 ret i1 %r129}130 131define zeroext i1 @vpreduce_and_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {132; CHECK-LABEL: vpreduce_and_v8i1:133; CHECK: # %bb.0:134; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma135; CHECK-NEXT: vmnot.m v9, v0136; CHECK-NEXT: vmv1r.v v0, v8137; CHECK-NEXT: vcpop.m a1, v9, v0.t138; CHECK-NEXT: seqz a1, a1139; CHECK-NEXT: and a0, a1, a0140; CHECK-NEXT: ret141 %r = call i1 @llvm.vp.reduce.and.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)142 ret i1 %r143}144 145define zeroext i1 @vpreduce_or_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {146; CHECK-LABEL: vpreduce_or_v8i1:147; CHECK: # %bb.0:148; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma149; CHECK-NEXT: vmv1r.v v9, v0150; CHECK-NEXT: vmv1r.v v0, v8151; CHECK-NEXT: vcpop.m a1, v9, v0.t152; CHECK-NEXT: snez a1, a1153; CHECK-NEXT: or a0, a1, a0154; CHECK-NEXT: ret155 %r = call i1 @llvm.vp.reduce.or.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)156 ret i1 %r157}158 159define zeroext i1 @vpreduce_xor_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {160; CHECK-LABEL: vpreduce_xor_v8i1:161; CHECK: # %bb.0:162; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma163; CHECK-NEXT: vmv1r.v v9, v0164; CHECK-NEXT: vmv1r.v v0, v8165; CHECK-NEXT: vcpop.m a1, v9, v0.t166; CHECK-NEXT: andi a1, a1, 1167; CHECK-NEXT: xor a0, a1, a0168; CHECK-NEXT: ret169 %r = call i1 @llvm.vp.reduce.xor.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)170 ret i1 %r171}172 173define zeroext i1 @vpreduce_and_v10i1(i1 zeroext %s, <10 x i1> %v, <10 x i1> %m, i32 zeroext %evl) {174; CHECK-LABEL: vpreduce_and_v10i1:175; CHECK: # %bb.0:176; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma177; CHECK-NEXT: vmnot.m v9, v0178; CHECK-NEXT: vmv1r.v v0, v8179; CHECK-NEXT: vcpop.m a1, v9, v0.t180; CHECK-NEXT: seqz a1, a1181; CHECK-NEXT: and a0, a1, a0182; CHECK-NEXT: ret183 %r = call i1 @llvm.vp.reduce.and.v10i1(i1 %s, <10 x i1> %v, <10 x i1> %m, i32 %evl)184 ret i1 %r185}186 187define zeroext i1 @vpreduce_and_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {188; CHECK-LABEL: vpreduce_and_v16i1:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma191; CHECK-NEXT: vmnot.m v9, v0192; CHECK-NEXT: vmv1r.v v0, v8193; CHECK-NEXT: vcpop.m a1, v9, v0.t194; CHECK-NEXT: seqz a1, a1195; CHECK-NEXT: and a0, a1, a0196; CHECK-NEXT: ret197 %r = call i1 @llvm.vp.reduce.and.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)198 ret i1 %r199}200 201define zeroext i1 @vpreduce_and_v256i1(i1 zeroext %s, <256 x i1> %v, <256 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: vpreduce_and_v256i1:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma205; CHECK-NEXT: vmv1r.v v11, v9206; CHECK-NEXT: vmv1r.v v9, v0207; CHECK-NEXT: li a3, 128208; CHECK-NEXT: mv a2, a1209; CHECK-NEXT: bltu a1, a3, .LBB14_2210; CHECK-NEXT: # %bb.1:211; CHECK-NEXT: li a2, 128212; CHECK-NEXT: .LBB14_2:213; CHECK-NEXT: vmv1r.v v0, v11214; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma215; CHECK-NEXT: vmnot.m v9, v9216; CHECK-NEXT: vcpop.m a2, v9, v0.t217; CHECK-NEXT: seqz a2, a2218; CHECK-NEXT: and a0, a2, a0219; CHECK-NEXT: addi a2, a1, -128220; CHECK-NEXT: sltu a1, a1, a2221; CHECK-NEXT: addi a1, a1, -1222; CHECK-NEXT: and a1, a1, a2223; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma224; CHECK-NEXT: vmnot.m v8, v8225; CHECK-NEXT: vmv1r.v v0, v10226; CHECK-NEXT: vcpop.m a1, v8, v0.t227; CHECK-NEXT: seqz a1, a1228; CHECK-NEXT: and a0, a1, a0229; CHECK-NEXT: ret230 %r = call i1 @llvm.vp.reduce.and.v256i1(i1 %s, <256 x i1> %v, <256 x i1> %m, i32 %evl)231 ret i1 %r232}233 234define zeroext i1 @vpreduce_or_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {235; CHECK-LABEL: vpreduce_or_v16i1:236; CHECK: # %bb.0:237; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma238; CHECK-NEXT: vmv1r.v v9, v0239; CHECK-NEXT: vmv1r.v v0, v8240; CHECK-NEXT: vcpop.m a1, v9, v0.t241; CHECK-NEXT: snez a1, a1242; CHECK-NEXT: or a0, a1, a0243; CHECK-NEXT: ret244 %r = call i1 @llvm.vp.reduce.or.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)245 ret i1 %r246}247 248define zeroext i1 @vpreduce_xor_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {249; CHECK-LABEL: vpreduce_xor_v16i1:250; CHECK: # %bb.0:251; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma252; CHECK-NEXT: vmv1r.v v9, v0253; CHECK-NEXT: vmv1r.v v0, v8254; CHECK-NEXT: vcpop.m a1, v9, v0.t255; CHECK-NEXT: andi a1, a1, 1256; CHECK-NEXT: xor a0, a1, a0257; CHECK-NEXT: ret258 %r = call i1 @llvm.vp.reduce.xor.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)259 ret i1 %r260}261 262define zeroext i1 @vpreduce_add_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {263; CHECK-LABEL: vpreduce_add_v1i1:264; CHECK: # %bb.0:265; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma266; CHECK-NEXT: vmv1r.v v9, v0267; CHECK-NEXT: vmv1r.v v0, v8268; CHECK-NEXT: vcpop.m a1, v9, v0.t269; CHECK-NEXT: andi a1, a1, 1270; CHECK-NEXT: xor a0, a1, a0271; CHECK-NEXT: ret272 %r = call i1 @llvm.vp.reduce.add.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)273 ret i1 %r274}275 276define zeroext i1 @vpreduce_add_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {277; CHECK-LABEL: vpreduce_add_v2i1:278; CHECK: # %bb.0:279; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma280; CHECK-NEXT: vmv1r.v v9, v0281; CHECK-NEXT: vmv1r.v v0, v8282; CHECK-NEXT: vcpop.m a1, v9, v0.t283; CHECK-NEXT: andi a1, a1, 1284; CHECK-NEXT: xor a0, a1, a0285; CHECK-NEXT: ret286 %r = call i1 @llvm.vp.reduce.add.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)287 ret i1 %r288}289 290define zeroext i1 @vpreduce_add_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {291; CHECK-LABEL: vpreduce_add_v4i1:292; CHECK: # %bb.0:293; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma294; CHECK-NEXT: vmv1r.v v9, v0295; CHECK-NEXT: vmv1r.v v0, v8296; CHECK-NEXT: vcpop.m a1, v9, v0.t297; CHECK-NEXT: andi a1, a1, 1298; CHECK-NEXT: xor a0, a1, a0299; CHECK-NEXT: ret300 %r = call i1 @llvm.vp.reduce.add.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)301 ret i1 %r302}303 304define zeroext i1 @vpreduce_add_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {305; CHECK-LABEL: vpreduce_add_v8i1:306; CHECK: # %bb.0:307; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma308; CHECK-NEXT: vmv1r.v v9, v0309; CHECK-NEXT: vmv1r.v v0, v8310; CHECK-NEXT: vcpop.m a1, v9, v0.t311; CHECK-NEXT: andi a1, a1, 1312; CHECK-NEXT: xor a0, a1, a0313; CHECK-NEXT: ret314 %r = call i1 @llvm.vp.reduce.add.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)315 ret i1 %r316}317 318define zeroext i1 @vpreduce_add_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {319; CHECK-LABEL: vpreduce_add_v16i1:320; CHECK: # %bb.0:321; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma322; CHECK-NEXT: vmv1r.v v9, v0323; CHECK-NEXT: vmv1r.v v0, v8324; CHECK-NEXT: vcpop.m a1, v9, v0.t325; CHECK-NEXT: andi a1, a1, 1326; CHECK-NEXT: xor a0, a1, a0327; CHECK-NEXT: ret328 %r = call i1 @llvm.vp.reduce.add.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)329 ret i1 %r330}331 332define zeroext i1 @vpreduce_smax_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {333; CHECK-LABEL: vpreduce_smax_v1i1:334; CHECK: # %bb.0:335; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma336; CHECK-NEXT: vmnot.m v9, v0337; CHECK-NEXT: vmv1r.v v0, v8338; CHECK-NEXT: vcpop.m a1, v9, v0.t339; CHECK-NEXT: seqz a1, a1340; CHECK-NEXT: and a0, a1, a0341; CHECK-NEXT: ret342 %r = call i1 @llvm.vp.reduce.smax.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)343 ret i1 %r344}345 346define zeroext i1 @vpreduce_smax_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {347; CHECK-LABEL: vpreduce_smax_v2i1:348; CHECK: # %bb.0:349; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma350; CHECK-NEXT: vmnot.m v9, v0351; CHECK-NEXT: vmv1r.v v0, v8352; CHECK-NEXT: vcpop.m a1, v9, v0.t353; CHECK-NEXT: seqz a1, a1354; CHECK-NEXT: and a0, a1, a0355; CHECK-NEXT: ret356 %r = call i1 @llvm.vp.reduce.smax.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)357 ret i1 %r358}359 360define zeroext i1 @vpreduce_smax_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {361; CHECK-LABEL: vpreduce_smax_v4i1:362; CHECK: # %bb.0:363; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma364; CHECK-NEXT: vmnot.m v9, v0365; CHECK-NEXT: vmv1r.v v0, v8366; CHECK-NEXT: vcpop.m a1, v9, v0.t367; CHECK-NEXT: seqz a1, a1368; CHECK-NEXT: and a0, a1, a0369; CHECK-NEXT: ret370 %r = call i1 @llvm.vp.reduce.smax.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)371 ret i1 %r372}373 374define zeroext i1 @vpreduce_smax_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {375; CHECK-LABEL: vpreduce_smax_v8i1:376; CHECK: # %bb.0:377; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma378; CHECK-NEXT: vmnot.m v9, v0379; CHECK-NEXT: vmv1r.v v0, v8380; CHECK-NEXT: vcpop.m a1, v9, v0.t381; CHECK-NEXT: seqz a1, a1382; CHECK-NEXT: and a0, a1, a0383; CHECK-NEXT: ret384 %r = call i1 @llvm.vp.reduce.smax.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)385 ret i1 %r386}387 388define zeroext i1 @vpreduce_smax_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {389; CHECK-LABEL: vpreduce_smax_v16i1:390; CHECK: # %bb.0:391; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma392; CHECK-NEXT: vmnot.m v9, v0393; CHECK-NEXT: vmv1r.v v0, v8394; CHECK-NEXT: vcpop.m a1, v9, v0.t395; CHECK-NEXT: seqz a1, a1396; CHECK-NEXT: and a0, a1, a0397; CHECK-NEXT: ret398 %r = call i1 @llvm.vp.reduce.smax.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)399 ret i1 %r400}401 402define zeroext i1 @vpreduce_smax_v32i1(i1 zeroext %s, <32 x i1> %v, <32 x i1> %m, i32 zeroext %evl) {403; CHECK-LABEL: vpreduce_smax_v32i1:404; CHECK: # %bb.0:405; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma406; CHECK-NEXT: vmnot.m v9, v0407; CHECK-NEXT: vmv1r.v v0, v8408; CHECK-NEXT: vcpop.m a1, v9, v0.t409; CHECK-NEXT: seqz a1, a1410; CHECK-NEXT: and a0, a1, a0411; CHECK-NEXT: ret412 %r = call i1 @llvm.vp.reduce.smax.v32i1(i1 %s, <32 x i1> %v, <32 x i1> %m, i32 %evl)413 ret i1 %r414}415 416define zeroext i1 @vpreduce_smax_v64i1(i1 zeroext %s, <64 x i1> %v, <64 x i1> %m, i32 zeroext %evl) {417; CHECK-LABEL: vpreduce_smax_v64i1:418; CHECK: # %bb.0:419; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma420; CHECK-NEXT: vmnot.m v9, v0421; CHECK-NEXT: vmv1r.v v0, v8422; CHECK-NEXT: vcpop.m a1, v9, v0.t423; CHECK-NEXT: seqz a1, a1424; CHECK-NEXT: and a0, a1, a0425; CHECK-NEXT: ret426 %r = call i1 @llvm.vp.reduce.smax.v64i1(i1 %s, <64 x i1> %v, <64 x i1> %m, i32 %evl)427 ret i1 %r428}429 430define zeroext i1 @vpreduce_smin_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {431; CHECK-LABEL: vpreduce_smin_v1i1:432; CHECK: # %bb.0:433; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma434; CHECK-NEXT: vmv1r.v v9, v0435; CHECK-NEXT: vmv1r.v v0, v8436; CHECK-NEXT: vcpop.m a1, v9, v0.t437; CHECK-NEXT: snez a1, a1438; CHECK-NEXT: or a0, a1, a0439; CHECK-NEXT: ret440 %r = call i1 @llvm.vp.reduce.smin.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)441 ret i1 %r442}443 444define zeroext i1 @vpreduce_smin_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {445; CHECK-LABEL: vpreduce_smin_v2i1:446; CHECK: # %bb.0:447; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma448; CHECK-NEXT: vmv1r.v v9, v0449; CHECK-NEXT: vmv1r.v v0, v8450; CHECK-NEXT: vcpop.m a1, v9, v0.t451; CHECK-NEXT: snez a1, a1452; CHECK-NEXT: or a0, a1, a0453; CHECK-NEXT: ret454 %r = call i1 @llvm.vp.reduce.smin.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)455 ret i1 %r456}457 458define zeroext i1 @vpreduce_smin_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {459; CHECK-LABEL: vpreduce_smin_v4i1:460; CHECK: # %bb.0:461; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma462; CHECK-NEXT: vmv1r.v v9, v0463; CHECK-NEXT: vmv1r.v v0, v8464; CHECK-NEXT: vcpop.m a1, v9, v0.t465; CHECK-NEXT: snez a1, a1466; CHECK-NEXT: or a0, a1, a0467; CHECK-NEXT: ret468 %r = call i1 @llvm.vp.reduce.smin.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)469 ret i1 %r470}471 472define zeroext i1 @vpreduce_smin_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {473; CHECK-LABEL: vpreduce_smin_v8i1:474; CHECK: # %bb.0:475; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma476; CHECK-NEXT: vmv1r.v v9, v0477; CHECK-NEXT: vmv1r.v v0, v8478; CHECK-NEXT: vcpop.m a1, v9, v0.t479; CHECK-NEXT: snez a1, a1480; CHECK-NEXT: or a0, a1, a0481; CHECK-NEXT: ret482 %r = call i1 @llvm.vp.reduce.smin.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)483 ret i1 %r484}485 486define zeroext i1 @vpreduce_smin_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {487; CHECK-LABEL: vpreduce_smin_v16i1:488; CHECK: # %bb.0:489; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma490; CHECK-NEXT: vmv1r.v v9, v0491; CHECK-NEXT: vmv1r.v v0, v8492; CHECK-NEXT: vcpop.m a1, v9, v0.t493; CHECK-NEXT: snez a1, a1494; CHECK-NEXT: or a0, a1, a0495; CHECK-NEXT: ret496 %r = call i1 @llvm.vp.reduce.smin.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)497 ret i1 %r498}499 500define zeroext i1 @vpreduce_smin_v32i1(i1 zeroext %s, <32 x i1> %v, <32 x i1> %m, i32 zeroext %evl) {501; CHECK-LABEL: vpreduce_smin_v32i1:502; CHECK: # %bb.0:503; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma504; CHECK-NEXT: vmv1r.v v9, v0505; CHECK-NEXT: vmv1r.v v0, v8506; CHECK-NEXT: vcpop.m a1, v9, v0.t507; CHECK-NEXT: snez a1, a1508; CHECK-NEXT: or a0, a1, a0509; CHECK-NEXT: ret510 %r = call i1 @llvm.vp.reduce.smin.v32i1(i1 %s, <32 x i1> %v, <32 x i1> %m, i32 %evl)511 ret i1 %r512}513 514define zeroext i1 @vpreduce_smin_v64i1(i1 zeroext %s, <64 x i1> %v, <64 x i1> %m, i32 zeroext %evl) {515; CHECK-LABEL: vpreduce_smin_v64i1:516; CHECK: # %bb.0:517; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma518; CHECK-NEXT: vmv1r.v v9, v0519; CHECK-NEXT: vmv1r.v v0, v8520; CHECK-NEXT: vcpop.m a1, v9, v0.t521; CHECK-NEXT: snez a1, a1522; CHECK-NEXT: or a0, a1, a0523; CHECK-NEXT: ret524 %r = call i1 @llvm.vp.reduce.smin.v64i1(i1 %s, <64 x i1> %v, <64 x i1> %m, i32 %evl)525 ret i1 %r526}527 528define zeroext i1 @vpreduce_umax_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {529; CHECK-LABEL: vpreduce_umax_v1i1:530; CHECK: # %bb.0:531; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma532; CHECK-NEXT: vmv1r.v v9, v0533; CHECK-NEXT: vmv1r.v v0, v8534; CHECK-NEXT: vcpop.m a1, v9, v0.t535; CHECK-NEXT: snez a1, a1536; CHECK-NEXT: or a0, a1, a0537; CHECK-NEXT: ret538 %r = call i1 @llvm.vp.reduce.umax.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)539 ret i1 %r540}541 542define zeroext i1 @vpreduce_umax_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {543; CHECK-LABEL: vpreduce_umax_v2i1:544; CHECK: # %bb.0:545; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma546; CHECK-NEXT: vmv1r.v v9, v0547; CHECK-NEXT: vmv1r.v v0, v8548; CHECK-NEXT: vcpop.m a1, v9, v0.t549; CHECK-NEXT: snez a1, a1550; CHECK-NEXT: or a0, a1, a0551; CHECK-NEXT: ret552 %r = call i1 @llvm.vp.reduce.umax.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)553 ret i1 %r554}555 556define zeroext i1 @vpreduce_umax_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {557; CHECK-LABEL: vpreduce_umax_v4i1:558; CHECK: # %bb.0:559; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma560; CHECK-NEXT: vmv1r.v v9, v0561; CHECK-NEXT: vmv1r.v v0, v8562; CHECK-NEXT: vcpop.m a1, v9, v0.t563; CHECK-NEXT: snez a1, a1564; CHECK-NEXT: or a0, a1, a0565; CHECK-NEXT: ret566 %r = call i1 @llvm.vp.reduce.umax.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)567 ret i1 %r568}569 570define zeroext i1 @vpreduce_umax_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {571; CHECK-LABEL: vpreduce_umax_v8i1:572; CHECK: # %bb.0:573; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma574; CHECK-NEXT: vmv1r.v v9, v0575; CHECK-NEXT: vmv1r.v v0, v8576; CHECK-NEXT: vcpop.m a1, v9, v0.t577; CHECK-NEXT: snez a1, a1578; CHECK-NEXT: or a0, a1, a0579; CHECK-NEXT: ret580 %r = call i1 @llvm.vp.reduce.umax.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)581 ret i1 %r582}583 584define zeroext i1 @vpreduce_umax_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {585; CHECK-LABEL: vpreduce_umax_v16i1:586; CHECK: # %bb.0:587; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma588; CHECK-NEXT: vmv1r.v v9, v0589; CHECK-NEXT: vmv1r.v v0, v8590; CHECK-NEXT: vcpop.m a1, v9, v0.t591; CHECK-NEXT: snez a1, a1592; CHECK-NEXT: or a0, a1, a0593; CHECK-NEXT: ret594 %r = call i1 @llvm.vp.reduce.umax.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)595 ret i1 %r596}597 598define zeroext i1 @vpreduce_umax_v32i1(i1 zeroext %s, <32 x i1> %v, <32 x i1> %m, i32 zeroext %evl) {599; CHECK-LABEL: vpreduce_umax_v32i1:600; CHECK: # %bb.0:601; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma602; CHECK-NEXT: vmv1r.v v9, v0603; CHECK-NEXT: vmv1r.v v0, v8604; CHECK-NEXT: vcpop.m a1, v9, v0.t605; CHECK-NEXT: snez a1, a1606; CHECK-NEXT: or a0, a1, a0607; CHECK-NEXT: ret608 %r = call i1 @llvm.vp.reduce.umax.v32i1(i1 %s, <32 x i1> %v, <32 x i1> %m, i32 %evl)609 ret i1 %r610}611 612define zeroext i1 @vpreduce_umax_v64i1(i1 zeroext %s, <64 x i1> %v, <64 x i1> %m, i32 zeroext %evl) {613; CHECK-LABEL: vpreduce_umax_v64i1:614; CHECK: # %bb.0:615; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma616; CHECK-NEXT: vmv1r.v v9, v0617; CHECK-NEXT: vmv1r.v v0, v8618; CHECK-NEXT: vcpop.m a1, v9, v0.t619; CHECK-NEXT: snez a1, a1620; CHECK-NEXT: or a0, a1, a0621; CHECK-NEXT: ret622 %r = call i1 @llvm.vp.reduce.umax.v64i1(i1 %s, <64 x i1> %v, <64 x i1> %m, i32 %evl)623 ret i1 %r624}625 626define zeroext i1 @vpreduce_umin_v1i1(i1 zeroext %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {627; CHECK-LABEL: vpreduce_umin_v1i1:628; CHECK: # %bb.0:629; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma630; CHECK-NEXT: vmnot.m v9, v0631; CHECK-NEXT: vmv1r.v v0, v8632; CHECK-NEXT: vcpop.m a1, v9, v0.t633; CHECK-NEXT: seqz a1, a1634; CHECK-NEXT: and a0, a1, a0635; CHECK-NEXT: ret636 %r = call i1 @llvm.vp.reduce.umin.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)637 ret i1 %r638}639 640define zeroext i1 @vpreduce_umin_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {641; CHECK-LABEL: vpreduce_umin_v2i1:642; CHECK: # %bb.0:643; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma644; CHECK-NEXT: vmnot.m v9, v0645; CHECK-NEXT: vmv1r.v v0, v8646; CHECK-NEXT: vcpop.m a1, v9, v0.t647; CHECK-NEXT: seqz a1, a1648; CHECK-NEXT: and a0, a1, a0649; CHECK-NEXT: ret650 %r = call i1 @llvm.vp.reduce.umin.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)651 ret i1 %r652}653 654define zeroext i1 @vpreduce_umin_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {655; CHECK-LABEL: vpreduce_umin_v4i1:656; CHECK: # %bb.0:657; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma658; CHECK-NEXT: vmnot.m v9, v0659; CHECK-NEXT: vmv1r.v v0, v8660; CHECK-NEXT: vcpop.m a1, v9, v0.t661; CHECK-NEXT: seqz a1, a1662; CHECK-NEXT: and a0, a1, a0663; CHECK-NEXT: ret664 %r = call i1 @llvm.vp.reduce.umin.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)665 ret i1 %r666}667 668define zeroext i1 @vpreduce_umin_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {669; CHECK-LABEL: vpreduce_umin_v8i1:670; CHECK: # %bb.0:671; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma672; CHECK-NEXT: vmnot.m v9, v0673; CHECK-NEXT: vmv1r.v v0, v8674; CHECK-NEXT: vcpop.m a1, v9, v0.t675; CHECK-NEXT: seqz a1, a1676; CHECK-NEXT: and a0, a1, a0677; CHECK-NEXT: ret678 %r = call i1 @llvm.vp.reduce.umin.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)679 ret i1 %r680}681 682define zeroext i1 @vpreduce_umin_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {683; CHECK-LABEL: vpreduce_umin_v16i1:684; CHECK: # %bb.0:685; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma686; CHECK-NEXT: vmnot.m v9, v0687; CHECK-NEXT: vmv1r.v v0, v8688; CHECK-NEXT: vcpop.m a1, v9, v0.t689; CHECK-NEXT: seqz a1, a1690; CHECK-NEXT: and a0, a1, a0691; CHECK-NEXT: ret692 %r = call i1 @llvm.vp.reduce.umin.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)693 ret i1 %r694}695 696define zeroext i1 @vpreduce_umin_v32i1(i1 zeroext %s, <32 x i1> %v, <32 x i1> %m, i32 zeroext %evl) {697; CHECK-LABEL: vpreduce_umin_v32i1:698; CHECK: # %bb.0:699; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma700; CHECK-NEXT: vmnot.m v9, v0701; CHECK-NEXT: vmv1r.v v0, v8702; CHECK-NEXT: vcpop.m a1, v9, v0.t703; CHECK-NEXT: seqz a1, a1704; CHECK-NEXT: and a0, a1, a0705; CHECK-NEXT: ret706 %r = call i1 @llvm.vp.reduce.umin.v32i1(i1 %s, <32 x i1> %v, <32 x i1> %m, i32 %evl)707 ret i1 %r708}709 710define zeroext i1 @vpreduce_umin_v64i1(i1 zeroext %s, <64 x i1> %v, <64 x i1> %m, i32 zeroext %evl) {711; CHECK-LABEL: vpreduce_umin_v64i1:712; CHECK: # %bb.0:713; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma714; CHECK-NEXT: vmnot.m v9, v0715; CHECK-NEXT: vmv1r.v v0, v8716; CHECK-NEXT: vcpop.m a1, v9, v0.t717; CHECK-NEXT: seqz a1, a1718; CHECK-NEXT: and a0, a1, a0719; CHECK-NEXT: ret720 %r = call i1 @llvm.vp.reduce.umin.v64i1(i1 %s, <64 x i1> %v, <64 x i1> %m, i32 %evl)721 ret i1 %r722}723 724define i1 @vpreduce_mul_v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 zeroext %evl) {725; CHECK-LABEL: vpreduce_mul_v1i1:726; CHECK: # %bb.0:727; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma728; CHECK-NEXT: vmnot.m v9, v0729; CHECK-NEXT: vmv1r.v v0, v8730; CHECK-NEXT: vcpop.m a1, v9, v0.t731; CHECK-NEXT: seqz a1, a1732; CHECK-NEXT: and a0, a1, a0733; CHECK-NEXT: ret734 %r = call i1 @llvm.vp.reduce.mul.v1i1(i1 %s, <1 x i1> %v, <1 x i1> %m, i32 %evl)735 ret i1 %r736}737 738define zeroext i1 @vpreduce_mul_v2i1(i1 zeroext %s, <2 x i1> %v, <2 x i1> %m, i32 zeroext %evl) {739; CHECK-LABEL: vpreduce_mul_v2i1:740; CHECK: # %bb.0:741; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma742; CHECK-NEXT: vmnot.m v9, v0743; CHECK-NEXT: vmv1r.v v0, v8744; CHECK-NEXT: vcpop.m a1, v9, v0.t745; CHECK-NEXT: seqz a1, a1746; CHECK-NEXT: and a0, a1, a0747; CHECK-NEXT: ret748 %r = call i1 @llvm.vp.reduce.mul.v2i1(i1 %s, <2 x i1> %v, <2 x i1> %m, i32 %evl)749 ret i1 %r750}751 752define zeroext i1 @vpreduce_mul_v4i1(i1 zeroext %s, <4 x i1> %v, <4 x i1> %m, i32 zeroext %evl) {753; CHECK-LABEL: vpreduce_mul_v4i1:754; CHECK: # %bb.0:755; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma756; CHECK-NEXT: vmnot.m v9, v0757; CHECK-NEXT: vmv1r.v v0, v8758; CHECK-NEXT: vcpop.m a1, v9, v0.t759; CHECK-NEXT: seqz a1, a1760; CHECK-NEXT: and a0, a1, a0761; CHECK-NEXT: ret762 %r = call i1 @llvm.vp.reduce.mul.v4i1(i1 %s, <4 x i1> %v, <4 x i1> %m, i32 %evl)763 ret i1 %r764}765 766define zeroext i1 @vpreduce_mul_v8i1(i1 zeroext %s, <8 x i1> %v, <8 x i1> %m, i32 zeroext %evl) {767; CHECK-LABEL: vpreduce_mul_v8i1:768; CHECK: # %bb.0:769; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma770; CHECK-NEXT: vmnot.m v9, v0771; CHECK-NEXT: vmv1r.v v0, v8772; CHECK-NEXT: vcpop.m a1, v9, v0.t773; CHECK-NEXT: seqz a1, a1774; CHECK-NEXT: and a0, a1, a0775; CHECK-NEXT: ret776 %r = call i1 @llvm.vp.reduce.mul.v8i1(i1 %s, <8 x i1> %v, <8 x i1> %m, i32 %evl)777 ret i1 %r778}779 780define zeroext i1 @vpreduce_mul_v16i1(i1 zeroext %s, <16 x i1> %v, <16 x i1> %m, i32 zeroext %evl) {781; CHECK-LABEL: vpreduce_mul_v16i1:782; CHECK: # %bb.0:783; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma784; CHECK-NEXT: vmnot.m v9, v0785; CHECK-NEXT: vmv1r.v v0, v8786; CHECK-NEXT: vcpop.m a1, v9, v0.t787; CHECK-NEXT: seqz a1, a1788; CHECK-NEXT: and a0, a1, a0789; CHECK-NEXT: ret790 %r = call i1 @llvm.vp.reduce.mul.v16i1(i1 %s, <16 x i1> %v, <16 x i1> %m, i32 %evl)791 ret i1 %r792}793 794define zeroext i1 @vpreduce_mul_v32i1(i1 zeroext %s, <32 x i1> %v, <32 x i1> %m, i32 zeroext %evl) {795; CHECK-LABEL: vpreduce_mul_v32i1:796; CHECK: # %bb.0:797; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma798; CHECK-NEXT: vmnot.m v9, v0799; CHECK-NEXT: vmv1r.v v0, v8800; CHECK-NEXT: vcpop.m a1, v9, v0.t801; CHECK-NEXT: seqz a1, a1802; CHECK-NEXT: and a0, a1, a0803; CHECK-NEXT: ret804 %r = call i1 @llvm.vp.reduce.mul.v32i1(i1 %s, <32 x i1> %v, <32 x i1> %m, i32 %evl)805 ret i1 %r806}807 808define zeroext i1 @vpreduce_mul_v64i1(i1 zeroext %s, <64 x i1> %v, <64 x i1> %m, i32 zeroext %evl) {809; CHECK-LABEL: vpreduce_mul_v64i1:810; CHECK: # %bb.0:811; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma812; CHECK-NEXT: vmnot.m v9, v0813; CHECK-NEXT: vmv1r.v v0, v8814; CHECK-NEXT: vcpop.m a1, v9, v0.t815; CHECK-NEXT: seqz a1, a1816; CHECK-NEXT: and a0, a1, a0817; CHECK-NEXT: ret818 %r = call i1 @llvm.vp.reduce.mul.v64i1(i1 %s, <64 x i1> %v, <64 x i1> %m, i32 %evl)819 ret i1 %r820}821