74 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=riscv32 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK3; RUN: llc -mtriple=riscv64 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK4 5define <8 x i8> @v8i8_from_v16xi8_low(<16 x i8> %a) nounwind {6; CHECK-LABEL: v8i8_from_v16xi8_low:7; CHECK: # %bb.0:8; CHECK-NEXT: ret9 %ret = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10 ret <8 x i8> %ret11}12 13define <8 x i8> @v8i8_from_v16xi8_high(<16 x i8> %a) nounwind {14; CHECK-LABEL: v8i8_from_v16xi8_high:15; CHECK: # %bb.0:16; CHECK-NEXT: vsetivli zero, 8, e8, m1, ta, ma17; CHECK-NEXT: vslidedown.vi v8, v8, 818; CHECK-NEXT: ret19 %ret = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>20 ret <8 x i8> %ret21}22 23define <8 x i8> @v8i8_from_v16xi8_mid(<16 x i8> %a) nounwind {24; CHECK-LABEL: v8i8_from_v16xi8_mid:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma27; CHECK-NEXT: vslidedown.vi v8, v8, 528; CHECK-NEXT: ret29 %ret = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12>30 ret <8 x i8> %ret31}32 33define <4 x i8> @v4i8_from_v16xi8_high(<16 x i8> %a) nounwind {34; CHECK-LABEL: v4i8_from_v16xi8_high:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetivli zero, 4, e8, m1, ta, ma37; CHECK-NEXT: vslidedown.vi v8, v8, 838; CHECK-NEXT: ret39 %ret = shufflevector <16 x i8> %a, <16 x i8> poison, <4 x i32> <i32 8, i32 9, i32 10, i32 11>40 ret <4 x i8> %ret41}42 43define <4 x i16> @v4i16_from_v8i16_high(<8 x i16> %a) nounwind {44; CHECK-LABEL: v4i16_from_v8i16_high:45; CHECK: # %bb.0:46; CHECK-NEXT: vsetivli zero, 4, e16, m1, ta, ma47; CHECK-NEXT: vslidedown.vi v8, v8, 448; CHECK-NEXT: ret49 %ret = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>50 ret <4 x i16> %ret51}52 53 54define <8 x i32> @v8i32_from_v16xi32_high(<16 x i32> %a) nounwind {55; CHECK-LABEL: v8i32_from_v16xi32_high:56; CHECK: # %bb.0:57; CHECK-NEXT: vsetivli zero, 8, e32, m4, ta, ma58; CHECK-NEXT: vslidedown.vi v8, v8, 859; CHECK-NEXT: ret60 %ret = shufflevector <16 x i32> %a, <16 x i32> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>61 ret <8 x i32> %ret62}63 64 65define <8 x i64> @v8i64_from_v16xi64_high(<16 x i64> %a) nounwind {66; CHECK-LABEL: v8i64_from_v16xi64_high:67; CHECK: # %bb.0:68; CHECK-NEXT: vsetivli zero, 8, e64, m8, ta, ma69; CHECK-NEXT: vslidedown.vi v8, v8, 870; CHECK-NEXT: ret71 %ret = shufflevector <16 x i64> %a, <16 x i64> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>72 ret <8 x i64> %ret73}74