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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+m,+zvl128b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,V128,RV32-V1283; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+m,+zvl128b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,V128,RV64-V1284; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+m,+zvl512b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,V512,RV32-V5125; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+m,+zvl512b -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,V512,RV64-V5126 7; Test optimizing interleaves to widening arithmetic.8 9define <4 x half> @interleave_v2f16(<2 x half> %x, <2 x half> %y) {10; CHECK-LABEL: interleave_v2f16:11; CHECK: # %bb.0:12; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma13; CHECK-NEXT: vwaddu.vv v10, v8, v914; CHECK-NEXT: li a0, -115; CHECK-NEXT: vwmaccu.vx v10, a0, v916; CHECK-NEXT: vmv1r.v v8, v1017; CHECK-NEXT: ret18 %a = shufflevector <2 x half> %x, <2 x half> %y, <4 x i32> <i32 0, i32 2, i32 1, i32 3>19 ret <4 x half> %a20}21 22; Vector order switched for coverage.23define <4 x float> @interleave_v2f32(<2 x float> %x, <2 x float> %y) {24; CHECK-LABEL: interleave_v2f32:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma27; CHECK-NEXT: vwaddu.vv v10, v9, v828; CHECK-NEXT: li a0, -129; CHECK-NEXT: vwmaccu.vx v10, a0, v830; CHECK-NEXT: vmv1r.v v8, v1031; CHECK-NEXT: ret32 %a = shufflevector <2 x float> %x, <2 x float> %y, <4 x i32> <i32 2, i32 0, i32 3, i32 1>33 ret <4 x float> %a34}35 36; One vXf64 test case to very that we don't optimize it.37; FIXME: Is there better codegen we can do here?38define <4 x double> @interleave_v2f64(<2 x double> %x, <2 x double> %y) {39; V128-LABEL: interleave_v2f64:40; V128: # %bb.0:41; V128-NEXT: vsetivli zero, 1, e8, m1, ta, ma42; V128-NEXT: vmv1r.v v10, v943; V128-NEXT: vmv.v.i v0, 1044; V128-NEXT: vsetivli zero, 4, e64, m2, ta, ma45; V128-NEXT: vslideup.vi v12, v10, 146; V128-NEXT: vslideup.vi v12, v10, 247; V128-NEXT: vmv2r.v v10, v848; V128-NEXT: vslideup.vi v10, v8, 149; V128-NEXT: vmerge.vvm v8, v10, v12, v050; V128-NEXT: ret51;52; V512-LABEL: interleave_v2f64:53; V512: # %bb.0:54; V512-NEXT: vsetivli zero, 4, e64, m1, ta, ma55; V512-NEXT: vslideup.vi v10, v9, 156; V512-NEXT: vmv1r.v v11, v857; V512-NEXT: vslideup.vi v10, v9, 258; V512-NEXT: vmv.v.i v0, 1059; V512-NEXT: vslideup.vi v11, v8, 160; V512-NEXT: vmerge.vvm v8, v11, v10, v061; V512-NEXT: ret62 %a = shufflevector <2 x double> %x, <2 x double> %y, <4 x i32> <i32 0, i32 2, i32 1, i32 3>63 ret <4 x double> %a64}65 66; Undef elements for coverage67define <8 x half> @interleave_v4f16(<4 x half> %x, <4 x half> %y) {68; V128-LABEL: interleave_v4f16:69; V128: # %bb.0:70; V128-NEXT: vsetivli zero, 4, e16, mf2, ta, ma71; V128-NEXT: vwaddu.vv v10, v8, v972; V128-NEXT: li a0, -173; V128-NEXT: vwmaccu.vx v10, a0, v974; V128-NEXT: vmv1r.v v8, v1075; V128-NEXT: ret76;77; V512-LABEL: interleave_v4f16:78; V512: # %bb.0:79; V512-NEXT: vsetivli zero, 4, e16, mf4, ta, ma80; V512-NEXT: vwaddu.vv v10, v8, v981; V512-NEXT: li a0, -182; V512-NEXT: vwmaccu.vx v10, a0, v983; V512-NEXT: vmv1r.v v8, v1084; V512-NEXT: ret85 %a = shufflevector <4 x half> %x, <4 x half> %y, <8 x i32> <i32 0, i32 4, i32 poison, i32 5, i32 2, i32 poison, i32 3, i32 7>86 ret <8 x half> %a87}88 89define <8 x float> @interleave_v4f32(<4 x float> %x, <4 x float> %y) {90; V128-LABEL: interleave_v4f32:91; V128: # %bb.0:92; V128-NEXT: vsetivli zero, 4, e32, m1, ta, ma93; V128-NEXT: vmv1r.v v10, v994; V128-NEXT: vmv1r.v v11, v895; V128-NEXT: vwaddu.vv v8, v11, v1096; V128-NEXT: li a0, -197; V128-NEXT: vwmaccu.vx v8, a0, v1098; V128-NEXT: ret99;100; V512-LABEL: interleave_v4f32:101; V512: # %bb.0:102; V512-NEXT: vsetivli zero, 4, e32, mf2, ta, ma103; V512-NEXT: vwaddu.vv v10, v8, v9104; V512-NEXT: li a0, -1105; V512-NEXT: vwmaccu.vx v10, a0, v9106; V512-NEXT: vmv1r.v v8, v10107; V512-NEXT: ret108 %a = shufflevector <4 x float> %x, <4 x float> %y, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>109 ret <8 x float> %a110}111 112; Vector order switched for coverage.113define <16 x half> @interleave_v8f16(<8 x half> %x, <8 x half> %y) {114; V128-LABEL: interleave_v8f16:115; V128: # %bb.0:116; V128-NEXT: vsetivli zero, 8, e16, m1, ta, ma117; V128-NEXT: vmv1r.v v10, v9118; V128-NEXT: vmv1r.v v11, v8119; V128-NEXT: vwaddu.vv v8, v10, v11120; V128-NEXT: li a0, -1121; V128-NEXT: vwmaccu.vx v8, a0, v11122; V128-NEXT: ret123;124; V512-LABEL: interleave_v8f16:125; V512: # %bb.0:126; V512-NEXT: vsetivli zero, 8, e16, mf4, ta, ma127; V512-NEXT: vwaddu.vv v10, v9, v8128; V512-NEXT: li a0, -1129; V512-NEXT: vwmaccu.vx v10, a0, v8130; V512-NEXT: vmv1r.v v8, v10131; V512-NEXT: ret132 %a = shufflevector <8 x half> %x, <8 x half> %y, <16 x i32> <i32 8, i32 0, i32 9, i32 1, i32 10, i32 2, i32 11, i32 3, i32 12, i32 4, i32 13, i32 5, i32 14, i32 6, i32 15, i32 7>133 ret <16 x half> %a134}135 136define <16 x float> @interleave_v8f32(<8 x float> %x, <8 x float> %y) {137; V128-LABEL: interleave_v8f32:138; V128: # %bb.0:139; V128-NEXT: vsetivli zero, 8, e32, m2, ta, ma140; V128-NEXT: vmv2r.v v12, v10141; V128-NEXT: vmv2r.v v14, v8142; V128-NEXT: vwaddu.vv v8, v14, v12143; V128-NEXT: li a0, -1144; V128-NEXT: vwmaccu.vx v8, a0, v12145; V128-NEXT: ret146;147; V512-LABEL: interleave_v8f32:148; V512: # %bb.0:149; V512-NEXT: vsetivli zero, 8, e32, mf2, ta, ma150; V512-NEXT: vwaddu.vv v10, v8, v9151; V512-NEXT: li a0, -1152; V512-NEXT: vwmaccu.vx v10, a0, v9153; V512-NEXT: vmv1r.v v8, v10154; V512-NEXT: ret155 %a = shufflevector <8 x float> %x, <8 x float> %y, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>156 ret <16 x float> %a157}158 159define <32 x half> @interleave_v16f16(<16 x half> %x, <16 x half> %y) {160; V128-LABEL: interleave_v16f16:161; V128: # %bb.0:162; V128-NEXT: vsetivli zero, 16, e16, m2, ta, ma163; V128-NEXT: vmv2r.v v12, v10164; V128-NEXT: vmv2r.v v14, v8165; V128-NEXT: vwaddu.vv v8, v14, v12166; V128-NEXT: li a0, -1167; V128-NEXT: vwmaccu.vx v8, a0, v12168; V128-NEXT: ret169;170; V512-LABEL: interleave_v16f16:171; V512: # %bb.0:172; V512-NEXT: vsetivli zero, 16, e16, mf2, ta, ma173; V512-NEXT: vwaddu.vv v10, v8, v9174; V512-NEXT: li a0, -1175; V512-NEXT: vwmaccu.vx v10, a0, v9176; V512-NEXT: vmv1r.v v8, v10177; V512-NEXT: ret178 %a = shufflevector <16 x half> %x, <16 x half> %y, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>179 ret <32 x half> %a180}181 182define <32 x float> @interleave_v16f32(<16 x float> %x, <16 x float> %y) {183; V128-LABEL: interleave_v16f32:184; V128: # %bb.0:185; V128-NEXT: vsetivli zero, 16, e32, m4, ta, ma186; V128-NEXT: vmv4r.v v16, v12187; V128-NEXT: vmv4r.v v20, v8188; V128-NEXT: vwaddu.vv v8, v20, v16189; V128-NEXT: li a0, -1190; V128-NEXT: vwmaccu.vx v8, a0, v16191; V128-NEXT: ret192;193; V512-LABEL: interleave_v16f32:194; V512: # %bb.0:195; V512-NEXT: vsetivli zero, 16, e32, m1, ta, ma196; V512-NEXT: vmv1r.v v10, v9197; V512-NEXT: vmv1r.v v11, v8198; V512-NEXT: vwaddu.vv v8, v11, v10199; V512-NEXT: li a0, -1200; V512-NEXT: vwmaccu.vx v8, a0, v10201; V512-NEXT: ret202 %a = shufflevector <16 x float> %x, <16 x float> %y, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>203 ret <32 x float> %a204}205 206define <64 x half> @interleave_v32f16(<32 x half> %x, <32 x half> %y) {207; V128-LABEL: interleave_v32f16:208; V128: # %bb.0:209; V128-NEXT: vsetivli zero, 1, e8, m1, ta, ma210; V128-NEXT: vmv4r.v v16, v12211; V128-NEXT: vmv4r.v v20, v8212; V128-NEXT: li a0, 32213; V128-NEXT: vsetvli zero, a0, e16, m4, ta, ma214; V128-NEXT: vwaddu.vv v8, v20, v16215; V128-NEXT: li a0, -1216; V128-NEXT: vwmaccu.vx v8, a0, v16217; V128-NEXT: ret218;219; V512-LABEL: interleave_v32f16:220; V512: # %bb.0:221; V512-NEXT: vsetivli zero, 1, e8, m1, ta, ma222; V512-NEXT: vmv1r.v v10, v9223; V512-NEXT: vmv1r.v v11, v8224; V512-NEXT: li a0, 32225; V512-NEXT: vsetvli zero, a0, e16, m1, ta, ma226; V512-NEXT: vwaddu.vv v8, v11, v10227; V512-NEXT: li a0, -1228; V512-NEXT: vwmaccu.vx v8, a0, v10229; V512-NEXT: ret230 %a = shufflevector <32 x half> %x, <32 x half> %y, <64 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>231 ret <64 x half> %a232}233 234define <64 x float> @interleave_v32f32(<32 x float> %x, <32 x float> %y) {235; V128-LABEL: interleave_v32f32:236; V128: # %bb.0:237; V128-NEXT: addi sp, sp, -16238; V128-NEXT: .cfi_def_cfa_offset 16239; V128-NEXT: csrr a0, vlenb240; V128-NEXT: slli a0, a0, 3241; V128-NEXT: sub sp, sp, a0242; V128-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb243; V128-NEXT: addi a0, sp, 16244; V128-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill245; V128-NEXT: vsetivli zero, 16, e32, m8, ta, ma246; V128-NEXT: vslidedown.vi v24, v16, 16247; V128-NEXT: li a0, 32248; V128-NEXT: lui a1, 699051249; V128-NEXT: vslidedown.vi v0, v8, 16250; V128-NEXT: vsetivli zero, 16, e64, m8, ta, ma251; V128-NEXT: vzext.vf2 v8, v24252; V128-NEXT: addi a1, a1, -1366253; V128-NEXT: vzext.vf2 v24, v0254; V128-NEXT: vmv.s.x v0, a1255; V128-NEXT: vsll.vx v8, v8, a0256; V128-NEXT: vsetvli zero, a0, e32, m8, ta, ma257; V128-NEXT: vmerge.vvm v24, v24, v8, v0258; V128-NEXT: addi a0, sp, 16259; V128-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload260; V128-NEXT: vsetivli zero, 16, e32, m4, ta, ma261; V128-NEXT: vwaddu.vv v0, v8, v16262; V128-NEXT: li a0, -1263; V128-NEXT: vwmaccu.vx v0, a0, v16264; V128-NEXT: vmv8r.v v8, v0265; V128-NEXT: vmv8r.v v16, v24266; V128-NEXT: csrr a0, vlenb267; V128-NEXT: slli a0, a0, 3268; V128-NEXT: add sp, sp, a0269; V128-NEXT: .cfi_def_cfa sp, 16270; V128-NEXT: addi sp, sp, 16271; V128-NEXT: .cfi_def_cfa_offset 0272; V128-NEXT: ret273;274; V512-LABEL: interleave_v32f32:275; V512: # %bb.0:276; V512-NEXT: vsetivli zero, 1, e8, m1, ta, ma277; V512-NEXT: vmv2r.v v12, v10278; V512-NEXT: vmv2r.v v14, v8279; V512-NEXT: li a0, 32280; V512-NEXT: vsetvli zero, a0, e32, m2, ta, ma281; V512-NEXT: vwaddu.vv v8, v14, v12282; V512-NEXT: li a0, -1283; V512-NEXT: vwmaccu.vx v8, a0, v12284; V512-NEXT: ret285 %a = shufflevector <32 x float> %x, <32 x float> %y, <64 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>286 ret <64 x float> %a287}288 289define <4 x half> @unary_interleave_v4f16(<4 x half> %x) {290; V128-LABEL: unary_interleave_v4f16:291; V128: # %bb.0:292; V128-NEXT: vsetivli zero, 2, e16, mf2, ta, ma293; V128-NEXT: vslidedown.vi v10, v8, 2294; V128-NEXT: vsetivli zero, 2, e16, mf4, ta, ma295; V128-NEXT: vwaddu.vv v9, v8, v10296; V128-NEXT: li a0, -1297; V128-NEXT: vwmaccu.vx v9, a0, v10298; V128-NEXT: vmv1r.v v8, v9299; V128-NEXT: ret300;301; V512-LABEL: unary_interleave_v4f16:302; V512: # %bb.0:303; V512-NEXT: vsetivli zero, 2, e16, mf4, ta, ma304; V512-NEXT: vslidedown.vi v10, v8, 2305; V512-NEXT: vwaddu.vv v9, v8, v10306; V512-NEXT: li a0, -1307; V512-NEXT: vwmaccu.vx v9, a0, v10308; V512-NEXT: vmv1r.v v8, v9309; V512-NEXT: ret310 %a = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>311 ret <4 x half> %a312}313 314define <4 x float> @unary_interleave_v4f32(<4 x float> %x) {315; V128-LABEL: unary_interleave_v4f32:316; V128: # %bb.0:317; V128-NEXT: vsetivli zero, 2, e32, m1, ta, ma318; V128-NEXT: vslidedown.vi v10, v8, 2319; V128-NEXT: vsetivli zero, 2, e32, mf2, ta, ma320; V128-NEXT: vwaddu.vv v9, v8, v10321; V128-NEXT: li a0, -1322; V128-NEXT: vwmaccu.vx v9, a0, v10323; V128-NEXT: vmv1r.v v8, v9324; V128-NEXT: ret325;326; V512-LABEL: unary_interleave_v4f32:327; V512: # %bb.0:328; V512-NEXT: vsetivli zero, 2, e32, mf2, ta, ma329; V512-NEXT: vslidedown.vi v10, v8, 2330; V512-NEXT: vwaddu.vv v9, v8, v10331; V512-NEXT: li a0, -1332; V512-NEXT: vwmaccu.vx v9, a0, v10333; V512-NEXT: vmv1r.v v8, v9334; V512-NEXT: ret335 %a = shufflevector <4 x float> %x, <4 x float> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>336 ret <4 x float> %a337}338 339; FIXME: Is there better codegen we can do here?340define <4 x double> @unary_interleave_v4f64(<4 x double> %x) {341; V128-LABEL: unary_interleave_v4f64:342; V128: # %bb.0:343; V128-NEXT: lui a0, 12304344; V128-NEXT: addi a0, a0, 512345; V128-NEXT: vsetivli zero, 4, e32, m1, ta, ma346; V128-NEXT: vmv.s.x v10, a0347; V128-NEXT: vsetvli zero, zero, e16, mf2, ta, ma348; V128-NEXT: vsext.vf2 v12, v10349; V128-NEXT: vsetvli zero, zero, e64, m2, ta, ma350; V128-NEXT: vrgatherei16.vv v10, v8, v12351; V128-NEXT: vmv.v.v v8, v10352; V128-NEXT: ret353;354; RV32-V512-LABEL: unary_interleave_v4f64:355; RV32-V512: # %bb.0:356; RV32-V512-NEXT: lui a0, 12304357; RV32-V512-NEXT: addi a0, a0, 512358; RV32-V512-NEXT: vsetivli zero, 4, e32, m1, ta, ma359; RV32-V512-NEXT: vmv.s.x v9, a0360; RV32-V512-NEXT: vsetivli zero, 4, e16, mf4, ta, ma361; RV32-V512-NEXT: vsext.vf2 v10, v9362; RV32-V512-NEXT: vsetvli zero, zero, e64, m1, ta, ma363; RV32-V512-NEXT: vrgatherei16.vv v9, v8, v10364; RV32-V512-NEXT: vmv.v.v v8, v9365; RV32-V512-NEXT: ret366;367; RV64-V512-LABEL: unary_interleave_v4f64:368; RV64-V512: # %bb.0:369; RV64-V512-NEXT: lui a0, 12304370; RV64-V512-NEXT: addi a0, a0, 512371; RV64-V512-NEXT: vsetivli zero, 4, e64, m1, ta, ma372; RV64-V512-NEXT: vmv.s.x v9, a0373; RV64-V512-NEXT: vsext.vf8 v10, v9374; RV64-V512-NEXT: vrgather.vv v9, v8, v10375; RV64-V512-NEXT: vmv.v.v v8, v9376; RV64-V512-NEXT: ret377 %a = shufflevector <4 x double> %x, <4 x double> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>378 ret <4 x double> %a379}380 381define <8 x half> @unary_interleave_v8f16(<8 x half> %x) {382; V128-LABEL: unary_interleave_v8f16:383; V128: # %bb.0:384; V128-NEXT: vsetivli zero, 4, e16, m1, ta, ma385; V128-NEXT: vslidedown.vi v10, v8, 4386; V128-NEXT: vsetivli zero, 4, e16, mf2, ta, ma387; V128-NEXT: vwaddu.vv v9, v8, v10388; V128-NEXT: li a0, -1389; V128-NEXT: vwmaccu.vx v9, a0, v10390; V128-NEXT: vmv1r.v v8, v9391; V128-NEXT: ret392;393; V512-LABEL: unary_interleave_v8f16:394; V512: # %bb.0:395; V512-NEXT: vsetivli zero, 4, e16, mf4, ta, ma396; V512-NEXT: vslidedown.vi v10, v8, 4397; V512-NEXT: vwaddu.vv v9, v8, v10398; V512-NEXT: li a0, -1399; V512-NEXT: vwmaccu.vx v9, a0, v10400; V512-NEXT: vmv1r.v v8, v9401; V512-NEXT: ret402 %a = shufflevector <8 x half> %x, <8 x half> poison, <8 x i32> <i32 0, i32 4, i32 poison, i32 5, i32 2, i32 poison, i32 3, i32 7>403 ret <8 x half> %a404}405 406define <8 x float> @unary_interleave_v8f32(<8 x float> %x) {407; V128-LABEL: unary_interleave_v8f32:408; V128: # %bb.0:409; V128-NEXT: vsetivli zero, 4, e32, m2, ta, ma410; V128-NEXT: vslidedown.vi v12, v8, 4411; V128-NEXT: vsetivli zero, 4, e32, m1, ta, ma412; V128-NEXT: vwaddu.vv v10, v12, v8413; V128-NEXT: li a0, -1414; V128-NEXT: vwmaccu.vx v10, a0, v8415; V128-NEXT: vmv2r.v v8, v10416; V128-NEXT: ret417;418; V512-LABEL: unary_interleave_v8f32:419; V512: # %bb.0:420; V512-NEXT: vsetivli zero, 4, e32, mf2, ta, ma421; V512-NEXT: vslidedown.vi v10, v8, 4422; V512-NEXT: vwaddu.vv v9, v10, v8423; V512-NEXT: li a0, -1424; V512-NEXT: vwmaccu.vx v9, a0, v8425; V512-NEXT: vmv1r.v v8, v9426; V512-NEXT: ret427 %a = shufflevector <8 x float> %x, <8 x float> poison, <8 x i32> <i32 4, i32 0, i32 poison, i32 1, i32 6, i32 poison, i32 7, i32 3>428 ret <8 x float> %a429}430;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:431; RV32-V128: {{.*}}432; RV64-V128: {{.*}}433