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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zvfbfmin,+v -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV32 %s3; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zvfbfmin,+v -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV64 %s4; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+zvfbfmin,+v -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV32 %s5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+zvfbfmin,+v -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV64 %s6 7define <4 x bfloat> @shuffle_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) {8; CHECK-LABEL: shuffle_v4bf16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma11; CHECK-NEXT: vmv.v.i v0, 1112; CHECK-NEXT: vmerge.vvm v8, v9, v8, v013; CHECK-NEXT: ret14 %s = shufflevector <4 x bfloat> %x, <4 x bfloat> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>15 ret <4 x bfloat> %s16}17 18define <4 x half> @shuffle_v4f16(<4 x half> %x, <4 x half> %y) {19; CHECK-LABEL: shuffle_v4f16:20; CHECK: # %bb.0:21; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma22; CHECK-NEXT: vmv.v.i v0, 1123; CHECK-NEXT: vmerge.vvm v8, v9, v8, v024; CHECK-NEXT: ret25 %s = shufflevector <4 x half> %x, <4 x half> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>26 ret <4 x half> %s27}28 29define <8 x float> @shuffle_v8f32(<8 x float> %x, <8 x float> %y) {30; CHECK-LABEL: shuffle_v8f32:31; CHECK: # %bb.0:32; CHECK-NEXT: li a0, -2033; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma34; CHECK-NEXT: vmv.s.x v0, a035; CHECK-NEXT: vmerge.vvm v8, v10, v8, v036; CHECK-NEXT: ret37 %s = shufflevector <8 x float> %x, <8 x float> %y, <8 x i32> <i32 8, i32 9, i32 2, i32 3, i32 12, i32 5, i32 6, i32 7>38 ret <8 x float> %s39}40 41define <4 x double> @shuffle_fv_v4f64(<4 x double> %x) {42; RV32-LABEL: shuffle_fv_v4f64:43; RV32: # %bb.0:44; RV32-NEXT: lui a0, %hi(.LCPI3_0)45; RV32-NEXT: fld fa5, %lo(.LCPI3_0)(a0)46; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma47; RV32-NEXT: vmv.v.i v0, 948; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma49; RV32-NEXT: vfmerge.vfm v8, v8, fa5, v050; RV32-NEXT: ret51;52; RV64-LABEL: shuffle_fv_v4f64:53; RV64: # %bb.0:54; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma55; RV64-NEXT: vmv.v.i v0, 956; RV64-NEXT: li a0, 157; RV64-NEXT: slli a0, a0, 6258; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma59; RV64-NEXT: vmerge.vxm v8, v8, a0, v060; RV64-NEXT: ret61 %s = shufflevector <4 x double> <double 2.0, double 2.0, double 2.0, double 2.0>, <4 x double> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 3>62 ret <4 x double> %s63}64 65define <4 x double> @shuffle_vf_v4f64(<4 x double> %x) {66; RV32-LABEL: shuffle_vf_v4f64:67; RV32: # %bb.0:68; RV32-NEXT: lui a0, %hi(.LCPI4_0)69; RV32-NEXT: fld fa5, %lo(.LCPI4_0)(a0)70; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma71; RV32-NEXT: vmv.v.i v0, 672; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma73; RV32-NEXT: vfmerge.vfm v8, v8, fa5, v074; RV32-NEXT: ret75;76; RV64-LABEL: shuffle_vf_v4f64:77; RV64: # %bb.0:78; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma79; RV64-NEXT: vmv.v.i v0, 680; RV64-NEXT: li a0, 181; RV64-NEXT: slli a0, a0, 6282; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma83; RV64-NEXT: vmerge.vxm v8, v8, a0, v084; RV64-NEXT: ret85 %s = shufflevector <4 x double> %x, <4 x double> <double 2.0, double 2.0, double 2.0, double 2.0>, <4 x i32> <i32 0, i32 5, i32 6, i32 3>86 ret <4 x double> %s87}88 89define <4 x float> @vfmerge_constant_v4f32(<4 x float> %x) {90; CHECK-LABEL: vfmerge_constant_v4f32:91; CHECK: # %bb.0:92; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma93; CHECK-NEXT: vmv.v.i v0, 694; CHECK-NEXT: lui a0, 26470495; CHECK-NEXT: vmerge.vxm v8, v8, a0, v096; CHECK-NEXT: ret97 %s = shufflevector <4 x float> %x, <4 x float> <float poison, float 5.0, float poison, float poison>, <4 x i32> <i32 0, i32 5, i32 5, i32 3>98 ret <4 x float> %s99}100 101define <4 x double> @vfmerge_constant_v4f64(<4 x double> %x) {102; RV32-LABEL: vfmerge_constant_v4f64:103; RV32: # %bb.0:104; RV32-NEXT: lui a0, %hi(.LCPI6_0)105; RV32-NEXT: fld fa5, %lo(.LCPI6_0)(a0)106; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma107; RV32-NEXT: vmv.v.i v0, 6108; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma109; RV32-NEXT: vfmerge.vfm v8, v8, fa5, v0110; RV32-NEXT: ret111;112; RV64-LABEL: vfmerge_constant_v4f64:113; RV64: # %bb.0:114; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma115; RV64-NEXT: vmv.v.i v0, 6116; RV64-NEXT: lui a0, 4101117; RV64-NEXT: slli a0, a0, 38118; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma119; RV64-NEXT: vmerge.vxm v8, v8, a0, v0120; RV64-NEXT: ret121 %s = shufflevector <4 x double> %x, <4 x double> <double poison, double 5.0, double poison, double poison>, <4 x i32> <i32 0, i32 5, i32 5, i32 3>122 ret <4 x double> %s123}124 125define <8 x float> @vmerge_vxm(<8 x float> %v, float %s) {126; CHECK-LABEL: vmerge_vxm:127; CHECK: # %bb.0:128; CHECK-NEXT: li a0, 25129; CHECK-NEXT: vsetivli zero, 1, e32, m4, tu, ma130; CHECK-NEXT: vmv.s.x v0, a0131; CHECK-NEXT: vfmv.s.f v8, fa0132; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma133; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0134; CHECK-NEXT: ret135 %ins = insertelement <8 x float> %v, float %s, i32 0136 %shuf = shufflevector <8 x float> %ins, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 0, i32 0, i32 5, i32 6, i32 7>137 ret <8 x float> %shuf138}139 140define <8 x float> @vmerge_vxm2(<8 x float> %v, float %s) {141; CHECK-LABEL: vmerge_vxm2:142; CHECK: # %bb.0:143; CHECK-NEXT: li a0, 25144; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma145; CHECK-NEXT: vmv.s.x v0, a0146; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0147; CHECK-NEXT: ret148 %ins = insertelement <8 x float> %v, float %s, i32 0149 %shuf = shufflevector <8 x float> %v, <8 x float> %ins, <8 x i32> <i32 8, i32 1, i32 2, i32 8, i32 8, i32 5, i32 6, i32 7>150 ret <8 x float> %shuf151}152 153define <4 x double> @vrgather_permute_shuffle_vu_v4f64(<4 x double> %x) {154; CHECK-LABEL: vrgather_permute_shuffle_vu_v4f64:155; CHECK: # %bb.0:156; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma157; CHECK-NEXT: vslidedown.vi v10, v8, 1158; CHECK-NEXT: vslideup.vi v10, v8, 2159; CHECK-NEXT: vmv.v.v v8, v10160; CHECK-NEXT: ret161 %s = shufflevector <4 x double> %x, <4 x double> poison, <4 x i32> <i32 1, i32 2, i32 0, i32 1>162 ret <4 x double> %s163}164 165define <4 x double> @vrgather_permute_shuffle_uv_v4f64(<4 x double> %x) {166; CHECK-LABEL: vrgather_permute_shuffle_uv_v4f64:167; CHECK: # %bb.0:168; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma169; CHECK-NEXT: vslidedown.vi v10, v8, 1170; CHECK-NEXT: vslideup.vi v10, v8, 2171; CHECK-NEXT: vmv.v.v v8, v10172; CHECK-NEXT: ret173 %s = shufflevector <4 x double> poison, <4 x double> %x, <4 x i32> <i32 5, i32 6, i32 4, i32 5>174 ret <4 x double> %s175}176 177define <4 x double> @vrgather_shuffle_vv_v4f64(<4 x double> %x, <4 x double> %y) {178; CHECK-LABEL: vrgather_shuffle_vv_v4f64:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma181; CHECK-NEXT: vslidedown.vi v12, v8, 1182; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma183; CHECK-NEXT: vmv.v.i v0, 8184; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, mu185; CHECK-NEXT: vslideup.vi v12, v8, 2186; CHECK-NEXT: vrgather.vi v12, v10, 1, v0.t187; CHECK-NEXT: vmv.v.v v8, v12188; CHECK-NEXT: ret189 %s = shufflevector <4 x double> %x, <4 x double> %y, <4 x i32> <i32 1, i32 2, i32 0, i32 5>190 ret <4 x double> %s191}192 193define <4 x double> @vrgather_shuffle_xv_v4f64(<4 x double> %x) {194; RV32-LABEL: vrgather_shuffle_xv_v4f64:195; RV32: # %bb.0:196; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma197; RV32-NEXT: vmv.v.i v0, 8198; RV32-NEXT: lui a0, %hi(.LCPI12_0)199; RV32-NEXT: fld fa5, %lo(.LCPI12_0)(a0)200; RV32-NEXT: vmv2r.v v10, v8201; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, mu202; RV32-NEXT: vslideup.vi v10, v8, 2, v0.t203; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma204; RV32-NEXT: vmv.v.i v0, 12205; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma206; RV32-NEXT: vfmv.v.f v8, fa5207; RV32-NEXT: vmerge.vvm v8, v8, v10, v0208; RV32-NEXT: ret209;210; RV64-LABEL: vrgather_shuffle_xv_v4f64:211; RV64: # %bb.0:212; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma213; RV64-NEXT: vmv.v.i v0, 8214; RV64-NEXT: vmv2r.v v10, v8215; RV64-NEXT: li a0, 1216; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, mu217; RV64-NEXT: vslideup.vi v10, v8, 2, v0.t218; RV64-NEXT: slli a0, a0, 62219; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma220; RV64-NEXT: vmv.v.i v0, 12221; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma222; RV64-NEXT: vmv.v.x v8, a0223; RV64-NEXT: vmerge.vvm v8, v8, v10, v0224; RV64-NEXT: ret225 %s = shufflevector <4 x double> <double 2.0, double 2.0, double 2.0, double 2.0>, <4 x double> %x, <4 x i32> <i32 0, i32 3, i32 6, i32 5>226 ret <4 x double> %s227}228 229define <4 x double> @vrgather_shuffle_vx_v4f64(<4 x double> %x) {230; RV32-LABEL: vrgather_shuffle_vx_v4f64:231; RV32: # %bb.0:232; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma233; RV32-NEXT: vmv.v.i v0, 2234; RV32-NEXT: lui a0, %hi(.LCPI13_0)235; RV32-NEXT: fld fa5, %lo(.LCPI13_0)(a0)236; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, mu237; RV32-NEXT: vslidedown.vi v8, v8, 2, v0.t238; RV32-NEXT: vsetivli zero, 1, e8, mf8, ta, ma239; RV32-NEXT: vmv.v.i v0, 3240; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma241; RV32-NEXT: vfmv.v.f v10, fa5242; RV32-NEXT: vmerge.vvm v8, v10, v8, v0243; RV32-NEXT: ret244;245; RV64-LABEL: vrgather_shuffle_vx_v4f64:246; RV64: # %bb.0:247; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma248; RV64-NEXT: vmv.v.i v0, 2249; RV64-NEXT: li a0, 1250; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, mu251; RV64-NEXT: vslidedown.vi v8, v8, 2, v0.t252; RV64-NEXT: slli a0, a0, 62253; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, ma254; RV64-NEXT: vmv.v.i v0, 3255; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma256; RV64-NEXT: vmv.v.x v10, a0257; RV64-NEXT: vmerge.vvm v8, v10, v8, v0258; RV64-NEXT: ret259 %s = shufflevector <4 x double> %x, <4 x double> <double 2.0, double 2.0, double 2.0, double 2.0>, <4 x i32> <i32 0, i32 3, i32 6, i32 5>260 ret <4 x double> %s261}262 263define <4 x bfloat> @shuffle_v8bf16_to_vslidedown_1(<8 x bfloat> %x) {264; CHECK-LABEL: shuffle_v8bf16_to_vslidedown_1:265; CHECK: # %bb.0: # %entry266; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma267; CHECK-NEXT: vslidedown.vi v8, v8, 1268; CHECK-NEXT: ret269entry:270 %s = shufflevector <8 x bfloat> %x, <8 x bfloat> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 4>271 ret <4 x bfloat> %s272}273 274define <4 x bfloat> @shuffle_v8bf16_to_vslidedown_3(<8 x bfloat> %x) {275; CHECK-LABEL: shuffle_v8bf16_to_vslidedown_3:276; CHECK: # %bb.0: # %entry277; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma278; CHECK-NEXT: vslidedown.vi v8, v8, 3279; CHECK-NEXT: ret280entry:281 %s = shufflevector <8 x bfloat> %x, <8 x bfloat> poison, <4 x i32> <i32 3, i32 4, i32 5, i32 6>282 ret <4 x bfloat> %s283}284 285define <4 x half> @shuffle_v8f16_to_vslidedown_1(<8 x half> %x) {286; CHECK-LABEL: shuffle_v8f16_to_vslidedown_1:287; CHECK: # %bb.0: # %entry288; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma289; CHECK-NEXT: vslidedown.vi v8, v8, 1290; CHECK-NEXT: ret291entry:292 %s = shufflevector <8 x half> %x, <8 x half> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 4>293 ret <4 x half> %s294}295 296define <4 x half> @shuffle_v8f16_to_vslidedown_3(<8 x half> %x) {297; CHECK-LABEL: shuffle_v8f16_to_vslidedown_3:298; CHECK: # %bb.0: # %entry299; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma300; CHECK-NEXT: vslidedown.vi v8, v8, 3301; CHECK-NEXT: ret302entry:303 %s = shufflevector <8 x half> %x, <8 x half> poison, <4 x i32> <i32 3, i32 4, i32 5, i32 6>304 ret <4 x half> %s305}306 307define <2 x float> @shuffle_v4f32_to_vslidedown(<4 x float> %x) {308; CHECK-LABEL: shuffle_v4f32_to_vslidedown:309; CHECK: # %bb.0: # %entry310; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma311; CHECK-NEXT: vslidedown.vi v8, v8, 1312; CHECK-NEXT: ret313entry:314 %s = shufflevector <4 x float> %x, <4 x float> poison, <2 x i32> <i32 1, i32 2>315 ret <2 x float> %s316}317 318define <4 x bfloat> @slidedown_v4bf16(<4 x bfloat> %x) {319; CHECK-LABEL: slidedown_v4bf16:320; CHECK: # %bb.0:321; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma322; CHECK-NEXT: vslidedown.vi v8, v8, 1323; CHECK-NEXT: ret324 %s = shufflevector <4 x bfloat> %x, <4 x bfloat> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 poison>325 ret <4 x bfloat> %s326}327 328define <4 x half> @slidedown_v4f16(<4 x half> %x) {329; CHECK-LABEL: slidedown_v4f16:330; CHECK: # %bb.0:331; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma332; CHECK-NEXT: vslidedown.vi v8, v8, 1333; CHECK-NEXT: ret334 %s = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 poison>335 ret <4 x half> %s336}337 338define <8 x float> @slidedown_v8f32(<8 x float> %x) {339; CHECK-LABEL: slidedown_v8f32:340; CHECK: # %bb.0:341; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma342; CHECK-NEXT: vslidedown.vi v8, v8, 3343; CHECK-NEXT: ret344 %s = shufflevector <8 x float> %x, <8 x float> poison, <8 x i32> <i32 3, i32 poison, i32 5, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>345 ret <8 x float> %s346}347 348define <4 x half> @slideup_v4f16(<4 x half> %x) {349; CHECK-LABEL: slideup_v4f16:350; CHECK: # %bb.0:351; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma352; CHECK-NEXT: vslideup.vi v9, v8, 1353; CHECK-NEXT: vmv1r.v v8, v9354; CHECK-NEXT: ret355 %s = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 poison, i32 0, i32 1, i32 2>356 ret <4 x half> %s357}358 359define <8 x float> @slideup_v8f32(<8 x float> %x) {360; CHECK-LABEL: slideup_v8f32:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma363; CHECK-NEXT: vslideup.vi v10, v8, 3364; CHECK-NEXT: vmv.v.v v8, v10365; CHECK-NEXT: ret366 %s = shufflevector <8 x float> %x, <8 x float> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 2, i32 3, i32 4>367 ret <8 x float> %s368}369 370define <8 x float> @splice_unary(<8 x float> %x) {371; CHECK-LABEL: splice_unary:372; CHECK: # %bb.0:373; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma374; CHECK-NEXT: vslidedown.vi v10, v8, 1375; CHECK-NEXT: vslideup.vi v10, v8, 7376; CHECK-NEXT: vmv.v.v v8, v10377; CHECK-NEXT: ret378 %s = shufflevector <8 x float> %x, <8 x float> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>379 ret <8 x float> %s380}381 382define <8 x double> @splice_unary2(<8 x double> %x) {383; CHECK-LABEL: splice_unary2:384; CHECK: # %bb.0:385; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma386; CHECK-NEXT: vslidedown.vi v12, v8, 6387; CHECK-NEXT: vslideup.vi v12, v8, 2388; CHECK-NEXT: vmv.v.v v8, v12389; CHECK-NEXT: ret390 %s = shufflevector <8 x double> %x, <8 x double> poison, <8 x i32> <i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>391 ret <8 x double> %s392}393 394define <8 x float> @splice_binary(<8 x float> %x, <8 x float> %y) {395; CHECK-LABEL: splice_binary:396; CHECK: # %bb.0:397; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma398; CHECK-NEXT: vslidedown.vi v8, v8, 2399; CHECK-NEXT: vslideup.vi v8, v10, 6400; CHECK-NEXT: ret401 %s = shufflevector <8 x float> %x, <8 x float> %y, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 9>402 ret <8 x float> %s403}404 405define <8 x double> @splice_binary2(<8 x double> %x, <8 x double> %y) {406; CHECK-LABEL: splice_binary2:407; CHECK: # %bb.0:408; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma409; CHECK-NEXT: vslidedown.vi v12, v12, 5410; CHECK-NEXT: vslideup.vi v12, v8, 3411; CHECK-NEXT: vmv.v.v v8, v12412; CHECK-NEXT: ret413 %s = shufflevector <8 x double> %x, <8 x double> %y, <8 x i32> <i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4>414 ret <8 x double> %s415}416 417define <4 x bfloat> @vrgather_permute_shuffle_vu_v4bf16(<4 x bfloat> %x) {418; CHECK-LABEL: vrgather_permute_shuffle_vu_v4bf16:419; CHECK: # %bb.0:420; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma421; CHECK-NEXT: vslidedown.vi v9, v8, 1422; CHECK-NEXT: vslideup.vi v9, v8, 2423; CHECK-NEXT: vmv1r.v v8, v9424; CHECK-NEXT: ret425 %s = shufflevector <4 x bfloat> %x, <4 x bfloat> poison, <4 x i32> <i32 1, i32 2, i32 0, i32 1>426 ret <4 x bfloat> %s427}428 429define <4 x bfloat> @vrgather_shuffle_vv_v4bf16(<4 x bfloat> %x, <4 x bfloat> %y) {430; CHECK-LABEL: vrgather_shuffle_vv_v4bf16:431; CHECK: # %bb.0:432; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu433; CHECK-NEXT: vslidedown.vi v10, v8, 1434; CHECK-NEXT: vmv.v.i v0, 8435; CHECK-NEXT: vslideup.vi v10, v8, 2436; CHECK-NEXT: vrgather.vi v10, v9, 1, v0.t437; CHECK-NEXT: vmv1r.v v8, v10438; CHECK-NEXT: ret439 %s = shufflevector <4 x bfloat> %x, <4 x bfloat> %y, <4 x i32> <i32 1, i32 2, i32 0, i32 5>440 ret <4 x bfloat> %s441}442 443define <4 x bfloat> @vrgather_shuffle_vx_v4bf16_load(ptr %p) {444; CHECK-LABEL: vrgather_shuffle_vx_v4bf16_load:445; CHECK: # %bb.0:446; CHECK-NEXT: lh a0, 2(a0)447; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma448; CHECK-NEXT: vmv.v.x v8, a0449; CHECK-NEXT: ret450 %v = load <4 x bfloat>, ptr %p451 %s = shufflevector <4 x bfloat> %v, <4 x bfloat> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>452 ret <4 x bfloat> %s453}454 455define <4 x half> @vrgather_permute_shuffle_vu_v4f16(<4 x half> %x) {456; CHECK-LABEL: vrgather_permute_shuffle_vu_v4f16:457; CHECK: # %bb.0:458; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma459; CHECK-NEXT: vslidedown.vi v9, v8, 1460; CHECK-NEXT: vslideup.vi v9, v8, 2461; CHECK-NEXT: vmv1r.v v8, v9462; CHECK-NEXT: ret463 %s = shufflevector <4 x half> %x, <4 x half> poison, <4 x i32> <i32 1, i32 2, i32 0, i32 1>464 ret <4 x half> %s465}466 467define <4 x half> @vrgather_shuffle_vv_v4f16(<4 x half> %x, <4 x half> %y) {468; CHECK-LABEL: vrgather_shuffle_vv_v4f16:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu471; CHECK-NEXT: vslidedown.vi v10, v8, 1472; CHECK-NEXT: vmv.v.i v0, 8473; CHECK-NEXT: vslideup.vi v10, v8, 2474; CHECK-NEXT: vrgather.vi v10, v9, 1, v0.t475; CHECK-NEXT: vmv1r.v v8, v10476; CHECK-NEXT: ret477 %s = shufflevector <4 x half> %x, <4 x half> %y, <4 x i32> <i32 1, i32 2, i32 0, i32 5>478 ret <4 x half> %s479}480 481define <4 x half> @vrgather_shuffle_vx_v4f16_load(ptr %p) {482; CHECK-LABEL: vrgather_shuffle_vx_v4f16_load:483; CHECK: # %bb.0:484; CHECK-NEXT: lh a0, 2(a0)485; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma486; CHECK-NEXT: vmv.v.x v8, a0487; CHECK-NEXT: ret488 %v = load <4 x half>, ptr %p489 %s = shufflevector <4 x half> %v, <4 x half> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>490 ret <4 x half> %s491}492 493define <16 x float> @shuffle_disjoint_lanes(<16 x float> %v, <16 x float> %w) {494; CHECK-LABEL: shuffle_disjoint_lanes:495; CHECK: # %bb.0:496; CHECK-NEXT: lui a0, %hi(.LCPI34_0)497; CHECK-NEXT: addi a0, a0, %lo(.LCPI34_0)498; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma499; CHECK-NEXT: vle8.v v18, (a0)500; CHECK-NEXT: lui a0, 11501; CHECK-NEXT: addi a0, a0, -1366502; CHECK-NEXT: vmv.s.x v0, a0503; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0504; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma505; CHECK-NEXT: vsext.vf2 v16, v18506; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma507; CHECK-NEXT: vrgatherei16.vv v8, v12, v16508; CHECK-NEXT: ret509 %out = shufflevector <16 x float> %v, <16 x float> %w, <16 x i32> <i32 11, i32 15, i32 7, i32 3, i32 26, i32 30, i32 22, i32 18, i32 9, i32 13, i32 5, i32 1, i32 24, i32 28, i32 20, i32 16>510 ret <16 x float> %out511}512 513define <16 x float> @shuffle_disjoint_lanes_one_identity(<16 x float> %v, <16 x float> %w) {514; CHECK-LABEL: shuffle_disjoint_lanes_one_identity:515; CHECK: # %bb.0:516; CHECK-NEXT: lui a0, %hi(.LCPI35_0)517; CHECK-NEXT: addi a0, a0, %lo(.LCPI35_0)518; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu519; CHECK-NEXT: vle16.v v16, (a0)520; CHECK-NEXT: li a0, -272521; CHECK-NEXT: vmv.s.x v0, a0522; CHECK-NEXT: vrgatherei16.vv v8, v12, v16, v0.t523; CHECK-NEXT: ret524 %out = shufflevector <16 x float> %v, <16 x float> %w, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 26, i32 30, i32 22, i32 20, i32 8, i32 31, i32 29, i32 28, i32 27, i32 23, i32 25, i32 22>525 ret <16 x float> %out526}527 528define <16 x float> @shuffle_disjoint_lanes_one_broadcast(<16 x float> %v, <16 x float> %w) {529; CHECK-LABEL: shuffle_disjoint_lanes_one_broadcast:530; CHECK: # %bb.0:531; CHECK-NEXT: lui a0, %hi(.LCPI36_0)532; CHECK-NEXT: addi a0, a0, %lo(.LCPI36_0)533; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu534; CHECK-NEXT: vle16.v v20, (a0)535; CHECK-NEXT: lui a0, 15536; CHECK-NEXT: addi a0, a0, 240537; CHECK-NEXT: vmv.s.x v0, a0538; CHECK-NEXT: vrgather.vi v16, v8, 7539; CHECK-NEXT: vrgatherei16.vv v16, v12, v20, v0.t540; CHECK-NEXT: vmv.v.v v8, v16541; CHECK-NEXT: ret542 %out = shufflevector <16 x float> %v, <16 x float> %w, <16 x i32> <i32 7, i32 7, i32 7, i32 7, i32 26, i32 30, i32 22, i32 18, i32 7, i32 7, i32 7, i32 7, i32 24, i32 28, i32 20, i32 16>543 ret <16 x float> %out544}545 546define <16 x float> @shuffle_disjoint_lanes_one_splat(float %v, <16 x float> %w) {547; CHECK-LABEL: shuffle_disjoint_lanes_one_splat:548; CHECK: # %bb.0:549; CHECK-NEXT: lui a0, %hi(.LCPI37_0)550; CHECK-NEXT: addi a0, a0, %lo(.LCPI37_0)551; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu552; CHECK-NEXT: vle16.v v16, (a0)553; CHECK-NEXT: lui a0, 15554; CHECK-NEXT: addi a0, a0, 240555; CHECK-NEXT: vmv.s.x v0, a0556; CHECK-NEXT: vfmv.v.f v12, fa0557; CHECK-NEXT: vrgatherei16.vv v12, v8, v16, v0.t558; CHECK-NEXT: vmv.v.v v8, v12559; CHECK-NEXT: ret560 %head = insertelement <16 x float> poison, float %v, i32 0561 %splat = shufflevector <16 x float> %head, <16 x float> poison, <16 x i32> zeroinitializer562 %out = shufflevector <16 x float> %splat, <16 x float> %w, <16 x i32> <i32 11, i32 15, i32 7, i32 3, i32 26, i32 30, i32 22, i32 18, i32 9, i32 13, i32 5, i32 1, i32 24, i32 28, i32 20, i32 16>563 ret <16 x float> %out564}565