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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644 5define <4 x i16> @shuffle_v4i16(<4 x i16> %x, <4 x i16> %y) {6; CHECK-LABEL: shuffle_v4i16:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma9; CHECK-NEXT: vmv.v.i v0, 1110; CHECK-NEXT: vmerge.vvm v8, v9, v8, v011; CHECK-NEXT: ret12 %s = shufflevector <4 x i16> %x, <4 x i16> %y, <4 x i32> <i32 0, i32 1, i32 6, i32 3>13 ret <4 x i16> %s14}15 16define <8 x i32> @shuffle_v8i32(<8 x i32> %x, <8 x i32> %y) {17; CHECK-LABEL: shuffle_v8i32:18; CHECK: # %bb.0:19; CHECK-NEXT: li a0, 20320; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma21; CHECK-NEXT: vmv.s.x v0, a022; CHECK-NEXT: vmerge.vvm v8, v10, v8, v023; CHECK-NEXT: ret24 %s = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 13, i32 6, i32 7>25 ret <8 x i32> %s26}27 28define <4 x i16> @shuffle_xv_v4i16(<4 x i16> %x) {29; CHECK-LABEL: shuffle_xv_v4i16:30; CHECK: # %bb.0:31; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma32; CHECK-NEXT: vmv.v.i v0, 933; CHECK-NEXT: vmerge.vim v8, v8, 5, v034; CHECK-NEXT: ret35 %s = shufflevector <4 x i16> <i16 5, i16 5, i16 5, i16 5>, <4 x i16> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 3>36 ret <4 x i16> %s37}38 39define <4 x i16> @shuffle_vx_v4i16(<4 x i16> %x) {40; CHECK-LABEL: shuffle_vx_v4i16:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma43; CHECK-NEXT: vmv.v.i v0, 644; CHECK-NEXT: vmerge.vim v8, v8, 5, v045; CHECK-NEXT: ret46 %s = shufflevector <4 x i16> %x, <4 x i16> <i16 5, i16 5, i16 5, i16 5>, <4 x i32> <i32 0, i32 5, i32 6, i32 3>47 ret <4 x i16> %s48}49 50define <4 x i16> @vrgather_permute_shuffle_vu_v4i16(<4 x i16> %x) {51; CHECK-LABEL: vrgather_permute_shuffle_vu_v4i16:52; CHECK: # %bb.0:53; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma54; CHECK-NEXT: vslidedown.vi v9, v8, 155; CHECK-NEXT: vslideup.vi v9, v8, 256; CHECK-NEXT: vmv1r.v v8, v957; CHECK-NEXT: ret58 %s = shufflevector <4 x i16> %x, <4 x i16> poison, <4 x i32> <i32 1, i32 2, i32 0, i32 1>59 ret <4 x i16> %s60}61 62define <4 x i16> @vrgather_permute_shuffle_uv_v4i16(<4 x i16> %x) {63; CHECK-LABEL: vrgather_permute_shuffle_uv_v4i16:64; CHECK: # %bb.0:65; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma66; CHECK-NEXT: vslidedown.vi v9, v8, 167; CHECK-NEXT: vslideup.vi v9, v8, 268; CHECK-NEXT: vmv1r.v v8, v969; CHECK-NEXT: ret70 %s = shufflevector <4 x i16> poison, <4 x i16> %x, <4 x i32> <i32 5, i32 6, i32 4, i32 5>71 ret <4 x i16> %s72}73 74define <4 x i16> @vrgather_shuffle_vv_v4i16(<4 x i16> %x, <4 x i16> %y) {75; CHECK-LABEL: vrgather_shuffle_vv_v4i16:76; CHECK: # %bb.0:77; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu78; CHECK-NEXT: vslidedown.vi v10, v8, 179; CHECK-NEXT: vmv.v.i v0, 880; CHECK-NEXT: vslideup.vi v10, v8, 281; CHECK-NEXT: vrgather.vi v10, v9, 1, v0.t82; CHECK-NEXT: vmv1r.v v8, v1083; CHECK-NEXT: ret84 %s = shufflevector <4 x i16> %x, <4 x i16> %y, <4 x i32> <i32 1, i32 2, i32 0, i32 5>85 ret <4 x i16> %s86}87 88define <4 x i16> @vrgather_shuffle_xv_v4i16(<4 x i16> %x) {89; CHECK-LABEL: vrgather_shuffle_xv_v4i16:90; CHECK: # %bb.0:91; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu92; CHECK-NEXT: vmv.v.i v0, 893; CHECK-NEXT: vmv1r.v v9, v894; CHECK-NEXT: vslideup.vi v9, v8, 2, v0.t95; CHECK-NEXT: vmv.v.i v0, 1296; CHECK-NEXT: vmv.v.i v8, 597; CHECK-NEXT: vmerge.vvm v8, v8, v9, v098; CHECK-NEXT: ret99 %s = shufflevector <4 x i16> <i16 5, i16 5, i16 5, i16 5>, <4 x i16> %x, <4 x i32> <i32 0, i32 3, i32 6, i32 5>100 ret <4 x i16> %s101}102 103define <4 x i16> @vrgather_shuffle_vx_v4i16(<4 x i16> %x) {104; CHECK-LABEL: vrgather_shuffle_vx_v4i16:105; CHECK: # %bb.0:106; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu107; CHECK-NEXT: vmv.v.i v0, 2108; CHECK-NEXT: vslidedown.vi v8, v8, 2, v0.t109; CHECK-NEXT: vmv.v.i v0, 3110; CHECK-NEXT: vmv.v.i v9, 5111; CHECK-NEXT: vmerge.vvm v8, v9, v8, v0112; CHECK-NEXT: ret113 %s = shufflevector <4 x i16> %x, <4 x i16> <i16 5, i16 5, i16 5, i16 5>, <4 x i32> <i32 0, i32 3, i32 6, i32 5>114 ret <4 x i16> %s115}116 117define <8 x i64> @vrgather_permute_shuffle_vu_v8i64(<8 x i64> %x) {118; CHECK-LABEL: vrgather_permute_shuffle_vu_v8i64:119; CHECK: # %bb.0:120; CHECK-NEXT: lui a0, %hi(.LCPI9_0)121; CHECK-NEXT: addi a0, a0, %lo(.LCPI9_0)122; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma123; CHECK-NEXT: vle16.v v16, (a0)124; CHECK-NEXT: vrgatherei16.vv v12, v8, v16125; CHECK-NEXT: vmv.v.v v8, v12126; CHECK-NEXT: ret127 %s = shufflevector <8 x i64> %x, <8 x i64> poison, <8 x i32> <i32 1, i32 2, i32 0, i32 1, i32 7, i32 6, i32 0, i32 1>128 ret <8 x i64> %s129}130 131define <8 x i64> @vrgather_permute_shuffle_uv_v8i64(<8 x i64> %x) {132; CHECK-LABEL: vrgather_permute_shuffle_uv_v8i64:133; CHECK: # %bb.0:134; CHECK-NEXT: lui a0, %hi(.LCPI10_0)135; CHECK-NEXT: addi a0, a0, %lo(.LCPI10_0)136; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma137; CHECK-NEXT: vle16.v v16, (a0)138; CHECK-NEXT: vrgatherei16.vv v12, v8, v16139; CHECK-NEXT: vmv.v.v v8, v12140; CHECK-NEXT: ret141 %s = shufflevector <8 x i64> poison, <8 x i64> %x, <8 x i32> <i32 9, i32 10, i32 8, i32 9, i32 15, i32 8, i32 8, i32 11>142 ret <8 x i64> %s143}144 145define <8 x i64> @vrgather_shuffle_vv_v8i64(<8 x i64> %x, <8 x i64> %y) {146; RV32-LABEL: vrgather_shuffle_vv_v8i64:147; RV32: # %bb.0:148; RV32-NEXT: lui a0, %hi(.LCPI11_0)149; RV32-NEXT: addi a0, a0, %lo(.LCPI11_0)150; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma151; RV32-NEXT: vle16.v v20, (a0)152; RV32-NEXT: vmv.v.i v21, 2153; RV32-NEXT: li a0, 164154; RV32-NEXT: vsetvli zero, zero, e64, m4, ta, ma155; RV32-NEXT: vrgatherei16.vv v16, v8, v20156; RV32-NEXT: vmv.s.x v0, a0157; RV32-NEXT: li a0, 5158; RV32-NEXT: vsetvli zero, zero, e16, m1, ta, ma159; RV32-NEXT: vslide1down.vx v8, v21, a0160; RV32-NEXT: vsetvli zero, zero, e64, m4, ta, mu161; RV32-NEXT: vrgatherei16.vv v16, v12, v8, v0.t162; RV32-NEXT: vmv.v.v v8, v16163; RV32-NEXT: ret164;165; RV64-LABEL: vrgather_shuffle_vv_v8i64:166; RV64: # %bb.0:167; RV64-NEXT: li a0, 164168; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma169; RV64-NEXT: vmv.s.x v0, a0170; RV64-NEXT: lui a0, 327683171; RV64-NEXT: slli a0, a0, 3172; RV64-NEXT: addi a0, a0, 1173; RV64-NEXT: slli a0, a0, 17174; RV64-NEXT: addi a0, a0, 1175; RV64-NEXT: vmv.v.x v20, a0176; RV64-NEXT: lui a0, 163841177; RV64-NEXT: slli a0, a0, 4178; RV64-NEXT: addi a0, a0, 1179; RV64-NEXT: slli a0, a0, 17180; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma181; RV64-NEXT: vrgatherei16.vv v16, v8, v20182; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma183; RV64-NEXT: vmv.v.x v8, a0184; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, mu185; RV64-NEXT: vrgatherei16.vv v16, v12, v8, v0.t186; RV64-NEXT: vmv.v.v v8, v16187; RV64-NEXT: ret188 %s = shufflevector <8 x i64> %x, <8 x i64> %y, <8 x i32> <i32 1, i32 2, i32 10, i32 5, i32 1, i32 10, i32 3, i32 13>189 ret <8 x i64> %s190}191 192define <8 x i64> @vrgather_shuffle_xv_v8i64(<8 x i64> %x) {193; RV32-LABEL: vrgather_shuffle_xv_v8i64:194; RV32: # %bb.0:195; RV32-NEXT: lui a0, %hi(.LCPI12_0)196; RV32-NEXT: addi a0, a0, %lo(.LCPI12_0)197; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, mu198; RV32-NEXT: vle16.v v20, (a0)199; RV32-NEXT: lui a0, %hi(.LCPI12_1)200; RV32-NEXT: addi a0, a0, %lo(.LCPI12_1)201; RV32-NEXT: vle16.v v21, (a0)202; RV32-NEXT: vmv.v.i v16, -1203; RV32-NEXT: li a0, 113204; RV32-NEXT: vmv.s.x v0, a0205; RV32-NEXT: vrgatherei16.vv v12, v16, v21206; RV32-NEXT: vrgatherei16.vv v12, v8, v20, v0.t207; RV32-NEXT: vmv.v.v v8, v12208; RV32-NEXT: ret209;210; RV64-LABEL: vrgather_shuffle_xv_v8i64:211; RV64: # %bb.0:212; RV64-NEXT: li a0, 113213; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma214; RV64-NEXT: vmv.s.x v0, a0215; RV64-NEXT: lui a0, 98305216; RV64-NEXT: slli a0, a0, 6217; RV64-NEXT: vmv.v.x v16, a0218; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, mu219; RV64-NEXT: vmv.v.i v12, -1220; RV64-NEXT: vrgatherei16.vv v12, v8, v16, v0.t221; RV64-NEXT: vmv.v.v v8, v12222; RV64-NEXT: ret223 %s = shufflevector <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, <8 x i64> %x, <8 x i32> <i32 8, i32 3, i32 6, i32 5, i32 8, i32 12, i32 14, i32 3>224 ret <8 x i64> %s225}226 227define <8 x i64> @vrgather_shuffle_vx_v8i64(<8 x i64> %x) {228; RV32-LABEL: vrgather_shuffle_vx_v8i64:229; RV32: # %bb.0:230; RV32-NEXT: lui a0, %hi(.LCPI13_1)231; RV32-NEXT: addi a0, a0, %lo(.LCPI13_1)232; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, mu233; RV32-NEXT: vle16.v v16, (a0)234; RV32-NEXT: lui a0, %hi(.LCPI13_0)235; RV32-NEXT: addi a0, a0, %lo(.LCPI13_0)236; RV32-NEXT: vle16.v v17, (a0)237; RV32-NEXT: li a0, 140238; RV32-NEXT: vmv.s.x v0, a0239; RV32-NEXT: vrgatherei16.vv v12, v8, v16240; RV32-NEXT: vmv.v.i v8, 5241; RV32-NEXT: vrgatherei16.vv v12, v8, v17, v0.t242; RV32-NEXT: vmv.v.v v8, v12243; RV32-NEXT: ret244;245; RV64-LABEL: vrgather_shuffle_vx_v8i64:246; RV64: # %bb.0:247; RV64-NEXT: lui a0, %hi(.LCPI13_0)248; RV64-NEXT: addi a0, a0, %lo(.LCPI13_0)249; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, mu250; RV64-NEXT: vle16.v v16, (a0)251; RV64-NEXT: li a0, 115252; RV64-NEXT: vmv.s.x v0, a0253; RV64-NEXT: vmv.v.i v12, 5254; RV64-NEXT: vrgatherei16.vv v12, v8, v16, v0.t255; RV64-NEXT: vmv.v.v v8, v12256; RV64-NEXT: ret257 %s = shufflevector <8 x i64> %x, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>, <8 x i32> <i32 0, i32 3, i32 10, i32 9, i32 4, i32 1, i32 7, i32 14>258 ret <8 x i64> %s259}260 261define <4 x i16> @shuffle_v8i16_to_vslidedown_1(<8 x i16> %x) {262; CHECK-LABEL: shuffle_v8i16_to_vslidedown_1:263; CHECK: # %bb.0: # %entry264; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma265; CHECK-NEXT: vslidedown.vi v8, v8, 1266; CHECK-NEXT: ret267entry:268 %s = shufflevector <8 x i16> %x, <8 x i16> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 4>269 ret <4 x i16> %s270}271 272define <4 x i16> @shuffle_v8i16_to_vslidedown_3(<8 x i16> %x) {273; CHECK-LABEL: shuffle_v8i16_to_vslidedown_3:274; CHECK: # %bb.0: # %entry275; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma276; CHECK-NEXT: vslidedown.vi v8, v8, 3277; CHECK-NEXT: ret278entry:279 %s = shufflevector <8 x i16> %x, <8 x i16> poison, <4 x i32> <i32 3, i32 4, i32 5, i32 6>280 ret <4 x i16> %s281}282 283define <2 x i32> @shuffle_v4i32_to_vslidedown(<4 x i32> %x) {284; CHECK-LABEL: shuffle_v4i32_to_vslidedown:285; CHECK: # %bb.0: # %entry286; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma287; CHECK-NEXT: vslidedown.vi v8, v8, 1288; CHECK-NEXT: ret289entry:290 %s = shufflevector <4 x i32> %x, <4 x i32> poison, <2 x i32> <i32 1, i32 2>291 ret <2 x i32> %s292}293 294define <4 x i8> @interleave_shuffles(<4 x i8> %x) {295; CHECK-LABEL: interleave_shuffles:296; CHECK: # %bb.0:297; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma298; CHECK-NEXT: vrgather.vi v9, v8, 0299; CHECK-NEXT: vrgather.vi v10, v8, 1300; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma301; CHECK-NEXT: vwaddu.vv v8, v9, v10302; CHECK-NEXT: li a0, -1303; CHECK-NEXT: vwmaccu.vx v8, a0, v10304; CHECK-NEXT: ret305 %y = shufflevector <4 x i8> %x, <4 x i8> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 0>306 %z = shufflevector <4 x i8> %x, <4 x i8> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>307 %w = shufflevector <4 x i8> %y, <4 x i8> %z, <4 x i32> <i32 0, i32 4, i32 1, i32 5>308 ret <4 x i8> %w309}310 311define <8 x i8> @splat_ve4(<8 x i8> %v) {312; CHECK-LABEL: splat_ve4:313; CHECK: # %bb.0:314; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma315; CHECK-NEXT: vrgather.vi v9, v8, 4316; CHECK-NEXT: vmv1r.v v8, v9317; CHECK-NEXT: ret318 %shuff = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>319 ret <8 x i8> %shuff320}321 322define <8 x i8> @splat_ve4_ins_i0ve2(<8 x i8> %v) {323; CHECK-LABEL: splat_ve4_ins_i0ve2:324; CHECK: # %bb.0:325; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma326; CHECK-NEXT: vmv.v.i v10, 4327; CHECK-NEXT: li a0, 2328; CHECK-NEXT: vsetvli zero, zero, e8, mf2, tu, ma329; CHECK-NEXT: vmv.s.x v10, a0330; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma331; CHECK-NEXT: vrgather.vv v9, v8, v10332; CHECK-NEXT: vmv1r.v v8, v9333; CHECK-NEXT: ret334 %shuff = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 2, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>335 ret <8 x i8> %shuff336}337 338define <8 x i8> @splat_ve4_ins_i1ve3(<8 x i8> %v) {339; CHECK-LABEL: splat_ve4_ins_i1ve3:340; CHECK: # %bb.0:341; CHECK-NEXT: vsetivli zero, 2, e8, mf2, ta, ma342; CHECK-NEXT: vmv.v.i v9, 3343; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma344; CHECK-NEXT: vmv.v.i v10, 4345; CHECK-NEXT: vsetivli zero, 2, e8, mf2, tu, ma346; CHECK-NEXT: vslideup.vi v10, v9, 1347; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma348; CHECK-NEXT: vrgather.vv v9, v8, v10349; CHECK-NEXT: vmv1r.v v8, v9350; CHECK-NEXT: ret351 %shuff = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 4, i32 3, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>352 ret <8 x i8> %shuff353}354 355define <8 x i8> @splat_ve2_we0(<8 x i8> %v, <8 x i8> %w) {356; CHECK-LABEL: splat_ve2_we0:357; CHECK: # %bb.0:358; CHECK-NEXT: li a0, 66359; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu360; CHECK-NEXT: vmv.s.x v0, a0361; CHECK-NEXT: vrgather.vi v10, v8, 2362; CHECK-NEXT: vrgather.vi v10, v9, 0, v0.t363; CHECK-NEXT: vmv1r.v v8, v10364; CHECK-NEXT: ret365 %shuff = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 2, i32 8, i32 2, i32 2, i32 2, i32 2, i32 8, i32 2>366 ret <8 x i8> %shuff367}368 369define <8 x i8> @splat_ve2_we0_ins_i0ve4(<8 x i8> %v, <8 x i8> %w) {370; CHECK-LABEL: splat_ve2_we0_ins_i0ve4:371; CHECK: # %bb.0:372; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma373; CHECK-NEXT: vmv.v.i v11, 2374; CHECK-NEXT: li a0, 4375; CHECK-NEXT: vsetvli zero, zero, e8, mf2, tu, ma376; CHECK-NEXT: vmv.s.x v11, a0377; CHECK-NEXT: li a0, 66378; CHECK-NEXT: vmv.s.x v0, a0379; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu380; CHECK-NEXT: vrgather.vv v10, v8, v11381; CHECK-NEXT: vrgather.vi v10, v9, 0, v0.t382; CHECK-NEXT: vmv1r.v v8, v10383; CHECK-NEXT: ret384 %shuff = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 4, i32 8, i32 2, i32 2, i32 2, i32 2, i32 8, i32 2>385 ret <8 x i8> %shuff386}387 388define <8 x i8> @splat_ve2_we0_ins_i0we4(<8 x i8> %v, <8 x i8> %w) {389; CHECK-LABEL: splat_ve2_we0_ins_i0we4:390; CHECK: # %bb.0:391; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma392; CHECK-NEXT: vmv.v.i v11, 4393; CHECK-NEXT: li a0, 67394; CHECK-NEXT: vmv.s.x v0, a0395; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu396; CHECK-NEXT: vrgather.vi v10, v8, 2397; CHECK-NEXT: vrgather.vv v10, v9, v11, v0.t398; CHECK-NEXT: vmv1r.v v8, v10399; CHECK-NEXT: ret400 %shuff = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 12, i32 8, i32 2, i32 2, i32 2, i32 2, i32 8, i32 2>401 ret <8 x i8> %shuff402}403 404define <8 x i8> @splat_ve2_we0_ins_i2ve4(<8 x i8> %v, <8 x i8> %w) {405; CHECK-LABEL: splat_ve2_we0_ins_i2ve4:406; CHECK: # %bb.0:407; CHECK-NEXT: lui a0, 8256408; CHECK-NEXT: addi a0, a0, 514409; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma410; CHECK-NEXT: vmv.v.x v11, a0411; CHECK-NEXT: li a0, 66412; CHECK-NEXT: vmv.s.x v0, a0413; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu414; CHECK-NEXT: vrgather.vv v10, v8, v11415; CHECK-NEXT: vrgather.vi v10, v9, 0, v0.t416; CHECK-NEXT: vmv1r.v v8, v10417; CHECK-NEXT: ret418 %shuff = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 2, i32 8, i32 4, i32 2, i32 2, i32 2, i32 8, i32 2>419 ret <8 x i8> %shuff420}421 422define <8 x i8> @splat_ve2_we0_ins_i2we4(<8 x i8> %v, <8 x i8> %w) {423; CHECK-LABEL: splat_ve2_we0_ins_i2we4:424; CHECK: # %bb.0:425; CHECK-NEXT: vsetivli zero, 3, e8, mf2, ta, ma426; CHECK-NEXT: vmv.v.i v10, 4427; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma428; CHECK-NEXT: vmv.v.i v11, 0429; CHECK-NEXT: li a0, 70430; CHECK-NEXT: vsetivli zero, 3, e8, mf2, tu, ma431; CHECK-NEXT: vslideup.vi v11, v10, 2432; CHECK-NEXT: vmv.s.x v0, a0433; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu434; CHECK-NEXT: vrgather.vi v10, v8, 2435; CHECK-NEXT: vrgather.vv v10, v9, v11, v0.t436; CHECK-NEXT: vmv1r.v v8, v10437; CHECK-NEXT: ret438 %shuff = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 2, i32 8, i32 12, i32 2, i32 2, i32 2, i32 8, i32 2>439 ret <8 x i8> %shuff440}441 442define <8 x i8> @splat_ve2_we0_ins_i2ve4_i5we6(<8 x i8> %v, <8 x i8> %w) {443; CHECK-LABEL: splat_ve2_we0_ins_i2ve4_i5we6:444; CHECK: # %bb.0:445; CHECK-NEXT: lui a0, %hi(.LCPI26_0)446; CHECK-NEXT: addi a0, a0, %lo(.LCPI26_0)447; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma448; CHECK-NEXT: vle8.v v10, (a0)449; CHECK-NEXT: li a0, 20450; CHECK-NEXT: vmv.s.x v0, a0451; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0452; CHECK-NEXT: vrgather.vv v8, v9, v10453; CHECK-NEXT: ret454 %shuff = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 2, i32 8, i32 4, i32 2, i32 2, i32 14, i32 8, i32 2>455 ret <8 x i8> %shuff456}457 458define <8 x i8> @widen_splat_ve3(<4 x i8> %v) {459; CHECK-LABEL: widen_splat_ve3:460; CHECK: # %bb.0:461; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma462; CHECK-NEXT: vrgather.vi v9, v8, 3463; CHECK-NEXT: vmv1r.v v8, v9464; CHECK-NEXT: ret465 %shuf = shufflevector <4 x i8> %v, <4 x i8> poison, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>466 ret <8 x i8> %shuf467}468 469define <4 x i16> @slidedown_v4i16(<4 x i16> %x) {470; CHECK-LABEL: slidedown_v4i16:471; CHECK: # %bb.0:472; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma473; CHECK-NEXT: vslidedown.vi v8, v8, 1474; CHECK-NEXT: ret475 %s = shufflevector <4 x i16> %x, <4 x i16> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 poison>476 ret <4 x i16> %s477}478 479define <8 x i32> @slidedown_v8i32(<8 x i32> %x) {480; CHECK-LABEL: slidedown_v8i32:481; CHECK: # %bb.0:482; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma483; CHECK-NEXT: vslidedown.vi v8, v8, 3484; CHECK-NEXT: ret485 %s = shufflevector <8 x i32> %x, <8 x i32> poison, <8 x i32> <i32 3, i32 poison, i32 5, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>486 ret <8 x i32> %s487}488 489define <4 x i16> @slideup_v4i16(<4 x i16> %x) {490; CHECK-LABEL: slideup_v4i16:491; CHECK: # %bb.0:492; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma493; CHECK-NEXT: vslideup.vi v9, v8, 1494; CHECK-NEXT: vmv1r.v v8, v9495; CHECK-NEXT: ret496 %s = shufflevector <4 x i16> %x, <4 x i16> poison, <4 x i32> <i32 poison, i32 0, i32 1, i32 2>497 ret <4 x i16> %s498}499 500define <8 x i32> @slideup_v8i32(<8 x i32> %x) {501; CHECK-LABEL: slideup_v8i32:502; CHECK: # %bb.0:503; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma504; CHECK-NEXT: vslideup.vi v10, v8, 3505; CHECK-NEXT: vmv.v.v v8, v10506; CHECK-NEXT: ret507 %s = shufflevector <8 x i32> %x, <8 x i32> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 2, i32 3, i32 4>508 ret <8 x i32> %s509}510 511define <8 x i16> @splice_unary(<8 x i16> %x) {512; CHECK-LABEL: splice_unary:513; CHECK: # %bb.0:514; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma515; CHECK-NEXT: vslidedown.vi v9, v8, 2516; CHECK-NEXT: vslideup.vi v9, v8, 6517; CHECK-NEXT: vmv.v.v v8, v9518; CHECK-NEXT: ret519 %s = shufflevector <8 x i16> %x, <8 x i16> poison, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>520 ret <8 x i16> %s521}522 523define <8 x i32> @splice_unary2(<8 x i32> %x) {524; CHECK-LABEL: splice_unary2:525; CHECK: # %bb.0:526; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma527; CHECK-NEXT: vslidedown.vi v10, v8, 5528; CHECK-NEXT: vslideup.vi v10, v8, 3529; CHECK-NEXT: vmv.v.v v8, v10530; CHECK-NEXT: ret531 %s = shufflevector <8 x i32> %x, <8 x i32> poison, <8 x i32> <i32 poison, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4>532 ret <8 x i32> %s533}534 535define <8 x i16> @splice_binary(<8 x i16> %x, <8 x i16> %y) {536; CHECK-LABEL: splice_binary:537; CHECK: # %bb.0:538; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma539; CHECK-NEXT: vslidedown.vi v8, v8, 2540; CHECK-NEXT: vslideup.vi v8, v9, 6541; CHECK-NEXT: ret542 %s = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 9>543 ret <8 x i16> %s544}545 546define <8 x i32> @splice_binary2(<8 x i32> %x, <8 x i32> %y) {547; CHECK-LABEL: splice_binary2:548; CHECK: # %bb.0:549; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma550; CHECK-NEXT: vslidedown.vi v8, v8, 5551; CHECK-NEXT: vslideup.vi v8, v10, 3552; CHECK-NEXT: ret553 %s = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 poison, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12>554 ret <8 x i32> %s555}556 557define <4 x i16> @shuffle_shuffle_vslidedown(<16 x i16> %0) {558; CHECK-LABEL: shuffle_shuffle_vslidedown:559; CHECK: # %bb.0: # %entry560; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma561; CHECK-NEXT: vslidedown.vi v8, v8, 5562; CHECK-NEXT: ret563entry:564 %1 = shufflevector <16 x i16> %0, <16 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>565 %2 = shufflevector <16 x i16> %0, <16 x i16> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>566 %3 = shufflevector <8 x i16> %1, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>567 %4 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 0, i32 poison, i32 poison, i32 poison>568 %5 = shufflevector <4 x i16> %3, <4 x i16> %4, <4 x i32> <i32 1, i32 2, i32 3, i32 4>569 ret <4 x i16> %5570}571 572define <8 x i8> @concat_4xi8_start(<8 x i8> %v, <8 x i8> %w) {573; CHECK-LABEL: concat_4xi8_start:574; CHECK: # %bb.0:575; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma576; CHECK-NEXT: vslideup.vi v8, v9, 4577; CHECK-NEXT: ret578 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>579 ret <8 x i8> %res580}581 582define <8 x i8> @concat_4xi8_start_undef(<8 x i8> %v, <8 x i8> %w) {583; CHECK-LABEL: concat_4xi8_start_undef:584; CHECK: # %bb.0:585; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma586; CHECK-NEXT: vslideup.vi v8, v9, 4587; CHECK-NEXT: ret588 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 poison, i32 10, i32 11>589 ret <8 x i8> %res590}591 592define <8 x i8> @concat_4xi8_start_undef_at_start(<8 x i8> %v, <8 x i8> %w) {593; CHECK-LABEL: concat_4xi8_start_undef_at_start:594; CHECK: # %bb.0:595; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma596; CHECK-NEXT: vslideup.vi v8, v9, 4597; CHECK-NEXT: ret598 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 9, i32 10, i32 11>599 ret <8 x i8> %res600}601 602define <8 x i8> @merge_start_into_end_non_contiguous(<8 x i8> %v, <8 x i8> %w) {603; CHECK-LABEL: merge_start_into_end_non_contiguous:604; CHECK: # %bb.0:605; CHECK-NEXT: li a0, 144606; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu607; CHECK-NEXT: vmv.s.x v0, a0608; CHECK-NEXT: vslideup.vi v8, v9, 4, v0.t609; CHECK-NEXT: ret610 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 6, i32 11>611 ret <8 x i8> %res612}613 614define <8 x i8> @merge_end_into_end(<8 x i8> %v, <8 x i8> %w) {615; CHECK-LABEL: merge_end_into_end:616; CHECK: # %bb.0:617; CHECK-NEXT: vsetivli zero, 4, e8, mf2, tu, ma618; CHECK-NEXT: vmv.v.v v9, v8619; CHECK-NEXT: vmv1r.v v8, v9620; CHECK-NEXT: ret621 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>622 ret <8 x i8> %res623}624 625define <8 x i8> @merge_start_into_middle(<8 x i8> %v, <8 x i8> %w) {626; CHECK-LABEL: merge_start_into_middle:627; CHECK: # %bb.0:628; CHECK-NEXT: vsetivli zero, 5, e8, mf2, tu, ma629; CHECK-NEXT: vslideup.vi v8, v9, 1630; CHECK-NEXT: ret631 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 0, i32 8, i32 9, i32 10, i32 11, i32 5, i32 6, i32 7>632 ret <8 x i8> %res633}634 635define <8 x i8> @merge_start_into_start(<8 x i8> %v, <8 x i8> %w) {636; CHECK-LABEL: merge_start_into_start:637; CHECK: # %bb.0:638; CHECK-NEXT: vsetivli zero, 4, e8, mf2, tu, ma639; CHECK-NEXT: vmv.v.v v8, v9640; CHECK-NEXT: ret641 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>642 ret <8 x i8> %res643}644 645define <8 x i8> @merge_slidedown(<8 x i8> %v, <8 x i8> %w) {646; CHECK-LABEL: merge_slidedown:647; CHECK: # %bb.0:648; CHECK-NEXT: li a0, 60649; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu650; CHECK-NEXT: vmv.s.x v0, a0651; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t652; CHECK-NEXT: vmv1r.v v8, v9653; CHECK-NEXT: ret654 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 8, i32 9, i32 3, i32 4, i32 5, i32 6, i32 14, i32 15>655 ret <8 x i8> %res656}657 658; This should slide %v down by 2 and %w up by 1 before merging them659define <8 x i8> @merge_non_contiguous_slideup_slidedown(<8 x i8> %v, <8 x i8> %w) {660; CHECK-LABEL: merge_non_contiguous_slideup_slidedown:661; CHECK: # %bb.0:662; CHECK-NEXT: li a0, -22663; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu664; CHECK-NEXT: vmv.s.x v0, a0665; CHECK-NEXT: vslidedown.vi v8, v8, 2666; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t667; CHECK-NEXT: ret668 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 2, i32 8, i32 4, i32 10, i32 6, i32 12, i32 13, i32 14>669 ret <8 x i8> %res670}671 672; This shouldn't generate a vmerge because the elements of %w are not consecutive673define <8 x i8> @unmergable(<8 x i8> %v, <8 x i8> %w) {674; CHECK-LABEL: unmergable:675; CHECK: # %bb.0:676; CHECK-NEXT: lui a0, %hi(.LCPI46_0)677; CHECK-NEXT: addi a0, a0, %lo(.LCPI46_0)678; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma679; CHECK-NEXT: vle8.v v10, (a0)680; CHECK-NEXT: li a0, 84681; CHECK-NEXT: vmv.s.x v0, a0682; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0683; CHECK-NEXT: vrgather.vv v8, v9, v10684; CHECK-NEXT: ret685 %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> <i32 2, i32 9, i32 4, i32 11, i32 6, i32 13, i32 8, i32 15>686 ret <8 x i8> %res687}688 689; Make sure we use a vmv.v.i to load the mask constant.690define <8 x i32> @shuffle_v8i32_2(<8 x i32> %x, <8 x i32> %y) {691; CHECK-LABEL: shuffle_v8i32_2:692; CHECK: # %bb.0:693; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma694; CHECK-NEXT: vmv.v.i v0, 13695; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma696; CHECK-NEXT: vmerge.vvm v8, v10, v8, v0697; CHECK-NEXT: ret698 %s = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 1, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>699 ret <8 x i32> %s700}701 702; FIXME: This could be expressed as a vrgather.vv703define <8 x i8> @shuffle_v64i8_v8i8(<64 x i8> %wide.vec) {704; CHECK-LABEL: shuffle_v64i8_v8i8:705; CHECK: # %bb.0:706; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma707; CHECK-NEXT: vnsrl.wi v12, v8, 0708; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma709; CHECK-NEXT: vnsrl.wi v8, v12, 0710; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma711; CHECK-NEXT: vnsrl.wi v8, v8, 0712; CHECK-NEXT: ret713 %s = shufflevector <64 x i8> %wide.vec, <64 x i8> poison, <8 x i32> <i32 0, i32 8, i32 16, i32 24, i32 32, i32 40, i32 48, i32 56>714 ret <8 x i8> %s715}716 717define <8 x i8> @shuffle_compress_singlesrc_e8(<8 x i8> %v) {718; CHECK-LABEL: shuffle_compress_singlesrc_e8:719; CHECK: # %bb.0:720; CHECK-NEXT: li a0, 181721; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma722; CHECK-NEXT: vmv.s.x v10, a0723; CHECK-NEXT: vcompress.vm v9, v8, v10724; CHECK-NEXT: vmv1r.v v8, v9725; CHECK-NEXT: ret726 %out = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 5, i32 7, i32 poison, i32 poison, i32 poison>727 ret <8 x i8> %out728}729 730define <8 x i16> @shuffle_compress_singlesrc_e16(<8 x i16> %v) {731; CHECK-LABEL: shuffle_compress_singlesrc_e16:732; CHECK: # %bb.0:733; CHECK-NEXT: li a0, 181734; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma735; CHECK-NEXT: vmv.s.x v10, a0736; CHECK-NEXT: vcompress.vm v9, v8, v10737; CHECK-NEXT: vmv.v.v v8, v9738; CHECK-NEXT: ret739 %out = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 5, i32 7, i32 poison, i32 poison, i32 poison>740 ret <8 x i16> %out741}742 743define <8 x i32> @shuffle_compress_singlesrc_e32(<8 x i32> %v) {744; CHECK-LABEL: shuffle_compress_singlesrc_e32:745; CHECK: # %bb.0:746; CHECK-NEXT: li a0, 28747; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, mu748; CHECK-NEXT: vmv.s.x v0, a0749; CHECK-NEXT: vslidedown.vi v8, v8, 2, v0.t750; CHECK-NEXT: ret751 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 6, i32 poison, i32 poison, i32 poison>752 ret <8 x i32> %out753}754 755define <8 x i64> @shuffle_compress_singlesrc_e64(<8 x i64> %v) {756; CHECK-LABEL: shuffle_compress_singlesrc_e64:757; CHECK: # %bb.0:758; CHECK-NEXT: li a0, 181759; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma760; CHECK-NEXT: vmv.s.x v16, a0761; CHECK-NEXT: vcompress.vm v12, v8, v16762; CHECK-NEXT: vmv.v.v v8, v12763; CHECK-NEXT: ret764 %out = shufflevector <8 x i64> %v, <8 x i64> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 5, i32 7, i32 poison, i32 poison, i32 poison>765 ret <8 x i64> %out766}767 768define <8 x i32> @shuffle_compress_singlesrc_gaps_e32(<8 x i32> %v) {769; CHECK-LABEL: shuffle_compress_singlesrc_gaps_e32:770; CHECK: # %bb.0:771; CHECK-NEXT: lui a0, %hi(.LCPI53_0)772; CHECK-NEXT: addi a0, a0, %lo(.LCPI53_0)773; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma774; CHECK-NEXT: vle16.v v12, (a0)775; CHECK-NEXT: vrgatherei16.vv v10, v8, v12776; CHECK-NEXT: vmv.v.v v8, v10777; CHECK-NEXT: ret778 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 poison, i32 4, i32 5, i32 7, i32 poison, i32 poison, i32 poison>779 ret <8 x i32> %out780}781 782define <8 x i32> @shuffle_spread2_singlesrc_e32(<8 x i32> %v) {783; CHECK-LABEL: shuffle_spread2_singlesrc_e32:784; CHECK: # %bb.0:785; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma786; CHECK-NEXT: vzext.vf2 v10, v8787; CHECK-NEXT: vmv.v.v v8, v10788; CHECK-NEXT: ret789 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 poison, i32 1, i32 poison, i32 2, i32 poison, i32 3, i32 poison>790 ret <8 x i32> %out791}792 793define <8 x i32> @shuffle_spread2_singlesrc_e32_index1(<8 x i32> %v) {794; CHECK-LABEL: shuffle_spread2_singlesrc_e32_index1:795; CHECK: # %bb.0:796; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma797; CHECK-NEXT: vzext.vf2 v10, v8798; CHECK-NEXT: li a0, 32799; CHECK-NEXT: vsll.vx v8, v10, a0800; CHECK-NEXT: ret801 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 poison, i32 0, i32 poison, i32 1, i32 poison, i32 2, i32 poison, i32 3>802 ret <8 x i32> %out803}804 805define <8 x i32> @shuffle_spread2_singlesrc_e32_index2(<8 x i32> %v) {806; CHECK-LABEL: shuffle_spread2_singlesrc_e32_index2:807; CHECK: # %bb.0:808; CHECK-NEXT: csrr a0, vlenb809; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma810; CHECK-NEXT: vid.v v9811; CHECK-NEXT: srli a0, a0, 2812; CHECK-NEXT: vsrl.vi v9, v9, 1813; CHECK-NEXT: vadd.vi v9, v9, -1814; CHECK-NEXT: vslidedown.vx v10, v9, a0815; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma816; CHECK-NEXT: vrgatherei16.vv v11, v8, v10817; CHECK-NEXT: vrgatherei16.vv v10, v8, v9818; CHECK-NEXT: vmv2r.v v8, v10819; CHECK-NEXT: ret820 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 poison, i32 poison, i32 0, i32 poison, i32 1, i32 poison, i32 2, i32 poison>821 ret <8 x i32> %out822}823 824define <8 x i32> @shuffle_spread3_singlesrc_e32(<8 x i32> %v) {825; CHECK-LABEL: shuffle_spread3_singlesrc_e32:826; CHECK: # %bb.0:827; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma828; CHECK-NEXT: vmv.v.i v9, 0829; CHECK-NEXT: li a0, 1830; CHECK-NEXT: vslide1down.vx v9, v9, a0831; CHECK-NEXT: csrr a0, vlenb832; CHECK-NEXT: srli a0, a0, 3833; CHECK-NEXT: vslidedown.vx v10, v9, a0834; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma835; CHECK-NEXT: vrgatherei16.vv v11, v8, v10836; CHECK-NEXT: vrgatherei16.vv v10, v8, v9837; CHECK-NEXT: vmv2r.v v8, v10838; CHECK-NEXT: ret839 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 2, i32 poison>840 ret <8 x i32> %out841}842 843define <8 x i32> @shuffle_spread4_singlesrc_e32(<8 x i32> %v) {844; CHECK-LABEL: shuffle_spread4_singlesrc_e32:845; CHECK: # %bb.0:846; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma847; CHECK-NEXT: vmv2r.v v10, v8848; CHECK-NEXT: vslideup.vi v10, v8, 3849; CHECK-NEXT: vmv.v.v v8, v10850; CHECK-NEXT: ret851 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison>852 ret <8 x i32> %out853}854 855define <16 x i8> @shuffle_spread4_singlesrc_e8_idx0(<16 x i8> %v) {856; CHECK-LABEL: shuffle_spread4_singlesrc_e8_idx0:857; CHECK: # %bb.0:858; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma859; CHECK-NEXT: vzext.vf4 v9, v8860; CHECK-NEXT: vmv.v.v v8, v9861; CHECK-NEXT: ret862 %out = shufflevector <16 x i8> %v, <16 x i8> poison, <16 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 3, i32 poison, i32 poison, i32 poison>863 ret <16 x i8> %out864}865 866define <16 x i8> @shuffle_spread4_singlesrc_e8_idx1(<16 x i8> %v) {867; CHECK-LABEL: shuffle_spread4_singlesrc_e8_idx1:868; CHECK: # %bb.0:869; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma870; CHECK-NEXT: vzext.vf4 v9, v8871; CHECK-NEXT: vsll.vi v8, v9, 8872; CHECK-NEXT: ret873 %out = shufflevector <16 x i8> %v, <16 x i8> poison, <16 x i32> <i32 poison, i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 3, i32 poison, i32 poison>874 ret <16 x i8> %out875}876 877define <16 x i8> @shuffle_spread4_singlesrc_e8_idx2(<16 x i8> %v) {878; CHECK-LABEL: shuffle_spread4_singlesrc_e8_idx2:879; CHECK: # %bb.0:880; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma881; CHECK-NEXT: vzext.vf4 v9, v8882; CHECK-NEXT: vsll.vi v8, v9, 16883; CHECK-NEXT: ret884 %out = shufflevector <16 x i8> %v, <16 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 3, i32 poison>885 ret <16 x i8> %out886}887 888define <16 x i8> @shuffle_spread4_singlesrc_e8_idx3(<16 x i8> %v) {889; CHECK-LABEL: shuffle_spread4_singlesrc_e8_idx3:890; CHECK: # %bb.0:891; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma892; CHECK-NEXT: vzext.vf4 v9, v8893; CHECK-NEXT: vsll.vi v8, v9, 24894; CHECK-NEXT: ret895 %out = shufflevector <16 x i8> %v, <16 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 3>896 ret <16 x i8> %out897}898 899define <16 x i8> @shuffle_spread4_singlesrc_e8_idx4(<16 x i8> %v) {900; CHECK-LABEL: shuffle_spread4_singlesrc_e8_idx4:901; CHECK: # %bb.0:902; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma903; CHECK-NEXT: vid.v v9904; CHECK-NEXT: vsrl.vi v9, v9, 2905; CHECK-NEXT: vadd.vi v10, v9, -1906; CHECK-NEXT: vrgather.vv v9, v8, v10907; CHECK-NEXT: vmv.v.v v8, v9908; CHECK-NEXT: ret909 %out = shufflevector <16 x i8> %v, <16 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison>910 ret <16 x i8> %out911}912 913 914define <32 x i8> @shuffle_spread8_singlesrc_e8(<32 x i8> %v) {915; CHECK-LABEL: shuffle_spread8_singlesrc_e8:916; CHECK: # %bb.0:917; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma918; CHECK-NEXT: vzext.vf8 v10, v8919; CHECK-NEXT: vmv.v.v v8, v10920; CHECK-NEXT: ret921 %out = shufflevector <32 x i8> %v, <32 x i8> poison, <32 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>922 ret <32 x i8> %out923}924 925define <8 x i32> @shuffle_decompress_singlesrc_e32(<8 x i32> %v) {926; CHECK-LABEL: shuffle_decompress_singlesrc_e32:927; CHECK: # %bb.0:928; CHECK-NEXT: lui a0, %hi(.LCPI65_0)929; CHECK-NEXT: addi a0, a0, %lo(.LCPI65_0)930; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma931; CHECK-NEXT: vle16.v v12, (a0)932; CHECK-NEXT: vrgatherei16.vv v10, v8, v12933; CHECK-NEXT: vmv.v.v v8, v10934; CHECK-NEXT: ret935 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 poison, i32 1, i32 poison, i32 3, i32 poison, i32 poison, i32 4>936 ret <8 x i32> %out937}938 939define <8 x i8> @shuffle_decompress_singlesrc_e8(<8 x i8> %v) {940; CHECK-LABEL: shuffle_decompress_singlesrc_e8:941; CHECK: # %bb.0:942; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma943; CHECK-NEXT: vmv1r.v v9, v8944; CHECK-NEXT: vslideup.vi v9, v8, 3945; CHECK-NEXT: vmv1r.v v8, v9946; CHECK-NEXT: ret947 %out = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 1, i32 2, i32 3, i32 4>948 ret <8 x i8> %out949}950 951 952define <8 x i32> @shuffle_repeat2_singlesrc_e32(<8 x i32> %v) {953; CHECK-LABEL: shuffle_repeat2_singlesrc_e32:954; CHECK: # %bb.0:955; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma956; CHECK-NEXT: vwaddu.vv v10, v8, v8957; CHECK-NEXT: li a0, -1958; CHECK-NEXT: vwmaccu.vx v10, a0, v8959; CHECK-NEXT: vmv2r.v v8, v10960; CHECK-NEXT: ret961 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3>962 ret <8 x i32> %out963}964 965define <8 x i32> @shuffle_repeat3_singlesrc_e32(<8 x i32> %v) {966; CHECK-LABEL: shuffle_repeat3_singlesrc_e32:967; CHECK: # %bb.0:968; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma969; CHECK-NEXT: vmv.v.i v0, 7970; CHECK-NEXT: vmv.v.i v9, 1971; CHECK-NEXT: li a0, 192972; CHECK-NEXT: vmerge.vim v9, v9, 0, v0973; CHECK-NEXT: vmv.s.x v0, a0974; CHECK-NEXT: csrr a0, vlenb975; CHECK-NEXT: vmerge.vim v9, v9, 2, v0976; CHECK-NEXT: srli a0, a0, 2977; CHECK-NEXT: vslidedown.vx v10, v9, a0978; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma979; CHECK-NEXT: vrgatherei16.vv v11, v8, v10980; CHECK-NEXT: vrgatherei16.vv v10, v8, v9981; CHECK-NEXT: vmv2r.v v8, v10982; CHECK-NEXT: ret983 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 2, i32 2>984 ret <8 x i32> %out985}986 987define <8 x i32> @shuffle_repeat4_singlesrc_e32(<8 x i32> %v) {988; CHECK-LABEL: shuffle_repeat4_singlesrc_e32:989; CHECK: # %bb.0:990; CHECK-NEXT: csrr a0, vlenb991; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma992; CHECK-NEXT: vid.v v9993; CHECK-NEXT: srli a0, a0, 2994; CHECK-NEXT: vsrl.vi v9, v9, 2995; CHECK-NEXT: vslidedown.vx v10, v9, a0996; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma997; CHECK-NEXT: vrgatherei16.vv v11, v8, v10998; CHECK-NEXT: vrgatherei16.vv v10, v8, v9999; CHECK-NEXT: vmv2r.v v8, v101000; CHECK-NEXT: ret1001 %out = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1>1002 ret <8 x i32> %out1003}1004 1005define <16 x i32> @shuffle_disjoint_lanes(<16 x i32> %v, <16 x i32> %w) {1006; CHECK-LABEL: shuffle_disjoint_lanes:1007; CHECK: # %bb.0:1008; CHECK-NEXT: lui a0, %hi(.LCPI70_0)1009; CHECK-NEXT: addi a0, a0, %lo(.LCPI70_0)1010; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma1011; CHECK-NEXT: vle8.v v18, (a0)1012; CHECK-NEXT: lui a0, 111013; CHECK-NEXT: addi a0, a0, -13661014; CHECK-NEXT: vmv.s.x v0, a01015; CHECK-NEXT: vmerge.vvm v12, v12, v8, v01016; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma1017; CHECK-NEXT: vsext.vf2 v16, v181018; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma1019; CHECK-NEXT: vrgatherei16.vv v8, v12, v161020; CHECK-NEXT: ret1021 %out = shufflevector <16 x i32> %v, <16 x i32> %w, <16 x i32> <i32 11, i32 15, i32 7, i32 3, i32 26, i32 30, i32 22, i32 18, i32 9, i32 13, i32 5, i32 1, i32 24, i32 28, i32 20, i32 16>1022 ret <16 x i32> %out1023}1024 1025define <16 x i32> @shuffle_disjoint_lanes_one_identity(<16 x i32> %v, <16 x i32> %w) {1026; CHECK-LABEL: shuffle_disjoint_lanes_one_identity:1027; CHECK: # %bb.0:1028; CHECK-NEXT: lui a0, %hi(.LCPI71_0)1029; CHECK-NEXT: addi a0, a0, %lo(.LCPI71_0)1030; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu1031; CHECK-NEXT: vle16.v v16, (a0)1032; CHECK-NEXT: li a0, -2721033; CHECK-NEXT: vmv.s.x v0, a01034; CHECK-NEXT: vrgatherei16.vv v8, v12, v16, v0.t1035; CHECK-NEXT: ret1036 %out = shufflevector <16 x i32> %v, <16 x i32> %w, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 26, i32 30, i32 22, i32 20, i32 8, i32 31, i32 29, i32 28, i32 27, i32 23, i32 25, i32 22>1037 ret <16 x i32> %out1038}1039 1040define <16 x i32> @shuffle_disjoint_lanes_one_broadcast(<16 x i32> %v, <16 x i32> %w) {1041; CHECK-LABEL: shuffle_disjoint_lanes_one_broadcast:1042; CHECK: # %bb.0:1043; CHECK-NEXT: lui a0, %hi(.LCPI72_0)1044; CHECK-NEXT: addi a0, a0, %lo(.LCPI72_0)1045; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu1046; CHECK-NEXT: vle16.v v20, (a0)1047; CHECK-NEXT: lui a0, 151048; CHECK-NEXT: addi a0, a0, 2401049; CHECK-NEXT: vmv.s.x v0, a01050; CHECK-NEXT: vrgather.vi v16, v8, 71051; CHECK-NEXT: vrgatherei16.vv v16, v12, v20, v0.t1052; CHECK-NEXT: vmv.v.v v8, v161053; CHECK-NEXT: ret1054 %out = shufflevector <16 x i32> %v, <16 x i32> %w, <16 x i32> <i32 7, i32 7, i32 7, i32 7, i32 26, i32 30, i32 22, i32 18, i32 7, i32 7, i32 7, i32 7, i32 24, i32 28, i32 20, i32 16>1055 ret <16 x i32> %out1056}1057 1058define <16 x i32> @shuffle_disjoint_lanes_one_splat(i32 %v, <16 x i32> %w) {1059; CHECK-LABEL: shuffle_disjoint_lanes_one_splat:1060; CHECK: # %bb.0:1061; CHECK-NEXT: lui a1, %hi(.LCPI73_0)1062; CHECK-NEXT: addi a1, a1, %lo(.LCPI73_0)1063; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu1064; CHECK-NEXT: vle16.v v16, (a1)1065; CHECK-NEXT: lui a1, 151066; CHECK-NEXT: addi a1, a1, 2401067; CHECK-NEXT: vmv.s.x v0, a11068; CHECK-NEXT: vmv.v.x v12, a01069; CHECK-NEXT: vrgatherei16.vv v12, v8, v16, v0.t1070; CHECK-NEXT: vmv.v.v v8, v121071; CHECK-NEXT: ret1072 %head = insertelement <16 x i32> poison, i32 %v, i32 01073 %splat = shufflevector <16 x i32> %head, <16 x i32> poison, <16 x i32> zeroinitializer1074 %out = shufflevector <16 x i32> %splat, <16 x i32> %w, <16 x i32> <i32 11, i32 15, i32 7, i32 3, i32 26, i32 30, i32 22, i32 18, i32 9, i32 13, i32 5, i32 1, i32 24, i32 28, i32 20, i32 16>1075 ret <16 x i32> %out1076}1077 1078define <4 x i128> @shuffle_i128(<4 x i128> %a) {1079; RV32-LABEL: shuffle_i128:1080; RV32: # %bb.0:1081; RV32-NEXT: addi sp, sp, -1281082; RV32-NEXT: .cfi_def_cfa_offset 1281083; RV32-NEXT: sw ra, 124(sp) # 4-byte Folded Spill1084; RV32-NEXT: sw s0, 120(sp) # 4-byte Folded Spill1085; RV32-NEXT: .cfi_offset ra, -41086; RV32-NEXT: .cfi_offset s0, -81087; RV32-NEXT: addi s0, sp, 1281088; RV32-NEXT: .cfi_def_cfa s0, 01089; RV32-NEXT: andi sp, sp, -641090; RV32-NEXT: lw a2, 60(a1)1091; RV32-NEXT: sw a2, 60(sp)1092; RV32-NEXT: lw a2, 56(a1)1093; RV32-NEXT: sw a2, 56(sp)1094; RV32-NEXT: lw a2, 52(a1)1095; RV32-NEXT: sw a2, 52(sp)1096; RV32-NEXT: lw a2, 48(a1)1097; RV32-NEXT: sw a2, 48(sp)1098; RV32-NEXT: lw a2, 44(a1)1099; RV32-NEXT: sw a2, 44(sp)1100; RV32-NEXT: lw a2, 40(a1)1101; RV32-NEXT: sw a2, 40(sp)1102; RV32-NEXT: lw a2, 36(a1)1103; RV32-NEXT: sw a2, 36(sp)1104; RV32-NEXT: lw a2, 32(a1)1105; RV32-NEXT: sw a2, 32(sp)1106; RV32-NEXT: lw a2, 12(a1)1107; RV32-NEXT: sw a2, 12(sp)1108; RV32-NEXT: lw a2, 8(a1)1109; RV32-NEXT: sw a2, 8(sp)1110; RV32-NEXT: lw a2, 4(a1)1111; RV32-NEXT: sw a2, 4(sp)1112; RV32-NEXT: lw a1, 0(a1)1113; RV32-NEXT: mv a2, sp1114; RV32-NEXT: sw a1, 0(sp)1115; RV32-NEXT: lui a1, %hi(.LCPI74_0)1116; RV32-NEXT: addi a1, a1, %lo(.LCPI74_0)1117; RV32-NEXT: vsetivli zero, 16, e32, m4, ta, ma1118; RV32-NEXT: vle32.v v8, (a2)1119; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1120; RV32-NEXT: vle16.v v16, (a1)1121; RV32-NEXT: vrgatherei16.vv v12, v8, v161122; RV32-NEXT: vse64.v v12, (a0)1123; RV32-NEXT: addi sp, s0, -1281124; RV32-NEXT: .cfi_def_cfa sp, 1281125; RV32-NEXT: lw ra, 124(sp) # 4-byte Folded Reload1126; RV32-NEXT: lw s0, 120(sp) # 4-byte Folded Reload1127; RV32-NEXT: .cfi_restore ra1128; RV32-NEXT: .cfi_restore s01129; RV32-NEXT: addi sp, sp, 1281130; RV32-NEXT: .cfi_def_cfa_offset 01131; RV32-NEXT: ret1132;1133; RV64-LABEL: shuffle_i128:1134; RV64: # %bb.0:1135; RV64-NEXT: addi sp, sp, -1281136; RV64-NEXT: .cfi_def_cfa_offset 1281137; RV64-NEXT: sd ra, 120(sp) # 8-byte Folded Spill1138; RV64-NEXT: sd s0, 112(sp) # 8-byte Folded Spill1139; RV64-NEXT: .cfi_offset ra, -81140; RV64-NEXT: .cfi_offset s0, -161141; RV64-NEXT: addi s0, sp, 1281142; RV64-NEXT: .cfi_def_cfa s0, 01143; RV64-NEXT: andi sp, sp, -641144; RV64-NEXT: ld a2, 56(a1)1145; RV64-NEXT: sd a2, 56(sp)1146; RV64-NEXT: ld a2, 48(a1)1147; RV64-NEXT: sd a2, 48(sp)1148; RV64-NEXT: ld a2, 40(a1)1149; RV64-NEXT: sd a2, 40(sp)1150; RV64-NEXT: ld a2, 32(a1)1151; RV64-NEXT: sd a2, 32(sp)1152; RV64-NEXT: ld a2, 8(a1)1153; RV64-NEXT: sd a2, 8(sp)1154; RV64-NEXT: ld a1, 0(a1)1155; RV64-NEXT: mv a2, sp1156; RV64-NEXT: sd a1, 0(sp)1157; RV64-NEXT: lui a1, %hi(.LCPI74_0)1158; RV64-NEXT: addi a1, a1, %lo(.LCPI74_0)1159; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1160; RV64-NEXT: vle64.v v8, (a2)1161; RV64-NEXT: vle16.v v16, (a1)1162; RV64-NEXT: vrgatherei16.vv v12, v8, v161163; RV64-NEXT: vse64.v v12, (a0)1164; RV64-NEXT: addi sp, s0, -1281165; RV64-NEXT: .cfi_def_cfa sp, 1281166; RV64-NEXT: ld ra, 120(sp) # 8-byte Folded Reload1167; RV64-NEXT: ld s0, 112(sp) # 8-byte Folded Reload1168; RV64-NEXT: .cfi_restore ra1169; RV64-NEXT: .cfi_restore s01170; RV64-NEXT: addi sp, sp, 1281171; RV64-NEXT: .cfi_def_cfa_offset 01172; RV64-NEXT: ret1173 %res = shufflevector <4 x i128> %a, <4 x i128> poison, <4 x i32> <i32 0, i32 0, i32 3, i32 2>1174 ret <4 x i128> %res1175}1176 1177define void @shuffle_i128_ldst(ptr %p) {1178; CHECK-LABEL: shuffle_i128_ldst:1179; CHECK: # %bb.0:1180; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1181; CHECK-NEXT: vle64.v v8, (a0)1182; CHECK-NEXT: lui a1, %hi(.LCPI75_0)1183; CHECK-NEXT: addi a1, a1, %lo(.LCPI75_0)1184; CHECK-NEXT: vle16.v v16, (a1)1185; CHECK-NEXT: vrgatherei16.vv v12, v8, v161186; CHECK-NEXT: vse64.v v12, (a0)1187; CHECK-NEXT: ret1188 %a = load <4 x i128>, ptr %p1189 %res = shufflevector <4 x i128> %a, <4 x i128> poison, <4 x i32> <i32 0, i32 0, i32 3, i32 2>1190 store <4 x i128> %res, ptr %p1191 ret void1192}1193 1194define void @shuffle_i256_ldst(ptr %p) {1195; CHECK-LABEL: shuffle_i256_ldst:1196; CHECK: # %bb.0:1197; CHECK-NEXT: lui a1, %hi(.LCPI76_0)1198; CHECK-NEXT: addi a1, a1, %lo(.LCPI76_0)1199; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma1200; CHECK-NEXT: vle8.v v16, (a1)1201; CHECK-NEXT: vle64.v v8, (a0)1202; CHECK-NEXT: vsext.vf2 v24, v161203; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma1204; CHECK-NEXT: vrgatherei16.vv v16, v8, v241205; CHECK-NEXT: vse64.v v16, (a0)1206; CHECK-NEXT: ret1207 %a = load <4 x i256>, ptr %p1208 %res = shufflevector <4 x i256> %a, <4 x i256> poison, <4 x i32> <i32 0, i32 0, i32 3, i32 2>1209 store <4 x i256> %res, ptr %p1210 ret void1211}1212 1213define void @shuffle_i64_splat(ptr %p) nounwind {1214; RV32-LABEL: shuffle_i64_splat:1215; RV32: # %bb.0:1216; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma1217; RV32-NEXT: vlse64.v v8, (a0), zero1218; RV32-NEXT: vse64.v v8, (a0)1219; RV32-NEXT: ret1220;1221; RV64-LABEL: shuffle_i64_splat:1222; RV64: # %bb.0:1223; RV64-NEXT: ld a1, 0(a0)1224; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma1225; RV64-NEXT: vmv.v.x v8, a11226; RV64-NEXT: vse64.v v8, (a0)1227; RV64-NEXT: ret1228 %a = load <4 x i64>, ptr %p1229 %res = shufflevector <4 x i64> %a, <4 x i64> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 0>1230 store <4 x i64> %res, ptr %p1231 ret void1232}1233 1234define void @shuffle_i128_splat(ptr %p) nounwind {1235; CHECK-LABEL: shuffle_i128_splat:1236; CHECK: # %bb.0:1237; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1238; CHECK-NEXT: vle64.v v8, (a0)1239; CHECK-NEXT: lui a1, 161240; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma1241; CHECK-NEXT: vmv.v.x v9, a11242; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, ma1243; CHECK-NEXT: vrgatherei16.vv v12, v8, v91244; CHECK-NEXT: vmv.v.v v13, v121245; CHECK-NEXT: vmv.v.v v14, v121246; CHECK-NEXT: vmv.v.v v15, v121247; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1248; CHECK-NEXT: vse64.v v12, (a0)1249; CHECK-NEXT: ret1250 %a = load <4 x i128>, ptr %p1251 %res = shufflevector <4 x i128> %a, <4 x i128> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 0>1252 store <4 x i128> %res, ptr %p1253 ret void1254}1255 1256define void @shuffle_i256_splat(ptr %p) nounwind {1257; RV32-LABEL: shuffle_i256_splat:1258; RV32: # %bb.0:1259; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1260; RV32-NEXT: vle64.v v8, (a0)1261; RV32-NEXT: lui a1, 123201262; RV32-NEXT: addi a1, a1, 2561263; RV32-NEXT: vsetivli zero, 4, e32, m1, ta, ma1264; RV32-NEXT: vmv.v.x v16, a11265; RV32-NEXT: vsetivli zero, 16, e16, m2, ta, ma1266; RV32-NEXT: vsext.vf2 v24, v161267; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, ma1268; RV32-NEXT: vrgatherei16.vv v16, v8, v241269; RV32-NEXT: vse64.v v16, (a0)1270; RV32-NEXT: ret1271;1272; RV64-LABEL: shuffle_i256_splat:1273; RV64: # %bb.0:1274; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma1275; RV64-NEXT: vle64.v v8, (a0)1276; RV64-NEXT: lui a1, 983051277; RV64-NEXT: slli a1, a1, 51278; RV64-NEXT: addi a1, a1, 11279; RV64-NEXT: slli a1, a1, 161280; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma1281; RV64-NEXT: vmv.v.x v24, a11282; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma1283; RV64-NEXT: vrgatherei16.vv v16, v8, v241284; RV64-NEXT: vse64.v v16, (a0)1285; RV64-NEXT: ret1286 %a = load <4 x i256>, ptr %p1287 %res = shufflevector <4 x i256> %a, <4 x i256> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 0>1288 store <4 x i256> %res, ptr %p1289 ret void1290}1291 1292define <16 x i32> @shuffle_m1_prefix(<16 x i32> %a) {1293; CHECK-LABEL: shuffle_m1_prefix:1294; CHECK: # %bb.0:1295; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma1296; CHECK-NEXT: vmv.v.i v0, 121297; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu1298; CHECK-NEXT: vslidedown.vi v12, v8, 21299; CHECK-NEXT: vslideup.vi v12, v8, 1, v0.t1300; CHECK-NEXT: vmv.v.v v8, v121301; CHECK-NEXT: ret1302 %out = shufflevector <16 x i32> %a, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 1, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>1303 ret <16 x i32> %out1304}1305 1306define <16 x i32> @shuffle_m2_prefix(<16 x i32> %a) {1307; CHECK-LABEL: shuffle_m2_prefix:1308; CHECK: # %bb.0:1309; CHECK-NEXT: lui a0, %hi(.LCPI81_0)1310; CHECK-NEXT: addi a0, a0, %lo(.LCPI81_0)1311; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma1312; CHECK-NEXT: vle16.v v14, (a0)1313; CHECK-NEXT: vrgatherei16.vv v12, v8, v141314; CHECK-NEXT: vmv4r.v v8, v121315; CHECK-NEXT: ret1316 %out = shufflevector <16 x i32> %a, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 5, i32 2, i32 3, i32 5, i32 7, i32 4, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>1317 ret <16 x i32> %out1318}1319 1320define <4 x i16> @vmerge_1(<4 x i16> %x) {1321; CHECK-LABEL: vmerge_1:1322; CHECK: # %bb.0:1323; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma1324; CHECK-NEXT: vmv.v.i v0, 61325; CHECK-NEXT: vmerge.vim v8, v8, 5, v01326; CHECK-NEXT: ret1327 %s = shufflevector <4 x i16> %x, <4 x i16> <i16 5, i16 5, i16 5, i16 5>, <4 x i32> <i32 0, i32 5, i32 6, i32 3>1328 ret <4 x i16> %s1329}1330 1331define <4 x i16> @vmerge_2(<4 x i16> %x) {1332; CHECK-LABEL: vmerge_2:1333; CHECK: # %bb.0:1334; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma1335; CHECK-NEXT: vmv.v.i v0, 91336; CHECK-NEXT: vmv.v.i v9, 51337; CHECK-NEXT: vmerge.vvm v8, v9, v8, v01338; CHECK-NEXT: ret1339 %s = shufflevector <4 x i16> %x, <4 x i16> <i16 poison, i16 5, i16 5, i16 poison>, <4 x i32> <i32 0, i32 5, i32 6, i32 3>1340 ret <4 x i16> %s1341}1342 1343define <4 x i16> @vmerge_3(<4 x i16> %x) {1344; CHECK-LABEL: vmerge_3:1345; CHECK: # %bb.0:1346; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma1347; CHECK-NEXT: vmv.v.i v0, 61348; CHECK-NEXT: vmerge.vim v8, v8, 5, v01349; CHECK-NEXT: ret1350 %s = shufflevector <4 x i16> %x, <4 x i16> <i16 poison, i16 5, i16 poison, i16 poison>, <4 x i32> <i32 0, i32 5, i32 5, i32 3>1351 ret <4 x i16> %s1352}1353 1354 1355define <8 x i64> @shuffle_v8i164_span_splat(<8 x i64> %a) nounwind {1356; CHECK-LABEL: shuffle_v8i164_span_splat:1357; CHECK: # %bb.0:1358; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma1359; CHECK-NEXT: vmv.v.i v9, 11360; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma1361; CHECK-NEXT: vrgatherei16.vv v12, v8, v91362; CHECK-NEXT: vmv.v.v v13, v121363; CHECK-NEXT: vmv.v.v v14, v121364; CHECK-NEXT: vmv.v.v v15, v121365; CHECK-NEXT: vmv4r.v v8, v121366; CHECK-NEXT: ret1367 %res = shufflevector <8 x i64> %a, <8 x i64> poison, <8 x i32> <i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0>1368 ret <8 x i64> %res1369}1370 1371; Doing this as a span splat requires rewriting the poison elements in the mask1372; not just using a prefix of the mask.1373define <8 x i64> @shuffle_v8i64_span_splat_neg(<8 x i64> %a) nounwind {1374; CHECK-LABEL: shuffle_v8i64_span_splat_neg:1375; CHECK: # %bb.0:1376; CHECK-NEXT: csrr a0, vlenb1377; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma1378; CHECK-NEXT: vmv.v.i v9, 11379; CHECK-NEXT: srli a0, a0, 31380; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma1381; CHECK-NEXT: vslidedown.vx v10, v9, a01382; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, ma1383; CHECK-NEXT: vrgatherei16.vv v13, v8, v101384; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma1385; CHECK-NEXT: vslidedown.vx v10, v10, a01386; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, ma1387; CHECK-NEXT: vrgatherei16.vv v12, v8, v91388; CHECK-NEXT: vrgatherei16.vv v14, v8, v101389; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma1390; CHECK-NEXT: vslidedown.vx v9, v10, a01391; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma1392; CHECK-NEXT: vrgatherei16.vv v15, v8, v91393; CHECK-NEXT: vmv4r.v v8, v121394; CHECK-NEXT: ret1395 %res = shufflevector <8 x i64> %a, <8 x i64> poison, <8 x i32> <i32 poison, i32 poison, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0>1396 ret <8 x i64> %res1397}1398 1399; Doing this as a locally repeating shuffle requires rewriting the poison1400; elements in the mask not just using a prefix of the mask.1401define <8 x i32> @shuffle_v8i32_locally_repeating_neg(<8 x i32> %a) {1402; CHECK-LABEL: shuffle_v8i32_locally_repeating_neg:1403; CHECK: # %bb.0:1404; CHECK-NEXT: lui a0, %hi(.LCPI87_0)1405; CHECK-NEXT: addi a0, a0, %lo(.LCPI87_0)1406; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma1407; CHECK-NEXT: vle16.v v12, (a0)1408; CHECK-NEXT: vrgatherei16.vv v10, v8, v121409; CHECK-NEXT: vmv.v.v v8, v101410; CHECK-NEXT: ret1411 %res = shufflevector <8 x i32> %a, <8 x i32> poison, <8 x i32> <i32 1, i32 0, i32 poison, i32 poison, i32 5, i32 4, i32 6, i32 6>1412 ret <8 x i32> %res1413}1414 1415define <8 x i8> @identity_splat0(<8 x i8> %v) {1416; CHECK-LABEL: identity_splat0:1417; CHECK: # %bb.0:1418; CHECK-NEXT: li a0, 251419; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu1420; CHECK-NEXT: vmv.s.x v0, a01421; CHECK-NEXT: vmv1r.v v9, v81422; CHECK-NEXT: vrgather.vi v9, v8, 0, v0.t1423; CHECK-NEXT: vmv1r.v v8, v91424; CHECK-NEXT: ret1425 %shuf = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 0, i32 0, i32 5, i32 6, i32 7>1426 ret <8 x i8> %shuf1427}1428 1429define <8 x i8> @identity_splat2(<8 x i8> %v) {1430; CHECK-LABEL: identity_splat2:1431; CHECK: # %bb.0:1432; CHECK-NEXT: li a0, 281433; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu1434; CHECK-NEXT: vmv.s.x v0, a01435; CHECK-NEXT: vmv1r.v v9, v81436; CHECK-NEXT: vrgather.vi v9, v8, 2, v0.t1437; CHECK-NEXT: vmv1r.v v8, v91438; CHECK-NEXT: ret1439 %shuf = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 2, i32 5, i32 6, i32 7>1440 ret <8 x i8> %shuf1441}1442 1443 1444define <8 x i8> @vmerge_vxm(<8 x i8> %v, i8 %s) {1445; CHECK-LABEL: vmerge_vxm:1446; CHECK: # %bb.0:1447; CHECK-NEXT: li a1, 251448; CHECK-NEXT: vsetivli zero, 1, e8, m1, tu, ma1449; CHECK-NEXT: vmv.s.x v0, a11450; CHECK-NEXT: vmv.s.x v8, a01451; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1452; CHECK-NEXT: vmerge.vxm v8, v8, a0, v01453; CHECK-NEXT: ret1454 %ins = insertelement <8 x i8> %v, i8 %s, i32 01455 %shuf = shufflevector <8 x i8> %ins, <8 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 0, i32 0, i32 5, i32 6, i32 7>1456 ret <8 x i8> %shuf1457}1458 1459define <8 x i8> @vmerge_vxm2(<8 x i8> %v, i8 %s) {1460; CHECK-LABEL: vmerge_vxm2:1461; CHECK: # %bb.0:1462; CHECK-NEXT: li a1, 251463; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1464; CHECK-NEXT: vmv.s.x v0, a11465; CHECK-NEXT: vmerge.vxm v8, v8, a0, v01466; CHECK-NEXT: ret1467 %ins = insertelement <8 x i8> %v, i8 %s, i32 01468 %shuf = shufflevector <8 x i8> %v, <8 x i8> %ins, <8 x i32> <i32 8, i32 1, i32 2, i32 8, i32 8, i32 5, i32 6, i32 7>1469 ret <8 x i8> %shuf1470}1471 1472define <8 x i8> @vmerge_vxm3(<8 x i8> %v, i8 %s) {1473; CHECK-LABEL: vmerge_vxm3:1474; CHECK: # %bb.0:1475; CHECK-NEXT: li a1, 251476; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1477; CHECK-NEXT: vmv.s.x v0, a11478; CHECK-NEXT: vmerge.vxm v8, v8, a0, v01479; CHECK-NEXT: ret1480 %ins = insertelement <8 x i8> %v, i8 %s, i32 01481 %splat = shufflevector <8 x i8> %ins, <8 x i8> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>1482 %shuf = shufflevector <8 x i8> %v, <8 x i8> %splat, <8 x i32> <i32 8, i32 1, i32 2, i32 8, i32 8, i32 5, i32 6, i32 7>1483 ret <8 x i8> %shuf1484}1485 1486